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21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
26#include <linux/msi.h>
27#include <linux/irqreturn.h>
28
29struct acpi_dmar_header;
30
31
32#define DMAR_INTR_REMAP 0x1
33#define DMAR_X2APIC_OPT_OUT 0x2
34
35struct intel_iommu;
36#ifdef CONFIG_DMAR_TABLE
37extern struct acpi_table_header *dmar_tbl;
38struct dmar_drhd_unit {
39 struct list_head list;
40 struct acpi_dmar_header *hdr;
41 u64 reg_base_addr;
42 struct pci_dev **devices;
43 int devices_cnt;
44 u16 segment;
45 u8 ignored:1;
46 u8 include_all:1;
47 struct intel_iommu *iommu;
48};
49
50extern struct list_head dmar_drhd_units;
51
52#define for_each_drhd_unit(drhd) \
53 list_for_each_entry(drhd, &dmar_drhd_units, list)
54
55#define for_each_active_iommu(i, drhd) \
56 list_for_each_entry(drhd, &dmar_drhd_units, list) \
57 if (i=drhd->iommu, drhd->ignored) {} else
58
59#define for_each_iommu(i, drhd) \
60 list_for_each_entry(drhd, &dmar_drhd_units, list) \
61 if (i=drhd->iommu, 0) {} else
62
63extern int dmar_table_init(void);
64extern int dmar_dev_scope_init(void);
65
66
67extern int detect_intel_iommu(void);
68extern int enable_drhd_fault_handling(void);
69
70extern int parse_ioapics_under_ir(void);
71extern int alloc_iommu(struct dmar_drhd_unit *);
72#else
73static inline int detect_intel_iommu(void)
74{
75 return -ENODEV;
76}
77
78static inline int dmar_table_init(void)
79{
80 return -ENODEV;
81}
82static inline int enable_drhd_fault_handling(void)
83{
84 return -1;
85}
86#endif
87
88struct irte {
89 union {
90 struct {
91 __u64 present : 1,
92 fpd : 1,
93 dst_mode : 1,
94 redir_hint : 1,
95 trigger_mode : 1,
96 dlvry_mode : 3,
97 avail : 4,
98 __reserved_1 : 4,
99 vector : 8,
100 __reserved_2 : 8,
101 dest_id : 32;
102 };
103 __u64 low;
104 };
105
106 union {
107 struct {
108 __u64 sid : 16,
109 sq : 2,
110 svt : 2,
111 __reserved_3 : 44;
112 };
113 __u64 high;
114 };
115};
116
117#ifdef CONFIG_IRQ_REMAP
118extern int intr_remapping_enabled;
119extern int intr_remapping_supported(void);
120extern int enable_intr_remapping(void);
121extern void disable_intr_remapping(void);
122extern int reenable_intr_remapping(int);
123
124extern int get_irte(int irq, struct irte *entry);
125extern int modify_irte(int irq, struct irte *irte_modified);
126extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
127extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
128 u16 sub_handle);
129extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
130extern int free_irte(int irq);
131
132extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
133extern struct intel_iommu *map_ioapic_to_ir(int apic);
134extern struct intel_iommu *map_hpet_to_ir(u8 id);
135extern int set_ioapic_sid(struct irte *irte, int apic);
136extern int set_hpet_sid(struct irte *irte, u8 id);
137extern int set_msi_sid(struct irte *irte, struct pci_dev *dev);
138#else
139static inline int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
140{
141 return -1;
142}
143static inline int modify_irte(int irq, struct irte *irte_modified)
144{
145 return -1;
146}
147static inline int free_irte(int irq)
148{
149 return -1;
150}
151static inline int map_irq_to_irte_handle(int irq, u16 *sub_handle)
152{
153 return -1;
154}
155static inline int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
156 u16 sub_handle)
157{
158 return -1;
159}
160static inline struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)
161{
162 return NULL;
163}
164static inline struct intel_iommu *map_ioapic_to_ir(int apic)
165{
166 return NULL;
167}
168static inline struct intel_iommu *map_hpet_to_ir(unsigned int hpet_id)
169{
170 return NULL;
171}
172static inline int set_ioapic_sid(struct irte *irte, int apic)
173{
174 return 0;
175}
176static inline int set_hpet_sid(struct irte *irte, u8 id)
177{
178 return -1;
179}
180static inline int set_msi_sid(struct irte *irte, struct pci_dev *dev)
181{
182 return 0;
183}
184
185#define intr_remapping_enabled (0)
186
187static inline int enable_intr_remapping(void)
188{
189 return -1;
190}
191
192static inline void disable_intr_remapping(void)
193{
194}
195
196static inline int reenable_intr_remapping(int eim)
197{
198 return 0;
199}
200#endif
201
202enum {
203 IRQ_REMAP_XAPIC_MODE,
204 IRQ_REMAP_X2APIC_MODE,
205};
206
207
208
209
210struct irq_data;
211extern void dmar_msi_unmask(struct irq_data *data);
212extern void dmar_msi_mask(struct irq_data *data);
213extern void dmar_msi_read(int irq, struct msi_msg *msg);
214extern void dmar_msi_write(int irq, struct msi_msg *msg);
215extern int dmar_set_interrupt(struct intel_iommu *iommu);
216extern irqreturn_t dmar_fault(int irq, void *dev_id);
217extern int arch_setup_dmar_msi(unsigned int irq);
218
219#ifdef CONFIG_INTEL_IOMMU
220extern int iommu_detected, no_iommu;
221extern struct list_head dmar_rmrr_units;
222struct dmar_rmrr_unit {
223 struct list_head list;
224 struct acpi_dmar_header *hdr;
225 u64 base_address;
226 u64 end_address;
227 struct pci_dev **devices;
228 int devices_cnt;
229};
230
231#define for_each_rmrr_units(rmrr) \
232 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
233
234struct dmar_atsr_unit {
235 struct list_head list;
236 struct acpi_dmar_header *hdr;
237 struct pci_dev **devices;
238 int devices_cnt;
239 u8 include_all:1;
240};
241
242int dmar_parse_rmrr_atsr_dev(void);
243extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
244extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
245extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
246 struct pci_dev ***devices, u16 segment);
247extern int intel_iommu_init(void);
248#else
249static inline int intel_iommu_init(void) { return -ENODEV; }
250static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
251{
252 return 0;
253}
254static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
255{
256 return 0;
257}
258static inline int dmar_parse_rmrr_atsr_dev(void)
259{
260 return 0;
261}
262#endif
263
264#endif
265
