1#ifndef __LINUX_SERIAL_SCI_H
2#define __LINUX_SERIAL_SCI_H
3
4#include <linux/serial_core.h>
5#include <linux/sh_dma.h>
6
7
8
9
10
11#define SCIx_NOT_SUPPORTED (-1)
12
13enum {
14 SCBRR_ALGO_1,
15 SCBRR_ALGO_2,
16 SCBRR_ALGO_3,
17 SCBRR_ALGO_4,
18 SCBRR_ALGO_5,
19};
20
21#define SCSCR_TIE (1 << 7)
22#define SCSCR_RIE (1 << 6)
23#define SCSCR_TE (1 << 5)
24#define SCSCR_RE (1 << 4)
25#define SCSCR_REIE (1 << 3)
26#define SCSCR_TOIE (1 << 2)
27#define SCSCR_CKE1 (1 << 1)
28#define SCSCR_CKE0 (1 << 0)
29
30
31#define SCI_TDRE 0x80
32#define SCI_RDRF 0x40
33#define SCI_ORER 0x20
34#define SCI_FER 0x10
35#define SCI_PER 0x08
36#define SCI_TEND 0x04
37
38#define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
39
40
41#define SCIF_ER 0x0080
42#define SCIF_TEND 0x0040
43#define SCIF_TDFE 0x0020
44#define SCIF_BRK 0x0010
45#define SCIF_FER 0x0008
46#define SCIF_PER 0x0004
47#define SCIF_RDF 0x0002
48#define SCIF_DR 0x0001
49
50#define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
51
52
53enum {
54 SCIx_ERI_IRQ,
55 SCIx_RXI_IRQ,
56 SCIx_TXI_IRQ,
57 SCIx_BRI_IRQ,
58 SCIx_NR_IRQS,
59
60 SCIx_MUX_IRQ = SCIx_NR_IRQS,
61};
62
63enum {
64 SCIx_PROBE_REGTYPE,
65
66 SCIx_SCI_REGTYPE,
67 SCIx_IRDA_REGTYPE,
68 SCIx_SCIFA_REGTYPE,
69 SCIx_SCIFB_REGTYPE,
70 SCIx_SH2_SCIF_FIFODATA_REGTYPE,
71 SCIx_SH3_SCIF_REGTYPE,
72 SCIx_SH4_SCIF_REGTYPE,
73 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
74 SCIx_SH4_SCIF_FIFODATA_REGTYPE,
75 SCIx_SH7705_SCIF_REGTYPE,
76
77 SCIx_NR_REGTYPES,
78};
79
80#define SCIx_IRQ_MUXED(irq) \
81{ \
82 [SCIx_ERI_IRQ] = (irq), \
83 [SCIx_RXI_IRQ] = (irq), \
84 [SCIx_TXI_IRQ] = (irq), \
85 [SCIx_BRI_IRQ] = (irq), \
86}
87
88#define SCIx_IRQ_IS_MUXED(port) \
89 ((port)->cfg->irqs[SCIx_ERI_IRQ] == \
90 (port)->cfg->irqs[SCIx_RXI_IRQ]) || \
91 ((port)->cfg->irqs[SCIx_ERI_IRQ] && \
92 !(port)->cfg->irqs[SCIx_RXI_IRQ])
93
94
95
96
97enum {
98 SCSMR, SCBRR, SCSCR, SCxSR,
99 SCFCR, SCFDR, SCxTDR, SCxRDR,
100 SCLSR, SCTFDR, SCRFDR, SCSPTR,
101
102 SCIx_NR_REGS,
103};
104
105struct device;
106
107struct plat_sci_port_ops {
108 void (*init_pins)(struct uart_port *, unsigned int cflag);
109};
110
111
112
113
114struct plat_sci_port {
115 unsigned long mapbase;
116 unsigned int irqs[SCIx_NR_IRQS];
117 unsigned int type;
118 upf_t flags;
119
120 unsigned int scbrr_algo_id;
121 unsigned int scscr;
122
123
124
125
126 int overrun_bit;
127 unsigned int error_mask;
128
129 int port_reg;
130 unsigned char regshift;
131 unsigned char regtype;
132
133 struct plat_sci_port_ops *ops;
134
135 unsigned int dma_slave_tx;
136 unsigned int dma_slave_rx;
137};
138
139#endif
140