1/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12#ifndef __MACH_CLK_H 13#define __MACH_CLK_H 14 15/* Magic rate value for use with PM QOS to request the board's maximum 16 * supported AXI rate. PM QOS will only pass positive s32 rate values 17 * through to the clock driver, so INT_MAX is used. 18 */ 19#define MSM_AXI_MAX_FREQ LONG_MAX 20 21enum clk_reset_action { 22 CLK_RESET_DEASSERT = 0, 23 CLK_RESET_ASSERT = 1 24}; 25 26struct clk; 27 28/* Rate is minimum clock rate in Hz */ 29int clk_set_min_rate(struct clk *clk, unsigned long rate); 30 31/* Rate is maximum clock rate in Hz */ 32int clk_set_max_rate(struct clk *clk, unsigned long rate); 33 34/* Assert/Deassert reset to a hardware block associated with a clock */ 35int clk_reset(struct clk *clk, enum clk_reset_action action); 36 37/* Set clock-specific configuration parameters */ 38int clk_set_flags(struct clk *clk, unsigned long flags); 39 40#endif 41