LXR linux/arch/mips/mipssim/sim

   1/*
   2 * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
   3 *
   4 *  This program is free software; you can distribute it and/or modify it
   5 *  under the terms of the GNU General Public License (Version 2) as
   6 *  published by the Free Software Foundation.
   7 *
   8 *  This program is distributed in the hope it will be useful, but WITHOUT
   9 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11 *  for more details.
  12 *
  13 *  You should have received a copy of the GNU General Public License along
  14 *  with this program; if not, write to the Free Software Foundation, Inc.,
  15 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  16 *
  17 */
  18/*
  19 * Simulator Platform-specific hooks for SMTC operation
  20 */
  21#include <linux/kernel.h>
  22#include <linux/sched.h>
  23#include <linux/cpumask.h>
  24#include <linux/interrupt.h>
  25#include <linux/smp.h>
  26
  27#include <linux/atomic.h>
  28#include <asm/cpu.h>
  29#include <asm/processor.h>
  30#include <asm/smtc.h>
  31#include <asm/system.h>
  32#include <asm/mmu_context.h>
  33#include <asm/smtc_ipi.h>
  34
  35/* VPE/SMP Prototype implements platform interfaces directly */
  36
  37/*
  38 * Cause the specified action to be performed on a targeted "CPU"
  39 */
  40
  41static void ssmtc_send_ipi_single(int cpu, unsigned int action)
  42{
  43        smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
  44        /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
  45}
  46
  47static inline void ssmtc_send_ipi_mask(const struct cpumask *mask,
  48                                       unsigned int action)
  49{
  50        unsigned int i;
  51
  52        for_each_cpu(i, mask)
  53                ssmtc_send_ipi_single(i, action);
  54}
  55
  56/*
  57 * Post-config but pre-boot cleanup entry point
  58 */
  59static void __cpuinit ssmtc_init_secondary(void)
  60{
  61        smtc_init_secondary();
  62}
  63
  64/*
  65 * SMP initialization finalization entry point
  66 */
  67static void __cpuinit ssmtc_smp_finish(void)
  68{
  69        smtc_smp_finish();
  70}
  71
  72/*
  73 * Hook for after all CPUs are online
  74 */
  75static void ssmtc_cpus_done(void)
  76{
  77}
  78
  79/*
  80 * Platform "CPU" startup hook
  81 */
  82static void __cpuinit ssmtc_boot_secondary(int cpu, struct task_struct *idle)
  83{
  84        smtc_boot_secondary(cpu, idle);
  85}
  86
  87static void __init ssmtc_smp_setup(void)
  88{
  89        if (read_c0_config3() & (1 << 2))
  90                mipsmt_build_cpu_map(0);
  91}
  92
  93/*
  94 * Platform SMP pre-initialization
  95 */
  96static void ssmtc_prepare_cpus(unsigned int max_cpus)
  97{
  98        /*
  99         * As noted above, we can assume a single CPU for now
 100         * but it may be multithreaded.
 101         */
 102
 103        if (read_c0_config3() & (1 << 2)) {
 104                mipsmt_prepare_cpus();
 105        }
 106}
 107
 108struct plat_smp_ops ssmtc_smp_ops = {
 109        .send_ipi_single        = ssmtc_send_ipi_single,
 110        .send_ipi_mask          = ssmtc_send_ipi_mask,
 111        .init_secondary         = ssmtc_init_secondary,
 112        .smp_finish             = ssmtc_smp_finish,
 113        .cpus_done              = ssmtc_cpus_done,
 114        .boot_secondary         = ssmtc_boot_secondary,
 115        .smp_setup              = ssmtc_smp_setup,
 116        .prepare_cpus           = ssmtc_prepare_cpus,
 117};
 118