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8#define AB5500_PERM_RD (0x01)
9#define AB5500_PERM_WR (0x02)
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12#define AB5500_PERM_RO (AB5500_PERM_RD)
13#define AB5500_PERM_RW (AB5500_PERM_RD | AB5500_PERM_WR)
14
15#define AB5500_MASK_BASE (0x60)
16#define AB5500_MASK_END (0x79)
17#define AB5500_CHIP_ID (0x20)
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25struct ab5500_reg_range {
26 u8 first;
27 u8 last;
28 u8 perm;
29};
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36struct ab5500_i2c_ranges {
37 u8 nranges;
38 u8 bankid;
39 const struct ab5500_reg_range *range;
40};
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47struct ab5500_i2c_banks {
48 u8 nbanks;
49 const struct ab5500_i2c_ranges *bank;
50};
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57struct ab5500_bank {
58 u8 slave_addr;
59 const char *name;
60};
61
62static const struct ab5500_bank bankinfo[AB5500_NUM_BANKS] = {
63 [AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP] = {
64 AB5500_ADDR_VIT_IO_I2C_CLK_TST_OTP, "VIT_IO_I2C_CLK_TST_OTP"},
65 [AB5500_BANK_VDDDIG_IO_I2C_CLK_TST] = {
66 AB5500_ADDR_VDDDIG_IO_I2C_CLK_TST, "VDDDIG_IO_I2C_CLK_TST"},
67 [AB5500_BANK_VDENC] = {AB5500_ADDR_VDENC, "VDENC"},
68 [AB5500_BANK_SIM_USBSIM] = {AB5500_ADDR_SIM_USBSIM, "SIM_USBSIM"},
69 [AB5500_BANK_LED] = {AB5500_ADDR_LED, "LED"},
70 [AB5500_BANK_ADC] = {AB5500_ADDR_ADC, "ADC"},
71 [AB5500_BANK_RTC] = {AB5500_ADDR_RTC, "RTC"},
72 [AB5500_BANK_STARTUP] = {AB5500_ADDR_STARTUP, "STARTUP"},
73 [AB5500_BANK_DBI_ECI] = {AB5500_ADDR_DBI_ECI, "DBI-ECI"},
74 [AB5500_BANK_CHG] = {AB5500_ADDR_CHG, "CHG"},
75 [AB5500_BANK_FG_BATTCOM_ACC] = {
76 AB5500_ADDR_FG_BATTCOM_ACC, "FG_BATCOM_ACC"},
77 [AB5500_BANK_USB] = {AB5500_ADDR_USB, "USB"},
78 [AB5500_BANK_IT] = {AB5500_ADDR_IT, "IT"},
79 [AB5500_BANK_VIBRA] = {AB5500_ADDR_VIBRA, "VIBRA"},
80 [AB5500_BANK_AUDIO_HEADSETUSB] = {
81 AB5500_ADDR_AUDIO_HEADSETUSB, "AUDIO_HEADSETUSB"},
82};
83
84int ab5500_get_register_interruptible_raw(struct ab5500 *ab, u8 bank, u8 reg,
85 u8 *value);
86int ab5500_mask_and_set_register_interruptible_raw(struct ab5500 *ab, u8 bank,
87 u8 reg, u8 bitmask, u8 bitvalues);
88