LXR linux/drivers/net/ethernet/amd/sun3lance.c

   1/* sun3lance.c: Ethernet driver for SUN3 Lance chip */
   2/*
   3
   4  Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net).
   5  This driver is a part of the linux kernel, and is thus distributed
   6  under the GNU General Public License.
   7
   8  The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically
   9  true for the correct IRQ and address of the lance registers.  They
  10  have not been widely tested, however.  What we probably need is a
  11  "proper" way to search for a device in the sun3's prom, but, alas,
  12  linux has no such thing.
  13
  14  This driver is largely based on atarilance.c, by Roman Hodek.  Other
  15  sources of inspiration were the NetBSD sun3 am7990 driver, and the
  16  linux sparc lance driver (sunlance.c).
  17
  18  There are more assumptions made throughout this driver, it almost
  19  certainly still needs work, but it does work at least for RARP/BOOTP and
  20  mounting the root NFS filesystem.
  21
  22*/
  23
  24static char *version = "sun3lance.c: v1.2 1/12/2001  Sam Creasey (sammy@sammy.net)\n";
  25
  26#include <linux/module.h>
  27#include <linux/stddef.h>
  28#include <linux/kernel.h>
  29#include <linux/string.h>
  30#include <linux/errno.h>
  31#include <linux/interrupt.h>
  32#include <linux/init.h>
  33#include <linux/ioport.h>
  34#include <linux/delay.h>
  35#include <linux/netdevice.h>
  36#include <linux/etherdevice.h>
  37#include <linux/skbuff.h>
  38#include <linux/bitops.h>
  39
  40#include <asm/cacheflush.h>
  41#include <asm/setup.h>
  42#include <asm/irq.h>
  43#include <asm/io.h>
  44#include <asm/pgtable.h>
  45#include <asm/dvma.h>
  46#include <asm/idprom.h>
  47#include <asm/machines.h>
  48
  49#ifdef CONFIG_SUN3
  50#include <asm/sun3mmu.h>
  51#else
  52#include <asm/sun3xprom.h>
  53#endif
  54
  55/* sun3/60 addr/irq for the lance chip.  If your sun is different,
  56   change this. */
  57#define LANCE_OBIO 0x120000
  58#define LANCE_IRQ IRQ_AUTO_3
  59
  60/* Debug level:
  61 *  0 = silent, print only serious errors
  62 *  1 = normal, print error messages
  63 *  2 = debug, print debug infos
  64 *  3 = debug, print even more debug infos (packet data)
  65 */
  66
  67#define LANCE_DEBUG     0
  68
  69#ifdef LANCE_DEBUG
  70static int lance_debug = LANCE_DEBUG;
  71#else
  72static int lance_debug = 1;
  73#endif
  74module_param(lance_debug, int, 0);
  75MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
  76MODULE_LICENSE("GPL");
  77
  78#define DPRINTK(n,a) \
  79        do {  \
  80                if (lance_debug >= n)  \
  81                        printk a; \
  82        } while( 0 )
  83
  84
  85/* we're only using 32k of memory, so we use 4 TX
  86   buffers and 16 RX buffers.  These values are expressed as log2. */
  87
  88#define TX_LOG_RING_SIZE                        3
  89#define RX_LOG_RING_SIZE                        5
  90
  91/* These are the derived values */
  92
  93#define TX_RING_SIZE                    (1 << TX_LOG_RING_SIZE)
  94#define TX_RING_LEN_BITS                (TX_LOG_RING_SIZE << 5)
  95#define TX_RING_MOD_MASK                (TX_RING_SIZE - 1)
  96
  97#define RX_RING_SIZE                    (1 << RX_LOG_RING_SIZE)
  98#define RX_RING_LEN_BITS                (RX_LOG_RING_SIZE << 5)
  99#define RX_RING_MOD_MASK                (RX_RING_SIZE - 1)
 100
 101/* Definitions for packet buffer access: */
 102#define PKT_BUF_SZ              1544
 103
 104/* Get the address of a packet buffer corresponding to a given buffer head */
 105#define PKTBUF_ADDR(head)       (void *)((unsigned long)(MEM) | (head)->base)
 106
 107
 108/* The LANCE Rx and Tx ring descriptors. */
 109struct lance_rx_head {
 110        unsigned short  base;           /* Low word of base addr */
 111        volatile unsigned char  flag;
 112        unsigned char  base_hi; /* High word of base addr (unused) */
 113        short buf_length;       /* This length is 2s complement! */
 114        volatile short msg_length;      /* This length is "normal". */
 115};
 116
 117struct lance_tx_head {
 118        unsigned short base;            /* Low word of base addr */
 119        volatile unsigned char  flag;
 120        unsigned char base_hi;  /* High word of base addr (unused) */
 121        short length;           /* Length is 2s complement! */
 122        volatile short misc;
 123};
 124
 125/* The LANCE initialization block, described in databook. */
 126struct lance_init_block {
 127        unsigned short  mode;           /* Pre-set mode */
 128        unsigned char   hwaddr[6];      /* Physical ethernet address */
 129        unsigned int    filter[2];      /* Multicast filter (unused). */
 130        /* Receive and transmit ring base, along with length bits. */
 131        unsigned short rdra;
 132        unsigned short rlen;
 133        unsigned short tdra;
 134        unsigned short tlen;
 135        unsigned short pad[4]; /* is thie needed? */
 136};
 137
 138/* The whole layout of the Lance shared memory */
 139struct lance_memory {
 140        struct lance_init_block init;
 141        struct lance_tx_head    tx_head[TX_RING_SIZE];
 142        struct lance_rx_head    rx_head[RX_RING_SIZE];
 143        char   rx_data[RX_RING_SIZE][PKT_BUF_SZ];
 144        char   tx_data[TX_RING_SIZE][PKT_BUF_SZ];
 145};
 146
 147/* The driver's private device structure */
 148
 149struct lance_private {
 150        volatile unsigned short *iobase;
 151        struct lance_memory     *mem;
 152        int new_rx, new_tx;     /* The next free ring entry */
 153        int old_tx, old_rx;     /* ring entry to be processed */
 154/* These two must be longs for set_bit() */
 155        long        tx_full;
 156        long        lock;
 157};
 158
 159/* I/O register access macros */
 160
 161#define MEM     lp->mem
 162#define DREG    lp->iobase[0]
 163#define AREG    lp->iobase[1]
 164#define REGA(a) (*( AREG = (a), &DREG ))
 165
 166/* Definitions for the Lance */
 167
 168/* tx_head flags */
 169#define TMD1_ENP                0x01    /* end of packet */
 170#define TMD1_STP                0x02    /* start of packet */
 171#define TMD1_DEF                0x04    /* deferred */
 172#define TMD1_ONE                0x08    /* one retry needed */
 173#define TMD1_MORE               0x10    /* more than one retry needed */
 174#define TMD1_ERR                0x40    /* error summary */
 175#define TMD1_OWN                0x80    /* ownership (set: chip owns) */
 176
 177#define TMD1_OWN_CHIP   TMD1_OWN
 178#define TMD1_OWN_HOST   0
 179
 180/* tx_head misc field */
 181#define TMD3_TDR                0x03FF  /* Time Domain Reflectometry counter */
 182#define TMD3_RTRY               0x0400  /* failed after 16 retries */
 183#define TMD3_LCAR               0x0800  /* carrier lost */
 184#define TMD3_LCOL               0x1000  /* late collision */
 185#define TMD3_UFLO               0x4000  /* underflow (late memory) */
 186#define TMD3_BUFF               0x8000  /* buffering error (no ENP) */
 187
 188/* rx_head flags */
 189#define RMD1_ENP                0x01    /* end of packet */
 190#define RMD1_STP                0x02    /* start of packet */
 191#define RMD1_BUFF               0x04    /* buffer error */
 192#define RMD1_CRC                0x08    /* CRC error */
 193#define RMD1_OFLO               0x10    /* overflow */
 194#define RMD1_FRAM               0x20    /* framing error */
 195#define RMD1_ERR                0x40    /* error summary */
 196#define RMD1_OWN                0x80    /* ownership (set: ship owns) */
 197
 198#define RMD1_OWN_CHIP   RMD1_OWN
 199#define RMD1_OWN_HOST   0
 200
 201/* register names */
 202#define CSR0    0               /* mode/status */
 203#define CSR1    1               /* init block addr (low) */
 204#define CSR2    2               /* init block addr (high) */
 205#define CSR3    3               /* misc */
 206#define CSR8    8               /* address filter */
 207#define CSR15   15              /* promiscuous mode */
 208
 209/* CSR0 */
 210/* (R=readable, W=writeable, S=set on write, C=clear on write) */
 211#define CSR0_INIT       0x0001          /* initialize (RS) */
 212#define CSR0_STRT       0x0002          /* start (RS) */
 213#define CSR0_STOP       0x0004          /* stop (RS) */
 214#define CSR0_TDMD       0x0008          /* transmit demand (RS) */
 215#define CSR0_TXON       0x0010          /* transmitter on (R) */
 216#define CSR0_RXON       0x0020          /* receiver on (R) */
 217#define CSR0_INEA       0x0040          /* interrupt enable (RW) */
 218#define CSR0_INTR       0x0080          /* interrupt active (R) */
 219#define CSR0_IDON       0x0100          /* initialization done (RC) */
 220#define CSR0_TINT       0x0200          /* transmitter interrupt (RC) */
 221#define CSR0_RINT       0x0400          /* receiver interrupt (RC) */
 222#define CSR0_MERR       0x0800          /* memory error (RC) */
 223#define CSR0_MISS       0x1000          /* missed frame (RC) */
 224#define CSR0_CERR       0x2000          /* carrier error (no heartbeat :-) (RC) */
 225#define CSR0_BABL       0x4000          /* babble: tx-ed too many bits (RC) */
 226#define CSR0_ERR        0x8000          /* error (RC) */
 227
 228/* CSR3 */
 229#define CSR3_BCON       0x0001          /* byte control */
 230#define CSR3_ACON       0x0002          /* ALE control */
 231#define CSR3_BSWP       0x0004          /* byte swap (1=big endian) */
 232
 233/***************************** Prototypes *****************************/
 234
 235static int lance_probe( struct net_device *dev);
 236static int lance_open( struct net_device *dev );
 237static void lance_init_ring( struct net_device *dev );
 238static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
 239static irqreturn_t lance_interrupt( int irq, void *dev_id);
 240static int lance_rx( struct net_device *dev );
 241static int lance_close( struct net_device *dev );
 242static void set_multicast_list( struct net_device *dev );
 243
 244/************************* End of Prototypes **************************/
 245
 246struct net_device * __init sun3lance_probe(int unit)
 247{
 248        struct net_device *dev;
 249        static int found;
 250        int err = -ENODEV;
 251
 252        if (!MACH_IS_SUN3 && !MACH_IS_SUN3X)
 253                return ERR_PTR(-ENODEV);
 254
 255        /* check that this machine has an onboard lance */
 256        switch(idprom->id_machtype) {
 257        case SM_SUN3|SM_3_50:
 258        case SM_SUN3|SM_3_60:
 259        case SM_SUN3X|SM_3_80:
 260                /* these machines have lance */
 261                break;
 262
 263        default:
 264                return ERR_PTR(-ENODEV);
 265        }
 266
 267        if (found)
 268                return ERR_PTR(-ENODEV);
 269
 270        dev = alloc_etherdev(sizeof(struct lance_private));
 271        if (!dev)
 272                return ERR_PTR(-ENOMEM);
 273        if (unit >= 0) {
 274                sprintf(dev->name, "eth%d", unit);
 275                netdev_boot_setup_check(dev);
 276        }
 277
 278        if (!lance_probe(dev))
 279                goto out;
 280
 281        err = register_netdev(dev);
 282        if (err)
 283                goto out1;
 284        found = 1;
 285        return dev;
 286
 287out1:
 288#ifdef CONFIG_SUN3
 289        iounmap((void __iomem *)dev->base_addr);
 290#endif
 291out:
 292        free_netdev(dev);
 293        return ERR_PTR(err);
 294}
 295
 296static const struct net_device_ops lance_netdev_ops = {
 297        .ndo_open               = lance_open,
 298        .ndo_stop               = lance_close,
 299        .ndo_start_xmit         = lance_start_xmit,
 300        .ndo_set_rx_mode        = set_multicast_list,
 301        .ndo_set_mac_address    = NULL,
 302        .ndo_change_mtu         = eth_change_mtu,
 303        .ndo_validate_addr      = eth_validate_addr,
 304};
 305
 306static int __init lance_probe( struct net_device *dev)
 307{
 308        unsigned long ioaddr;
 309
 310        struct lance_private    *lp;
 311        int                     i;
 312        static int              did_version;
 313        volatile unsigned short *ioaddr_probe;
 314        unsigned short tmp1, tmp2;
 315
 316#ifdef CONFIG_SUN3
 317        ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE);
 318        if (!ioaddr)
 319                return 0;
 320#else
 321        ioaddr = SUN3X_LANCE;
 322#endif
 323
 324        /* test to see if there's really a lance here */
 325        /* (CSRO_INIT shouldn't be readable) */
 326
 327        ioaddr_probe = (volatile unsigned short *)ioaddr;
 328        tmp1 = ioaddr_probe[0];
 329        tmp2 = ioaddr_probe[1];
 330
 331        ioaddr_probe[1] = CSR0;
 332        ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
 333
 334        if(ioaddr_probe[0] != CSR0_STOP) {
 335                ioaddr_probe[0] = tmp1;
 336                ioaddr_probe[1] = tmp2;
 337
 338#ifdef CONFIG_SUN3
 339                iounmap((void __iomem *)ioaddr);
 340#endif
 341                return 0;
 342        }
 343
 344        lp = netdev_priv(dev);
 345
 346        /* XXX - leak? */
 347        MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000);
 348        if (MEM == NULL) {
 349#ifdef CONFIG_SUN3
 350                iounmap((void __iomem *)ioaddr);
 351#endif
 352                printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n");
 353                return 0;
 354        }
 355
 356        lp->iobase = (volatile unsigned short *)ioaddr;
 357        dev->base_addr = (unsigned long)ioaddr; /* informational only */
 358
 359        REGA(CSR0) = CSR0_STOP;
 360
 361        if (request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev) < 0) {
 362#ifdef CONFIG_SUN3
 363                iounmap((void __iomem *)ioaddr);
 364#endif
 365                dvma_free((void *)MEM);
 366                printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n");
 367                return 0;
 368        }
 369        dev->irq = (unsigned short)LANCE_IRQ;
 370
 371
 372        printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ",
 373                   dev->name,
 374                   (unsigned long)ioaddr,
 375                   (unsigned long)MEM,
 376                   dev->irq);
 377
 378        /* copy in the ethernet address from the prom */
 379        for(i = 0; i < 6 ; i++)
 380             dev->dev_addr[i] = idprom->id_ethaddr[i];
 381
 382        /* tell the card it's ether address, bytes swapped */
 383        MEM->init.hwaddr[0] = dev->dev_addr[1];
 384        MEM->init.hwaddr[1] = dev->dev_addr[0];
 385        MEM->init.hwaddr[2] = dev->dev_addr[3];
 386        MEM->init.hwaddr[3] = dev->dev_addr[2];
 387        MEM->init.hwaddr[4] = dev->dev_addr[5];
 388        MEM->init.hwaddr[5] = dev->dev_addr[4];
 389
 390        printk("%pM\n", dev->dev_addr);
 391
 392        MEM->init.mode = 0x0000;
 393        MEM->init.filter[0] = 0x00000000;
 394        MEM->init.filter[1] = 0x00000000;
 395        MEM->init.rdra = dvma_vtob(MEM->rx_head);
 396        MEM->init.rlen    = (RX_LOG_RING_SIZE << 13) |
 397                (dvma_vtob(MEM->rx_head) >> 16);
 398        MEM->init.tdra = dvma_vtob(MEM->tx_head);
 399        MEM->init.tlen    = (TX_LOG_RING_SIZE << 13) |
 400                (dvma_vtob(MEM->tx_head) >> 16);
 401
 402        DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n",
 403               dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head),
 404               (dvma_vtob(MEM->tx_head))));
 405
 406        if (did_version++ == 0)
 407                printk( version );
 408
 409        dev->netdev_ops = &lance_netdev_ops;
 410//      KLUDGE -- REMOVE ME
 411        set_bit(__LINK_STATE_PRESENT, &dev->state);
 412
 413
 414        return 1;
 415}
 416
 417static int lance_open( struct net_device *dev )
 418{
 419        struct lance_private *lp = netdev_priv(dev);
 420        int i;
 421
 422        DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
 423
 424        REGA(CSR0) = CSR0_STOP;
 425
 426        lance_init_ring(dev);
 427
 428        /* From now on, AREG is kept to point to CSR0 */
 429        REGA(CSR0) = CSR0_INIT;
 430
 431        i = 1000000;
 432        while (--i > 0)
 433                if (DREG & CSR0_IDON)
 434                        break;
 435        if (i <= 0 || (DREG & CSR0_ERR)) {
 436                DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
 437                                          dev->name, i, DREG ));
 438                DREG = CSR0_STOP;
 439                return -EIO;
 440        }
 441
 442        DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA;
 443
 444        netif_start_queue(dev);
 445
 446        DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
 447
 448        return 0;
 449}
 450
 451
 452/* Initialize the LANCE Rx and Tx rings. */
 453
 454static void lance_init_ring( struct net_device *dev )
 455{
 456        struct lance_private *lp = netdev_priv(dev);
 457        int i;
 458
 459        lp->lock = 0;
 460        lp->tx_full = 0;
 461        lp->new_rx = lp->new_tx = 0;
 462        lp->old_rx = lp->old_tx = 0;
 463
 464        for( i = 0; i < TX_RING_SIZE; i++ ) {
 465                MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]);
 466                MEM->tx_head[i].flag = 0;
 467                MEM->tx_head[i].base_hi =
 468                        (dvma_vtob(MEM->tx_data[i])) >>16;
 469                MEM->tx_head[i].length = 0;
 470                MEM->tx_head[i].misc = 0;
 471        }
 472
 473        for( i = 0; i < RX_RING_SIZE; i++ ) {
 474                MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]);
 475                MEM->rx_head[i].flag = RMD1_OWN_CHIP;
 476                MEM->rx_head[i].base_hi =
 477                        (dvma_vtob(MEM->rx_data[i])) >> 16;
 478                MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000;
 479                MEM->rx_head[i].msg_length = 0;
 480        }
 481
 482        /* tell the card it's ether address, bytes swapped */
 483        MEM->init.hwaddr[0] = dev->dev_addr[1];
 484        MEM->init.hwaddr[1] = dev->dev_addr[0];
 485        MEM->init.hwaddr[2] = dev->dev_addr[3];
 486        MEM->init.hwaddr[3] = dev->dev_addr[2];
 487        MEM->init.hwaddr[4] = dev->dev_addr[5];
 488        MEM->init.hwaddr[5] = dev->dev_addr[4];
 489
 490        MEM->init.mode = 0x0000;
 491        MEM->init.filter[0] = 0x00000000;
 492        MEM->init.filter[1] = 0x00000000;
 493        MEM->init.rdra = dvma_vtob(MEM->rx_head);
 494        MEM->init.rlen    = (RX_LOG_RING_SIZE << 13) |
 495                (dvma_vtob(MEM->rx_head) >> 16);
 496        MEM->init.tdra = dvma_vtob(MEM->tx_head);
 497        MEM->init.tlen    = (TX_LOG_RING_SIZE << 13) |
 498                (dvma_vtob(MEM->tx_head) >> 16);
 499
 500
 501        /* tell the lance the address of its init block */
 502        REGA(CSR1) = dvma_vtob(&(MEM->init));
 503        REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16;
 504
 505#ifdef CONFIG_SUN3X
 506        REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON;
 507#else
 508        REGA(CSR3) = CSR3_BSWP;
 509#endif
 510
 511}
 512
 513
 514static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
 515{
 516        struct lance_private *lp = netdev_priv(dev);
 517        int entry, len;
 518        struct lance_tx_head *head;
 519        unsigned long flags;
 520
 521        DPRINTK( 1, ( "%s: transmit start.\n",
 522                      dev->name));
 523
 524        /* Transmitter timeout, serious problems. */
 525        if (netif_queue_stopped(dev)) {
 526                int tickssofar = jiffies - dev_trans_start(dev);
 527                if (tickssofar < HZ/5)
 528                        return NETDEV_TX_BUSY;
 529
 530                DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
 531                                          dev->name, DREG ));
 532                DREG = CSR0_STOP;
 533                /*
 534                 * Always set BSWP after a STOP as STOP puts it back into
 535                 * little endian mode.
 536                 */
 537                REGA(CSR3) = CSR3_BSWP;
 538                dev->stats.tx_errors++;
 539
 540                if(lance_debug >= 2) {
 541                        int i;
 542                        printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n",
 543                               lp->old_tx, lp->new_tx,
 544                               lp->tx_full ? " (full)" : "",
 545                               lp->new_rx );
 546                        for( i = 0 ; i < RX_RING_SIZE; i++ )
 547                                printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
 548                                        i, MEM->rx_head[i].base,
 549                                        -MEM->rx_head[i].buf_length,
 550                                        MEM->rx_head[i].msg_length);
 551                        for( i = 0 ; i < TX_RING_SIZE; i++ )
 552                                printk("tx #%d: base=%04x len=%04x misc=%04x\n",
 553                                       i, MEM->tx_head[i].base,
 554                                       -MEM->tx_head[i].length,
 555                                       MEM->tx_head[i].misc );
 556                }
 557
 558                lance_init_ring(dev);
 559                REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
 560
 561                netif_start_queue(dev);
 562
 563                return NETDEV_TX_OK;
 564        }
 565
 566
 567        /* Block a timer-based transmit from overlapping.  This could better be
 568           done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
 569
 570        /* Block a timer-based transmit from overlapping with us by
 571           stopping the queue for a bit... */
 572
 573        netif_stop_queue(dev);
 574
 575        if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
 576                printk( "%s: tx queue lock!.\n", dev->name);
 577                /* don't clear dev->tbusy flag. */
 578                return NETDEV_TX_BUSY;
 579        }
 580
 581        AREG = CSR0;
 582        DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
 583                                  dev->name, DREG ));
 584
 585#ifdef CONFIG_SUN3X
 586        /* this weirdness doesn't appear on sun3... */
 587        if(!(DREG & CSR0_INIT)) {
 588                DPRINTK( 1, ("INIT not set, reinitializing...\n"));
 589                REGA( CSR0 ) = CSR0_STOP;
 590                lance_init_ring(dev);
 591                REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
 592        }
 593#endif
 594
 595        /* Fill in a Tx ring entry */
 596#if 0
 597        if (lance_debug >= 2) {
 598                printk( "%s: TX pkt %d type 0x%04x"
 599                        " from %s to %s"
 600                        " data at 0x%08x len %d\n",
 601                        dev->name, lp->new_tx, ((u_short *)skb->data)[6],
 602                        DEV_ADDR(&skb->data[6]), DEV_ADDR(skb->data),
 603                        (int)skb->data, (int)skb->len );
 604        }
 605#endif
 606        /* We're not prepared for the int until the last flags are set/reset.
 607         * And the int may happen already after setting the OWN_CHIP... */
 608        local_irq_save(flags);
 609
 610        /* Mask to ring buffer boundary. */
 611        entry = lp->new_tx;
 612        head  = &(MEM->tx_head[entry]);
 613
 614        /* Caution: the write order is important here, set the "ownership" bits
 615         * last.
 616         */
 617
 618        /* the sun3's lance needs it's buffer padded to the minimum
 619           size */
 620        len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
 621
 622//      head->length = -len;
 623        head->length = (-len) | 0xf000;
 624        head->misc = 0;
 625
 626        skb_copy_from_linear_data(skb, PKTBUF_ADDR(head), skb->len);
 627        if (len != skb->len)
 628                memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len);
 629
 630        head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
 631        lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK;
 632        dev->stats.tx_bytes += skb->len;
 633
 634        /* Trigger an immediate send poll. */
 635        REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
 636        AREG = CSR0;
 637        DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",
 638                                  dev->name, DREG ));
 639        dev_kfree_skb(skb);
 640
 641        lp->lock = 0;
 642        if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
 643            TMD1_OWN_HOST)
 644                netif_start_queue(dev);
 645
 646        local_irq_restore(flags);
 647
 648        return NETDEV_TX_OK;
 649}
 650
 651/* The LANCE interrupt handler. */
 652
 653static irqreturn_t lance_interrupt( int irq, void *dev_id)
 654{
 655        struct net_device *dev = dev_id;
 656        struct lance_private *lp = netdev_priv(dev);
 657        int csr0;
 658        static int in_interrupt;
 659
 660        if (dev == NULL) {
 661                DPRINTK( 1, ( "lance_interrupt(): invalid dev_id\n" ));
 662                return IRQ_NONE;
 663        }
 664
 665        if (in_interrupt)
 666                DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev->name ));
 667        in_interrupt = 1;
 668
 669 still_more:
 670        flush_cache_all();
 671
 672        AREG = CSR0;
 673        csr0 = DREG;
 674
 675        /* ack interrupts */
 676        DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON);
 677
 678        /* clear errors */
 679        if(csr0 & CSR0_ERR)
 680                DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS;
 681
 682
 683        DPRINTK( 2, ( "%s: interrupt  csr0=%04x new csr=%04x.\n",
 684                      dev->name, csr0, DREG ));
 685
 686        if (csr0 & CSR0_TINT) {                 /* Tx-done interrupt */
 687                int old_tx = lp->old_tx;
 688
 689//              if(lance_debug >= 3) {
 690//                      int i;
 691//
 692//                      printk("%s: tx int\n", dev->name);
 693//
 694//                      for(i = 0; i < TX_RING_SIZE; i++)
 695//                              printk("ring %d flag=%04x\n", i,
 696//                                     MEM->tx_head[i].flag);
 697//              }
 698
 699                while( old_tx != lp->new_tx) {
 700                        struct lance_tx_head *head = &(MEM->tx_head[old_tx]);
 701
 702                        DPRINTK(3, ("on tx_ring %d\n", old_tx));
 703
 704                        if (head->flag & TMD1_OWN_CHIP)
 705                                break; /* It still hasn't been Txed */
 706
 707                        if (head->flag & TMD1_ERR) {
 708                                int status = head->misc;
 709                                dev->stats.tx_errors++;
 710                                if (status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
 711                                if (status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
 712                                if (status & TMD3_LCOL) dev->stats.tx_window_errors++;
 713                                if (status & (TMD3_UFLO | TMD3_BUFF)) {
 714                                        dev->stats.tx_fifo_errors++;
 715                                        printk("%s: Tx FIFO error\n",
 716                                               dev->name);
 717                                        REGA(CSR0) = CSR0_STOP;
 718                                        REGA(CSR3) = CSR3_BSWP;
 719                                        lance_init_ring(dev);
 720                                        REGA(CSR0) = CSR0_STRT | CSR0_INEA;
 721                                        return IRQ_HANDLED;
 722                                }
 723                        } else if(head->flag & (TMD1_ENP | TMD1_STP)) {
 724
 725                                head->flag &= ~(TMD1_ENP | TMD1_STP);
 726                                if(head->flag & (TMD1_ONE | TMD1_MORE))
 727                                        dev->stats.collisions++;
 728
 729                                dev->stats.tx_packets++;
 730                                DPRINTK(3, ("cleared tx ring %d\n", old_tx));
 731                        }
 732                        old_tx = (old_tx +1) & TX_RING_MOD_MASK;
 733                }
 734
 735                lp->old_tx = old_tx;
 736        }
 737
 738
 739        if (netif_queue_stopped(dev)) {
 740                /* The ring is no longer full, clear tbusy. */
 741                netif_start_queue(dev);
 742                netif_wake_queue(dev);
 743        }
 744
 745        if (csr0 & CSR0_RINT)                   /* Rx interrupt */
 746                lance_rx( dev );
 747
 748        /* Log misc errors. */
 749        if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
 750        if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
 751        if (csr0 & CSR0_MERR) {
 752                DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
 753                              "status %04x.\n", dev->name, csr0 ));
 754                /* Restart the chip. */
 755                REGA(CSR0) = CSR0_STOP;
 756                REGA(CSR3) = CSR3_BSWP;
 757                lance_init_ring(dev);
 758                REGA(CSR0) = CSR0_STRT | CSR0_INEA;
 759        }
 760
 761
 762    /* Clear any other interrupt, and set interrupt enable. */
 763//      DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
 764//                 CSR0_IDON | CSR0_INEA;
 765
 766        REGA(CSR0) = CSR0_INEA;
 767
 768        if(DREG & (CSR0_RINT | CSR0_TINT)) {
 769             DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG));
 770             goto still_more;
 771        }
 772
 773        DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
 774                                  dev->name, DREG ));
 775        in_interrupt = 0;
 776        return IRQ_HANDLED;
 777}
 778
 779/* get packet, toss into skbuff */
 780static int lance_rx( struct net_device *dev )
 781{
 782        struct lance_private *lp = netdev_priv(dev);
 783        int entry = lp->new_rx;
 784
 785        /* If we own the next entry, it's a new packet. Send it up. */
 786        while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
 787                struct lance_rx_head *head = &(MEM->rx_head[entry]);
 788                int status = head->flag;
 789
 790                if (status != (RMD1_ENP|RMD1_STP)) {  /* There was an error. */
 791                        /* There is a tricky error noted by John Murphy,
 792                           <murf@perftech.com> to Russ Nelson: Even with
 793                           full-sized buffers it's possible for a jabber packet to use two
 794                           buffers, with only the last correctly noting the error. */
 795                        if (status & RMD1_ENP)  /* Only count a general error at the */
 796                                dev->stats.rx_errors++; /* end of a packet.*/
 797                        if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
 798                        if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
 799                        if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
 800                        if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
 801                        head->flag &= (RMD1_ENP|RMD1_STP);
 802                } else {
 803                        /* Malloc up new buffer, compatible with net-3. */
 804//                      short pkt_len = head->msg_length;// & 0xfff;
 805                        short pkt_len = (head->msg_length & 0xfff) - 4;
 806                        struct sk_buff *skb;
 807
 808                        if (pkt_len < 60) {
 809                                printk( "%s: Runt packet!\n", dev->name );
 810                                dev->stats.rx_errors++;
 811                        }
 812                        else {
 813                                skb = dev_alloc_skb( pkt_len+2 );
 814                                if (skb == NULL) {
 815                                        DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
 816                                                      dev->name ));
 817
 818                                        dev->stats.rx_dropped++;
 819                                        head->msg_length = 0;
 820                                        head->flag |= RMD1_OWN_CHIP;
 821                                        lp->new_rx = (lp->new_rx+1) &
 822                                             RX_RING_MOD_MASK;
 823                                }
 824
 825#if 0
 826                                if (lance_debug >= 3) {
 827                                        u_char *data = PKTBUF_ADDR(head);
 828                                        printk("%s: RX pkt %d type 0x%04x"
 829                                               " from %pM to %pM",
 830                                               dev->name, lp->new_tx, ((u_short *)data)[6],
 831                                               &data[6], data);
 832
 833                                        printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
 834                                               "len %d at %08x\n",
 835                                               data[15], data[16], data[17], data[18],
 836                                               data[19], data[20], data[21], data[22],
 837                                               pkt_len, data);
 838                                }
 839#endif
 840                                if (lance_debug >= 3) {
 841                                        u_char *data = PKTBUF_ADDR(head);
 842                                        printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len);
 843                                }
 844
 845
 846                                skb_reserve( skb, 2 );  /* 16 byte align */
 847                                skb_put( skb, pkt_len );        /* Make room */
 848                                skb_copy_to_linear_data(skb,
 849                                                 PKTBUF_ADDR(head),
 850                                                 pkt_len);
 851
 852                                skb->protocol = eth_type_trans( skb, dev );
 853                                netif_rx( skb );
 854                                dev->stats.rx_packets++;
 855                                dev->stats.rx_bytes += pkt_len;
 856                        }
 857                }
 858
 859//              head->buf_length = -PKT_BUF_SZ | 0xf000;
 860                head->msg_length = 0;
 861                head->flag = RMD1_OWN_CHIP;
 862
 863                entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK;
 864        }
 865
 866        /* From lance.c (Donald Becker): */
 867        /* We should check that at least two ring entries are free.
 868           If not, we should free one and mark stats->rx_dropped++. */
 869
 870        return 0;
 871}
 872
 873
 874static int lance_close( struct net_device *dev )
 875{
 876        struct lance_private *lp = netdev_priv(dev);
 877
 878        netif_stop_queue(dev);
 879
 880        AREG = CSR0;
 881
 882        DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
 883                                  dev->name, DREG ));
 884
 885        /* We stop the LANCE here -- it occasionally polls
 886           memory if we don't. */
 887        DREG = CSR0_STOP;
 888        return 0;
 889}
 890
 891
 892/* Set or clear the multicast filter for this adaptor.
 893   num_addrs == -1              Promiscuous mode, receive all packets
 894   num_addrs == 0               Normal mode, clear multicast list
 895   num_addrs > 0                Multicast mode, receive normal and MC packets, and do
 896                                                best-effort filtering.
 897 */
 898
 899/* completely untested on a sun3 */
 900static void set_multicast_list( struct net_device *dev )
 901{
 902        struct lance_private *lp = netdev_priv(dev);
 903
 904        if(netif_queue_stopped(dev))
 905                /* Only possible if board is already started */
 906                return;
 907
 908        /* We take the simple way out and always enable promiscuous mode. */
 909        DREG = CSR0_STOP; /* Temporarily stop the lance. */
 910
 911        if (dev->flags & IFF_PROMISC) {
 912                /* Log any net taps. */
 913                DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name ));
 914                REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
 915        } else {
 916                short multicast_table[4];
 917                int num_addrs = netdev_mc_count(dev);
 918                int i;
 919                /* We don't use the multicast table, but rely on upper-layer
 920                 * filtering. */
 921                memset( multicast_table, (num_addrs == 0) ? 0 : -1,
 922                                sizeof(multicast_table) );
 923                for( i = 0; i < 4; i++ )
 924                        REGA( CSR8+i ) = multicast_table[i];
 925                REGA( CSR15 ) = 0; /* Unset promiscuous mode */
 926        }
 927
 928        /*
 929         * Always set BSWP after a STOP as STOP puts it back into
 930         * little endian mode.
 931         */
 932        REGA( CSR3 ) = CSR3_BSWP;
 933
 934        /* Resume normal operation and reset AREG to CSR0 */
 935        REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
 936}
 937
 938
 939#ifdef MODULE
 940
 941static struct net_device *sun3lance_dev;
 942
 943int __init init_module(void)
 944{
 945        sun3lance_dev = sun3lance_probe(-1);
 946        if (IS_ERR(sun3lance_dev))
 947                return PTR_ERR(sun3lance_dev);
 948        return 0;
 949}
 950
 951void __exit cleanup_module(void)
 952{
 953        unregister_netdev(sun3lance_dev);
 954#ifdef CONFIG_SUN3
 955        iounmap((void __iomem *)sun3lance_dev->base_addr);
 956#endif
 957        free_netdev(sun3lance_dev);
 958}
 959
 960#endif /* MODULE */
 961
 962