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17#include <linux/pci_ids.h>
18#include <linux/if_ether.h>
19#include <net/mac80211.h>
20#include <brcm_hw_ids.h>
21#include <aiutils.h>
22#include <chipcommon.h>
23#include "rate.h"
24#include "scb.h"
25#include "phy/phy_hal.h"
26#include "channel.h"
27#include "antsel.h"
28#include "stf.h"
29#include "ampdu.h"
30#include "mac80211_if.h"
31#include "ucode_loader.h"
32#include "main.h"
33#include "soc.h"
34
35
36
37
38
39#define ALLPRIO -1
40
41
42#define TIMER_INTERVAL_WATCHDOG 1000
43
44#define TIMER_INTERVAL_RADIOCHK 800
45
46
47#define BEACON_INTERVAL_DEFAULT 100
48
49
50
51
52
53
54#define WL_11N_2x2 1
55#define WL_11N_3x3 3
56#define WL_11N_4x4 4
57
58#define EDCF_ACI_MASK 0x60
59#define EDCF_ACI_SHIFT 5
60#define EDCF_ECWMIN_MASK 0x0f
61#define EDCF_ECWMAX_SHIFT 4
62#define EDCF_AIFSN_MASK 0x0f
63#define EDCF_AIFSN_MAX 15
64#define EDCF_ECWMAX_MASK 0xf0
65
66#define EDCF_AC_BE_TXOP_STA 0x0000
67#define EDCF_AC_BK_TXOP_STA 0x0000
68#define EDCF_AC_VO_ACI_STA 0x62
69#define EDCF_AC_VO_ECW_STA 0x32
70#define EDCF_AC_VI_ACI_STA 0x42
71#define EDCF_AC_VI_ECW_STA 0x43
72#define EDCF_AC_BK_ECW_STA 0xA4
73#define EDCF_AC_VI_TXOP_STA 0x005e
74#define EDCF_AC_VO_TXOP_STA 0x002f
75#define EDCF_AC_BE_ACI_STA 0x03
76#define EDCF_AC_BE_ECW_STA 0xA4
77#define EDCF_AC_BK_ACI_STA 0x27
78#define EDCF_AC_VO_TXOP_AP 0x002f
79
80#define EDCF_TXOP2USEC(txop) ((txop) << 5)
81#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
82
83#define APHY_SYMBOL_TIME 4
84#define APHY_PREAMBLE_TIME 16
85#define APHY_SIGNAL_TIME 4
86#define APHY_SIFS_TIME 16
87#define APHY_SERVICE_NBITS 16
88#define APHY_TAIL_NBITS 6
89#define BPHY_SIFS_TIME 10
90#define BPHY_PLCP_SHORT_TIME 96
91
92#define PREN_PREAMBLE 24
93#define PREN_MM_EXT 12
94#define PREN_PREAMBLE_EXT 4
95
96#define DOT11_MAC_HDR_LEN 24
97#define DOT11_ACK_LEN 10
98#define DOT11_BA_LEN 4
99#define DOT11_OFDM_SIGNAL_EXTENSION 6
100#define DOT11_MIN_FRAG_LEN 256
101#define DOT11_RTS_LEN 16
102#define DOT11_CTS_LEN 10
103#define DOT11_BA_BITMAP_LEN 128
104#define DOT11_MIN_BEACON_PERIOD 1
105#define DOT11_MAX_BEACON_PERIOD 0xFFFF
106#define DOT11_MAXNUMFRAGS 16
107#define DOT11_MAX_FRAG_LEN 2346
108
109#define BPHY_PLCP_TIME 192
110#define RIFS_11N_TIME 2
111
112
113#define BCN_TMPL_LEN 512
114
115
116#define BRCMS_BSS_HT 0x0020
117
118
119#define BRCMS_HWRXOFF 38
120
121
122#define RFDISABLE_DEFAULT 10000000
123
124#define BRCMS_TEMPSENSE_PERIOD 10
125
126
127
128
129
130
131
132#define _BRCMS_PREC_NONE 0
133#define _BRCMS_PREC_BK 2
134#define _BRCMS_PREC_BE 4
135#define _BRCMS_PREC_EE 6
136#define _BRCMS_PREC_CL 8
137#define _BRCMS_PREC_VI 10
138#define _BRCMS_PREC_VO 12
139#define _BRCMS_PREC_NC 14
140
141
142#define SYNTHPU_DLY_APHY_US 3700
143#define SYNTHPU_DLY_BPHY_US 1050
144#define SYNTHPU_DLY_NPHY_US 2048
145#define SYNTHPU_DLY_LPPHY_US 300
146
147#define ANTCNT 10
148
149
150#define EDCF_SHORT_S 0
151#define EDCF_SFB_S 4
152#define EDCF_LONG_S 8
153#define EDCF_LFB_S 12
154#define EDCF_SHORT_M BITFIELD_MASK(4)
155#define EDCF_SFB_M BITFIELD_MASK(4)
156#define EDCF_LONG_M BITFIELD_MASK(4)
157#define EDCF_LFB_M BITFIELD_MASK(4)
158
159#define RETRY_SHORT_DEF 7
160#define RETRY_SHORT_MAX 255
161#define RETRY_LONG_DEF 4
162#define RETRY_SHORT_FB 3
163#define RETRY_LONG_FB 2
164
165#define APHY_CWMIN 15
166#define PHY_CWMAX 1023
167
168#define EDCF_AIFSN_MIN 1
169
170#define FRAGNUM_MASK 0xF
171
172#define APHY_SLOT_TIME 9
173#define BPHY_SLOT_TIME 20
174
175#define WL_SPURAVOID_OFF 0
176#define WL_SPURAVOID_ON1 1
177#define WL_SPURAVOID_ON2 2
178
179
180#define BRCMS_USE_COREFLAGS 0xffffffff
181
182
183#define BRCMS_PLCP_AUTO -1
184#define BRCMS_PLCP_SHORT 0
185#define BRCMS_PLCP_LONG 1
186
187
188#define BRCMS_PROTECTION_AUTO -1
189#define BRCMS_PROTECTION_OFF 0
190#define BRCMS_PROTECTION_ON 1
191#define BRCMS_PROTECTION_MMHDR_ONLY 2
192#define BRCMS_PROTECTION_CTS_ONLY 3
193
194
195#define BRCMS_PROTECTION_CTL_OFF 0
196#define BRCMS_PROTECTION_CTL_LOCAL 1
197#define BRCMS_PROTECTION_CTL_OVERLAP 2
198
199
200#define BRCMS_N_PROTECTION_OFF 0
201#define BRCMS_N_PROTECTION_OPTIONAL 1
202#define BRCMS_N_PROTECTION_20IN40 2
203#define BRCMS_N_PROTECTION_MIXEDMODE 3
204
205
206#define BRCMS_N_BW_20ALL 0
207#define BRCMS_N_BW_40ALL 1
208#define BRCMS_N_BW_20IN2G_40IN5G 2
209
210
211#define BRCMS_N_SGI_20 0x01
212#define BRCMS_N_SGI_40 0x02
213
214
215
216#define NRATE_MCS_INUSE 0x00000080
217
218#define NRATE_RATE_MASK 0x0000007f
219
220#define NRATE_STF_MASK 0x0000ff00
221
222#define NRATE_STF_SHIFT 8
223
224#define NRATE_OVERRIDE_MCS_ONLY 0x40000000
225#define NRATE_SGI_MASK 0x00800000
226#define NRATE_SGI_SHIFT 23
227#define NRATE_LDPC_CODING 0x00400000
228#define NRATE_LDPC_SHIFT 22
229
230#define NRATE_STF_SISO 0
231#define NRATE_STF_CDD 1
232#define NRATE_STF_STBC 2
233#define NRATE_STF_SDM 3
234
235#define MAX_DMA_SEGS 4
236
237
238#define NTXD 256
239
240#define NRXD 256
241
242
243#define NRXBUFPOST 32
244
245
246#define BRCMS_DATAHIWAT 50
247
248
249#define RXBND 8
250
251#define TXSBND 8
252
253
254struct brcms_c_bit_desc {
255 u32 bit;
256 const char *name;
257};
258
259
260
261
262
263
264
265
266
267
268
269#define XMTFIFOTBL_STARTREV 20
270
271struct d11init {
272 __le16 addr;
273 __le16 size;
274 __le32 value;
275};
276
277struct edcf_acparam {
278 u8 ACI;
279 u8 ECW;
280 u16 TXOP;
281} __packed;
282
283const u8 prio2fifo[NUMPRIO] = {
284 TX_AC_BE_FIFO,
285 TX_AC_BK_FIFO,
286 TX_AC_BK_FIFO,
287 TX_AC_BE_FIFO,
288 TX_AC_VI_FIFO,
289 TX_AC_VI_FIFO,
290 TX_AC_VO_FIFO,
291 TX_AC_VO_FIFO
292};
293
294
295uint brcm_msg_level =
296#if defined(BCMDBG)
297 LOG_ERROR_VAL;
298#else
299 0;
300#endif
301
302
303static const u8 wme_fifo2ac[] = {
304 IEEE80211_AC_BK,
305 IEEE80211_AC_BE,
306 IEEE80211_AC_VI,
307 IEEE80211_AC_VO,
308 IEEE80211_AC_BE,
309 IEEE80211_AC_BE
310};
311
312
313static const u8 wme_ac2fifo[] = {
314 TX_AC_VO_FIFO,
315 TX_AC_VI_FIFO,
316 TX_AC_BE_FIFO,
317 TX_AC_BK_FIFO
318};
319
320
321const u8 wlc_prio2prec_map[] = {
322 _BRCMS_PREC_BE,
323 _BRCMS_PREC_BK,
324 _BRCMS_PREC_NONE,
325 _BRCMS_PREC_EE,
326 _BRCMS_PREC_CL,
327 _BRCMS_PREC_VI,
328 _BRCMS_PREC_VO,
329 _BRCMS_PREC_NC,
330};
331
332static const u16 xmtfifo_sz[][NFIFO] = {
333
334 {20, 192, 192, 21, 17, 5},
335
336 {9, 58, 22, 14, 14, 5},
337
338 {20, 192, 192, 21, 17, 5},
339
340 {20, 192, 192, 21, 17, 5},
341
342 {9, 58, 22, 14, 14, 5},
343};
344
345#ifdef BCMDBG
346static const char * const fifo_names[] = {
347 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
348#else
349static const char fifo_names[6][0];
350#endif
351
352#ifdef BCMDBG
353
354static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
355#endif
356
357
358static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
359{
360 if (is_mcs_rate(rspec))
361 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
362 .leg_ofdm];
363 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
364}
365
366static u16 frametype(u32 rspec, u8 mimoframe)
367{
368 if (is_mcs_rate(rspec))
369 return mimoframe;
370 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
371}
372
373
374static u16 get_sifs(struct brcms_band *band)
375{
376 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
377 BPHY_SIFS_TIME;
378}
379
380
381
382
383
384
385
386
387
388
389static bool brcms_deviceremoved(struct brcms_c_info *wlc)
390{
391 u32 macctrl;
392
393 if (!wlc->hw->clk)
394 return ai_deviceremoved(wlc->hw->sih);
395 macctrl = bcma_read32(wlc->hw->d11core,
396 D11REGOFFS(maccontrol));
397 return (macctrl & (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
398}
399
400
401static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
402{
403 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
404 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
405}
406
407static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
408{
409 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
410}
411
412static int brcms_chspec_bw(u16 chanspec)
413{
414 if (CHSPEC_IS40(chanspec))
415 return BRCMS_40_MHZ;
416 if (CHSPEC_IS20(chanspec))
417 return BRCMS_20_MHZ;
418
419 return BRCMS_10_MHZ;
420}
421
422static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
423{
424 if (cfg == NULL)
425 return;
426
427 kfree(cfg->current_bss);
428 kfree(cfg);
429}
430
431static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
432{
433 if (wlc == NULL)
434 return;
435
436 brcms_c_bsscfg_mfree(wlc->bsscfg);
437 kfree(wlc->pub);
438 kfree(wlc->modulecb);
439 kfree(wlc->default_bss);
440 kfree(wlc->protection);
441 kfree(wlc->stf);
442 kfree(wlc->bandstate[0]);
443 kfree(wlc->corestate->macstat_snapshot);
444 kfree(wlc->corestate);
445 kfree(wlc->hw->bandstate[0]);
446 kfree(wlc->hw);
447
448
449 kfree(wlc);
450 wlc = NULL;
451}
452
453static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
454{
455 struct brcms_bss_cfg *cfg;
456
457 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
458 if (cfg == NULL)
459 goto fail;
460
461 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
462 if (cfg->current_bss == NULL)
463 goto fail;
464
465 return cfg;
466
467 fail:
468 brcms_c_bsscfg_mfree(cfg);
469 return NULL;
470}
471
472static struct brcms_c_info *
473brcms_c_attach_malloc(uint unit, uint *err, uint devid)
474{
475 struct brcms_c_info *wlc;
476
477 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
478 if (wlc == NULL) {
479 *err = 1002;
480 goto fail;
481 }
482
483
484 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
485 if (wlc->pub == NULL) {
486 *err = 1003;
487 goto fail;
488 }
489 wlc->pub->wlc = wlc;
490
491
492
493 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
494 if (wlc->hw == NULL) {
495 *err = 1005;
496 goto fail;
497 }
498 wlc->hw->wlc = wlc;
499
500 wlc->hw->bandstate[0] =
501 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
502 if (wlc->hw->bandstate[0] == NULL) {
503 *err = 1006;
504 goto fail;
505 } else {
506 int i;
507
508 for (i = 1; i < MAXBANDS; i++)
509 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
510 ((unsigned long)wlc->hw->bandstate[0] +
511 (sizeof(struct brcms_hw_band) * i));
512 }
513
514 wlc->modulecb =
515 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
516 if (wlc->modulecb == NULL) {
517 *err = 1009;
518 goto fail;
519 }
520
521 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
522 if (wlc->default_bss == NULL) {
523 *err = 1010;
524 goto fail;
525 }
526
527 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
528 if (wlc->bsscfg == NULL) {
529 *err = 1011;
530 goto fail;
531 }
532
533 wlc->protection = kzalloc(sizeof(struct brcms_protection),
534 GFP_ATOMIC);
535 if (wlc->protection == NULL) {
536 *err = 1016;
537 goto fail;
538 }
539
540 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
541 if (wlc->stf == NULL) {
542 *err = 1017;
543 goto fail;
544 }
545
546 wlc->bandstate[0] =
547 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
548 if (wlc->bandstate[0] == NULL) {
549 *err = 1025;
550 goto fail;
551 } else {
552 int i;
553
554 for (i = 1; i < MAXBANDS; i++)
555 wlc->bandstate[i] = (struct brcms_band *)
556 ((unsigned long)wlc->bandstate[0]
557 + (sizeof(struct brcms_band)*i));
558 }
559
560 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
561 if (wlc->corestate == NULL) {
562 *err = 1026;
563 goto fail;
564 }
565
566 wlc->corestate->macstat_snapshot =
567 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
568 if (wlc->corestate->macstat_snapshot == NULL) {
569 *err = 1027;
570 goto fail;
571 }
572
573 return wlc;
574
575 fail:
576 brcms_c_detach_mfree(wlc);
577 return NULL;
578}
579
580
581
582
583
584
585static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
586 bool shortslot)
587{
588 struct bcma_device *core = wlc_hw->d11core;
589
590 if (shortslot) {
591
592 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0207);
593 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
594 } else {
595
596 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0212);
597 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
598 }
599}
600
601
602
603
604
605static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
606 u8 preamble_type, uint mac_len)
607{
608 uint nsyms, dur = 0, Ndps, kNdps;
609 uint rate = rspec2rate(ratespec);
610
611 if (rate == 0) {
612 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
613 wlc->pub->unit);
614 rate = BRCM_RATE_1M;
615 }
616
617 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
618 wlc->pub->unit, ratespec, preamble_type, mac_len);
619
620 if (is_mcs_rate(ratespec)) {
621 uint mcs = ratespec & RSPEC_RATE_MASK;
622 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
623
624 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
625 if (preamble_type == BRCMS_MM_PREAMBLE)
626 dur += PREN_MM_EXT;
627
628 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
629 rspec_issgi(ratespec)) * 4;
630
631 if (rspec_stc(ratespec) == 0)
632 nsyms =
633 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
634 APHY_TAIL_NBITS) * 1000, kNdps);
635 else
636
637 nsyms =
638 2 *
639 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
640 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
641
642 dur += APHY_SYMBOL_TIME * nsyms;
643 if (wlc->band->bandtype == BRCM_BAND_2G)
644 dur += DOT11_OFDM_SIGNAL_EXTENSION;
645 } else if (is_ofdm_rate(rate)) {
646 dur = APHY_PREAMBLE_TIME;
647 dur += APHY_SIGNAL_TIME;
648
649 Ndps = rate * 2;
650
651 nsyms =
652 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
653 Ndps);
654 dur += APHY_SYMBOL_TIME * nsyms;
655 if (wlc->band->bandtype == BRCM_BAND_2G)
656 dur += DOT11_OFDM_SIGNAL_EXTENSION;
657 } else {
658
659
660
661
662 mac_len = mac_len * 8 * 2;
663
664 dur = (mac_len + rate - 1) / rate;
665 if (preamble_type & BRCMS_SHORT_PREAMBLE)
666 dur += BPHY_PLCP_SHORT_TIME;
667 else
668 dur += BPHY_PLCP_TIME;
669 }
670 return dur;
671}
672
673static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
674 const struct d11init *inits)
675{
676 struct bcma_device *core = wlc_hw->d11core;
677 int i;
678 uint offset;
679 u16 size;
680 u32 value;
681
682 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
683
684 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
685 size = le16_to_cpu(inits[i].size);
686 offset = le16_to_cpu(inits[i].addr);
687 value = le32_to_cpu(inits[i].value);
688 if (size == 2)
689 bcma_write16(core, offset, value);
690 else if (size == 4)
691 bcma_write32(core, offset, value);
692 else
693 break;
694 }
695}
696
697static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
698{
699 u8 idx;
700 u16 addr[] = {
701 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
702 M_HOST_FLAGS5
703 };
704
705 for (idx = 0; idx < MHFMAX; idx++)
706 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
707}
708
709static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
710{
711 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
712 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
713
714
715 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
716
717
718 if (D11REV_IS(wlc_hw->corerev, 23)) {
719 if (BRCMS_ISNPHY(wlc_hw->band))
720 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
721 else
722 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
723 " %d\n", __func__, wlc_hw->unit,
724 wlc_hw->corerev);
725 } else {
726 if (D11REV_IS(wlc_hw->corerev, 24)) {
727 if (BRCMS_ISLCNPHY(wlc_hw->band))
728 brcms_c_write_inits(wlc_hw,
729 ucode->d11lcn0bsinitvals24);
730 else
731 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
732 " core rev %d\n", __func__,
733 wlc_hw->unit, wlc_hw->corerev);
734 } else {
735 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
736 __func__, wlc_hw->unit, wlc_hw->corerev);
737 }
738 }
739}
740
741static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v)
742{
743 struct bcma_device *core = wlc_hw->d11core;
744 u32 ioctl = bcma_aread32(core, BCMA_IOCTL) & ~m;
745
746 bcma_awrite32(core, BCMA_IOCTL, ioctl | v);
747}
748
749static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
750{
751 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
752
753 wlc_hw->phyclk = clk;
754
755 if (OFF == clk) {
756
757 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC | SICF_GMODE),
758 (SICF_PRST | SICF_FGC));
759 udelay(1);
760 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_PRST);
761 udelay(1);
762
763 } else {
764
765 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_FGC);
766 udelay(1);
767 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
768 udelay(1);
769
770 }
771}
772
773
774static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
775{
776 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
777 bandunit);
778
779 wlc_hw->band = wlc_hw->bandstate[bandunit];
780
781
782
783
784
785 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
786
787
788 if (wlc_hw->sbclk && !wlc_hw->noreset) {
789 u32 gmode = 0;
790
791 if (bandunit == 0)
792 gmode = SICF_GMODE;
793
794 brcms_b_core_ioctl(wlc_hw, SICF_GMODE, gmode);
795 }
796}
797
798
799static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
800{
801 struct brcms_hardware *wlc_hw = wlc->hw;
802 u32 macintmask;
803 u32 macctrl;
804
805 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
806 macctrl = bcma_read32(wlc_hw->d11core,
807 D11REGOFFS(maccontrol));
808 WARN_ON((macctrl & MCTL_EN_MAC) != 0);
809
810
811 macintmask = brcms_intrsoff(wlc->wl);
812
813
814 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
815
816 brcms_b_core_phy_clk(wlc_hw, OFF);
817
818 brcms_c_setxband(wlc_hw, bandunit);
819
820 return macintmask;
821}
822
823
824static bool
825brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
826{
827 struct sk_buff *p;
828 uint queue;
829 struct d11txh *txh;
830 struct scb *scb = NULL;
831 bool free_pdu;
832 int tx_rts, tx_frame_count, tx_rts_count;
833 uint totlen, supr_status;
834 bool lastframe;
835 struct ieee80211_hdr *h;
836 u16 mcl;
837 struct ieee80211_tx_info *tx_info;
838 struct ieee80211_tx_rate *txrate;
839 int i;
840
841
842
843
844
845
846 if (!(txs->status & TX_STATUS_AMPDU)
847 && (txs->status & TX_STATUS_INTERMEDIATE)) {
848 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
849 __func__);
850 return false;
851 }
852
853 queue = txs->frameid & TXFID_QUEUE_MASK;
854 if (queue >= NFIFO) {
855 p = NULL;
856 goto fatal;
857 }
858
859 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
860 if (p == NULL)
861 goto fatal;
862
863 txh = (struct d11txh *) (p->data);
864 mcl = le16_to_cpu(txh->MacTxControlLow);
865
866 if (txs->phyerr) {
867 if (brcm_msg_level & LOG_ERROR_VAL) {
868 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
869 txs->phyerr, txh->MainRates);
870 brcms_c_print_txdesc(txh);
871 }
872 brcms_c_print_txstatus(txs);
873 }
874
875 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
876 goto fatal;
877 tx_info = IEEE80211_SKB_CB(p);
878 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
879
880 if (tx_info->control.sta)
881 scb = &wlc->pri_scb;
882
883 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
884 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
885 return false;
886 }
887
888 supr_status = txs->status & TX_STATUS_SUPR_MASK;
889 if (supr_status == TX_STATUS_SUPR_BADCH)
890 BCMMSG(wlc->wiphy,
891 "%s: Pkt tx suppressed, possibly channel %d\n",
892 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
893
894 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
895 tx_frame_count =
896 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
897 tx_rts_count =
898 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
899
900 lastframe = !ieee80211_has_morefrags(h->frame_control);
901
902 if (!lastframe) {
903 wiphy_err(wlc->wiphy, "Not last frame!\n");
904 } else {
905
906
907
908
909
910
911
912
913 u16 sfbl,
914 lfbl,
915 fbl;
916
917 if (queue < IEEE80211_NUM_ACS) {
918 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
919 EDCF_SFB);
920 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
921 EDCF_LFB);
922 } else {
923 sfbl = wlc->SFBL;
924 lfbl = wlc->LFBL;
925 }
926
927 txrate = tx_info->status.rates;
928 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
929 fbl = lfbl;
930 else
931 fbl = sfbl;
932
933 ieee80211_tx_info_clear_status(tx_info);
934
935 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
936
937
938
939
940 txrate[0].count = fbl;
941 txrate[1].count = tx_frame_count - fbl;
942 } else {
943
944
945
946
947 txrate[0].count = tx_frame_count;
948
949
950
951
952 txrate[1].idx = -1;
953 txrate[1].count = 0;
954 }
955
956
957 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
958 txrate[i].idx = -1;
959 txrate[i].count = 0;
960 }
961
962 if (txs->status & TX_STATUS_ACK_RCV)
963 tx_info->flags |= IEEE80211_TX_STAT_ACK;
964 }
965
966 totlen = p->len;
967 free_pdu = true;
968
969 brcms_c_txfifo_complete(wlc, queue, 1);
970
971 if (lastframe) {
972
973 skb_pull(p, D11_PHY_HDR_LEN);
974 skb_pull(p, D11_TXH_LEN);
975 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
976 } else {
977 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
978 "tx_status\n", __func__);
979 }
980
981 return false;
982
983 fatal:
984 if (p)
985 brcmu_pkt_buf_free_skb(p);
986
987 return true;
988
989}
990
991
992
993
994static bool
995brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
996{
997 bool morepending = false;
998 struct brcms_c_info *wlc = wlc_hw->wlc;
999 struct bcma_device *core;
1000 struct tx_status txstatus, *txs;
1001 u32 s1, s2;
1002 uint n = 0;
1003
1004
1005
1006
1007 uint max_tx_num = bound ? TXSBND : -1;
1008
1009 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1010
1011 txs = &txstatus;
1012 core = wlc_hw->d11core;
1013 *fatal = false;
1014 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1015 while (!(*fatal)
1016 && (s1 & TXS_V)) {
1017
1018 if (s1 == 0xffffffff) {
1019 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1020 wlc_hw->unit, __func__);
1021 return morepending;
1022 }
1023 s2 = bcma_read32(core, D11REGOFFS(frmtxstatus2));
1024
1025 txs->status = s1 & TXS_STATUS_MASK;
1026 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1027 txs->sequence = s2 & TXS_SEQ_MASK;
1028 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1029 txs->lasttxtime = 0;
1030
1031 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1032
1033
1034 if (++n >= max_tx_num)
1035 break;
1036 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1037 }
1038
1039 if (*fatal)
1040 return 0;
1041
1042 if (n >= max_tx_num)
1043 morepending = true;
1044
1045 if (!pktq_empty(&wlc->pkt_queue->q))
1046 brcms_c_send_q(wlc);
1047
1048 return morepending;
1049}
1050
1051static void brcms_c_tbtt(struct brcms_c_info *wlc)
1052{
1053 if (!wlc->bsscfg->BSS)
1054
1055
1056
1057
1058 wlc->qvalid |= MCMD_DIRFRMQVAL;
1059}
1060
1061
1062static void
1063brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1064{
1065 struct brcms_hardware *wlc_hw = wlc->hw;
1066
1067 memset(mhfs, 0, MHFMAX * sizeof(u16));
1068
1069 mhfs[MHF2] |= mhf2_init;
1070
1071
1072 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1073 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1074
1075 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1076 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1077 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1078 }
1079}
1080
1081static uint
1082dmareg(uint direction, uint fifonum)
1083{
1084 if (direction == DMA_TX)
1085 return offsetof(struct d11regs, fifo64regs[fifonum].dmaxmt);
1086 return offsetof(struct d11regs, fifo64regs[fifonum].dmarcv);
1087}
1088
1089static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1090{
1091 uint i;
1092 char name[8];
1093
1094
1095
1096 u16 pio_mhf2 = 0;
1097 struct brcms_hardware *wlc_hw = wlc->hw;
1098 uint unit = wlc_hw->unit;
1099 struct wiphy *wiphy = wlc->wiphy;
1100
1101
1102 snprintf(name, sizeof(name), "wl%d", unit);
1103
1104 if (wlc_hw->di[0] == NULL) {
1105 int dma_attach_err = 0;
1106
1107
1108
1109
1110
1111
1112 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1113 (wme ? dmareg(DMA_TX, 0) : 0),
1114 dmareg(DMA_RX, 0),
1115 (wme ? NTXD : 0), NRXD,
1116 RXBUFSZ, -1, NRXBUFPOST,
1117 BRCMS_HWRXOFF, &brcm_msg_level);
1118 dma_attach_err |= (NULL == wlc_hw->di[0]);
1119
1120
1121
1122
1123
1124
1125
1126 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1127 dmareg(DMA_TX, 1), 0,
1128 NTXD, 0, 0, -1, 0, 0,
1129 &brcm_msg_level);
1130 dma_attach_err |= (NULL == wlc_hw->di[1]);
1131
1132
1133
1134
1135
1136
1137 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1138 dmareg(DMA_TX, 2), 0,
1139 NTXD, 0, 0, -1, 0, 0,
1140 &brcm_msg_level);
1141 dma_attach_err |= (NULL == wlc_hw->di[2]);
1142
1143
1144
1145
1146
1147 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1148 dmareg(DMA_TX, 3),
1149 0, NTXD, 0, 0, -1,
1150 0, 0, &brcm_msg_level);
1151 dma_attach_err |= (NULL == wlc_hw->di[3]);
1152
1153
1154 if (dma_attach_err) {
1155 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1156 "\n", unit);
1157 return false;
1158 }
1159
1160
1161 for (i = 0; i < NFIFO; i++)
1162 if (wlc_hw->di[i])
1163 wlc_hw->txavail[i] =
1164 (uint *) dma_getvar(wlc_hw->di[i],
1165 "&txavail");
1166 }
1167
1168
1169 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1170
1171 return true;
1172}
1173
1174static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1175{
1176 uint j;
1177
1178 for (j = 0; j < NFIFO; j++) {
1179 if (wlc_hw->di[j]) {
1180 dma_detach(wlc_hw->di[j]);
1181 wlc_hw->di[j] = NULL;
1182 }
1183 }
1184}
1185
1186
1187
1188
1189
1190
1191static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1192{
1193 struct brcms_c_info *wlc = wlc_hw->wlc;
1194
1195
1196 wlc->defmacintmask = DEF_MACINTMASK;
1197
1198
1199 wlc_hw->shortslot = false;
1200
1201 wlc_hw->SFBL = RETRY_SHORT_FB;
1202 wlc_hw->LFBL = RETRY_LONG_FB;
1203
1204
1205 wlc_hw->SRL = RETRY_SHORT_DEF;
1206 wlc_hw->LRL = RETRY_LONG_DEF;
1207 wlc_hw->chanspec = ch20mhz_chspec(1);
1208}
1209
1210static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1211{
1212
1213 udelay(40);
1214
1215
1216 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1217 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1218}
1219
1220
1221static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1222{
1223 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1224
1225
1226
1227
1228
1229
1230 if (wlc_hw->clk) {
1231 if (mode == CLK_FAST) {
1232 bcma_set32(wlc_hw->d11core,
1233 D11REGOFFS(clk_ctl_st),
1234 CCS_FORCEHT);
1235
1236 udelay(64);
1237
1238 SPINWAIT(
1239 ((bcma_read32(wlc_hw->d11core,
1240 D11REGOFFS(clk_ctl_st)) &
1241 CCS_HTAVAIL) == 0),
1242 PMU_MAX_TRANSITION_DLY);
1243 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1244 D11REGOFFS(clk_ctl_st)) &
1245 CCS_HTAVAIL));
1246 } else {
1247 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1248 (bcma_read32(wlc_hw->d11core,
1249 D11REGOFFS(clk_ctl_st)) &
1250 (CCS_FORCEHT | CCS_HTAREQ)))
1251 SPINWAIT(
1252 ((bcma_read32(wlc_hw->d11core,
1253 offsetof(struct d11regs,
1254 clk_ctl_st)) &
1255 CCS_HTAVAIL) == 0),
1256 PMU_MAX_TRANSITION_DLY);
1257 bcma_mask32(wlc_hw->d11core,
1258 D11REGOFFS(clk_ctl_st),
1259 ~CCS_FORCEHT);
1260 }
1261 }
1262 wlc_hw->forcefastclk = (mode == CLK_FAST);
1263 } else {
1264
1265
1266
1267
1268
1269 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1270
1271
1272 if (wlc_hw->forcefastclk && wlc_hw->clk)
1273 WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1274 SISF_FCLKA));
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286 if (wlc_hw->forcefastclk)
1287 mboolset(wlc_hw->wake_override,
1288 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1289 else
1290 mboolclr(wlc_hw->wake_override,
1291 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1292 }
1293}
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306void
1307brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1308 int bands)
1309{
1310 u16 save;
1311 u16 addr[MHFMAX] = {
1312 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1313 M_HOST_FLAGS5
1314 };
1315 struct brcms_hw_band *band;
1316
1317 if ((val & ~mask) || idx >= MHFMAX)
1318 return;
1319
1320 switch (bands) {
1321
1322
1323
1324 case BRCM_BAND_AUTO:
1325 case BRCM_BAND_ALL:
1326 band = wlc_hw->band;
1327 break;
1328 case BRCM_BAND_5G:
1329 band = wlc_hw->bandstate[BAND_5G_INDEX];
1330 break;
1331 case BRCM_BAND_2G:
1332 band = wlc_hw->bandstate[BAND_2G_INDEX];
1333 break;
1334 default:
1335 band = NULL;
1336 }
1337
1338 if (band) {
1339 save = band->mhfs[idx];
1340 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1341
1342
1343
1344
1345 if (wlc_hw->clk && (band->mhfs[idx] != save)
1346 && (band == wlc_hw->band))
1347 brcms_b_write_shm(wlc_hw, addr[idx],
1348 (u16) band->mhfs[idx]);
1349 }
1350
1351 if (bands == BRCM_BAND_ALL) {
1352 wlc_hw->bandstate[0]->mhfs[idx] =
1353 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1354 wlc_hw->bandstate[1]->mhfs[idx] =
1355 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1356 }
1357}
1358
1359
1360
1361
1362static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1363{
1364
1365 wlc_hw->maccontrol = 0;
1366 wlc_hw->suspended_fifos = 0;
1367 wlc_hw->wake_override = 0;
1368 wlc_hw->mute_override = 0;
1369 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1370}
1371
1372
1373
1374
1375
1376static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1377{
1378 u32 maccontrol = wlc_hw->maccontrol;
1379
1380
1381 if (wlc_hw->wake_override)
1382 maccontrol |= MCTL_WAKE;
1383
1384
1385 if (wlc_hw->mute_override) {
1386 maccontrol &= ~(MCTL_AP);
1387 maccontrol |= MCTL_INFRA;
1388 }
1389
1390 bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1391 maccontrol);
1392}
1393
1394
1395void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1396{
1397 u32 maccontrol;
1398 u32 new_maccontrol;
1399
1400 if (val & ~mask)
1401 return;
1402 maccontrol = wlc_hw->maccontrol;
1403 new_maccontrol = (maccontrol & ~mask) | val;
1404
1405
1406 if (new_maccontrol == maccontrol)
1407 return;
1408
1409
1410 wlc_hw->maccontrol = new_maccontrol;
1411
1412
1413 brcms_c_mctrl_write(wlc_hw);
1414}
1415
1416void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1417 u32 override_bit)
1418{
1419 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1420 mboolset(wlc_hw->wake_override, override_bit);
1421 return;
1422 }
1423
1424 mboolset(wlc_hw->wake_override, override_bit);
1425
1426 brcms_c_mctrl_write(wlc_hw);
1427 brcms_b_wait_for_wake(wlc_hw);
1428}
1429
1430void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1431 u32 override_bit)
1432{
1433 mboolclr(wlc_hw->wake_override, override_bit);
1434
1435 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1436 return;
1437
1438 brcms_c_mctrl_write(wlc_hw);
1439}
1440
1441
1442
1443
1444
1445
1446
1447
1448static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1449{
1450 wlc_hw->mute_override = 1;
1451
1452
1453
1454
1455 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1456 return;
1457
1458 brcms_c_mctrl_write(wlc_hw);
1459}
1460
1461
1462static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1463{
1464 if (wlc_hw->mute_override == 0)
1465 return;
1466
1467 wlc_hw->mute_override = 0;
1468
1469
1470
1471
1472 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1473 return;
1474
1475 brcms_c_mctrl_write(wlc_hw);
1476}
1477
1478
1479
1480
1481static void
1482brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1483 const u8 *addr)
1484{
1485 struct bcma_device *core = wlc_hw->d11core;
1486 u16 mac_l;
1487 u16 mac_m;
1488 u16 mac_h;
1489
1490 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1491 wlc_hw->unit);
1492
1493 mac_l = addr[0] | (addr[1] << 8);
1494 mac_m = addr[2] | (addr[3] << 8);
1495 mac_h = addr[4] | (addr[5] << 8);
1496
1497
1498 bcma_write16(core, D11REGOFFS(rcm_ctl),
1499 RCM_INC_DATA | match_reg_offset);
1500 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_l);
1501 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_m);
1502 bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_h);
1503}
1504
1505void
1506brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1507 void *buf)
1508{
1509 struct bcma_device *core = wlc_hw->d11core;
1510 u32 word;
1511 __le32 word_le;
1512 __be32 word_be;
1513 bool be_bit;
1514 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1515
1516 bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
1517
1518
1519
1520
1521
1522 be_bit = (bcma_read32(core, D11REGOFFS(maccontrol)) & MCTL_BIGEND) != 0;
1523
1524 while (len > 0) {
1525 memcpy(&word, buf, sizeof(u32));
1526
1527 if (be_bit) {
1528 word_be = cpu_to_be32(word);
1529 word = *(u32 *)&word_be;
1530 } else {
1531 word_le = cpu_to_le32(word);
1532 word = *(u32 *)&word_le;
1533 }
1534
1535 bcma_write32(core, D11REGOFFS(tplatewrdata), word);
1536
1537 buf = (u8 *) buf + sizeof(u32);
1538 len -= sizeof(u32);
1539 }
1540}
1541
1542static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1543{
1544 wlc_hw->band->CWmin = newmin;
1545
1546 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1547 OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1548 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1549 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1550}
1551
1552static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1553{
1554 wlc_hw->band->CWmax = newmax;
1555
1556 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1557 OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1558 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1559 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1560}
1561
1562void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1563{
1564 bool fastclk;
1565
1566
1567 fastclk = wlc_hw->forcefastclk;
1568 if (!fastclk)
1569 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1570
1571 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1572
1573 brcms_b_phy_reset(wlc_hw);
1574 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1575
1576
1577 if (!fastclk)
1578 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1579}
1580
1581static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1582{
1583 u16 v;
1584 struct brcms_c_info *wlc = wlc_hw->wlc;
1585
1586
1587 if (BRCMS_ISLCNPHY(wlc->band))
1588 v = SYNTHPU_DLY_LPPHY_US;
1589 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1590 v = SYNTHPU_DLY_NPHY_US;
1591 else
1592 v = SYNTHPU_DLY_BPHY_US;
1593
1594 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1595}
1596
1597static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1598{
1599 u16 phyctl;
1600 u16 phytxant = wlc_hw->bmac_phytxant;
1601 u16 mask = PHY_TXC_ANT_MASK;
1602
1603
1604 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1605 phyctl = (phyctl & ~mask) | phytxant;
1606 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1607
1608
1609 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1610 phyctl = (phyctl & ~mask) | phytxant;
1611 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1612}
1613
1614static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1615 u8 rate)
1616{
1617 uint i;
1618 u8 plcp_rate = 0;
1619 struct plcp_signal_rate_lookup {
1620 u8 rate;
1621 u8 signal_rate;
1622 };
1623
1624 const struct plcp_signal_rate_lookup rate_lookup[] = {
1625 {BRCM_RATE_6M, 0xB},
1626 {BRCM_RATE_9M, 0xF},
1627 {BRCM_RATE_12M, 0xA},
1628 {BRCM_RATE_18M, 0xE},
1629 {BRCM_RATE_24M, 0x9},
1630 {BRCM_RATE_36M, 0xD},
1631 {BRCM_RATE_48M, 0x8},
1632 {BRCM_RATE_54M, 0xC}
1633 };
1634
1635 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1636 if (rate == rate_lookup[i].rate) {
1637 plcp_rate = rate_lookup[i].signal_rate;
1638 break;
1639 }
1640 }
1641
1642
1643
1644
1645 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1646}
1647
1648static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1649{
1650 u8 rate;
1651 u8 rates[8] = {
1652 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1653 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1654 };
1655 u16 entry_ptr;
1656 u16 pctl1;
1657 uint i;
1658
1659 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1660 return;
1661
1662
1663 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1664 rate = rates[i];
1665
1666 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1667
1668
1669 pctl1 =
1670 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1671
1672
1673 pctl1 &= ~PHY_TXC1_MODE_MASK;
1674 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1675
1676
1677 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1678 pctl1);
1679 }
1680}
1681
1682
1683static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1684{
1685 struct brcms_hardware *wlc_hw = wlc->hw;
1686
1687 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1688 wlc_hw->band->bandunit);
1689
1690 brcms_c_ucode_bsinit(wlc_hw);
1691
1692 wlc_phy_init(wlc_hw->band->pi, chanspec);
1693
1694 brcms_c_ucode_txant_set(wlc_hw);
1695
1696
1697
1698
1699
1700 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1701 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1702
1703 brcms_b_update_slot_timing(wlc_hw,
1704 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1705 true : wlc_hw->shortslot);
1706
1707
1708 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1709 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1710
1711
1712
1713
1714
1715 brcms_upd_ofdm_pctl1_table(wlc_hw);
1716
1717 brcms_b_upd_synthpu(wlc_hw);
1718}
1719
1720
1721void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1722{
1723 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1724
1725 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1726 ~0, 0);
1727 udelay(1);
1728 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1729 0x4, 0);
1730 udelay(1);
1731 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1732 0x4, 4);
1733 udelay(1);
1734 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1735 0x4, 0);
1736 udelay(1);
1737}
1738
1739
1740
1741
1742void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1743{
1744
1745 if (!BRCMS_ISNPHY(wlc_hw->band))
1746 return;
1747
1748 if (ON == clk)
1749 brcms_b_core_ioctl(wlc_hw, SICF_FGC, SICF_FGC);
1750 else
1751 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
1752
1753}
1754
1755void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1756{
1757 if (ON == clk)
1758 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, SICF_MPCLKE);
1759 else
1760 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, 0);
1761}
1762
1763void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1764{
1765 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1766 u32 phy_bw_clkbits;
1767 bool phy_in_reset = false;
1768
1769 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1770
1771 if (pih == NULL)
1772 return;
1773
1774 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1775
1776
1777 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1778 NREV_LE(wlc_hw->band->phyrev, 4)) {
1779
1780 brcms_b_core_ioctl(wlc_hw, SICF_BWMASK, phy_bw_clkbits);
1781
1782 udelay(1);
1783
1784
1785 brcms_b_core_phypll_reset(wlc_hw);
1786
1787
1788 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_PCLKE),
1789 (SICF_PRST | SICF_PCLKE));
1790 phy_in_reset = true;
1791 } else {
1792 brcms_b_core_ioctl(wlc_hw,
1793 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1794 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1795 }
1796
1797 udelay(2);
1798 brcms_b_core_phy_clk(wlc_hw, ON);
1799
1800 if (pih)
1801 wlc_phy_anacore(pih, ON);
1802}
1803
1804
1805static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1806 u16 chanspec) {
1807 struct brcms_c_info *wlc = wlc_hw->wlc;
1808 u32 macintmask;
1809
1810
1811 if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1812 bcma_core_enable(wlc_hw->d11core, 0);
1813 brcms_c_mctrl_reset(wlc_hw);
1814 }
1815
1816 macintmask = brcms_c_setband_inact(wlc, bandunit);
1817
1818 if (!wlc_hw->up)
1819 return;
1820
1821 brcms_b_core_phy_clk(wlc_hw, ON);
1822
1823
1824 brcms_b_bsinit(wlc, chanspec);
1825
1826
1827
1828
1829
1830
1831 if (wlc->macintstatus)
1832 wlc->macintstatus = MI_DMAINT;
1833
1834
1835 brcms_intrsrestore(wlc->wl, macintmask);
1836
1837
1838 WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1839 MCTL_EN_MAC) != 0);
1840}
1841
1842static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1843{
1844
1845
1846 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1847 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1848 wlc_hw->corerev);
1849 return false;
1850 }
1851
1852 return true;
1853}
1854
1855
1856static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1857{
1858 uint boardrev = wlc_hw->boardrev;
1859
1860
1861 uint brt = (boardrev & 0xf000) >> 12;
1862 uint b0 = (boardrev & 0xf00) >> 8;
1863 uint b1 = (boardrev & 0xf0) >> 4;
1864 uint b2 = boardrev & 0xf;
1865
1866
1867 if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1868 return true;
1869
1870
1871 if (boardrev == 0)
1872 return false;
1873
1874 if (boardrev <= 0xff)
1875 return true;
1876
1877 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1878 || (b2 > 9))
1879 return false;
1880
1881 return true;
1882}
1883
1884static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1885{
1886 enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1887 char *macaddr;
1888
1889
1890 macaddr = getvar(wlc_hw->sih, var_id);
1891 if (macaddr != NULL)
1892 return macaddr;
1893
1894 if (wlc_hw->_nbands > 1)
1895 var_id = BRCMS_SROM_ET1MACADDR;
1896 else
1897 var_id = BRCMS_SROM_IL0MACADDR;
1898
1899 macaddr = getvar(wlc_hw->sih, var_id);
1900 if (macaddr == NULL)
1901 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1902 "getvar(%d) not found\n", wlc_hw->unit, var_id);
1903
1904 return macaddr;
1905}
1906
1907
1908static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1909{
1910 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1911
1912
1913
1914
1915
1916 if (!want && wlc_hw->pllreq)
1917 return;
1918
1919 if (wlc_hw->sih)
1920 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1921
1922 wlc_hw->sbclk = want;
1923 if (!wlc_hw->sbclk) {
1924 wlc_hw->clk = false;
1925 if (wlc_hw->band && wlc_hw->band->pi)
1926 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1927 }
1928}
1929
1930
1931
1932
1933
1934
1935
1936static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1937{
1938 bool v, clk, xtal;
1939 u32 flags = 0;
1940
1941 xtal = wlc_hw->sbclk;
1942 if (!xtal)
1943 brcms_b_xtal(wlc_hw, ON);
1944
1945
1946 clk = wlc_hw->clk;
1947 if (!clk) {
1948
1949
1950
1951
1952
1953 flags |= SICF_PCLKE;
1954
1955
1956
1957
1958
1959
1960
1961
1962 bcma_core_enable(wlc_hw->d11core, flags);
1963 brcms_c_mctrl_reset(wlc_hw);
1964 }
1965
1966 v = ((bcma_read32(wlc_hw->d11core,
1967 D11REGOFFS(phydebug)) & PDBG_RFD) != 0);
1968
1969
1970 if (!clk)
1971 bcma_core_disable(wlc_hw->d11core, 0);
1972
1973 if (!xtal)
1974 brcms_b_xtal(wlc_hw, OFF);
1975
1976 return v;
1977}
1978
1979static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1980{
1981 struct dma_pub *di = wlc_hw->di[fifo];
1982 return dma_rxreset(di);
1983}
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1994{
1995 uint i;
1996 bool fastclk;
1997
1998 if (flags == BRCMS_USE_COREFLAGS)
1999 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2000
2001 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2002
2003
2004 fastclk = wlc_hw->forcefastclk;
2005 if (!fastclk)
2006 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2007
2008
2009 if (bcma_core_is_enabled(wlc_hw->d11core)) {
2010 for (i = 0; i < NFIFO; i++)
2011 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2012 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2013 "dma_txreset[%d]: cannot stop dma\n",
2014 wlc_hw->unit, __func__, i);
2015
2016 if ((wlc_hw->di[RX_FIFO])
2017 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2018 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2019 "[%d]: cannot stop dma\n",
2020 wlc_hw->unit, __func__, RX_FIFO);
2021 }
2022
2023 if (wlc_hw->noreset) {
2024 wlc_hw->wlc->macintstatus = 0;
2025 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2026 return;
2027 }
2028
2029
2030
2031
2032
2033
2034 flags |= SICF_PCLKE;
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046 wlc_hw->clk = false;
2047 bcma_core_enable(wlc_hw->d11core, flags);
2048 wlc_hw->clk = true;
2049 if (wlc_hw->band && wlc_hw->band->pi)
2050 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2051
2052 brcms_c_mctrl_reset(wlc_hw);
2053
2054 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2055 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2056
2057 brcms_b_phy_reset(wlc_hw);
2058
2059
2060 brcms_b_core_phypll_ctl(wlc_hw, true);
2061
2062
2063 wlc_hw->wlc->macintstatus = 0;
2064
2065
2066 if (!fastclk)
2067 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2068}
2069
2070
2071
2072
2073static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2074{
2075 struct bcma_device *core = wlc_hw->d11core;
2076 u16 fifo_nu;
2077 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2078 u16 txfifo_def, txfifo_def1;
2079 u16 txfifo_cmd;
2080
2081
2082 txfifo_startblk = TXFIFO_START_BLK;
2083
2084
2085 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2086
2087 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2088 txfifo_def = (txfifo_startblk & 0xff) |
2089 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2090 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2091 ((((txfifo_endblk -
2092 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2093 txfifo_cmd =
2094 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2095
2096 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2097 bcma_write16(core, D11REGOFFS(xmtfifodef), txfifo_def);
2098 bcma_write16(core, D11REGOFFS(xmtfifodef1), txfifo_def1);
2099
2100 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2101
2102 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2103 }
2104
2105
2106
2107
2108 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2109 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2110 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2111 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2112 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2113 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2114 xmtfifo_sz[TX_AC_BK_FIFO]));
2115 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2116 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2117 xmtfifo_sz[TX_BCMC_FIFO]));
2118}
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2134{
2135 struct bcma_device *core = wlc_hw->d11core;
2136
2137 if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
2138 (ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID)) {
2139 if (spurmode == WL_SPURAVOID_ON2) {
2140 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
2141 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2142 } else if (spurmode == WL_SPURAVOID_ON1) {
2143 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x5341);
2144 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2145 } else {
2146 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x8889);
2147 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2148 }
2149 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2150 if (spurmode == WL_SPURAVOID_ON1) {
2151 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x7CE0);
2152 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2153 } else {
2154 bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0xCCCD);
2155 bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2156 }
2157 }
2158}
2159
2160
2161static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2162{
2163 struct brcms_hardware *wlc_hw = wlc->hw;
2164 u32 gc, gm;
2165
2166
2167 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177 gc = gm = 0;
2178
2179
2180 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2181
2182 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2183 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2184 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2185 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2186
2187
2188 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2189
2190 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2191 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2192
2193
2194
2195
2196 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2197 (BOARD_GPIO_12 | BOARD_GPIO_13));
2198 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2199 (BOARD_GPIO_12 | BOARD_GPIO_13));
2200
2201
2202 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2203 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2204 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2205 BRCM_BAND_ALL);
2206
2207
2208 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2209 ANTSEL_CLKDIV_4MHZ);
2210 }
2211
2212
2213
2214
2215
2216 if (wlc_hw->boardflags & BFL_PACTRL)
2217 gm |= gc |= BOARD_GPIO_PACTRL;
2218
2219
2220 ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2221}
2222
2223static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2224 const __le32 ucode[], const size_t nbytes)
2225{
2226 struct bcma_device *core = wlc_hw->d11core;
2227 uint i;
2228 uint count;
2229
2230 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2231
2232 count = (nbytes / sizeof(u32));
2233
2234 bcma_write32(core, D11REGOFFS(objaddr),
2235 OBJADDR_AUTO_INC | OBJADDR_UCM_SEL);
2236 (void)bcma_read32(core, D11REGOFFS(objaddr));
2237 for (i = 0; i < count; i++)
2238 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
2239
2240}
2241
2242static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2243{
2244 struct brcms_c_info *wlc;
2245 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2246
2247 wlc = wlc_hw->wlc;
2248
2249 if (wlc_hw->ucode_loaded)
2250 return;
2251
2252 if (D11REV_IS(wlc_hw->corerev, 23)) {
2253 if (BRCMS_ISNPHY(wlc_hw->band)) {
2254 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2255 ucode->bcm43xx_16_mimosz);
2256 wlc_hw->ucode_loaded = true;
2257 } else
2258 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2259 "corerev %d\n",
2260 __func__, wlc_hw->unit, wlc_hw->corerev);
2261 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2262 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2263 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2264 ucode->bcm43xx_24_lcnsz);
2265 wlc_hw->ucode_loaded = true;
2266 } else {
2267 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2268 "corerev %d\n",
2269 __func__, wlc_hw->unit, wlc_hw->corerev);
2270 }
2271 }
2272}
2273
2274void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2275{
2276
2277 wlc_hw->bmac_phytxant = phytxant;
2278
2279
2280 if (!wlc_hw->up)
2281 return;
2282 brcms_c_ucode_txant_set(wlc_hw);
2283
2284}
2285
2286u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2287{
2288 return (u16) wlc_hw->wlc->stf->txant;
2289}
2290
2291void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2292{
2293 wlc_hw->antsel_type = antsel_type;
2294
2295
2296 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2297}
2298
2299static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2300{
2301 bool fatal = false;
2302 uint unit;
2303 uint intstatus, idx;
2304 struct bcma_device *core = wlc_hw->d11core;
2305 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2306
2307 unit = wlc_hw->unit;
2308
2309 for (idx = 0; idx < NFIFO; idx++) {
2310
2311 intstatus =
2312 bcma_read32(core,
2313 D11REGOFFS(intctrlregs[idx].intstatus)) &
2314 I_ERRORS;
2315 if (!intstatus)
2316 continue;
2317
2318 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2319 unit, idx, intstatus);
2320
2321 if (intstatus & I_RO) {
2322 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2323 "overflow\n", unit, idx);
2324 fatal = true;
2325 }
2326
2327 if (intstatus & I_PC) {
2328 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2329 unit, idx);
2330 fatal = true;
2331 }
2332
2333 if (intstatus & I_PD) {
2334 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2335 idx);
2336 fatal = true;
2337 }
2338
2339 if (intstatus & I_DE) {
2340 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2341 "error\n", unit, idx);
2342 fatal = true;
2343 }
2344
2345 if (intstatus & I_RU)
2346 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2347 "underflow\n", idx, unit);
2348
2349 if (intstatus & I_XU) {
2350 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2351 "underflow\n", idx, unit);
2352 fatal = true;
2353 }
2354
2355 if (fatal) {
2356 brcms_fatal_error(wlc_hw->wlc->wl);
2357 break;
2358 } else
2359 bcma_write32(core,
2360 D11REGOFFS(intctrlregs[idx].intstatus),
2361 intstatus);
2362 }
2363}
2364
2365void brcms_c_intrson(struct brcms_c_info *wlc)
2366{
2367 struct brcms_hardware *wlc_hw = wlc->hw;
2368 wlc->macintmask = wlc->defmacintmask;
2369 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2370}
2371
2372u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2373{
2374 struct brcms_hardware *wlc_hw = wlc->hw;
2375 u32 macintmask;
2376
2377 if (!wlc_hw->clk)
2378 return 0;
2379
2380 macintmask = wlc->macintmask;
2381
2382 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2383 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2384 udelay(1);
2385 wlc->macintmask = 0;
2386
2387
2388 return wlc->macintstatus ? 0 : macintmask;
2389}
2390
2391void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2392{
2393 struct brcms_hardware *wlc_hw = wlc->hw;
2394 if (!wlc_hw->clk)
2395 return;
2396
2397 wlc->macintmask = macintmask;
2398 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2399}
2400
2401
2402static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2403 uint tx_fifo)
2404{
2405 u8 fifo = 1 << tx_fifo;
2406
2407
2408
2409
2410 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2411 return;
2412
2413
2414 if (wlc_hw->suspended_fifos == 0)
2415 brcms_c_ucode_wake_override_set(wlc_hw,
2416 BRCMS_WAKE_OVERRIDE_TXFIFO);
2417
2418 wlc_hw->suspended_fifos |= fifo;
2419
2420 if (wlc_hw->di[tx_fifo]) {
2421
2422
2423
2424
2425
2426 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2427 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2428
2429 dma_txsuspend(wlc_hw->di[tx_fifo]);
2430
2431 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2432 brcms_c_enable_mac(wlc_hw->wlc);
2433 }
2434}
2435
2436static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2437 uint tx_fifo)
2438{
2439
2440
2441
2442
2443
2444 if (wlc_hw->di[tx_fifo])
2445 dma_txresume(wlc_hw->di[tx_fifo]);
2446
2447
2448 if (wlc_hw->suspended_fifos == 0)
2449 return;
2450 else {
2451 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2452 if (wlc_hw->suspended_fifos == 0)
2453 brcms_c_ucode_wake_override_clear(wlc_hw,
2454 BRCMS_WAKE_OVERRIDE_TXFIFO);
2455 }
2456}
2457
2458
2459static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx)
2460{
2461 static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2462
2463 if (mute_tx) {
2464
2465 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2466 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2467 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2468 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2469
2470
2471 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2472 null_ether_addr);
2473 } else {
2474
2475 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2476 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2477 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2478 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2479
2480
2481 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2482 wlc_hw->etheraddr);
2483 }
2484
2485 wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2486
2487 if (mute_tx)
2488 brcms_c_ucode_mute_override_set(wlc_hw);
2489 else
2490 brcms_c_ucode_mute_override_clear(wlc_hw);
2491}
2492
2493void
2494brcms_c_mute(struct brcms_c_info *wlc, bool mute_tx)
2495{
2496 brcms_b_mute(wlc->hw, mute_tx);
2497}
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2508{
2509 struct brcms_hardware *wlc_hw = wlc->hw;
2510 struct bcma_device *core = wlc_hw->d11core;
2511 u32 macintstatus;
2512
2513
2514 macintstatus = bcma_read32(core, D11REGOFFS(macintstatus));
2515
2516 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2517 macintstatus);
2518
2519
2520 if (brcms_deviceremoved(wlc))
2521 return -1;
2522
2523
2524
2525
2526 if (macintstatus == 0xffffffff)
2527 return 0;
2528
2529
2530 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2531
2532
2533 if (macintstatus == 0)
2534 return 0;
2535
2536
2537
2538
2539
2540
2541 bcma_write32(core, D11REGOFFS(macintmask), 0);
2542 (void)bcma_read32(core, D11REGOFFS(macintmask));
2543 wlc->macintmask = 0;
2544
2545
2546 bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
2547
2548
2549 if (macintstatus & MI_DMAINT)
2550
2551
2552
2553
2554
2555 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
2556 DEF_RXINTMASK);
2557
2558 return macintstatus;
2559}
2560
2561
2562
2563bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2564{
2565 u32 macintstatus;
2566
2567
2568 macintstatus = wlc_intstatus(wlc, false);
2569
2570
2571 if (macintstatus == 0xffffffff)
2572 return false;
2573
2574
2575 wlc->macintstatus |= macintstatus;
2576
2577 return true;
2578}
2579
2580
2581
2582
2583
2584
2585
2586bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2587{
2588 struct brcms_hardware *wlc_hw = wlc->hw;
2589 u32 macintstatus;
2590
2591 *wantdpc = false;
2592
2593 if (!wlc_hw->up || !wlc->macintmask)
2594 return false;
2595
2596
2597 macintstatus = wlc_intstatus(wlc, true);
2598
2599 if (macintstatus == 0xffffffff)
2600 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2601 " path\n");
2602
2603
2604 if (macintstatus == 0)
2605 return false;
2606
2607 *wantdpc = true;
2608
2609
2610 wlc->macintstatus = macintstatus;
2611
2612 return true;
2613
2614}
2615
2616void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2617{
2618 struct brcms_hardware *wlc_hw = wlc->hw;
2619 struct bcma_device *core = wlc_hw->d11core;
2620 u32 mc, mi;
2621 struct wiphy *wiphy = wlc->wiphy;
2622
2623 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2624 wlc_hw->band->bandunit);
2625
2626
2627
2628
2629 wlc_hw->mac_suspend_depth++;
2630 if (wlc_hw->mac_suspend_depth > 1)
2631 return;
2632
2633
2634 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2635
2636 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2637
2638 if (mc == 0xffffffff) {
2639 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2640 __func__);
2641 brcms_down(wlc->wl);
2642 return;
2643 }
2644 WARN_ON(mc & MCTL_PSM_JMP_0);
2645 WARN_ON(!(mc & MCTL_PSM_RUN));
2646 WARN_ON(!(mc & MCTL_EN_MAC));
2647
2648 mi = bcma_read32(core, D11REGOFFS(macintstatus));
2649 if (mi == 0xffffffff) {
2650 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2651 __func__);
2652 brcms_down(wlc->wl);
2653 return;
2654 }
2655 WARN_ON(mi & MI_MACSSPNDD);
2656
2657 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2658
2659 SPINWAIT(!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD),
2660 BRCMS_MAX_MAC_SUSPEND);
2661
2662 if (!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD)) {
2663 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2664 " and MI_MACSSPNDD is still not on.\n",
2665 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2666 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2667 "psm_brc 0x%04x\n", wlc_hw->unit,
2668 bcma_read32(core, D11REGOFFS(psmdebug)),
2669 bcma_read32(core, D11REGOFFS(phydebug)),
2670 bcma_read16(core, D11REGOFFS(psm_brc)));
2671 }
2672
2673 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2674 if (mc == 0xffffffff) {
2675 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2676 __func__);
2677 brcms_down(wlc->wl);
2678 return;
2679 }
2680 WARN_ON(mc & MCTL_PSM_JMP_0);
2681 WARN_ON(!(mc & MCTL_PSM_RUN));
2682 WARN_ON(mc & MCTL_EN_MAC);
2683}
2684
2685void brcms_c_enable_mac(struct brcms_c_info *wlc)
2686{
2687 struct brcms_hardware *wlc_hw = wlc->hw;
2688 struct bcma_device *core = wlc_hw->d11core;
2689 u32 mc, mi;
2690
2691 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2692 wlc->band->bandunit);
2693
2694
2695
2696
2697 wlc_hw->mac_suspend_depth--;
2698 if (wlc_hw->mac_suspend_depth > 0)
2699 return;
2700
2701 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2702 WARN_ON(mc & MCTL_PSM_JMP_0);
2703 WARN_ON(mc & MCTL_EN_MAC);
2704 WARN_ON(!(mc & MCTL_PSM_RUN));
2705
2706 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2707 bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
2708
2709 mc = bcma_read32(core, D11REGOFFS(maccontrol));
2710 WARN_ON(mc & MCTL_PSM_JMP_0);
2711 WARN_ON(!(mc & MCTL_EN_MAC));
2712 WARN_ON(!(mc & MCTL_PSM_RUN));
2713
2714 mi = bcma_read32(core, D11REGOFFS(macintstatus));
2715 WARN_ON(mi & MI_MACSSPNDD);
2716
2717 brcms_c_ucode_wake_override_clear(wlc_hw,
2718 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2719}
2720
2721void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2722{
2723 wlc_hw->hw_stf_ss_opmode = stf_mode;
2724
2725 if (wlc_hw->clk)
2726 brcms_upd_ofdm_pctl1_table(wlc_hw);
2727}
2728
2729static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2730{
2731 struct bcma_device *core = wlc_hw->d11core;
2732 u32 w, val;
2733 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2734
2735 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2736
2737
2738
2739 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2740 (void)bcma_read32(core, D11REGOFFS(objaddr));
2741 w = bcma_read32(core, D11REGOFFS(objdata));
2742
2743
2744 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2745 (void)bcma_read32(core, D11REGOFFS(objaddr));
2746 bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
2747
2748 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2749 (void)bcma_read32(core, D11REGOFFS(objaddr));
2750 val = bcma_read32(core, D11REGOFFS(objdata));
2751 if (val != (u32) 0xaa5555aa) {
2752 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2753 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2754 return false;
2755 }
2756
2757 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2758 (void)bcma_read32(core, D11REGOFFS(objaddr));
2759 bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
2760
2761 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2762 (void)bcma_read32(core, D11REGOFFS(objaddr));
2763 val = bcma_read32(core, D11REGOFFS(objdata));
2764 if (val != (u32) 0x55aaaa55) {
2765 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2766 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2767 return false;
2768 }
2769
2770 bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2771 (void)bcma_read32(core, D11REGOFFS(objaddr));
2772 bcma_write32(core, D11REGOFFS(objdata), w);
2773
2774
2775 bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
2776
2777 w = bcma_read32(core, D11REGOFFS(maccontrol));
2778 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2779 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2780 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2781 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2782 (MCTL_IHR_EN | MCTL_WAKE),
2783 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2784 return false;
2785 }
2786
2787 return true;
2788}
2789
2790#define PHYPLL_WAIT_US 100000
2791
2792void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2793{
2794 struct bcma_device *core = wlc_hw->d11core;
2795 u32 tmp;
2796
2797 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2798
2799 tmp = 0;
2800
2801 if (on) {
2802 if ((ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
2803 bcma_set32(core, D11REGOFFS(clk_ctl_st),
2804 CCS_ERSRC_REQ_HT |
2805 CCS_ERSRC_REQ_D11PLL |
2806 CCS_ERSRC_REQ_PHYPLL);
2807 SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2808 CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT,
2809 PHYPLL_WAIT_US);
2810
2811 tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2812 if ((tmp & CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT)
2813 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2814 " PLL failed\n", __func__);
2815 } else {
2816 bcma_set32(core, D11REGOFFS(clk_ctl_st),
2817 tmp | CCS_ERSRC_REQ_D11PLL |
2818 CCS_ERSRC_REQ_PHYPLL);
2819 SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2820 (CCS_ERSRC_AVAIL_D11PLL |
2821 CCS_ERSRC_AVAIL_PHYPLL)) !=
2822 (CCS_ERSRC_AVAIL_D11PLL |
2823 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2824
2825 tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2826 if ((tmp &
2827 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2828 !=
2829 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2830 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2831 "PHY PLL failed\n", __func__);
2832 }
2833 } else {
2834
2835
2836
2837
2838
2839 bcma_mask32(core, D11REGOFFS(clk_ctl_st),
2840 ~CCS_ERSRC_REQ_PHYPLL);
2841 (void)bcma_read32(core, D11REGOFFS(clk_ctl_st));
2842 }
2843}
2844
2845static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2846{
2847 bool dev_gone;
2848
2849 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2850
2851 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2852
2853 if (dev_gone)
2854 return;
2855
2856 if (wlc_hw->noreset)
2857 return;
2858
2859
2860 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2861
2862
2863 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2864
2865
2866 brcms_b_core_phypll_ctl(wlc_hw, false);
2867
2868 wlc_hw->clk = false;
2869 bcma_core_disable(wlc_hw->d11core, 0);
2870 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2871}
2872
2873static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2874{
2875 struct brcms_hardware *wlc_hw = wlc->hw;
2876 uint i;
2877
2878
2879 for (i = 0; i < NFIFO; i++)
2880 if (wlc_hw->di[i]) {
2881 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2882 wlc->core->txpktpend[i] = 0;
2883 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2884 }
2885
2886
2887 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2888}
2889
2890static u16
2891brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2892{
2893 struct bcma_device *core = wlc_hw->d11core;
2894 u16 objoff = D11REGOFFS(objdata);
2895
2896 bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2897 (void)bcma_read32(core, D11REGOFFS(objaddr));
2898 if (offset & 2)
2899 objoff += 2;
2900
2901 return bcma_read16(core, objoff);
2902;
2903}
2904
2905static void
2906brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2907 u32 sel)
2908{
2909 struct bcma_device *core = wlc_hw->d11core;
2910 u16 objoff = D11REGOFFS(objdata);
2911
2912 bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2913 (void)bcma_read32(core, D11REGOFFS(objaddr));
2914 if (offset & 2)
2915 objoff += 2;
2916
2917 bcma_write16(core, objoff, v);
2918}
2919
2920
2921
2922
2923
2924u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2925{
2926 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2927}
2928
2929
2930
2931
2932
2933void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2934{
2935 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2936}
2937
2938
2939
2940
2941
2942
2943
2944void
2945brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2946 const void *buf, int len, u32 sel)
2947{
2948 u16 v;
2949 const u8 *p = (const u8 *)buf;
2950 int i;
2951
2952 if (len <= 0 || (offset & 1) || (len & 1))
2953 return;
2954
2955 for (i = 0; i < len; i += 2) {
2956 v = p[i] | (p[i + 1] << 8);
2957 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2958 }
2959}
2960
2961
2962
2963
2964
2965
2966
2967void
2968brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2969 int len, u32 sel)
2970{
2971 u16 v;
2972 u8 *p = (u8 *) buf;
2973 int i;
2974
2975 if (len <= 0 || (offset & 1) || (len & 1))
2976 return;
2977
2978 for (i = 0; i < len; i += 2) {
2979 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2980 p[i] = v & 0xFF;
2981 p[i + 1] = (v >> 8) & 0xFF;
2982 }
2983}
2984
2985
2986
2987
2988
2989static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2990 const void *buf, int len)
2991{
2992 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2993}
2994
2995static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
2996 u16 SRL, u16 LRL)
2997{
2998 wlc_hw->SRL = SRL;
2999 wlc_hw->LRL = LRL;
3000
3001
3002 if (wlc_hw->up) {
3003 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3004 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3005 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3006 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
3007 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3008 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3009 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3010 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3011 }
3012}
3013
3014static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3015{
3016 if (set) {
3017 if (mboolisset(wlc_hw->pllreq, req_bit))
3018 return;
3019
3020 mboolset(wlc_hw->pllreq, req_bit);
3021
3022 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3023 if (!wlc_hw->sbclk)
3024 brcms_b_xtal(wlc_hw, ON);
3025 }
3026 } else {
3027 if (!mboolisset(wlc_hw->pllreq, req_bit))
3028 return;
3029
3030 mboolclr(wlc_hw->pllreq, req_bit);
3031
3032 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3033 if (wlc_hw->sbclk)
3034 brcms_b_xtal(wlc_hw, OFF);
3035 }
3036 }
3037}
3038
3039static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3040{
3041 wlc_hw->antsel_avail = antsel_avail;
3042}
3043
3044
3045
3046
3047
3048static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3049{
3050 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3051
3052
3053 if (!wlc->pub->associated)
3054 return false;
3055
3056
3057 if (wlc->filter_flags & FIF_PROMISC_IN_BSS)
3058 return false;
3059
3060 if (cfg->associated) {
3061
3062
3063
3064
3065 if (!cfg->BSS)
3066 return false;
3067
3068 return false;
3069 }
3070
3071 return true;
3072}
3073
3074static void brcms_c_statsupd(struct brcms_c_info *wlc)
3075{
3076 int i;
3077 struct macstat macstats;
3078#ifdef BCMDBG
3079 u16 delta;
3080 u16 rxf0ovfl;
3081 u16 txfunfl[NFIFO];
3082#endif
3083
3084
3085 if (!wlc->pub->up)
3086 return;
3087
3088#ifdef BCMDBG
3089
3090 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3091
3092
3093 for (i = 0; i < NFIFO; i++)
3094 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3095#endif
3096
3097
3098 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3099 sizeof(struct macstat), OBJADDR_SHM_SEL);
3100
3101#ifdef BCMDBG
3102
3103 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3104 if (delta)
3105 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3106 wlc->pub->unit, delta);
3107
3108
3109 for (i = 0; i < NFIFO; i++) {
3110 delta =
3111 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3112 txfunfl[i]);
3113 if (delta)
3114 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3115 "\n", wlc->pub->unit, delta, i);
3116 }
3117#endif
3118
3119
3120 for (i = 0; i < NFIFO; i++) {
3121 if (wlc->hw->di[i])
3122 dma_counterreset(wlc->hw->di[i]);
3123 }
3124}
3125
3126static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3127{
3128 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3129
3130
3131 if (!brcms_deviceremoved(wlc_hw->wlc))
3132 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3133
3134
3135 brcms_c_flushqueues(wlc_hw->wlc);
3136}
3137
3138void brcms_c_reset(struct brcms_c_info *wlc)
3139{
3140 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3141
3142
3143 brcms_c_statsupd(wlc);
3144
3145
3146 memset((char *)wlc->core->macstat_snapshot, 0,
3147 sizeof(struct macstat));
3148
3149 brcms_b_reset(wlc->hw);
3150}
3151
3152
3153
3154
3155
3156
3157static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3158{
3159 u16 chanspec =
3160 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3161 WL_CHANSPEC_BAND_2G;
3162
3163 return chanspec;
3164}
3165
3166void brcms_c_init_scb(struct scb *scb)
3167{
3168 int i;
3169
3170 memset(scb, 0, sizeof(struct scb));
3171 scb->flags = SCB_WMECAP | SCB_HTCAP;
3172 for (i = 0; i < NUMPRIO; i++) {
3173 scb->seqnum[i] = 0;
3174 scb->seqctl[i] = 0xFFFF;
3175 }
3176
3177 scb->seqctl_nonqos = 0xFFFF;
3178 scb->magic = SCB_MAGIC;
3179}
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189static void brcms_b_coreinit(struct brcms_c_info *wlc)
3190{
3191 struct brcms_hardware *wlc_hw = wlc->hw;
3192 struct bcma_device *core = wlc_hw->d11core;
3193 u32 sflags;
3194 u32 bcnint_us;
3195 uint i = 0;
3196 bool fifosz_fixup = false;
3197 int err = 0;
3198 u16 buf[NFIFO];
3199 struct wiphy *wiphy = wlc->wiphy;
3200 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3201
3202 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3203
3204
3205 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3206
3207 brcms_ucode_download(wlc_hw);
3208
3209
3210
3211 fifosz_fixup = true;
3212
3213
3214 bcma_write32(core, D11REGOFFS(macintstatus), -1);
3215 brcms_b_mctrl(wlc_hw, ~0,
3216 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3217
3218
3219 SPINWAIT(((bcma_read32(core, D11REGOFFS(macintstatus)) &
3220 MI_MACSSPNDD) == 0), 1000 * 1000);
3221 if ((bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD) == 0)
3222 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3223 "suspend!\n", wlc_hw->unit);
3224
3225 brcms_c_gpio_init(wlc);
3226
3227 sflags = bcma_aread32(core, BCMA_IOST);
3228
3229 if (D11REV_IS(wlc_hw->corerev, 23)) {
3230 if (BRCMS_ISNPHY(wlc_hw->band))
3231 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3232 else
3233 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3234 " %d\n", __func__, wlc_hw->unit,
3235 wlc_hw->corerev);
3236 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3237 if (BRCMS_ISLCNPHY(wlc_hw->band))
3238 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3239 else
3240 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3241 " %d\n", __func__, wlc_hw->unit,
3242 wlc_hw->corerev);
3243 } else {
3244 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3245 __func__, wlc_hw->unit, wlc_hw->corerev);
3246 }
3247
3248
3249 if (fifosz_fixup == true)
3250 brcms_b_corerev_fifofixup(wlc_hw);
3251
3252
3253 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3254 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3255 i = TX_AC_BE_FIFO;
3256 err = -1;
3257 }
3258 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3259 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3260 i = TX_AC_VI_FIFO;
3261 err = -1;
3262 }
3263 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3264 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3265 buf[TX_AC_BK_FIFO] &= 0xff;
3266 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3267 i = TX_AC_BK_FIFO;
3268 err = -1;
3269 }
3270 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3271 i = TX_AC_VO_FIFO;
3272 err = -1;
3273 }
3274 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3275 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3276 buf[TX_BCMC_FIFO] &= 0xff;
3277 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3278 i = TX_BCMC_FIFO;
3279 err = -1;
3280 }
3281 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3282 i = TX_ATIM_FIFO;
3283 err = -1;
3284 }
3285 if (err != 0)
3286 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3287 " driver size %d index %d\n", buf[i],
3288 wlc_hw->xmtfifo_sz[i], i);
3289
3290
3291 WARN_ON(bcma_read32(core, D11REGOFFS(maccontrol)) == 0xffffffff);
3292
3293
3294
3295
3296 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3297 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3298
3299
3300 bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
3301
3302
3303 brcms_b_mctrl(wlc_hw,
3304 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3305 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3306
3307
3308 bcnint_us = 0x8000 << 10;
3309 bcma_write32(core, D11REGOFFS(tsf_cfprep),
3310 (bcnint_us << CFPREP_CBI_SHIFT));
3311 bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
3312 bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
3313
3314
3315 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
3316 DEF_RXINTMASK);
3317
3318
3319 brcms_b_macphyclk_set(wlc_hw, ON);
3320
3321
3322 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3323 bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3324
3325
3326 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3327
3328
3329 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3330 (u16) (wlc_hw->machwcap & 0xffff));
3331 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3332 (u16) ((wlc_hw->
3333 machwcap >> 16) & 0xffff));
3334
3335
3336 bcma_write32(core, D11REGOFFS(objaddr),
3337 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3338 (void)bcma_read32(core, D11REGOFFS(objaddr));
3339 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3340 bcma_write32(core, D11REGOFFS(objaddr),
3341 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3342 (void)bcma_read32(core, D11REGOFFS(objaddr));
3343 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3344
3345
3346 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3347 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3348
3349 bcma_mask16(core, D11REGOFFS(ifs_ctl), 0x0FFF);
3350 bcma_write16(core, D11REGOFFS(ifs_aifsn), EDCF_AIFSN_MIN);
3351
3352
3353 for (i = 0; i < NFIFO; i++) {
3354 if (wlc_hw->di[i])
3355 dma_txinit(wlc_hw->di[i]);
3356 }
3357
3358
3359 dma_rxinit(wlc_hw->di[RX_FIFO]);
3360 dma_rxfill(wlc_hw->di[RX_FIFO]);
3361}
3362
3363void
3364static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {
3365 u32 macintmask;
3366 bool fastclk;
3367 struct brcms_c_info *wlc = wlc_hw->wlc;
3368
3369 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3370
3371
3372 fastclk = wlc_hw->forcefastclk;
3373 if (!fastclk)
3374 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3375
3376
3377 macintmask = brcms_intrsoff(wlc->wl);
3378
3379
3380 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3381 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3382
3383
3384 wlc_phy_cal_init(wlc_hw->band->pi);
3385
3386
3387 brcms_b_coreinit(wlc);
3388
3389
3390 brcms_b_bsinit(wlc, chanspec);
3391
3392
3393 brcms_intrsrestore(wlc->wl, macintmask);
3394
3395
3396
3397
3398 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3399
3400
3401
3402
3403
3404 wlc_hw->mac_suspend_depth = 1;
3405
3406
3407 if (!fastclk)
3408 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3409}
3410
3411static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3412 u16 chanspec)
3413{
3414
3415 wlc->chanspec = chanspec;
3416
3417
3418 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3419
3420 if (wlc->stf->ss_algosel_auto)
3421 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3422 chanspec);
3423
3424 brcms_c_stf_ss_update(wlc, wlc->band);
3425}
3426
3427static void
3428brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3429{
3430 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3431 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3432 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3433 brcms_chspec_bw(wlc->default_bss->chanspec),
3434 wlc->stf->txstreams);
3435}
3436
3437
3438static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3439 struct brcms_c_rateset *rateset)
3440{
3441 u8 rate;
3442 u8 mandatory;
3443 u8 cck_basic = 0;
3444 u8 ofdm_basic = 0;
3445 u8 *br = wlc->band->basic_rate;
3446 uint i;
3447
3448
3449 memset(br, 0, BRCM_MAXRATE + 1);
3450
3451
3452
3453
3454 for (i = 0; i < rateset->count; i++) {
3455
3456 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3457 continue;
3458
3459
3460 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3461
3462 if (rate > BRCM_MAXRATE) {
3463 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3464 "invalid rate 0x%X in rate set\n",
3465 rateset->rates[i]);
3466 continue;
3467 }
3468
3469 br[rate] = rate;
3470 }
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3487 rate = wlc->band->hw_rateset.rates[i];
3488
3489 if (br[rate] != 0) {
3490
3491
3492
3493
3494 if (is_ofdm_rate(rate))
3495 ofdm_basic = rate;
3496 else
3497 cck_basic = rate;
3498
3499 continue;
3500 }
3501
3502
3503
3504
3505
3506
3507 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3508
3509 if (br[rate] != 0)
3510 continue;
3511
3512 if (is_ofdm_rate(rate)) {
3513
3514
3515
3516
3517 if (rate >= BRCM_RATE_24M)
3518 mandatory = BRCM_RATE_24M;
3519 else if (rate >= BRCM_RATE_12M)
3520 mandatory = BRCM_RATE_12M;
3521 else
3522 mandatory = BRCM_RATE_6M;
3523 } else {
3524
3525 mandatory = rate;
3526 }
3527
3528 br[rate] = mandatory;
3529 }
3530}
3531
3532static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3533 u16 chanspec)
3534{
3535 struct brcms_c_rateset default_rateset;
3536 uint parkband;
3537 uint i, band_order[2];
3538
3539 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3540
3541
3542
3543
3544 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3545
3546 parkband = wlc->band->bandunit;
3547 band_order[0] = band_order[1] = parkband;
3548 } else {
3549
3550 parkband = chspec_bandunit(chanspec);
3551
3552
3553 band_order[0] = parkband ^ 1;
3554 band_order[1] = parkband;
3555 }
3556
3557
3558 for (i = 0; i < wlc->pub->_nbands; i++) {
3559 uint j = band_order[i];
3560
3561 wlc->band = wlc->bandstate[j];
3562
3563 brcms_default_rateset(wlc, &default_rateset);
3564
3565
3566 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3567 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3568 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3569
3570
3571 brcms_c_rate_lookup_init(wlc, &default_rateset);
3572 }
3573
3574
3575 brcms_c_set_phy_chanspec(wlc, chanspec);
3576}
3577
3578
3579
3580
3581
3582void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags)
3583{
3584 u32 promisc_bits = 0;
3585
3586 wlc->filter_flags = filter_flags;
3587
3588 if (filter_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
3589 promisc_bits |= MCTL_PROMISC;
3590
3591 if (filter_flags & FIF_BCN_PRBRESP_PROMISC)
3592 promisc_bits |= MCTL_BCNS_PROMISC;
3593
3594 if (filter_flags & FIF_FCSFAIL)
3595 promisc_bits |= MCTL_KEEPBADFCS;
3596
3597 if (filter_flags & (FIF_CONTROL | FIF_PSPOLL))
3598 promisc_bits |= MCTL_KEEPCONTROL;
3599
3600 brcms_b_mctrl(wlc->hw,
3601 MCTL_PROMISC | MCTL_BCNS_PROMISC |
3602 MCTL_KEEPCONTROL | MCTL_KEEPBADFCS,
3603 promisc_bits);
3604}
3605
3606
3607
3608
3609
3610static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3611{
3612
3613
3614
3615 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3616 if (wlc->pub->associated) {
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626 if (BRCMS_PHY_11N_CAP(wlc->band))
3627 brcms_b_write_shm(wlc->hw,
3628 M_BCN_TXTSF_OFFSET, 0);
3629 }
3630 } else {
3631
3632 }
3633}
3634
3635static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3636 u8 basic_rate)
3637{
3638 u8 phy_rate, index;
3639 u8 basic_phy_rate, basic_index;
3640 u16 dir_table, basic_table;
3641 u16 basic_ptr;
3642
3643
3644 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3645
3646
3647 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3648
3649
3650
3651
3652
3653 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3654 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3655 index = phy_rate & 0xf;
3656 basic_index = basic_phy_rate & 0xf;
3657
3658
3659
3660
3661 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3662
3663
3664
3665
3666 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3667}
3668
3669static const struct brcms_c_rateset *
3670brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3671{
3672 const struct brcms_c_rateset *rs_dflt;
3673
3674 if (BRCMS_PHY_11N_CAP(wlc->band)) {
3675 if (wlc->band->bandtype == BRCM_BAND_5G)
3676 rs_dflt = &ofdm_mimo_rates;
3677 else
3678 rs_dflt = &cck_ofdm_mimo_rates;
3679 } else if (wlc->band->gmode)
3680 rs_dflt = &cck_ofdm_rates;
3681 else
3682 rs_dflt = &cck_rates;
3683
3684 return rs_dflt;
3685}
3686
3687static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3688{
3689 const struct brcms_c_rateset *rs_dflt;
3690 struct brcms_c_rateset rs;
3691 u8 rate, basic_rate;
3692 uint i;
3693
3694 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3695
3696 brcms_c_rateset_copy(rs_dflt, &rs);
3697 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3698
3699
3700 for (i = 0; i < rs.count; i++) {
3701 rate = rs.rates[i] & BRCMS_RATE_MASK;
3702
3703
3704
3705
3706 basic_rate = brcms_basic_rate(wlc, rate);
3707 if (basic_rate == 0)
3708
3709
3710
3711 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3712
3713 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3714 }
3715}
3716
3717
3718static void brcms_c_bsinit(struct brcms_c_info *wlc)
3719{
3720 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3721 wlc->pub->unit, wlc->band->bandunit);
3722
3723
3724 brcms_c_set_ratetable(wlc);
3725
3726
3727 brcms_c_ucode_mac_upd(wlc);
3728
3729
3730 brcms_c_antsel_init(wlc->asi);
3731
3732}
3733
3734
3735static int
3736brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3737 bool writeToShm)
3738{
3739 int idle_busy_ratio_x_16 = 0;
3740 uint offset =
3741 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3742 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3743 if (duty_cycle > 100 || duty_cycle < 0) {
3744 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3745 wlc->pub->unit);
3746 return -EINVAL;
3747 }
3748 if (duty_cycle)
3749 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3750
3751 if (writeToShm)
3752 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3753
3754 if (isOFDM)
3755 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3756 else
3757 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3758
3759 return 0;
3760}
3761
3762
3763
3764
3765
3766static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3767{
3768 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3769 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3770
3771 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3772 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3773 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3774 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3775}
3776
3777static void
3778brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3779 struct brcms_txq_info *qi, bool on, int prio)
3780{
3781
3782}
3783
3784static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3785{
3786 struct brcms_txq_info *qi;
3787
3788 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3789 if (qi->stopped) {
3790 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3791 qi->stopped = 0;
3792 }
3793 }
3794}
3795
3796
3797static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3798{
3799 u32 v1, v2;
3800 bool hps;
3801 bool awake_before;
3802
3803 hps = brcms_c_ps_allowed(wlc);
3804
3805 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3806
3807 v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3808 v2 = MCTL_WAKE;
3809 if (hps)
3810 v2 |= MCTL_HPS;
3811
3812 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3813
3814 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3815
3816 if (!awake_before)
3817 brcms_b_wait_for_wake(wlc->hw);
3818}
3819
3820
3821
3822
3823
3824static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3825{
3826 int err = 0;
3827 struct brcms_c_info *wlc = bsscfg->wlc;
3828
3829
3830 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3831
3832 brcms_c_ampdu_macaddr_upd(wlc);
3833
3834 return err;
3835}
3836
3837
3838
3839
3840static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3841{
3842
3843 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3844}
3845
3846static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3847{
3848 wlc_hw->shortslot = shortslot;
3849
3850 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3851 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3852 brcms_b_update_slot_timing(wlc_hw, shortslot);
3853 brcms_c_enable_mac(wlc_hw->wlc);
3854 }
3855}
3856
3857
3858
3859
3860
3861static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3862{
3863
3864 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3865 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3866
3867 if (wlc->shortslot == shortslot)
3868 return;
3869
3870 wlc->shortslot = shortslot;
3871
3872 brcms_b_set_shortslot(wlc->hw, shortslot);
3873}
3874
3875static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3876{
3877 if (wlc->home_chanspec != chanspec) {
3878 wlc->home_chanspec = chanspec;
3879
3880 if (wlc->bsscfg->associated)
3881 wlc->bsscfg->current_bss->chanspec = chanspec;
3882 }
3883}
3884
3885void
3886brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3887 bool mute_tx, struct txpwr_limits *txpwr)
3888{
3889 uint bandunit;
3890
3891 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3892
3893 wlc_hw->chanspec = chanspec;
3894
3895
3896 if (wlc_hw->_nbands > 1) {
3897 bandunit = chspec_bandunit(chanspec);
3898 if (wlc_hw->band->bandunit != bandunit) {
3899
3900
3901
3902 if (wlc_hw->up) {
3903 wlc_phy_chanspec_radio_set(wlc_hw->
3904 bandstate[bandunit]->
3905 pi, chanspec);
3906 brcms_b_setband(wlc_hw, bandunit, chanspec);
3907 } else {
3908 brcms_c_setxband(wlc_hw, bandunit);
3909 }
3910 }
3911 }
3912
3913 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3914
3915 if (!wlc_hw->up) {
3916 if (wlc_hw->clk)
3917 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3918 chanspec);
3919 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3920 } else {
3921 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3922 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3923
3924
3925 brcms_b_mute(wlc_hw, mute_tx);
3926 }
3927}
3928
3929
3930static void brcms_c_setband(struct brcms_c_info *wlc,
3931 uint bandunit)
3932{
3933 wlc->band = wlc->bandstate[bandunit];
3934
3935 if (!wlc->pub->up)
3936 return;
3937
3938
3939 brcms_c_set_ps_ctrl(wlc);
3940
3941
3942 brcms_c_bsinit(wlc);
3943}
3944
3945static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3946{
3947 uint bandunit;
3948 bool switchband = false;
3949 u16 old_chanspec = wlc->chanspec;
3950
3951 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3952 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3953 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3954 return;
3955 }
3956
3957
3958 if (wlc->pub->_nbands > 1) {
3959 bandunit = chspec_bandunit(chanspec);
3960 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3961 switchband = true;
3962 if (wlc->bandlocked) {
3963 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3964 "band is locked!\n",
3965 wlc->pub->unit, __func__,
3966 CHSPEC_CHANNEL(chanspec));
3967 return;
3968 }
3969
3970
3971
3972
3973
3974
3975
3976
3977 brcms_c_setband(wlc, bandunit);
3978 }
3979 }
3980
3981
3982 brcms_c_set_phy_chanspec(wlc, chanspec);
3983
3984
3985 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3986 brcms_c_antsel_init(wlc->asi);
3987
3988
3989
3990
3991 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3992 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3993 }
3994
3995
3996 brcms_c_ucode_mac_upd(wlc);
3997}
3998
3999
4000
4001
4002
4003
4004
4005void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4006 u32 bcn_rspec)
4007{
4008 u16 phyctl;
4009 u16 phytxant = wlc->stf->phytxant;
4010 u16 mask = PHY_TXC_ANT_MASK;
4011
4012
4013 if (BRCMS_PHY_11N_CAP(wlc->band))
4014 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4015
4016 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4017 phyctl = (phyctl & ~mask) | phytxant;
4018 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4019}
4020
4021
4022
4023
4024
4025
4026void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4027{
4028 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4029
4030 switch (idx) {
4031 case BRCMS_PROT_G_SPEC:
4032 wlc->protection->_g = (bool) val;
4033 break;
4034 case BRCMS_PROT_G_OVR:
4035 wlc->protection->g_override = (s8) val;
4036 break;
4037 case BRCMS_PROT_G_USER:
4038 wlc->protection->gmode_user = (u8) val;
4039 break;
4040 case BRCMS_PROT_OVERLAP:
4041 wlc->protection->overlap = (s8) val;
4042 break;
4043 case BRCMS_PROT_N_USER:
4044 wlc->protection->nmode_user = (s8) val;
4045 break;
4046 case BRCMS_PROT_N_CFG:
4047 wlc->protection->n_cfg = (s8) val;
4048 break;
4049 case BRCMS_PROT_N_CFG_OVR:
4050 wlc->protection->n_cfg_override = (s8) val;
4051 break;
4052 case BRCMS_PROT_N_NONGF:
4053 wlc->protection->nongf = (bool) val;
4054 break;
4055 case BRCMS_PROT_N_NONGF_OVR:
4056 wlc->protection->nongf_override = (s8) val;
4057 break;
4058 case BRCMS_PROT_N_PAM_OVR:
4059 wlc->protection->n_pam_override = (s8) val;
4060 break;
4061 case BRCMS_PROT_N_OBSS:
4062 wlc->protection->n_obss = (bool) val;
4063 break;
4064
4065 default:
4066 break;
4067 }
4068
4069}
4070
4071static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4072{
4073 if (wlc->pub->up) {
4074 brcms_c_update_beacon(wlc);
4075 brcms_c_update_probe_resp(wlc, true);
4076 }
4077}
4078
4079static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4080{
4081 wlc->stf->ldpc = val;
4082
4083 if (wlc->pub->up) {
4084 brcms_c_update_beacon(wlc);
4085 brcms_c_update_probe_resp(wlc, true);
4086 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4087 }
4088}
4089
4090void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4091 const struct ieee80211_tx_queue_params *params,
4092 bool suspend)
4093{
4094 int i;
4095 struct shm_acparams acp_shm;
4096 u16 *shm_entry;
4097
4098
4099 if (!wlc->clk) {
4100 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4101 __func__);
4102 return;
4103 }
4104
4105 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4106
4107 acp_shm.txop = params->txop;
4108
4109 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4110 EDCF_TXOP2USEC(acp_shm.txop);
4111 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4112
4113 if (aci == IEEE80211_AC_VI && acp_shm.txop == 0
4114 && acp_shm.aifs < EDCF_AIFSN_MAX)
4115 acp_shm.aifs++;
4116
4117 if (acp_shm.aifs < EDCF_AIFSN_MIN
4118 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4119 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4120 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4121 } else {
4122 acp_shm.cwmin = params->cw_min;
4123 acp_shm.cwmax = params->cw_max;
4124 acp_shm.cwcur = acp_shm.cwmin;
4125 acp_shm.bslots =
4126 bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4127 acp_shm.cwcur;
4128 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4129
4130 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4131 wme_ac2fifo[aci] *
4132 M_EDCF_QLEN +
4133 M_EDCF_STATUS_OFF));
4134 acp_shm.status |= WME_STATUS_NEWAC;
4135
4136
4137 shm_entry = (u16 *) &acp_shm;
4138 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4139 brcms_b_write_shm(wlc->hw,
4140 M_EDCF_QINFO +
4141 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4142 *shm_entry++);
4143 }
4144
4145 if (suspend) {
4146 brcms_c_suspend_mac_and_wait(wlc);
4147 brcms_c_enable_mac(wlc);
4148 }
4149}
4150
4151static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4152{
4153 u16 aci;
4154 int i_ac;
4155 struct ieee80211_tx_queue_params txq_pars;
4156 static const struct edcf_acparam default_edcf_acparams[] = {
4157 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4158 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4159 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4160 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4161 };
4162 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4163
4164 for (i_ac = 0; i_ac < IEEE80211_NUM_ACS; i_ac++, edcf_acp++) {
4165
4166 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4167
4168
4169 txq_pars.txop = edcf_acp->TXOP;
4170 txq_pars.aifs = edcf_acp->ACI;
4171
4172
4173 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4174
4175 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4176 >> EDCF_ECWMAX_SHIFT);
4177 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4178 }
4179
4180 if (suspend) {
4181 brcms_c_suspend_mac_and_wait(wlc);
4182 brcms_c_enable_mac(wlc);
4183 }
4184}
4185
4186static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4187{
4188
4189 if (wlc->radio_monitor)
4190 return;
4191
4192 wlc->radio_monitor = true;
4193 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4194 brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4195}
4196
4197static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4198{
4199 if (!wlc->radio_monitor)
4200 return true;
4201
4202 wlc->radio_monitor = false;
4203 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4204 return brcms_del_timer(wlc->radio_timer);
4205}
4206
4207
4208static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4209{
4210 if (wlc->pub->hw_off)
4211 return;
4212
4213 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4214 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4215 else
4216 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4217}
4218
4219
4220bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4221{
4222 brcms_c_radio_hwdisable_upd(wlc);
4223
4224 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4225 true : false;
4226}
4227
4228
4229static void brcms_c_radio_timer(void *arg)
4230{
4231 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4232
4233 if (brcms_deviceremoved(wlc)) {
4234 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4235 __func__);
4236 brcms_down(wlc->wl);
4237 return;
4238 }
4239
4240 brcms_c_radio_hwdisable_upd(wlc);
4241}
4242
4243
4244static void brcms_b_watchdog(void *arg)
4245{
4246 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4247 struct brcms_hardware *wlc_hw = wlc->hw;
4248
4249 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4250
4251 if (!wlc_hw->up)
4252 return;
4253
4254
4255 wlc_hw->now++;
4256
4257
4258 brcms_b_fifoerrors(wlc_hw);
4259
4260
4261 dma_rxfill(wlc->hw->di[RX_FIFO]);
4262
4263 wlc_phy_watchdog(wlc_hw->band->pi);
4264}
4265
4266
4267static void brcms_c_watchdog(void *arg)
4268{
4269 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4270
4271 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4272
4273 if (!wlc->pub->up)
4274 return;
4275
4276 if (brcms_deviceremoved(wlc)) {
4277 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4278 __func__);
4279 brcms_down(wlc->wl);
4280 return;
4281 }
4282
4283
4284 wlc->pub->now++;
4285
4286 brcms_c_radio_hwdisable_upd(wlc);
4287
4288 if (wlc->pub->radio_disabled)
4289 return;
4290
4291 brcms_b_watchdog(wlc);
4292
4293
4294
4295
4296
4297 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4298 brcms_c_statsupd(wlc);
4299
4300 if (BRCMS_ISNPHY(wlc->band) &&
4301 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4302 BRCMS_TEMPSENSE_PERIOD)) {
4303 wlc->tempsense_lasttime = wlc->pub->now;
4304 brcms_c_tempsense_upd(wlc);
4305 }
4306}
4307
4308static void brcms_c_watchdog_by_timer(void *arg)
4309{
4310 brcms_c_watchdog(arg);
4311}
4312
4313static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4314{
4315 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4316 wlc, "watchdog");
4317 if (!wlc->wdtimer) {
4318 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4319 "failed\n", unit);
4320 goto fail;
4321 }
4322
4323 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4324 wlc, "radio");
4325 if (!wlc->radio_timer) {
4326 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4327 "failed\n", unit);
4328 goto fail;
4329 }
4330
4331 return true;
4332
4333 fail:
4334 return false;
4335}
4336
4337
4338
4339
4340
4341static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4342{
4343 int i;
4344
4345
4346 wlc->chanspec = ch20mhz_chspec(1);
4347
4348
4349 wlc->shortslot = false;
4350 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4351
4352 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4353 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4354
4355 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4356 BRCMS_PROTECTION_AUTO);
4357 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4358 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4359 BRCMS_PROTECTION_AUTO);
4360 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4361 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4362
4363 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4364 BRCMS_PROTECTION_CTL_OVERLAP);
4365
4366
4367 wlc->include_legacy_erp = true;
4368
4369 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4370 wlc->stf->txant = ANT_TX_DEF;
4371
4372 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4373
4374 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4375 for (i = 0; i < NFIFO; i++)
4376 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4377 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4378
4379
4380 wlc->SFBL = RETRY_SHORT_FB;
4381 wlc->LFBL = RETRY_LONG_FB;
4382
4383
4384 wlc->SRL = RETRY_SHORT_DEF;
4385 wlc->LRL = RETRY_LONG_DEF;
4386
4387
4388 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4389 wlc->pub->bcmerror = 0;
4390}
4391
4392static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4393{
4394 uint err = 0;
4395 uint unit;
4396 unit = wlc->pub->unit;
4397
4398 wlc->asi = brcms_c_antsel_attach(wlc);
4399 if (wlc->asi == NULL) {
4400 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4401 "failed\n", unit);
4402 err = 44;
4403 goto fail;
4404 }
4405
4406 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4407 if (wlc->ampdu == NULL) {
4408 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4409 "failed\n", unit);
4410 err = 50;
4411 goto fail;
4412 }
4413
4414 if ((brcms_c_stf_attach(wlc) != 0)) {
4415 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4416 "failed\n", unit);
4417 err = 68;
4418 goto fail;
4419 }
4420 fail:
4421 return err;
4422}
4423
4424struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4425{
4426 return wlc->pub;
4427}
4428
4429
4430
4431
4432
4433
4434
4435static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
4436 uint unit, bool piomode)
4437{
4438 struct brcms_hardware *wlc_hw;
4439 char *macaddr = NULL;
4440 uint err = 0;
4441 uint j;
4442 bool wme = false;
4443 struct shared_phy_params sha_params;
4444 struct wiphy *wiphy = wlc->wiphy;
4445 struct pci_dev *pcidev = core->bus->host_pci;
4446
4447 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4448 pcidev->vendor,
4449 pcidev->device);
4450
4451 wme = true;
4452
4453 wlc_hw = wlc->hw;
4454 wlc_hw->wlc = wlc;
4455 wlc_hw->unit = unit;
4456 wlc_hw->band = wlc_hw->bandstate[0];
4457 wlc_hw->_piomode = piomode;
4458
4459
4460 brcms_b_info_init(wlc_hw);
4461
4462
4463
4464
4465
4466 wlc_hw->sih = ai_attach(core->bus);
4467 if (wlc_hw->sih == NULL) {
4468 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4469 unit);
4470 err = 11;
4471 goto fail;
4472 }
4473
4474
4475 if (!brcms_c_chipmatch(pcidev->vendor, pcidev->device)) {
4476 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4477 "vendor/device (0x%x/0x%x)\n",
4478 unit, pcidev->vendor, pcidev->device);
4479 err = 12;
4480 goto fail;
4481 }
4482
4483 wlc_hw->vendorid = pcidev->vendor;
4484 wlc_hw->deviceid = pcidev->device;
4485
4486 wlc_hw->d11core = core;
4487 wlc_hw->corerev = core->id.rev;
4488
4489
4490 if (!brcms_c_isgoodchip(wlc_hw)) {
4491 err = 13;
4492 goto fail;
4493 }
4494
4495
4496 ai_clkctl_init(wlc_hw->sih);
4497
4498
4499
4500
4501
4502
4503
4504 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4505 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4506
4507 if (!brcms_b_validate_chip_access(wlc_hw)) {
4508 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4509 "failed\n", unit);
4510 err = 14;
4511 goto fail;
4512 }
4513
4514
4515 j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4516
4517 if (j == BOARDREV_PROMOTABLE)
4518 j = BOARDREV_PROMOTED;
4519 wlc_hw->boardrev = (u16) j;
4520 if (!brcms_c_validboardtype(wlc_hw)) {
4521 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4522 "board type (0x%x)" " or revision level (0x%x)\n",
4523 unit, ai_get_boardtype(wlc_hw->sih),
4524 wlc_hw->boardrev);
4525 err = 15;
4526 goto fail;
4527 }
4528 wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4529 wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4530 BRCMS_SROM_BOARDFLAGS);
4531 wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4532 BRCMS_SROM_BOARDFLAGS2);
4533
4534 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4535 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4536
4537
4538 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4539 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4540
4541 wlc_hw->_nbands = 2;
4542 else
4543 wlc_hw->_nbands = 1;
4544
4545 if ((ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
4546 wlc_hw->_nbands = 1;
4547
4548
4549
4550
4551 wlc->vendorid = wlc_hw->vendorid;
4552 wlc->deviceid = wlc_hw->deviceid;
4553 wlc->pub->sih = wlc_hw->sih;
4554 wlc->pub->corerev = wlc_hw->corerev;
4555 wlc->pub->sromrev = wlc_hw->sromrev;
4556 wlc->pub->boardrev = wlc_hw->boardrev;
4557 wlc->pub->boardflags = wlc_hw->boardflags;
4558 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4559 wlc->pub->_nbands = wlc_hw->_nbands;
4560
4561 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4562
4563 if (wlc_hw->physhim == NULL) {
4564 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4565 "failed\n", unit);
4566 err = 25;
4567 goto fail;
4568 }
4569
4570
4571 sha_params.sih = wlc_hw->sih;
4572 sha_params.physhim = wlc_hw->physhim;
4573 sha_params.unit = unit;
4574 sha_params.corerev = wlc_hw->corerev;
4575 sha_params.vid = wlc_hw->vendorid;
4576 sha_params.did = wlc_hw->deviceid;
4577 sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4578 sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4579 sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4580 sha_params.sromrev = wlc_hw->sromrev;
4581 sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4582 sha_params.boardrev = wlc_hw->boardrev;
4583 sha_params.boardflags = wlc_hw->boardflags;
4584 sha_params.boardflags2 = wlc_hw->boardflags2;
4585
4586
4587 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4588 if (!wlc_hw->phy_sh) {
4589 err = 16;
4590 goto fail;
4591 }
4592
4593
4594 for (j = 0; j < wlc_hw->_nbands; j++) {
4595
4596
4597
4598
4599
4600 brcms_c_setxband(wlc_hw, j);
4601
4602 wlc_hw->band->bandunit = j;
4603 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4604 wlc->band->bandunit = j;
4605 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4606 wlc->core->coreidx = core->core_index;
4607
4608 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4609 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4610
4611
4612 wlc_hw->xmtfifo_sz =
4613 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4614
4615
4616 wlc_hw->band->pi =
4617 wlc_phy_attach(wlc_hw->phy_sh, core,
4618 wlc_hw->band->bandtype,
4619 wlc->wiphy);
4620 if (wlc_hw->band->pi == NULL) {
4621 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4622 "attach failed\n", unit);
4623 err = 17;
4624 goto fail;
4625 }
4626
4627 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4628
4629 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4630 &wlc_hw->band->phyrev,
4631 &wlc_hw->band->radioid,
4632 &wlc_hw->band->radiorev);
4633 wlc_hw->band->abgphy_encore =
4634 wlc_phy_get_encore(wlc_hw->band->pi);
4635 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4636 wlc_hw->band->core_flags =
4637 wlc_phy_get_coreflags(wlc_hw->band->pi);
4638
4639
4640 if (BRCMS_ISNPHY(wlc_hw->band)) {
4641 if (NCONF_HAS(wlc_hw->band->phyrev))
4642 goto good_phy;
4643 else
4644 goto bad_phy;
4645 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4646 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4647 goto good_phy;
4648 else
4649 goto bad_phy;
4650 } else {
4651 bad_phy:
4652 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4653 "phy type/rev (%d/%d)\n", unit,
4654 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4655 err = 18;
4656 goto fail;
4657 }
4658
4659 good_phy:
4660
4661
4662
4663
4664
4665
4666
4667
4668
4669 wlc->band->pi = wlc_hw->band->pi;
4670 wlc->band->phytype = wlc_hw->band->phytype;
4671 wlc->band->phyrev = wlc_hw->band->phyrev;
4672 wlc->band->radioid = wlc_hw->band->radioid;
4673 wlc->band->radiorev = wlc_hw->band->radiorev;
4674
4675
4676 wlc_hw->band->CWmin = APHY_CWMIN;
4677 wlc_hw->band->CWmax = PHY_CWMAX;
4678
4679 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4680 err = 19;
4681 goto fail;
4682 }
4683 }
4684
4685
4686 brcms_c_coredisable(wlc_hw);
4687
4688
4689 ai_pci_down(wlc_hw->sih);
4690
4691
4692 brcms_b_xtal(wlc_hw, OFF);
4693
4694
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705 macaddr = brcms_c_get_macaddr(wlc_hw);
4706 if (macaddr == NULL) {
4707 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4708 unit);
4709 err = 21;
4710 goto fail;
4711 }
4712 if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4713 is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4714 is_zero_ether_addr(wlc_hw->etheraddr)) {
4715 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4716 unit, macaddr);
4717 err = 22;
4718 goto fail;
4719 }
4720
4721 BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4722 wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih),
4723 macaddr);
4724
4725 return err;
4726
4727 fail:
4728 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4729 err);
4730 return err;
4731}
4732
4733static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4734{
4735 uint unit;
4736 unit = wlc->pub->unit;
4737
4738 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4739
4740 wlc->band->antgain = 8;
4741 } else if (wlc->band->antgain == -1) {
4742 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4743 " srom, using 2dB\n", unit, __func__);
4744 wlc->band->antgain = 8;
4745 } else {
4746 s8 gain, fract;
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760 gain = wlc->band->antgain & 0x3f;
4761 gain <<= 2;
4762 gain >>= 2;
4763 fract = (wlc->band->antgain & 0xc0) >> 6;
4764 wlc->band->antgain = 4 * gain + fract;
4765 }
4766}
4767
4768static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4769{
4770 int aa;
4771 uint unit;
4772 int bandtype;
4773 struct si_pub *sih = wlc->hw->sih;
4774
4775 unit = wlc->pub->unit;
4776 bandtype = wlc->band->bandtype;
4777
4778
4779 if (bandtype == BRCM_BAND_5G)
4780 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4781 else
4782 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4783
4784 if ((aa < 1) || (aa > 15)) {
4785 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4786 " srom (0x%x), using 3\n", unit, __func__, aa);
4787 aa = 3;
4788 }
4789
4790
4791 if (aa == 1) {
4792 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4793 wlc->stf->txant = ANT_TX_FORCE_0;
4794 } else if (aa == 2) {
4795 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4796 wlc->stf->txant = ANT_TX_FORCE_1;
4797 } else {
4798 }
4799
4800
4801 if (bandtype == BRCM_BAND_5G)
4802 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4803 else
4804 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4805
4806 brcms_c_attach_antgain_init(wlc);
4807
4808 return true;
4809}
4810
4811static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4812{
4813 u16 chanspec;
4814 struct brcms_band *band;
4815 struct brcms_bss_info *bi = wlc->default_bss;
4816
4817
4818 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4819 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4820
4821
4822
4823
4824 chanspec = ch20mhz_chspec(1);
4825 wlc->home_chanspec = bi->chanspec = chanspec;
4826
4827
4828 band = wlc->band;
4829 if (wlc->pub->_nbands > 1 &&
4830 band->bandunit != chspec_bandunit(chanspec))
4831 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4832
4833
4834 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4835 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4836 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4837 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4838
4839 if (wlc->pub->_n_enab & SUPPORT_11N)
4840 bi->flags |= BRCMS_BSS_HT;
4841}
4842
4843static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4844{
4845 struct brcms_txq_info *qi, *p;
4846
4847 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4848 if (qi != NULL) {
4849
4850
4851
4852
4853
4854
4855 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4856 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4857
4858
4859 p = wlc->tx_queues;
4860 if (p == NULL) {
4861 wlc->tx_queues = qi;
4862 } else {
4863 while (p->next != NULL)
4864 p = p->next;
4865 p->next = qi;
4866 }
4867 }
4868 return qi;
4869}
4870
4871static void brcms_c_txq_free(struct brcms_c_info *wlc,
4872 struct brcms_txq_info *qi)
4873{
4874 struct brcms_txq_info *p;
4875
4876 if (qi == NULL)
4877 return;
4878
4879
4880 p = wlc->tx_queues;
4881 if (p == qi)
4882 wlc->tx_queues = p->next;
4883 else {
4884 while (p != NULL && p->next != qi)
4885 p = p->next;
4886 if (p != NULL)
4887 p->next = p->next->next;
4888 }
4889
4890 kfree(qi);
4891}
4892
4893static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4894{
4895 uint i;
4896 struct brcms_band *band;
4897
4898 for (i = 0; i < wlc->pub->_nbands; i++) {
4899 band = wlc->bandstate[i];
4900 if (band->bandtype == BRCM_BAND_5G) {
4901 if ((bwcap == BRCMS_N_BW_40ALL)
4902 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4903 band->mimo_cap_40 = true;
4904 else
4905 band->mimo_cap_40 = false;
4906 } else {
4907 if (bwcap == BRCMS_N_BW_40ALL)
4908 band->mimo_cap_40 = true;
4909 else
4910 band->mimo_cap_40 = false;
4911 }
4912 }
4913}
4914
4915static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4916{
4917
4918 if (wlc->wdtimer) {
4919 brcms_free_timer(wlc->wdtimer);
4920 wlc->wdtimer = NULL;
4921 }
4922 if (wlc->radio_timer) {
4923 brcms_free_timer(wlc->radio_timer);
4924 wlc->radio_timer = NULL;
4925 }
4926}
4927
4928static void brcms_c_detach_module(struct brcms_c_info *wlc)
4929{
4930 if (wlc->asi) {
4931 brcms_c_antsel_detach(wlc->asi);
4932 wlc->asi = NULL;
4933 }
4934
4935 if (wlc->ampdu) {
4936 brcms_c_ampdu_detach(wlc->ampdu);
4937 wlc->ampdu = NULL;
4938 }
4939
4940 brcms_c_stf_detach(wlc);
4941}
4942
4943
4944
4945
4946static int brcms_b_detach(struct brcms_c_info *wlc)
4947{
4948 uint i;
4949 struct brcms_hw_band *band;
4950 struct brcms_hardware *wlc_hw = wlc->hw;
4951 int callbacks;
4952
4953 callbacks = 0;
4954
4955 if (wlc_hw->sih) {
4956
4957
4958
4959
4960
4961 ai_pci_sleep(wlc_hw->sih);
4962 }
4963
4964 brcms_b_detach_dmapio(wlc_hw);
4965
4966 band = wlc_hw->band;
4967 for (i = 0; i < wlc_hw->_nbands; i++) {
4968 if (band->pi) {
4969
4970 wlc_phy_detach(band->pi);
4971 band->pi = NULL;
4972 }
4973 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4974 }
4975
4976
4977 kfree(wlc_hw->phy_sh);
4978
4979 wlc_phy_shim_detach(wlc_hw->physhim);
4980
4981 if (wlc_hw->sih) {
4982 ai_detach(wlc_hw->sih);
4983 wlc_hw->sih = NULL;
4984 }
4985
4986 return callbacks;
4987
4988}
4989
4990
4991
4992
4993
4994
4995
4996
4997
4998
4999
5000uint brcms_c_detach(struct brcms_c_info *wlc)
5001{
5002 uint callbacks = 0;
5003
5004 if (wlc == NULL)
5005 return 0;
5006
5007 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5008
5009 callbacks += brcms_b_detach(wlc);
5010
5011
5012 if (!brcms_c_radio_monitor_stop(wlc))
5013 callbacks++;
5014
5015 brcms_c_channel_mgr_detach(wlc->cmi);
5016
5017 brcms_c_timers_deinit(wlc);
5018
5019 brcms_c_detach_module(wlc);
5020
5021
5022 while (wlc->tx_queues != NULL)
5023 brcms_c_txq_free(wlc, wlc->tx_queues);
5024
5025 brcms_c_detach_mfree(wlc);
5026 return callbacks;
5027}
5028
5029
5030static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5031{
5032
5033 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5034}
5035
5036
5037static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5038{
5039 if (wlc_hw->wlc->pub->hw_up)
5040 return;
5041
5042 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5043
5044
5045
5046
5047
5048 brcms_b_xtal(wlc_hw, ON);
5049 ai_clkctl_init(wlc_hw->sih);
5050 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5051
5052 ai_pci_fixcfg(wlc_hw->sih);
5053
5054
5055
5056
5057
5058
5059
5060
5061
5062
5063
5064
5065 wlc_phy_por_inform(wlc_hw->band->pi);
5066
5067 wlc_hw->ucode_loaded = false;
5068 wlc_hw->wlc->pub->hw_up = true;
5069
5070 if ((wlc_hw->boardflags & BFL_FEM)
5071 && (ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
5072 if (!
5073 (wlc_hw->boardrev >= 0x1250
5074 && (wlc_hw->boardflags & BFL_FEM_BT)))
5075 ai_epa_4313war(wlc_hw->sih);
5076 }
5077}
5078
5079static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5080{
5081 uint coremask;
5082
5083 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5084
5085
5086
5087
5088
5089 brcms_b_xtal(wlc_hw, ON);
5090 ai_clkctl_init(wlc_hw->sih);
5091 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5092
5093
5094
5095
5096
5097 coremask = (1 << wlc_hw->wlc->core->coreidx);
5098
5099 ai_pci_setup(wlc_hw->sih, coremask);
5100
5101
5102
5103
5104
5105
5106 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5107
5108 ai_pci_down(wlc_hw->sih);
5109 brcms_b_xtal(wlc_hw, OFF);
5110 return -ENOMEDIUM;
5111 }
5112
5113 ai_pci_up(wlc_hw->sih);
5114
5115
5116 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5117
5118 return 0;
5119}
5120
5121static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5122{
5123 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5124
5125 wlc_hw->up = true;
5126 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5127
5128
5129 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5130 brcms_intrson(wlc_hw->wlc->wl);
5131 return 0;
5132}
5133
5134
5135
5136
5137
5138static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5139{
5140 int ac;
5141
5142
5143 if (!wlc->clk)
5144 return;
5145
5146 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
5147 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5148 wlc->wme_retries[ac]);
5149}
5150
5151
5152int brcms_c_up(struct brcms_c_info *wlc)
5153{
5154 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5155
5156
5157 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5158 return -ENOMEDIUM;
5159
5160 if (!wlc->pub->hw_up) {
5161 brcms_b_hw_up(wlc->hw);
5162 wlc->pub->hw_up = true;
5163 }
5164
5165 if ((wlc->pub->boardflags & BFL_FEM)
5166 && (ai_get_chip_id(wlc->hw->sih) == BCM4313_CHIP_ID)) {
5167 if (wlc->pub->boardrev >= 0x1250
5168 && (wlc->pub->boardflags & BFL_FEM_BT))
5169 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5170 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5171 else
5172 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5173 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5174 }
5175
5176
5177
5178
5179
5180
5181
5182
5183
5184
5185 if (!wlc->pub->radio_disabled) {
5186 int status = brcms_b_up_prep(wlc->hw);
5187 if (status == -ENOMEDIUM) {
5188 if (!mboolisset
5189 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5190 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5191 mboolset(wlc->pub->radio_disabled,
5192 WL_RADIO_HW_DISABLE);
5193
5194 if (bsscfg->enable && bsscfg->BSS)
5195 wiphy_err(wlc->wiphy, "wl%d: up"
5196 ": rfdisable -> "
5197 "bsscfg_disable()\n",
5198 wlc->pub->unit);
5199 }
5200 }
5201 }
5202
5203 if (wlc->pub->radio_disabled) {
5204 brcms_c_radio_monitor_start(wlc);
5205 return 0;
5206 }
5207
5208
5209 wlc->clk = true;
5210
5211 brcms_c_radio_monitor_stop(wlc);
5212
5213
5214 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5215
5216 brcms_init(wlc->wl);
5217 wlc->pub->up = true;
5218
5219 if (wlc->bandinit_pending) {
5220 brcms_c_suspend_mac_and_wait(wlc);
5221 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5222 wlc->bandinit_pending = false;
5223 brcms_c_enable_mac(wlc);
5224 }
5225
5226 brcms_b_up_finish(wlc->hw);
5227
5228
5229 brcms_c_wme_retries_write(wlc);
5230
5231
5232 brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5233 wlc->WDarmed = true;
5234
5235
5236 brcms_c_stf_phy_txant_upd(wlc);
5237
5238 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5239
5240 return 0;
5241}
5242
5243static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5244{
5245 uint callbacks = 0;
5246
5247 return callbacks;
5248}
5249
5250static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5251{
5252 bool dev_gone;
5253 uint callbacks = 0;
5254
5255 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5256
5257 if (!wlc_hw->up)
5258 return callbacks;
5259
5260 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5261
5262
5263 if (dev_gone)
5264 wlc_hw->wlc->macintmask = 0;
5265 else {
5266
5267 brcms_intrsoff(wlc_hw->wlc->wl);
5268
5269
5270 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5271 }
5272
5273 callbacks += wlc_phy_down(wlc_hw->band->pi);
5274
5275 return callbacks;
5276}
5277
5278static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5279{
5280 uint callbacks = 0;
5281 bool dev_gone;
5282
5283 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5284
5285 if (!wlc_hw->up)
5286 return callbacks;
5287
5288 wlc_hw->up = false;
5289 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5290
5291 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5292
5293 if (dev_gone) {
5294 wlc_hw->sbclk = false;
5295 wlc_hw->clk = false;
5296 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5297
5298
5299 brcms_c_flushqueues(wlc_hw->wlc);
5300 } else {
5301
5302
5303 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5304 if (bcma_read32(wlc_hw->d11core,
5305 D11REGOFFS(maccontrol)) & MCTL_EN_MAC)
5306 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5307 callbacks += brcms_reset(wlc_hw->wlc->wl);
5308 brcms_c_coredisable(wlc_hw);
5309 }
5310
5311
5312 if (!wlc_hw->noreset) {
5313 ai_pci_down(wlc_hw->sih);
5314 brcms_b_xtal(wlc_hw, OFF);
5315 }
5316 }
5317
5318 return callbacks;
5319}
5320
5321
5322
5323
5324
5325
5326uint brcms_c_down(struct brcms_c_info *wlc)
5327{
5328
5329 uint callbacks = 0;
5330 int i;
5331 bool dev_gone = false;
5332 struct brcms_txq_info *qi;
5333
5334 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5335
5336
5337 if (wlc->going_down) {
5338 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5339 "\n", wlc->pub->unit, __func__);
5340 return 0;
5341 }
5342 if (!wlc->pub->up)
5343 return callbacks;
5344
5345 wlc->going_down = true;
5346
5347 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5348
5349 dev_gone = brcms_deviceremoved(wlc);
5350
5351
5352 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5353 if (wlc->modulecb[i].down_fn)
5354 callbacks +=
5355 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5356 }
5357
5358
5359 if (wlc->WDarmed) {
5360 if (!brcms_del_timer(wlc->wdtimer))
5361 callbacks++;
5362 wlc->WDarmed = false;
5363 }
5364
5365 callbacks += brcms_c_down_del_timer(wlc);
5366
5367 wlc->pub->up = false;
5368
5369 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5370
5371
5372 brcms_c_txflowcontrol_reset(wlc);
5373
5374
5375 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5376 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5377
5378 callbacks += brcms_b_down_finish(wlc->hw);
5379
5380
5381 wlc->clk = false;
5382
5383 wlc->going_down = false;
5384 return callbacks;
5385}
5386
5387
5388int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5389{
5390 int ret = 0;
5391 uint i;
5392 struct brcms_c_rateset rs;
5393
5394
5395 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5396 bool shortslot_restrict = false;
5397
5398
5399 bool ofdm_basic = false;
5400
5401 int preamble = BRCMS_PLCP_LONG;
5402 bool preamble_restrict = false;
5403
5404
5405 struct brcms_band *band;
5406
5407
5408
5409
5410 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5411 return -ENOTSUPP;
5412
5413
5414 if (wlc->band->bandtype == BRCM_BAND_2G)
5415 band = wlc->band;
5416 else if ((wlc->pub->_nbands > 1) &&
5417 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5418 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5419 else
5420 return -EINVAL;
5421
5422
5423 if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5424 BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5425 return -EINVAL;
5426
5427
5428 if (config == true)
5429 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5430
5431
5432 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5433
5434 switch (gmode) {
5435 case GMODE_LEGACY_B:
5436 shortslot = BRCMS_SHORTSLOT_OFF;
5437 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5438
5439 break;
5440
5441 case GMODE_LRS:
5442 break;
5443
5444 case GMODE_AUTO:
5445
5446 break;
5447
5448 case GMODE_ONLY:
5449 ofdm_basic = true;
5450 preamble = BRCMS_PLCP_SHORT;
5451 preamble_restrict = true;
5452 break;
5453
5454 case GMODE_PERFORMANCE:
5455 shortslot = BRCMS_SHORTSLOT_ON;
5456 shortslot_restrict = true;
5457 ofdm_basic = true;
5458 preamble = BRCMS_PLCP_SHORT;
5459 preamble_restrict = true;
5460 break;
5461
5462 default:
5463
5464 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5465 wlc->pub->unit, __func__, gmode);
5466 return -ENOTSUPP;
5467 }
5468
5469 band->gmode = gmode;
5470
5471 wlc->shortslot_override = shortslot;
5472
5473
5474 if (!rs.count)
5475 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5476
5477 if (ofdm_basic) {
5478 for (i = 0; i < rs.count; i++) {
5479 if (rs.rates[i] == BRCM_RATE_6M
5480 || rs.rates[i] == BRCM_RATE_12M
5481 || rs.rates[i] == BRCM_RATE_24M)
5482 rs.rates[i] |= BRCMS_RATE_FLAG;
5483 }
5484 }
5485
5486
5487 wlc->default_bss->rateset.count = rs.count;
5488 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5489 sizeof(wlc->default_bss->rateset.rates));
5490
5491 return ret;
5492}
5493
5494int brcms_c_set_nmode(struct brcms_c_info *wlc)
5495{
5496 uint i;
5497 s32 nmode = AUTO;
5498
5499 if (wlc->stf->txstreams == WL_11N_3x3)
5500 nmode = WL_11N_3x3;
5501 else
5502 nmode = WL_11N_2x2;
5503
5504
5505 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5506 if (nmode == WL_11N_3x3)
5507 wlc->pub->_n_enab = SUPPORT_HT;
5508 else
5509 wlc->pub->_n_enab = SUPPORT_11N;
5510 wlc->default_bss->flags |= BRCMS_BSS_HT;
5511
5512 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5513 wlc->stf->txstreams);
5514 for (i = 0; i < wlc->pub->_nbands; i++)
5515 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5516 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5517
5518 return 0;
5519}
5520
5521static int
5522brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5523 struct brcms_c_rateset *rs_arg)
5524{
5525 struct brcms_c_rateset rs, new;
5526 uint bandunit;
5527
5528 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5529
5530
5531 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5532 return -EINVAL;
5533
5534
5535 bandunit = wlc->band->bandunit;
5536 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5537 if (brcms_c_rate_hwrs_filter_sort_validate
5538 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5539 wlc->stf->txstreams))
5540 goto good;
5541
5542
5543 if (brcms_is_mband_unlocked(wlc)) {
5544 bandunit = OTHERBANDUNIT(wlc);
5545 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5546 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5547 &wlc->
5548 bandstate[bandunit]->
5549 hw_rateset, true,
5550 wlc->stf->txstreams))
5551 goto good;
5552 }
5553
5554 return -EBADE;
5555
5556 good:
5557
5558 memcpy(&wlc->default_bss->rateset, &new,
5559 sizeof(struct brcms_c_rateset));
5560 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5561 sizeof(struct brcms_c_rateset));
5562 return 0;
5563}
5564
5565static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5566{
5567 u8 r;
5568 bool war = false;
5569
5570 if (wlc->bsscfg->associated)
5571 r = wlc->bsscfg->current_bss->rateset.rates[0];
5572 else
5573 r = wlc->default_bss->rateset.rates[0];
5574
5575 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5576}
5577
5578int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5579{
5580 u16 chspec = ch20mhz_chspec(channel);
5581
5582 if (channel < 0 || channel > MAXCHANNEL)
5583 return -EINVAL;
5584
5585 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5586 return -EINVAL;
5587
5588
5589 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5590 if (wlc->band->bandunit != chspec_bandunit(chspec))
5591 wlc->bandinit_pending = true;
5592 else
5593 wlc->bandinit_pending = false;
5594 }
5595
5596 wlc->default_bss->chanspec = chspec;
5597
5598
5599 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5600 brcms_c_set_home_chanspec(wlc, chspec);
5601 brcms_c_suspend_mac_and_wait(wlc);
5602 brcms_c_set_chanspec(wlc, chspec);
5603 brcms_c_enable_mac(wlc);
5604 }
5605 return 0;
5606}
5607
5608int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5609{
5610 int ac;
5611
5612 if (srl < 1 || srl > RETRY_SHORT_MAX ||
5613 lrl < 1 || lrl > RETRY_SHORT_MAX)
5614 return -EINVAL;
5615
5616 wlc->SRL = srl;
5617 wlc->LRL = lrl;
5618
5619 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5620
5621 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
5622 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5623 EDCF_SHORT, wlc->SRL);
5624 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5625 EDCF_LONG, wlc->LRL);
5626 }
5627 brcms_c_wme_retries_write(wlc);
5628
5629 return 0;
5630}
5631
5632void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5633 struct brcm_rateset *currs)
5634{
5635 struct brcms_c_rateset *rs;
5636
5637 if (wlc->pub->associated)
5638 rs = &wlc->bsscfg->current_bss->rateset;
5639 else
5640 rs = &wlc->default_bss->rateset;
5641
5642
5643 currs->count = rs->count;
5644 memcpy(&currs->rates, &rs->rates, rs->count);
5645}
5646
5647int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5648{
5649 struct brcms_c_rateset internal_rs;
5650 int bcmerror;
5651
5652 if (rs->count > BRCMS_NUMRATES)
5653 return -ENOBUFS;
5654
5655 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5656
5657
5658 internal_rs.count = rs->count;
5659 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5660
5661
5662 if (wlc->pub->_n_enab & SUPPORT_11N) {
5663 struct brcms_bss_info *mcsset_bss;
5664 if (wlc->bsscfg->associated)
5665 mcsset_bss = wlc->bsscfg->current_bss;
5666 else
5667 mcsset_bss = wlc->default_bss;
5668 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5669 MCSSET_LEN);
5670 }
5671
5672 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5673 if (!bcmerror)
5674 brcms_c_ofdm_rateset_war(wlc);
5675
5676 return bcmerror;
5677}
5678
5679int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5680{
5681 if (period < DOT11_MIN_BEACON_PERIOD ||
5682 period > DOT11_MAX_BEACON_PERIOD)
5683 return -EINVAL;
5684
5685 wlc->default_bss->beacon_period = period;
5686 return 0;
5687}
5688
5689u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5690{
5691 return wlc->band->phytype;
5692}
5693
5694void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5695{
5696 wlc->shortslot_override = sslot_override;
5697
5698
5699
5700
5701
5702 if (wlc->band->bandtype == BRCM_BAND_5G)
5703 return;
5704
5705 if (wlc->pub->up && wlc->pub->associated) {
5706
5707 } else if (wlc->pub->up) {
5708
5709 brcms_c_switch_shortslot(wlc, false);
5710 } else {
5711
5712
5713 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5714 wlc->shortslot = false;
5715 else
5716 wlc->shortslot =
5717 (wlc->shortslot_override ==
5718 BRCMS_SHORTSLOT_ON);
5719 }
5720}
5721
5722
5723
5724
5725int brcms_c_module_register(struct brcms_pub *pub,
5726 const char *name, struct brcms_info *hdl,
5727 int (*d_fn)(void *handle))
5728{
5729 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5730 int i;
5731
5732
5733 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5734 if (wlc->modulecb[i].name[0] == '\0') {
5735 strncpy(wlc->modulecb[i].name, name,
5736 sizeof(wlc->modulecb[i].name) - 1);
5737 wlc->modulecb[i].hdl = hdl;
5738 wlc->modulecb[i].down_fn = d_fn;
5739 return 0;
5740 }
5741 }
5742
5743 return -ENOSR;
5744}
5745
5746
5747int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5748 struct brcms_info *hdl)
5749{
5750 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5751 int i;
5752
5753 if (wlc == NULL)
5754 return -ENODATA;
5755
5756 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5757 if (!strcmp(wlc->modulecb[i].name, name) &&
5758 (wlc->modulecb[i].hdl == hdl)) {
5759 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5760 return 0;
5761 }
5762 }
5763
5764
5765 return -ENODATA;
5766}
5767
5768#ifdef BCMDBG
5769static const char * const supr_reason[] = {
5770 "None", "PMQ Entry", "Flush request",
5771 "Previous frag failure", "Channel mismatch",
5772 "Lifetime Expiry", "Underflow"
5773};
5774
5775static void brcms_c_print_txs_status(u16 s)
5776{
5777 printk(KERN_DEBUG "[15:12] %d frame attempts\n",
5778 (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
5779 printk(KERN_DEBUG " [11:8] %d rts attempts\n",
5780 (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
5781 printk(KERN_DEBUG " [7] %d PM mode indicated\n",
5782 ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
5783 printk(KERN_DEBUG " [6] %d intermediate status\n",
5784 ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
5785 printk(KERN_DEBUG " [5] %d AMPDU\n",
5786 (s & TX_STATUS_AMPDU) ? 1 : 0);
5787 printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n",
5788 ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
5789 supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
5790 printk(KERN_DEBUG " [1] %d acked\n",
5791 ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
5792}
5793#endif
5794
5795void brcms_c_print_txstatus(struct tx_status *txs)
5796{
5797#if defined(BCMDBG)
5798 u16 s = txs->status;
5799 u16 ackphyrxsh = txs->ackphyrxsh;
5800
5801 printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
5802
5803 printk(KERN_DEBUG "FrameID: %04x ", txs->frameid);
5804 printk(KERN_DEBUG "TxStatus: %04x", s);
5805 printk(KERN_DEBUG "\n");
5806
5807 brcms_c_print_txs_status(s);
5808
5809 printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
5810 printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
5811 printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
5812 printk(KERN_DEBUG "RxAckRSSI: %04x ",
5813 (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
5814 printk(KERN_DEBUG "RxAckSQ: %04x",
5815 (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5816 printk(KERN_DEBUG "\n");
5817#endif
5818}
5819
5820bool brcms_c_chipmatch(u16 vendor, u16 device)
5821{
5822 if (vendor != PCI_VENDOR_ID_BROADCOM) {
5823 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
5824 return false;
5825 }
5826
5827 if (device == BCM43224_D11N_ID_VEN1)
5828 return true;
5829 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5830 return true;
5831 if (device == BCM4313_D11N2G_ID)
5832 return true;
5833 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5834 return true;
5835
5836 pr_err("chipmatch: unknown device id %04x\n", device);
5837 return false;
5838}
5839
5840#if defined(BCMDBG)
5841void brcms_c_print_txdesc(struct d11txh *txh)
5842{
5843 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5844 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5845 u16 mfc = le16_to_cpu(txh->MacFrameControl);
5846 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5847 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5848 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5849 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5850 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5851 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5852 u16 mainrates = le16_to_cpu(txh->MainRates);
5853 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5854 u8 *iv = txh->IV;
5855 u8 *ra = txh->TxFrameRA;
5856 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5857 u8 *rtspfb = txh->RTSPLCPFallback;
5858 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5859 u8 *fragpfb = txh->FragPLCPFallback;
5860 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5861 u16 mmodelen = le16_to_cpu(txh->MModeLen);
5862 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5863 u16 tfid = le16_to_cpu(txh->TxFrameID);
5864 u16 txs = le16_to_cpu(txh->TxStatus);
5865 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5866 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5867 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5868 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5869
5870 u8 *rtsph = txh->RTSPhyHeader;
5871 struct ieee80211_rts rts = txh->rts_frame;
5872
5873
5874 printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
5875 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
5876 txh, sizeof(struct d11txh) + 48);
5877
5878 printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
5879 printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
5880 printk(KERN_DEBUG "FC: %04x ", mfc);
5881 printk(KERN_DEBUG "FES Time: %04x\n", tfest);
5882 printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
5883 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5884 printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
5885 printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5886 printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5887 printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5888 printk(KERN_DEBUG "MainRates: %04x ", mainrates);
5889 printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
5890 printk(KERN_DEBUG "\n");
5891
5892 print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5893 print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5894 ra, sizeof(txh->TxFrameRA));
5895
5896 printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
5897 print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5898 rtspfb, sizeof(txh->RTSPLCPFallback));
5899 printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
5900 print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5901 fragpfb, sizeof(txh->FragPLCPFallback));
5902 printk(KERN_DEBUG "DUR: %04x", fragdfb);
5903 printk(KERN_DEBUG "\n");
5904
5905 printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
5906 printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
5907
5908 printk(KERN_DEBUG "FrameID: %04x\n", tfid);
5909 printk(KERN_DEBUG "TxStatus: %04x\n", txs);
5910
5911 printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu);
5912 printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte);
5913 printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
5914 printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
5915
5916 print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5917 rtsph, sizeof(txh->RTSPhyHeader));
5918 print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5919 (u8 *)&rts, sizeof(txh->rts_frame));
5920 printk(KERN_DEBUG "\n");
5921}
5922#endif
5923
5924#if defined(BCMDBG)
5925static int
5926brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5927 int len)
5928{
5929 int i;
5930 char *p = buf;
5931 char hexstr[16];
5932 int slen = 0, nlen = 0;
5933 u32 bit;
5934 const char *name;
5935
5936 if (len < 2 || !buf)
5937 return 0;
5938
5939 buf[0] = '\0';
5940
5941 for (i = 0; flags != 0; i++) {
5942 bit = bd[i].bit;
5943 name = bd[i].name;
5944 if (bit == 0 && flags != 0) {
5945
5946 snprintf(hexstr, 16, "0x%X", flags);
5947 name = hexstr;
5948 flags = 0;
5949 } else if ((flags & bit) == 0)
5950 continue;
5951 flags &= ~bit;
5952 nlen = strlen(name);
5953 slen += nlen;
5954
5955 if (flags != 0)
5956 slen += 1;
5957
5958 if (len <= slen)
5959 break;
5960
5961 strncpy(p, name, nlen + 1);
5962 p += nlen;
5963
5964 if (flags != 0)
5965 p += snprintf(p, 2, " ");
5966 len -= slen;
5967 }
5968
5969
5970 if (flags != 0) {
5971 if (len < 2)
5972 p -= 2 - len;
5973 p += snprintf(p, 2, ">");
5974 }
5975
5976 return (int)(p - buf);
5977}
5978#endif
5979
5980#if defined(BCMDBG)
5981void brcms_c_print_rxh(struct d11rxhdr *rxh)
5982{
5983 u16 len = rxh->RxFrameSize;
5984 u16 phystatus_0 = rxh->PhyRxStatus_0;
5985 u16 phystatus_1 = rxh->PhyRxStatus_1;
5986 u16 phystatus_2 = rxh->PhyRxStatus_2;
5987 u16 phystatus_3 = rxh->PhyRxStatus_3;
5988 u16 macstatus1 = rxh->RxStatus1;
5989 u16 macstatus2 = rxh->RxStatus2;
5990 char flagstr[64];
5991 char lenbuf[20];
5992 static const struct brcms_c_bit_desc macstat_flags[] = {
5993 {RXS_FCSERR, "FCSErr"},
5994 {RXS_RESPFRAMETX, "Reply"},
5995 {RXS_PBPRES, "PADDING"},
5996 {RXS_DECATMPT, "DeCr"},
5997 {RXS_DECERR, "DeCrErr"},
5998 {RXS_BCNSENT, "Bcn"},
5999 {0, NULL}
6000 };
6001
6002 printk(KERN_DEBUG "Raw RxDesc:\n");
6003 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6004 sizeof(struct d11rxhdr));
6005
6006 brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
6007
6008 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6009
6010 printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len,
6011 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6012 printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n",
6013 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6014 printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr);
6015 printk(KERN_DEBUG "RXMACaggtype: %x\n",
6016 (macstatus2 & RXS_AGGTYPE_MASK));
6017 printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime);
6018}
6019#endif
6020
6021u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6022{
6023 u16 table_ptr;
6024 u8 phy_rate, index;
6025
6026
6027 if (is_ofdm_rate(rate))
6028 table_ptr = M_RT_DIRMAP_A;
6029 else
6030 table_ptr = M_RT_DIRMAP_B;
6031
6032
6033
6034
6035 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6036 index = phy_rate & 0xf;
6037
6038
6039
6040
6041 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6042}
6043
6044static bool
6045brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6046 struct sk_buff *pkt, int prec, bool head)
6047{
6048 struct sk_buff *p;
6049 int eprec = -1;
6050
6051
6052 if (pktq_pfull(q, prec))
6053 eprec = prec;
6054 else if (pktq_full(q)) {
6055 p = brcmu_pktq_peek_tail(q, &eprec);
6056 if (eprec > prec) {
6057 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6058 "\n", __func__, eprec, prec);
6059 return false;
6060 }
6061 }
6062
6063
6064 if (eprec >= 0) {
6065 bool discard_oldest;
6066
6067 discard_oldest = ac_bitmap_tst(0, eprec);
6068
6069
6070 if (eprec == prec && !discard_oldest) {
6071 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6072 "\n", __func__, prec);
6073 return false;
6074 }
6075
6076
6077 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6078 brcmu_pktq_pdeq_tail(q, eprec);
6079 brcmu_pkt_buf_free_skb(p);
6080 }
6081
6082
6083 if (head)
6084 p = brcmu_pktq_penq_head(q, prec, pkt);
6085 else
6086 p = brcmu_pktq_penq(q, prec, pkt);
6087
6088 return true;
6089}
6090
6091
6092
6093
6094
6095
6096
6097
6098
6099
6100static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6101 struct sk_buff *pkt, int prec)
6102{
6103 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6104}
6105
6106void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6107 struct sk_buff *sdu, uint prec)
6108{
6109 struct brcms_txq_info *qi = wlc->pkt_queue;
6110 struct pktq *q = &qi->q;
6111 int prio;
6112
6113 prio = sdu->priority;
6114
6115 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6116
6117
6118
6119
6120 brcmu_pkt_buf_free_skb(sdu);
6121 }
6122}
6123
6124
6125
6126
6127
6128
6129static inline u16
6130bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6131 struct d11txh *txh)
6132{
6133 u16 frameid;
6134
6135 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6136 TXFID_QUEUE_MASK);
6137 frameid |=
6138 (((wlc->
6139 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6140 TX_BCMC_FIFO;
6141
6142 return frameid;
6143}
6144
6145static uint
6146brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6147 u8 preamble_type)
6148{
6149 uint dur = 0;
6150
6151 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6152 wlc->pub->unit, rspec, preamble_type);
6153
6154
6155
6156
6157
6158 rspec = brcms_basic_rate(wlc, rspec);
6159
6160 dur =
6161 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6162 (DOT11_ACK_LEN + FCS_LEN));
6163 return dur;
6164}
6165
6166static uint
6167brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6168 u8 preamble_type)
6169{
6170 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6171 wlc->pub->unit, rspec, preamble_type);
6172 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6173}
6174
6175static uint
6176brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6177 u8 preamble_type)
6178{
6179 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6180 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6181
6182
6183
6184
6185
6186 rspec = brcms_basic_rate(wlc, rspec);
6187
6188 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6189 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6190 FCS_LEN));
6191}
6192
6193
6194
6195
6196
6197
6198
6199
6200
6201
6202
6203static u16
6204brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6205 u8 preamble_type, uint next_frag_len)
6206{
6207 u16 dur, sifs;
6208
6209 sifs = get_sifs(wlc->band);
6210
6211 dur = sifs;
6212 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6213
6214 if (next_frag_len) {
6215
6216 dur *= 2;
6217
6218 dur += sifs;
6219 dur +=
6220 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6221 next_frag_len);
6222 }
6223 return dur;
6224}
6225
6226
6227static uint
6228brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6229 u8 preamble_type, uint dur)
6230{
6231 uint nsyms, mac_len, Ndps, kNdps;
6232 uint rate = rspec2rate(ratespec);
6233
6234 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6235 wlc->pub->unit, ratespec, preamble_type, dur);
6236
6237 if (is_mcs_rate(ratespec)) {
6238 uint mcs = ratespec & RSPEC_RATE_MASK;
6239 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6240 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6241
6242 if (wlc->band->bandtype == BRCM_BAND_2G)
6243 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6244
6245 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6246 rspec_issgi(ratespec)) * 4;
6247 nsyms = dur / APHY_SYMBOL_TIME;
6248 mac_len =
6249 ((nsyms * kNdps) -
6250 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6251 } else if (is_ofdm_rate(ratespec)) {
6252 dur -= APHY_PREAMBLE_TIME;
6253 dur -= APHY_SIGNAL_TIME;
6254
6255 Ndps = rate * 2;
6256 nsyms = dur / APHY_SYMBOL_TIME;
6257 mac_len =
6258 ((nsyms * Ndps) -
6259 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6260 } else {
6261 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6262 dur -= BPHY_PLCP_SHORT_TIME;
6263 else
6264 dur -= BPHY_PLCP_TIME;
6265 mac_len = dur * rate;
6266
6267 mac_len = mac_len / 8 / 2;
6268 }
6269 return mac_len;
6270}
6271
6272
6273
6274
6275
6276static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6277 bool verbose)
6278{
6279 struct brcms_c_rateset *hw_rateset;
6280 uint i;
6281
6282 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6283 hw_rateset = &wlc->band->hw_rateset;
6284 else if (wlc->pub->_nbands > 1)
6285 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6286 else
6287
6288 return false;
6289
6290
6291 if (is_mcs_rate(rspec)) {
6292 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6293 goto error;
6294
6295 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6296 }
6297
6298 for (i = 0; i < hw_rateset->count; i++)
6299 if (hw_rateset->rates[i] == rspec2rate(rspec))
6300 return true;
6301 error:
6302 if (verbose)
6303 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6304 "not in hw_rateset\n", wlc->pub->unit, rspec);
6305
6306 return false;
6307}
6308
6309static u32
6310mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6311 u32 int_val)
6312{
6313 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6314 u8 rate = int_val & NRATE_RATE_MASK;
6315 u32 rspec;
6316 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6317 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6318 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6319 == NRATE_OVERRIDE_MCS_ONLY);
6320 int bcmerror = 0;
6321
6322 if (!ismcs)
6323 return (u32) rate;
6324
6325
6326 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6327
6328 if (stf > PHY_TXC1_MODE_SDM) {
6329 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6330 wlc->pub->unit, __func__);
6331 bcmerror = -EINVAL;
6332 goto done;
6333 }
6334
6335
6336 if (rate == 32) {
6337 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6338 ((stf != PHY_TXC1_MODE_SISO)
6339 && (stf != PHY_TXC1_MODE_CDD))) {
6340 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6341 "32\n", wlc->pub->unit, __func__);
6342 bcmerror = -EINVAL;
6343 goto done;
6344 }
6345
6346 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6347
6348 if (stf != PHY_TXC1_MODE_SDM) {
6349 BCMMSG(wlc->wiphy, "wl%d: enabling "
6350 "SDM mode for mcs %d\n",
6351 wlc->pub->unit, rate);
6352 stf = PHY_TXC1_MODE_SDM;
6353 }
6354 } else {
6355
6356
6357
6358
6359 if ((stf > PHY_TXC1_MODE_STBC) ||
6360 (!BRCMS_STBC_CAP_PHY(wlc)
6361 && (stf == PHY_TXC1_MODE_STBC))) {
6362 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6363 "\n", wlc->pub->unit, __func__);
6364 bcmerror = -EINVAL;
6365 goto done;
6366 }
6367 }
6368 } else if (is_ofdm_rate(rate)) {
6369 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6370 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6371 wlc->pub->unit, __func__);
6372 bcmerror = -EINVAL;
6373 goto done;
6374 }
6375 } else if (is_cck_rate(rate)) {
6376 if ((cur_band->bandtype != BRCM_BAND_2G)
6377 || (stf != PHY_TXC1_MODE_SISO)) {
6378 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6379 wlc->pub->unit, __func__);
6380 bcmerror = -EINVAL;
6381 goto done;
6382 }
6383 } else {
6384 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6385 wlc->pub->unit, __func__);
6386 bcmerror = -EINVAL;
6387 goto done;
6388 }
6389
6390 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6391 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6392 "request\n", wlc->pub->unit, __func__);
6393 bcmerror = -EINVAL;
6394 goto done;
6395 }
6396
6397 rspec = rate;
6398 if (ismcs) {
6399 rspec |= RSPEC_MIMORATE;
6400
6401 if (stf == PHY_TXC1_MODE_STBC) {
6402 u8 stc;
6403 stc = 1;
6404 rspec |= (stc << RSPEC_STC_SHIFT);
6405 }
6406 }
6407
6408 rspec |= (stf << RSPEC_STF_SHIFT);
6409
6410 if (override_mcs_only)
6411 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6412
6413 if (issgi)
6414 rspec |= RSPEC_SHORT_GI;
6415
6416 if ((rate != 0)
6417 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6418 return rate;
6419
6420 return rspec;
6421done:
6422 return rate;
6423}
6424
6425
6426
6427
6428
6429
6430
6431
6432static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6433 uint length, u8 *plcp)
6434{
6435 u16 usec = 0;
6436 u8 le = 0;
6437
6438 switch (rate_500) {
6439 case BRCM_RATE_1M:
6440 usec = length << 3;
6441 break;
6442 case BRCM_RATE_2M:
6443 usec = length << 2;
6444 break;
6445 case BRCM_RATE_5M5:
6446 usec = (length << 4) / 11;
6447 if ((length << 4) - (usec * 11) > 0)
6448 usec++;
6449 break;
6450 case BRCM_RATE_11M:
6451 usec = (length << 3) / 11;
6452 if ((length << 3) - (usec * 11) > 0) {
6453 usec++;
6454 if ((usec * 11) - (length << 3) >= 8)
6455 le = D11B_PLCP_SIGNAL_LE;
6456 }
6457 break;
6458
6459 default:
6460 wiphy_err(wlc->wiphy,
6461 "brcms_c_cck_plcp_set: unsupported rate %d\n",
6462 rate_500);
6463 rate_500 = BRCM_RATE_1M;
6464 usec = length << 3;
6465 break;
6466 }
6467
6468 plcp[0] = rate_500 * 5;
6469
6470 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6471
6472 plcp[2] = usec & 0xff;
6473 plcp[3] = (usec >> 8) & 0xff;
6474
6475 plcp[4] = 0;
6476 plcp[5] = 0;
6477}
6478
6479
6480static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6481{
6482 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6483 plcp[0] = mcs;
6484 if (rspec_is40mhz(rspec) || (mcs == 32))
6485 plcp[0] |= MIMO_PLCP_40MHZ;
6486 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6487 plcp[3] = rspec_mimoplcp3(rspec);
6488 plcp[3] |= 0x7;
6489 plcp[4] = 0;
6490 plcp[5] = 0;
6491}
6492
6493
6494static void
6495brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6496{
6497 u8 rate_signal;
6498 u32 tmp = 0;
6499 int rate = rspec2rate(rspec);
6500
6501
6502
6503
6504
6505 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6506 memset(plcp, 0, D11_PHY_HDR_LEN);
6507 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6508
6509 tmp = (length & 0xfff) << 5;
6510 plcp[2] |= (tmp >> 16) & 0xff;
6511 plcp[1] |= (tmp >> 8) & 0xff;
6512 plcp[0] |= tmp & 0xff;
6513}
6514
6515
6516static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6517 uint length, u8 *plcp)
6518{
6519 int rate = rspec2rate(rspec);
6520
6521 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6522}
6523
6524static void
6525brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6526 uint length, u8 *plcp)
6527{
6528 if (is_mcs_rate(rspec))
6529 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6530 else if (is_ofdm_rate(rspec))
6531 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6532 else
6533 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6534}
6535
6536
6537
6538
6539
6540
6541
6542
6543
6544
6545
6546
6547u16
6548brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6549 u32 rts_rate,
6550 u32 frame_rate, u8 rts_preamble_type,
6551 u8 frame_preamble_type, uint frame_len, bool ba)
6552{
6553 u16 dur, sifs;
6554
6555 sifs = get_sifs(wlc->band);
6556
6557 if (!cts_only) {
6558
6559 dur = 3 * sifs;
6560 dur +=
6561 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6562 rts_preamble_type);
6563 } else {
6564
6565 dur = 2 * sifs;
6566 }
6567
6568 dur +=
6569 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6570 frame_len);
6571 if (ba)
6572 dur +=
6573 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6574 BRCMS_SHORT_PREAMBLE);
6575 else
6576 dur +=
6577 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6578 frame_preamble_type);
6579 return dur;
6580}
6581
6582static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6583{
6584 u16 phyctl1 = 0;
6585 u16 bw;
6586
6587 if (BRCMS_ISLCNPHY(wlc->band)) {
6588 bw = PHY_TXC1_BW_20MHZ;
6589 } else {
6590 bw = rspec_get_bw(rspec);
6591
6592 if (bw < PHY_TXC1_BW_20MHZ) {
6593 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6594 "not supported yet, set to 20L\n", bw);
6595 bw = PHY_TXC1_BW_20MHZ;
6596 }
6597 }
6598
6599 if (is_mcs_rate(rspec)) {
6600 uint mcs = rspec & RSPEC_RATE_MASK;
6601
6602
6603 phyctl1 = rspec_phytxbyte2(rspec);
6604
6605 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6606 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6607 && !BRCMS_ISSSLPNPHY(wlc->band)) {
6608
6609
6610
6611
6612
6613
6614 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6615 } else {
6616 s16 phycfg;
6617
6618 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6619 if (phycfg == -1) {
6620 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6621 "legacy OFDM/CCK rate\n");
6622 phycfg = 0;
6623 }
6624
6625 phyctl1 =
6626 (bw | (phycfg << 8) |
6627 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6628 }
6629 return phyctl1;
6630}
6631
6632
6633
6634
6635
6636
6637
6638
6639
6640
6641static u16
6642brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6643 struct sk_buff *p, struct scb *scb, uint frag,
6644 uint nfrags, uint queue, uint next_frag_len)
6645{
6646 struct ieee80211_hdr *h;
6647 struct d11txh *txh;
6648 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6649 int len, phylen, rts_phylen;
6650 u16 mch, phyctl, xfts, mainrates;
6651 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6652 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6653 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6654 bool use_rts = false;
6655 bool use_cts = false;
6656 bool use_rifs = false;
6657 bool short_preamble[2] = { false, false };
6658 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6659 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6660 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6661 struct ieee80211_rts *rts = NULL;
6662 bool qos;
6663 uint ac;
6664 bool hwtkmic = false;
6665 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6666#define ANTCFG_NONE 0xFF
6667 u8 antcfg = ANTCFG_NONE;
6668 u8 fbantcfg = ANTCFG_NONE;
6669 uint phyctl1_stf = 0;
6670 u16 durid = 0;
6671 struct ieee80211_tx_rate *txrate[2];
6672 int k;
6673 struct ieee80211_tx_info *tx_info;
6674 bool is_mcs;
6675 u16 mimo_txbw;
6676 u8 mimo_preamble_type;
6677
6678
6679 h = (struct ieee80211_hdr *)(p->data);
6680 qos = ieee80211_is_data_qos(h->frame_control);
6681
6682
6683 len = p->len;
6684 phylen = len + FCS_LEN;
6685
6686
6687 tx_info = IEEE80211_SKB_CB(p);
6688
6689
6690 plcp = skb_push(p, D11_PHY_HDR_LEN);
6691
6692
6693 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6694 memset(txh, 0, D11_TXH_LEN);
6695
6696
6697 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6698
6699 if (queue == TX_BCMC_FIFO) {
6700 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6701 "TX_BCMC!\n", wlc->pub->unit, __func__);
6702 frameid = bcmc_fid_generate(wlc, NULL, txh);
6703 } else {
6704
6705 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6706 scb->seqnum[p->priority]++;
6707
6708
6709 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6710 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6711 h->seq_ctrl = cpu_to_le16(seq);
6712
6713 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6714 (queue & TXFID_QUEUE_MASK);
6715 }
6716 }
6717 frameid |= queue & TXFID_QUEUE_MASK;
6718
6719
6720 if (ieee80211_is_beacon(h->frame_control))
6721 mcl |= TXC_IGNOREPMQ;
6722
6723 txrate[0] = tx_info->control.rates;
6724 txrate[1] = txrate[0] + 1;
6725
6726
6727
6728
6729
6730 if (txrate[1]->idx < 0)
6731 txrate[1] = txrate[0];
6732
6733 for (k = 0; k < hw->max_rates; k++) {
6734 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6735 if (!is_mcs) {
6736 if ((txrate[k]->idx >= 0)
6737 && (txrate[k]->idx <
6738 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6739 rspec[k] =
6740 hw->wiphy->bands[tx_info->band]->
6741 bitrates[txrate[k]->idx].hw_value;
6742 short_preamble[k] =
6743 txrate[k]->
6744 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6745 true : false;
6746 } else {
6747 rspec[k] = BRCM_RATE_1M;
6748 }
6749 } else {
6750 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6751 NRATE_MCS_INUSE | txrate[k]->idx);
6752 }
6753
6754
6755
6756
6757
6758
6759 use_rts |=
6760 txrate[k]->
6761 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6762 use_cts |=
6763 txrate[k]->
6764 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6765
6766
6767
6768
6769
6770
6771
6772 if (!rspec_active(rspec[k])) {
6773 rspec[k] = BRCM_RATE_1M;
6774 } else {
6775 if (!is_multicast_ether_addr(h->addr1)) {
6776
6777 brcms_c_antsel_antcfg_get(wlc->asi, false,
6778 false, 0, 0, &antcfg, &fbantcfg);
6779 }
6780 }
6781 }
6782
6783 phyctl1_stf = wlc->stf->ss_opmode;
6784
6785 if (wlc->pub->_n_enab & SUPPORT_11N) {
6786 for (k = 0; k < hw->max_rates; k++) {
6787
6788
6789
6790
6791 if (((is_mcs_rate(rspec[k]) &&
6792 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6793 is_ofdm_rate(rspec[k]))
6794 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6795 || !(rspec[k] & RSPEC_OVERRIDE))) {
6796 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6797
6798
6799 if (is_mcs_rate(rspec[k])
6800 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6801 u8 stc;
6802
6803
6804 stc = 1;
6805 rspec[k] |= (PHY_TXC1_MODE_STBC <<
6806 RSPEC_STF_SHIFT) |
6807 (stc << RSPEC_STC_SHIFT);
6808 } else
6809 rspec[k] |=
6810 (phyctl1_stf << RSPEC_STF_SHIFT);
6811 }
6812
6813
6814
6815
6816
6817 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6818
6819 mimo_ctlchbw = mimo_txbw =
6820 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6821 wlc->band->pi))
6822 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6823
6824 if (is_mcs_rate(rspec[k])) {
6825
6826 if ((rspec[k] & RSPEC_RATE_MASK)
6827 == 32) {
6828 mimo_txbw =
6829 PHY_TXC1_BW_40MHZ_DUP;
6830
6831 } else if (wlc->mimo_40txbw != AUTO)
6832 mimo_txbw = wlc->mimo_40txbw;
6833
6834 else if (scb->flags & SCB_IS40)
6835 mimo_txbw = PHY_TXC1_BW_40MHZ;
6836 } else if (is_ofdm_rate(rspec[k])) {
6837 if (wlc->ofdm_40txbw != AUTO)
6838 mimo_txbw = wlc->ofdm_40txbw;
6839 } else if (wlc->cck_40txbw != AUTO) {
6840 mimo_txbw = wlc->cck_40txbw;
6841 }
6842 } else {
6843
6844
6845
6846
6847
6848 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6849
6850 rspec[k] = RSPEC_MIMORATE;
6851
6852 mimo_txbw = PHY_TXC1_BW_20MHZ;
6853 }
6854
6855
6856 rspec[k] &= ~RSPEC_BW_MASK;
6857 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6858 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6859 else
6860 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6861
6862
6863 rspec[k] &= ~RSPEC_SHORT_GI;
6864
6865 mimo_preamble_type = BRCMS_MM_PREAMBLE;
6866 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6867 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6868
6869 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6870 && (!is_mcs_rate(rspec[k]))) {
6871 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6872 "RC_MCS != is_mcs_rate(rspec)\n",
6873 wlc->pub->unit, __func__);
6874 }
6875
6876 if (is_mcs_rate(rspec[k])) {
6877 preamble_type[k] = mimo_preamble_type;
6878
6879
6880
6881
6882
6883 if ((rspec[k] & RSPEC_SHORT_GI)
6884 && is_single_stream(rspec[k] &
6885 RSPEC_RATE_MASK))
6886 preamble_type[k] = BRCMS_MM_PREAMBLE;
6887 }
6888
6889
6890 if (!is_mcs_rate(rspec[0])
6891 && (tx_info->control.rates[0].
6892 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6893 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6894 }
6895 } else {
6896 for (k = 0; k < hw->max_rates; k++) {
6897
6898 rspec[k] &= ~RSPEC_BW_MASK;
6899 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6900
6901
6902 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6903 rspec[k] &= ~RSPEC_STF_MASK;
6904 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6905 }
6906 }
6907 }
6908
6909
6910 txrate[0]->count = 0;
6911 txrate[1]->count = 0;
6912
6913
6914 if ((ieee80211_is_data(h->frame_control) ||
6915 ieee80211_is_mgmt(h->frame_control)) &&
6916 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6917 use_rts = true;
6918
6919
6920
6921 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6922 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6923 memcpy(&txh->FragPLCPFallback,
6924 plcp_fallback, sizeof(txh->FragPLCPFallback));
6925
6926
6927 if (is_cck_rate(rspec[1])) {
6928 txh->FragPLCPFallback[4] = phylen & 0xff;
6929 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6930 }
6931
6932
6933 mainrates = is_ofdm_rate(rspec[0]) ?
6934 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6935 plcp[0];
6936
6937
6938 if (!ieee80211_is_pspoll(h->frame_control) &&
6939 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6940 durid =
6941 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6942 next_frag_len);
6943 h->duration_id = cpu_to_le16(durid);
6944 } else if (use_rifs) {
6945
6946 durid =
6947 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6948 preamble_type[0],
6949 DOT11_MAX_FRAG_LEN);
6950 durid += RIFS_11N_TIME;
6951 h->duration_id = cpu_to_le16(durid);
6952 }
6953
6954
6955 if (ieee80211_is_pspoll(h->frame_control))
6956 txh->FragDurFallback = h->duration_id;
6957 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6958 txh->FragDurFallback = 0;
6959 else {
6960 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6961 preamble_type[1], next_frag_len);
6962 txh->FragDurFallback = cpu_to_le16(durid);
6963 }
6964
6965
6966 if (frag == 0)
6967 mcl |= TXC_STARTMSDU;
6968
6969 if (!is_multicast_ether_addr(h->addr1))
6970 mcl |= TXC_IMMEDACK;
6971
6972 if (wlc->band->bandtype == BRCM_BAND_5G)
6973 mcl |= TXC_FREQBAND_5G;
6974
6975 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6976 mcl |= TXC_BW_40;
6977
6978
6979 if (hwtkmic)
6980 mcl |= TXC_AMIC;
6981
6982 txh->MacTxControlLow = cpu_to_le16(mcl);
6983
6984
6985 mch = 0;
6986
6987
6988 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
6989 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
6990 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
6991 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
6992 }
6993
6994
6995 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6996 txh->TxFesTimeNormal = cpu_to_le16(0);
6997
6998 txh->TxFesTimeFallback = cpu_to_le16(0);
6999
7000
7001 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7002
7003
7004 txh->TxFrameID = cpu_to_le16(frameid);
7005
7006
7007
7008
7009
7010 txh->TxStatus = cpu_to_le16(status);
7011
7012
7013
7014
7015
7016 txh->MaxNMpdus = cpu_to_le16(0);
7017 txh->MaxABytes_MRT = cpu_to_le16(0);
7018 txh->MaxABytes_FBR = cpu_to_le16(0);
7019 txh->MinMBytes = cpu_to_le16(0);
7020
7021
7022
7023
7024 if (use_rts || use_cts) {
7025 if (use_rts && use_cts)
7026 use_cts = false;
7027
7028 for (k = 0; k < 2; k++) {
7029 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7030 false,
7031 mimo_ctlchbw);
7032 }
7033
7034 if (!is_ofdm_rate(rts_rspec[0]) &&
7035 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7036 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7037 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7038 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7039 }
7040
7041 if (!is_ofdm_rate(rts_rspec[1]) &&
7042 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7043 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7044 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7045 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7046 }
7047
7048
7049 if (use_cts) {
7050 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7051 } else {
7052 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7053 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7054 }
7055
7056
7057 rts_plcp = txh->RTSPhyHeader;
7058 if (use_cts)
7059 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7060 else
7061 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7062
7063 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7064
7065
7066 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7067 rts_plcp_fallback);
7068 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7069 sizeof(txh->RTSPLCPFallback));
7070
7071
7072 rts = (struct ieee80211_rts *)&txh->rts_frame;
7073
7074 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7075 rspec[0], rts_preamble_type[0],
7076 preamble_type[0], phylen, false);
7077 rts->duration = cpu_to_le16(durid);
7078
7079 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7080 rts_rspec[1], rspec[1],
7081 rts_preamble_type[1],
7082 preamble_type[1], phylen, false);
7083 txh->RTSDurFallback = cpu_to_le16(durid);
7084
7085 if (use_cts) {
7086 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7087 IEEE80211_STYPE_CTS);
7088
7089 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7090 } else {
7091 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7092 IEEE80211_STYPE_RTS);
7093
7094 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7095 }
7096
7097
7098
7099
7100
7101 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7102 D11A_PHY_HDR_GRATE(
7103 (struct ofdm_phy_hdr *) rts_plcp) :
7104 rts_plcp[0]) << 8;
7105 } else {
7106 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7107 memset((char *)&txh->rts_frame, 0,
7108 sizeof(struct ieee80211_rts));
7109 memset((char *)txh->RTSPLCPFallback, 0,
7110 sizeof(txh->RTSPLCPFallback));
7111 txh->RTSDurFallback = 0;
7112 }
7113
7114#ifdef SUPPORT_40MHZ
7115
7116 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7117 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7118 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7119
7120#endif
7121
7122
7123
7124
7125
7126 txh->MacTxControlHigh = cpu_to_le16(mch);
7127
7128
7129
7130
7131
7132 txh->MainRates = cpu_to_le16(mainrates);
7133
7134
7135 xfts = frametype(rspec[1], wlc->mimoft);
7136 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7137 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7138 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7139 XFTS_CHANNEL_SHIFT;
7140 txh->XtraFrameTypes = cpu_to_le16(xfts);
7141
7142
7143 phyctl = frametype(rspec[0], wlc->mimoft);
7144 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7145 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7146 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7147 phyctl |= PHY_TXC_SHORT_HDR;
7148 }
7149
7150
7151 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7152 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7153
7154
7155 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7156 u16 phyctl1 = 0;
7157
7158 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7159 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7160 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7161 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7162
7163 if (use_rts || use_cts) {
7164 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7165 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7166 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7167 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7168 }
7169
7170
7171
7172
7173
7174
7175 if (is_mcs_rate(rspec[0]) &&
7176 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7177 u16 mmodelen =
7178 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7179 txh->MModeLen = cpu_to_le16(mmodelen);
7180 }
7181
7182 if (is_mcs_rate(rspec[1]) &&
7183 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7184 u16 mmodefbrlen =
7185 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7186 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7187 }
7188 }
7189
7190 ac = skb_get_queue_mapping(p);
7191 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7192 uint frag_dur, dur, dur_fallback;
7193
7194
7195 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7196 frag_dur =
7197 brcms_c_calc_frame_time(wlc, rspec[0],
7198 preamble_type[0], phylen);
7199
7200 if (rts) {
7201
7202 dur =
7203 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7204 rts_preamble_type[0]);
7205 dur_fallback =
7206 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7207 rts_preamble_type[1]);
7208
7209 dur += le16_to_cpu(rts->duration);
7210 dur_fallback +=
7211 le16_to_cpu(txh->RTSDurFallback);
7212 } else if (use_rifs) {
7213 dur = frag_dur;
7214 dur_fallback = 0;
7215 } else {
7216
7217 dur = frag_dur;
7218 dur +=
7219 brcms_c_compute_frame_dur(wlc, rspec[0],
7220 preamble_type[0], 0);
7221
7222 dur_fallback =
7223 brcms_c_calc_frame_time(wlc, rspec[1],
7224 preamble_type[1],
7225 phylen);
7226 dur_fallback +=
7227 brcms_c_compute_frame_dur(wlc, rspec[1],
7228 preamble_type[1], 0);
7229 }
7230
7231 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7232
7233
7234
7235
7236 txh->TxFesTimeFallback =
7237 cpu_to_le16((u16) dur_fallback);
7238
7239
7240
7241
7242
7243 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7244 uint newfragthresh;
7245
7246 newfragthresh =
7247 brcms_c_calc_frame_len(wlc,
7248 rspec[0], preamble_type[0],
7249 (wlc->edcf_txop[ac] -
7250 (dur - frag_dur)));
7251
7252 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7253 newfragthresh =
7254 DOT11_MIN_FRAG_LEN;
7255 else if (newfragthresh >
7256 wlc->usr_fragthresh)
7257 newfragthresh =
7258 wlc->usr_fragthresh;
7259
7260 if (wlc->fragthresh[queue] !=
7261 (u16) newfragthresh)
7262 wlc->fragthresh[queue] =
7263 (u16) newfragthresh;
7264 } else {
7265 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7266 "for rate %d\n",
7267 wlc->pub->unit, fifo_names[queue],
7268 rspec2rate(rspec[0]));
7269 }
7270
7271 if (dur > wlc->edcf_txop[ac])
7272 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7273 "exceeded phylen %d/%d dur %d/%d\n",
7274 wlc->pub->unit, __func__,
7275 fifo_names[queue],
7276 phylen, wlc->fragthresh[queue],
7277 dur, wlc->edcf_txop[ac]);
7278 }
7279 }
7280
7281 return 0;
7282}
7283
7284void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7285 struct ieee80211_hw *hw)
7286{
7287 u8 prio;
7288 uint fifo;
7289 struct scb *scb = &wlc->pri_scb;
7290 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7291
7292
7293
7294
7295
7296 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7297 MAXPRIO;
7298 fifo = prio2fifo[prio];
7299 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7300 return;
7301 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7302 brcms_c_send_q(wlc);
7303}
7304
7305void brcms_c_send_q(struct brcms_c_info *wlc)
7306{
7307 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7308 int prec;
7309 u16 prec_map;
7310 int err = 0, i, count;
7311 uint fifo;
7312 struct brcms_txq_info *qi = wlc->pkt_queue;
7313 struct pktq *q = &qi->q;
7314 struct ieee80211_tx_info *tx_info;
7315
7316 prec_map = wlc->tx_prec_map;
7317
7318
7319
7320
7321 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7322 tx_info = IEEE80211_SKB_CB(pkt[0]);
7323 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7324 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7325 } else {
7326 count = 1;
7327 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7328 if (!err) {
7329 for (i = 0; i < count; i++)
7330 brcms_c_txfifo(wlc, fifo, pkt[i], true,
7331 1);
7332 }
7333 }
7334
7335 if (err == -EBUSY) {
7336 brcmu_pktq_penq_head(q, prec, pkt[0]);
7337
7338
7339
7340
7341
7342 if (prec_map == wlc->tx_prec_map)
7343 break;
7344 prec_map = wlc->tx_prec_map;
7345 }
7346 }
7347}
7348
7349void
7350brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7351 bool commit, s8 txpktpend)
7352{
7353 u16 frameid = INVALIDFID;
7354 struct d11txh *txh;
7355
7356 txh = (struct d11txh *) (p->data);
7357
7358
7359
7360
7361 if (fifo == TX_BCMC_FIFO)
7362 frameid = le16_to_cpu(txh->TxFrameID);
7363
7364
7365
7366
7367
7368 if (commit) {
7369 wlc->core->txpktpend[fifo] += txpktpend;
7370 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7371 txpktpend, wlc->core->txpktpend[fifo]);
7372 }
7373
7374
7375 if (frameid != INVALIDFID) {
7376
7377
7378
7379
7380 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7381 }
7382
7383 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7384 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7385}
7386
7387u32
7388brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7389 bool use_rspec, u16 mimo_ctlchbw)
7390{
7391 u32 rts_rspec = 0;
7392
7393 if (use_rspec)
7394
7395 rts_rspec = rspec;
7396 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7397
7398
7399
7400
7401
7402
7403
7404 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7405 else
7406
7407
7408
7409
7410 rts_rspec = brcms_basic_rate(wlc, rspec);
7411
7412 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7413
7414 rts_rspec &= ~RSPEC_BW_MASK;
7415
7416
7417
7418
7419
7420 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7421 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7422 else
7423 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7424
7425
7426 if (is_ofdm_rate(rts_rspec)) {
7427 rts_rspec &= ~RSPEC_STF_MASK;
7428 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7429 }
7430 }
7431 return rts_rspec;
7432}
7433
7434void
7435brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7436{
7437 wlc->core->txpktpend[fifo] -= txpktpend;
7438 BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7439 wlc->core->txpktpend[fifo]);
7440
7441
7442 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7443
7444
7445}
7446
7447
7448static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7449{
7450
7451 if (wlc->bcn_li_dtim == 1)
7452 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7453 else
7454 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7455 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7456}
7457
7458static void
7459brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7460 u32 *tsf_h_ptr)
7461{
7462 struct bcma_device *core = wlc_hw->d11core;
7463
7464
7465 *tsf_l_ptr = bcma_read32(core, D11REGOFFS(tsf_timerlow));
7466 *tsf_h_ptr = bcma_read32(core, D11REGOFFS(tsf_timerhigh));
7467}
7468
7469
7470
7471
7472
7473
7474
7475
7476
7477
7478
7479
7480
7481
7482
7483static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7484 struct d11rxhdr *rxh)
7485{
7486 u32 tsf_h, tsf_l;
7487 u16 rx_tsf_0_15, rx_tsf_16_31;
7488
7489 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7490
7491 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7492 rx_tsf_0_15 = rxh->RxTSFTime;
7493
7494
7495
7496
7497
7498 if ((u16)tsf_l < rx_tsf_0_15) {
7499 rx_tsf_16_31 -= 1;
7500 if (rx_tsf_16_31 == 0xffff)
7501 tsf_h -= 1;
7502 }
7503
7504 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7505}
7506
7507static void
7508prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7509 struct sk_buff *p,
7510 struct ieee80211_rx_status *rx_status)
7511{
7512 int preamble;
7513 int channel;
7514 u32 rspec;
7515 unsigned char *plcp;
7516
7517
7518 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7519 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7520
7521 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7522
7523 if (channel > 14) {
7524 rx_status->band = IEEE80211_BAND_5GHZ;
7525 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7526 WF_CHAN_FACTOR_5_G/2, channel);
7527
7528 } else {
7529 rx_status->band = IEEE80211_BAND_2GHZ;
7530 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7531 }
7532
7533 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7534
7535
7536
7537 rx_status->antenna =
7538 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7539
7540 plcp = p->data;
7541
7542 rspec = brcms_c_compute_rspec(rxh, plcp);
7543 if (is_mcs_rate(rspec)) {
7544 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7545 rx_status->flag |= RX_FLAG_HT;
7546 if (rspec_is40mhz(rspec))
7547 rx_status->flag |= RX_FLAG_40MHZ;
7548 } else {
7549 switch (rspec2rate(rspec)) {
7550 case BRCM_RATE_1M:
7551 rx_status->rate_idx = 0;
7552 break;
7553 case BRCM_RATE_2M:
7554 rx_status->rate_idx = 1;
7555 break;
7556 case BRCM_RATE_5M5:
7557 rx_status->rate_idx = 2;
7558 break;
7559 case BRCM_RATE_11M:
7560 rx_status->rate_idx = 3;
7561 break;
7562 case BRCM_RATE_6M:
7563 rx_status->rate_idx = 4;
7564 break;
7565 case BRCM_RATE_9M:
7566 rx_status->rate_idx = 5;
7567 break;
7568 case BRCM_RATE_12M:
7569 rx_status->rate_idx = 6;
7570 break;
7571 case BRCM_RATE_18M:
7572 rx_status->rate_idx = 7;
7573 break;
7574 case BRCM_RATE_24M:
7575 rx_status->rate_idx = 8;
7576 break;
7577 case BRCM_RATE_36M:
7578 rx_status->rate_idx = 9;
7579 break;
7580 case BRCM_RATE_48M:
7581 rx_status->rate_idx = 10;
7582 break;
7583 case BRCM_RATE_54M:
7584 rx_status->rate_idx = 11;
7585 break;
7586 default:
7587 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7588 }
7589
7590
7591
7592
7593
7594
7595 if (rx_status->band == IEEE80211_BAND_5GHZ)
7596 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7597
7598
7599 preamble = 0;
7600 if (is_cck_rate(rspec)) {
7601 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7602 rx_status->flag |= RX_FLAG_SHORTPRE;
7603 } else if (is_ofdm_rate(rspec)) {
7604 rx_status->flag |= RX_FLAG_SHORTPRE;
7605 } else {
7606 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7607 __func__);
7608 }
7609 }
7610
7611 if (plcp3_issgi(plcp[3]))
7612 rx_status->flag |= RX_FLAG_SHORT_GI;
7613
7614 if (rxh->RxStatus1 & RXS_DECERR) {
7615 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7616 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7617 __func__);
7618 }
7619 if (rxh->RxStatus1 & RXS_FCSERR) {
7620 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7621 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7622 __func__);
7623 }
7624}
7625
7626static void
7627brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7628 struct sk_buff *p)
7629{
7630 int len_mpdu;
7631 struct ieee80211_rx_status rx_status;
7632
7633 memset(&rx_status, 0, sizeof(rx_status));
7634 prep_mac80211_status(wlc, rxh, p, &rx_status);
7635
7636
7637 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7638 skb_pull(p, D11_PHY_HDR_LEN);
7639 __skb_trim(p, len_mpdu);
7640
7641 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7642 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7643}
7644
7645
7646
7647
7648
7649
7650
7651u16
7652brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7653 uint mac_len)
7654{
7655 uint nsyms, len = 0, kNdps;
7656
7657 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7658 wlc->pub->unit, rspec2rate(ratespec), mac_len);
7659
7660 if (is_mcs_rate(ratespec)) {
7661 uint mcs = ratespec & RSPEC_RATE_MASK;
7662 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7663 rspec_stc(ratespec);
7664
7665
7666
7667
7668
7669
7670 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7671 rspec_issgi(ratespec)) * 4;
7672
7673 if (rspec_stc(ratespec) == 0)
7674 nsyms =
7675 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7676 APHY_TAIL_NBITS) * 1000, kNdps);
7677 else
7678
7679 nsyms =
7680 2 *
7681 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7682 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7683
7684
7685 nsyms += (tot_streams + 3);
7686
7687
7688
7689
7690 len = (3 * nsyms) - 3;
7691 }
7692
7693 return (u16) len;
7694}
7695
7696static void
7697brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7698{
7699 const struct brcms_c_rateset *rs_dflt;
7700 struct brcms_c_rateset rs;
7701 u8 rate;
7702 u16 entry_ptr;
7703 u8 plcp[D11_PHY_HDR_LEN];
7704 u16 dur, sifs;
7705 uint i;
7706
7707 sifs = get_sifs(wlc->band);
7708
7709 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7710
7711 brcms_c_rateset_copy(rs_dflt, &rs);
7712 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7713
7714
7715
7716
7717
7718 for (i = 0; i < rs.count; i++) {
7719 rate = rs.rates[i] & BRCMS_RATE_MASK;
7720
7721 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7722
7723
7724 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7725
7726
7727
7728
7729
7730 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7731 BRCMS_LONG_PREAMBLE, frame_len);
7732 dur += sifs;
7733
7734
7735 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7736 (u16) (plcp[0] + (plcp[1] << 8)));
7737 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7738 (u16) (plcp[2] + (plcp[3] << 8)));
7739 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7740 }
7741}
7742
7743
7744
7745
7746
7747
7748
7749
7750
7751
7752
7753
7754
7755static void
7756brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7757 u32 bcn_rspec,
7758 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7759{
7760 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7761 struct cck_phy_hdr *plcp;
7762 struct ieee80211_mgmt *h;
7763 int hdr_len, body_len;
7764
7765 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7766
7767
7768 body_len = *len - hdr_len;
7769
7770 *len = hdr_len + body_len;
7771
7772
7773 memset((char *)buf, 0, hdr_len);
7774
7775 plcp = (struct cck_phy_hdr *) buf;
7776
7777
7778
7779
7780
7781 if (type == IEEE80211_STYPE_BEACON)
7782
7783 brcms_c_compute_plcp(wlc, bcn_rspec,
7784 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7785 (u8 *) plcp);
7786
7787
7788
7789 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7790
7791 h = (struct ieee80211_mgmt *)&plcp[1];
7792
7793
7794 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7795
7796
7797
7798 if (type == IEEE80211_STYPE_BEACON)
7799 memcpy(&h->da, ðer_bcast, ETH_ALEN);
7800 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7801 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7802
7803
7804}
7805
7806int brcms_c_get_header_len(void)
7807{
7808 return TXOFF;
7809}
7810
7811
7812
7813
7814void brcms_c_update_beacon(struct brcms_c_info *wlc)
7815{
7816 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7817
7818 if (bsscfg->up && !bsscfg->BSS)
7819
7820 wlc->defmacintmask &= ~MI_BCNTPL;
7821}
7822
7823
7824static void
7825brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7826{
7827 u8 *ssidptr = cfg->SSID;
7828 u16 base = M_SSID;
7829 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7830
7831
7832 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7833 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7834
7835 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7836 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7837}
7838
7839static void
7840brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7841 struct brcms_bss_cfg *cfg,
7842 bool suspend)
7843{
7844 u16 prb_resp[BCN_TMPL_LEN / 2];
7845 int len = BCN_TMPL_LEN;
7846
7847
7848
7849
7850
7851
7852
7853 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7854 cfg, prb_resp, &len);
7855
7856 if (suspend)
7857 brcms_c_suspend_mac_and_wait(wlc);
7858
7859
7860 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7861 (len + 3) & ~3, prb_resp);
7862
7863
7864 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7865
7866
7867 brcms_c_shm_ssid_upd(wlc, cfg);
7868
7869
7870
7871
7872
7873
7874
7875 len += (-D11_PHY_HDR_LEN + FCS_LEN);
7876 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7877
7878 if (suspend)
7879 brcms_c_enable_mac(wlc);
7880}
7881
7882void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7883{
7884 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7885
7886
7887 if (bsscfg->up && !bsscfg->BSS)
7888 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7889}
7890
7891
7892int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7893{
7894 uint fifo;
7895 struct d11txh *txh;
7896 struct ieee80211_hdr *h;
7897 struct scb *scb;
7898
7899 txh = (struct d11txh *) (pdu->data);
7900 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7901
7902
7903
7904 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7905
7906 scb = NULL;
7907
7908 *fifop = fifo;
7909
7910
7911 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7912
7913
7914 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
7915 return -EBUSY;
7916 }
7917 return 0;
7918}
7919
7920int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7921 uint *blocks)
7922{
7923 if (fifo >= NFIFO)
7924 return -EINVAL;
7925
7926 *blocks = wlc_hw->xmtfifo_sz[fifo];
7927
7928 return 0;
7929}
7930
7931void
7932brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7933 const u8 *addr)
7934{
7935 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7936 if (match_reg_offset == RCM_BSSID_OFFSET)
7937 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7938}
7939
7940
7941
7942
7943void brcms_c_scan_start(struct brcms_c_info *wlc)
7944{
7945 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7946}
7947
7948void brcms_c_scan_stop(struct brcms_c_info *wlc)
7949{
7950 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7951}
7952
7953void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7954{
7955 wlc->pub->associated = state;
7956 wlc->bsscfg->associated = state;
7957}
7958
7959
7960
7961
7962
7963
7964void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7965 struct ieee80211_sta *sta,
7966 void (*dma_callback_fn))
7967{
7968 struct dma_pub *dmah;
7969 int i;
7970 for (i = 0; i < NFIFO; i++) {
7971 dmah = hw->di[i];
7972 if (dmah != NULL)
7973 dma_walk_packets(dmah, dma_callback_fn, sta);
7974 }
7975}
7976
7977int brcms_c_get_curband(struct brcms_c_info *wlc)
7978{
7979 return wlc->band->bandunit;
7980}
7981
7982void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
7983{
7984 int timeout = 20;
7985
7986
7987 if (drop)
7988 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
7989
7990
7991 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0) {
7992 brcms_msleep(wlc->wl, 1);
7993
7994 if (--timeout == 0)
7995 break;
7996 }
7997
7998 WARN_ON_ONCE(timeout == 0);
7999}
8000
8001void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8002{
8003 wlc->bcn_li_bcn = interval;
8004 if (wlc->pub->up)
8005 brcms_c_bcn_li_upd(wlc);
8006}
8007
8008int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8009{
8010 uint qdbm;
8011
8012
8013 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8014 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8015}
8016
8017int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8018{
8019 uint qdbm;
8020 bool override;
8021
8022 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8023
8024
8025 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8026}
8027
8028
8029
8030
8031
8032
8033static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8034{
8035 struct d11rxhdr *rxh;
8036 struct ieee80211_hdr *h;
8037 uint len;
8038 bool is_amsdu;
8039
8040 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8041
8042
8043 rxh = (struct d11rxhdr *) (p->data);
8044
8045
8046 skb_pull(p, BRCMS_HWRXOFF);
8047
8048
8049 if (rxh->RxStatus1 & RXS_PBPRES) {
8050 if (p->len < 2) {
8051 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8052 "len %d\n", wlc->pub->unit, p->len);
8053 goto toss;
8054 }
8055 skb_pull(p, 2);
8056 }
8057
8058 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8059 len = p->len;
8060
8061 if (rxh->RxStatus1 & RXS_FCSERR) {
8062 if (!(wlc->filter_flags & FIF_FCSFAIL))
8063 goto toss;
8064 }
8065
8066
8067 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8068 goto toss;
8069
8070
8071 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8072 if (is_amsdu)
8073 goto toss;
8074
8075 brcms_c_recvctl(wlc, rxh, p);
8076 return;
8077
8078 toss:
8079 brcmu_pkt_buf_free_skb(p);
8080}
8081
8082
8083
8084
8085
8086
8087static bool
8088brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8089{
8090 struct sk_buff *p;
8091 struct sk_buff *next = NULL;
8092 struct sk_buff_head recv_frames;
8093
8094 uint n = 0;
8095 uint bound_limit = bound ? RXBND : -1;
8096
8097 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8098 skb_queue_head_init(&recv_frames);
8099
8100
8101 while (dma_rx(wlc_hw->di[fifo], &recv_frames)) {
8102
8103
8104 if (++n >= bound_limit)
8105 break;
8106 }
8107
8108
8109 dma_rxfill(wlc_hw->di[fifo]);
8110
8111
8112 skb_queue_walk_safe(&recv_frames, p, next) {
8113 struct d11rxhdr_le *rxh_le;
8114 struct d11rxhdr *rxh;
8115
8116 skb_unlink(p, &recv_frames);
8117 rxh_le = (struct d11rxhdr_le *)p->data;
8118 rxh = (struct d11rxhdr *)p->data;
8119
8120
8121 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8122 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8123 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8124 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8125 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8126 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8127 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8128 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8129 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8130 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8131 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8132
8133 brcms_c_recv(wlc_hw->wlc, p);
8134 }
8135
8136 return n >= bound_limit;
8137}
8138
8139
8140
8141
8142
8143bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8144{
8145 u32 macintstatus;
8146 struct brcms_hardware *wlc_hw = wlc->hw;
8147 struct bcma_device *core = wlc_hw->d11core;
8148 struct wiphy *wiphy = wlc->wiphy;
8149
8150 if (brcms_deviceremoved(wlc)) {
8151 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8152 __func__);
8153 brcms_down(wlc->wl);
8154 return false;
8155 }
8156
8157
8158 macintstatus = wlc->macintstatus;
8159 wlc->macintstatus = 0;
8160
8161 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8162 wlc_hw->unit, macintstatus);
8163
8164 WARN_ON(macintstatus & MI_PRQ);
8165
8166
8167 if (macintstatus & MI_TFS) {
8168 bool fatal;
8169 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8170 wlc->macintstatus |= MI_TFS;
8171 if (fatal) {
8172 wiphy_err(wiphy, "MI_TFS: fatal\n");
8173 goto fatal;
8174 }
8175 }
8176
8177 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8178 brcms_c_tbtt(wlc);
8179
8180
8181 if (macintstatus & MI_ATIMWINEND) {
8182 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8183 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
8184 wlc->qvalid = 0;
8185 }
8186
8187
8188
8189
8190
8191 if (macintstatus & MI_DMAINT)
8192 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8193 wlc->macintstatus |= MI_DMAINT;
8194
8195
8196 if (macintstatus & MI_BG_NOISE)
8197 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8198
8199 if (macintstatus & MI_GP0) {
8200 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8201 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8202
8203 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8204 __func__, ai_get_chip_id(wlc_hw->sih),
8205 ai_get_chiprev(wlc_hw->sih));
8206 brcms_fatal_error(wlc_hw->wlc->wl);
8207 }
8208
8209
8210 if (macintstatus & MI_TO)
8211 bcma_write32(core, D11REGOFFS(gptimer), 0);
8212
8213 if (macintstatus & MI_RFDISABLE) {
8214 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8215 " RF Disable Input\n", wlc_hw->unit);
8216 brcms_rfkill_set_hw_state(wlc->wl);
8217 }
8218
8219
8220 if (!pktq_empty(&wlc->pkt_queue->q))
8221 brcms_c_send_q(wlc);
8222
8223
8224 return wlc->macintstatus != 0;
8225
8226 fatal:
8227 brcms_fatal_error(wlc_hw->wlc->wl);
8228 return wlc->macintstatus != 0;
8229}
8230
8231void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx)
8232{
8233 struct bcma_device *core = wlc->hw->d11core;
8234 u16 chanspec;
8235
8236 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8237
8238
8239
8240
8241
8242
8243 if (wlc->pub->associated)
8244 chanspec = wlc->home_chanspec;
8245 else
8246 chanspec = brcms_c_init_chanspec(wlc);
8247
8248 brcms_b_init(wlc->hw, chanspec);
8249
8250
8251 brcms_c_bcn_li_upd(wlc);
8252
8253
8254 brcms_c_set_mac(wlc->bsscfg);
8255 brcms_c_set_bssid(wlc->bsscfg);
8256
8257
8258 if (wlc->pub->associated && wlc->bsscfg->up) {
8259 u32 bi;
8260
8261
8262 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8263
8264
8265
8266
8267 bcma_write32(core, D11REGOFFS(tsf_cfprep),
8268 bi << CFPREP_CBI_SHIFT);
8269
8270
8271 brcms_c_set_ps_ctrl(wlc);
8272 }
8273
8274 brcms_c_bandinit_ordered(wlc, chanspec);
8275
8276
8277 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8278
8279
8280 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8281 (wlc->
8282 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8283
8284
8285 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8286 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8287
8288
8289
8290
8291
8292 brcms_c_ampdu_shm_upd(wlc->ampdu);
8293
8294
8295 brcms_c_bsinit(wlc);
8296
8297
8298 bcma_set16(core, D11REGOFFS(ifs_ctl), IFS_USEEDCF);
8299 brcms_c_edcf_setparams(wlc, false);
8300
8301
8302 brcms_c_tx_prec_map_init(wlc);
8303
8304
8305 if (wlc->ucode_rev == 0) {
8306 wlc->ucode_rev =
8307 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8308 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8309 }
8310
8311
8312 brcms_c_enable_mac(wlc);
8313
8314
8315 if (mute_tx)
8316 brcms_b_mute(wlc->hw, true);
8317
8318
8319 brcms_c_txflowcontrol_reset(wlc);
8320
8321
8322 bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
8323
8324
8325
8326
8327
8328 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8329
8330 int ac;
8331
8332 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
8333 wlc->wme_retries[ac] =
8334 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8335 }
8336}
8337
8338
8339
8340
8341struct brcms_c_info *
8342brcms_c_attach(struct brcms_info *wl, struct bcma_device *core, uint unit,
8343 bool piomode, uint *perr)
8344{
8345 struct brcms_c_info *wlc;
8346 uint err = 0;
8347 uint i, j;
8348 struct brcms_pub *pub;
8349
8350
8351 wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, 0);
8352 if (wlc == NULL)
8353 goto fail;
8354 wlc->wiphy = wl->wiphy;
8355 pub = wlc->pub;
8356
8357#if defined(BCMDBG)
8358 wlc_info_dbg = wlc;
8359#endif
8360
8361 wlc->band = wlc->bandstate[0];
8362 wlc->core = wlc->corestate;
8363 wlc->wl = wl;
8364 pub->unit = unit;
8365 pub->_piomode = piomode;
8366 wlc->bandinit_pending = false;
8367
8368
8369 brcms_c_info_init(wlc, unit);
8370
8371
8372 brcms_c_ap_upd(wlc);
8373
8374
8375
8376
8377
8378 err = brcms_b_attach(wlc, core, unit, piomode);
8379 if (err)
8380 goto fail;
8381
8382 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8383
8384 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8385
8386
8387 wlc->tx_duty_cycle_ofdm = 0;
8388 wlc->tx_duty_cycle_cck = 0;
8389
8390 brcms_c_stf_phy_chain_calc(wlc);
8391
8392
8393 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8394 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8395
8396
8397 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8398 wlc->stf->hw_rxchain);
8399
8400
8401 for (i = 0; i < NFIFO; i++)
8402 wlc->core->txavail[i] = wlc->hw->txavail[i];
8403
8404 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8405 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8406
8407 for (j = 0; j < wlc->pub->_nbands; j++) {
8408 wlc->band = wlc->bandstate[j];
8409
8410 if (!brcms_c_attach_stf_ant_init(wlc)) {
8411 err = 24;
8412 goto fail;
8413 }
8414
8415
8416 wlc->band->CWmin = APHY_CWMIN;
8417 wlc->band->CWmax = PHY_CWMAX;
8418
8419
8420 if (wlc->band->bandtype == BRCM_BAND_2G) {
8421 wlc->band->gmode = GMODE_AUTO;
8422 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8423 wlc->band->gmode);
8424 }
8425
8426
8427 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8428 pub->_n_enab = SUPPORT_11N;
8429 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8430 ((pub->_n_enab ==
8431 SUPPORT_11N) ? WL_11N_2x2 :
8432 WL_11N_3x3));
8433 }
8434
8435
8436 brcms_default_rateset(wlc, &wlc->band->defrateset);
8437
8438
8439 brcms_c_rateset_filter(&wlc->band->defrateset,
8440 &wlc->band->hw_rateset, false,
8441 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8442 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8443 }
8444
8445
8446
8447
8448
8449 brcms_c_stf_phy_txant_upd(wlc);
8450
8451
8452 err = brcms_c_attach_module(wlc);
8453 if (err != 0)
8454 goto fail;
8455
8456 if (!brcms_c_timers_init(wlc, unit)) {
8457 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8458 __func__);
8459 err = 32;
8460 goto fail;
8461 }
8462
8463
8464 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8465 if (!wlc->cmi) {
8466 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8467 "\n", unit, __func__);
8468 err = 33;
8469 goto fail;
8470 }
8471
8472
8473 brcms_c_bss_default_init(wlc);
8474
8475
8476
8477
8478
8479
8480 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8481 if (wlc->pkt_queue == NULL) {
8482 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8483 unit, __func__);
8484 err = 100;
8485 goto fail;
8486 }
8487
8488 wlc->bsscfg->wlc = wlc;
8489
8490 wlc->mimoft = FT_HT;
8491 wlc->mimo_40txbw = AUTO;
8492 wlc->ofdm_40txbw = AUTO;
8493 wlc->cck_40txbw = AUTO;
8494 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8495
8496
8497 if (BRCMS_SGI_CAP_PHY(wlc)) {
8498 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8499 BRCMS_N_SGI_40));
8500 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8501 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8502 BRCMS_N_SGI_40));
8503 } else {
8504 brcms_c_ht_update_sgi_rx(wlc, 0);
8505 }
8506
8507 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8508
8509 if (perr)
8510 *perr = 0;
8511
8512 return wlc;
8513
8514 fail:
8515 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8516 unit, __func__, err);
8517 if (wlc)
8518 brcms_c_detach(wlc);
8519
8520 if (perr)
8521 *perr = err;
8522 return NULL;
8523}
8524