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28#ifndef _CRYSTALHD_MISC_H_
29#define _CRYSTALHD_MISC_H_
30
31#include <linux/module.h>
32#include <linux/kernel.h>
33#include <linux/errno.h>
34#include <linux/string.h>
35#include <linux/ioctl.h>
36#include <linux/dma-mapping.h>
37#include <linux/sched.h>
38#include <asm/system.h>
39#include "bc_dts_glob_lnx.h"
40
41
42extern uint32_t g_linklog_level;
43
44
45
46
47
48
49#define BC_LINK_ELEM_POOL_SZ ((BC_TX_LIST_CNT * 2) + BC_RX_LIST_CNT + 2 + 4)
50
51
52#define CHD_IODATA_POOL_SZ (BC_IOCTL_DATA_POOL_SIZE * BC_LINK_MAX_OPENS)
53
54
55#define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT)
56
57enum crystalhd_dio_sig {
58 crystalhd_dio_inv = 0,
59 crystalhd_dio_locked,
60 crystalhd_dio_sg_mapped,
61};
62
63struct crystalhd_dio_user_info {
64 void *xfr_buff;
65 uint32_t xfr_len;
66 uint32_t uv_offset;
67 bool dir_tx;
68
69 uint32_t uv_sg_ix;
70 uint32_t uv_sg_off;
71 int comp_sts;
72 int ev_sts;
73 uint32_t y_done_sz;
74 uint32_t uv_done_sz;
75 uint32_t comp_flags;
76 bool b422mode;
77};
78
79struct crystalhd_dio_req {
80 uint32_t sig;
81 uint32_t max_pages;
82 struct page **pages;
83 struct scatterlist *sg;
84 int sg_cnt;
85 int page_cnt;
86 int direction;
87 struct crystalhd_dio_user_info uinfo;
88 void *fb_va;
89 uint32_t fb_size;
90 dma_addr_t fb_pa;
91 struct crystalhd_dio_req *next;
92};
93
94#define BC_LINK_DIOQ_SIG (0x09223280)
95
96struct crystalhd_elem {
97 struct crystalhd_elem *flink;
98 struct crystalhd_elem *blink;
99 void *data;
100 uint32_t tag;
101};
102
103typedef void (*crystalhd_data_free_cb)(void *context, void *data);
104
105struct crystalhd_dioq {
106 uint32_t sig;
107 struct crystalhd_adp *adp;
108 struct crystalhd_elem *head;
109 struct crystalhd_elem *tail;
110 uint32_t count;
111 spinlock_t lock;
112 wait_queue_head_t event;
113 crystalhd_data_free_cb data_rel_cb;
114 void *cb_context;
115};
116
117typedef void (*hw_comp_callback)(struct crystalhd_dio_req *,
118 wait_queue_head_t *event, enum BC_STATUS sts);
119
120
121uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t);
122void bc_dec_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
123
124
125uint32_t crystalhd_reg_rd(struct crystalhd_adp *, uint32_t);
126void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
127
128
129enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
130enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
131
132
133enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
134enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t);
135
136
137void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *);
138void bc_kern_dma_free(struct crystalhd_adp *, uint32_t,
139 void *, dma_addr_t);
140#define crystalhd_create_event(_ev) init_waitqueue_head(_ev)
141#define crystalhd_set_event(_ev) wake_up_interruptible(_ev)
142#define crystalhd_wait_on_event(ev, condition, timeout, ret, nosig) \
143do { \
144 DECLARE_WAITQUEUE(entry, current); \
145 unsigned long end = jiffies + ((timeout * HZ) / 1000); \
146 ret = 0; \
147 add_wait_queue(ev, &entry); \
148 for (;;) { \
149 __set_current_state(TASK_INTERRUPTIBLE); \
150 if (condition) { \
151 break; \
152 } \
153 if (time_after_eq(jiffies, end)) { \
154 ret = -EBUSY; \
155 break; \
156 } \
157 schedule_timeout((HZ / 100 > 1) ? HZ / 100 : 1); \
158 if (!nosig && signal_pending(current)) { \
159 ret = -EINTR; \
160 break; \
161 } \
162 } \
163 __set_current_state(TASK_RUNNING); \
164 remove_wait_queue(ev, &entry); \
165} while (0)
166
167
168extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t);
169extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *);
170extern enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t,
171 uint32_t, bool, bool, struct crystalhd_dio_req**);
172
173extern enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, struct crystalhd_dio_req*);
174#define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix])))
175#define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix])))
176
177
178extern enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, struct crystalhd_dioq **, crystalhd_data_free_cb , void *);
179extern void crystalhd_delete_dioq(struct crystalhd_adp *, struct crystalhd_dioq *);
180extern enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data, bool wake, uint32_t tag);
181extern void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq);
182extern void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag);
183extern void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs, uint32_t *sig_pend);
184
185#define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0)
186
187extern int crystalhd_create_elem_pool(struct crystalhd_adp *, uint32_t);
188extern void crystalhd_delete_elem_pool(struct crystalhd_adp *);
189
190
191
192extern void crystalhd_show_buffer(uint32_t off, uint8_t *buff, uint32_t dwcount);
193
194enum _chd_log_levels {
195 BCMLOG_ERROR = 0x80000000,
196 BCMLOG_DATA = 0x40000000,
197 BCMLOG_SPINLOCK = 0x20000000,
198
199
200 BCMLOG_INFO = 0x00000001,
201 BCMLOG_DBG = 0x00000002,
202 BCMLOG_SSTEP = 0x00000004,
203 BCMLOG_ENTER_LEAVE = 0x00000008,
204};
205
206#define BCMLOG_ENTER \
207if (g_linklog_level & BCMLOG_ENTER_LEAVE) { \
208 printk(KERN_DEBUG "Entered %s\n", __func__); \
209}
210
211#define BCMLOG_LEAVE \
212if (g_linklog_level & BCMLOG_ENTER_LEAVE) { \
213 printk(KERN_DEBUG "Leaving %s\n", __func__); \
214}
215
216#define BCMLOG(trace, fmt, args...) \
217if (g_linklog_level & trace) { \
218 printk(fmt, ##args); \
219}
220
221#define BCMLOG_ERR(fmt, args...) \
222do { \
223 if (g_linklog_level & BCMLOG_ERROR) { \
224 printk(KERN_ERR "*ERR*:%s:%d: "fmt, __FILE__, __LINE__, ##args); \
225 } \
226} while (0);
227
228#endif
229
