LXR linux/drivers/usb/musb/musb

   1/*
   2 * MUSB OTG driver defines
   3 *
   4 * Copyright 2005 Mentor Graphics Corporation
   5 * Copyright (C) 2005-2006 by Texas Instruments
   6 * Copyright (C) 2006-2007 Nokia Corporation
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License
  10 * version 2 as published by the Free Software Foundation.
  11 *
  12 * This program is distributed in the hope that it will be useful, but
  13 * WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20 * 02110-1301 USA
  21 *
  22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 *
  33 */
  34
  35#ifndef __MUSB_CORE_H__
  36#define __MUSB_CORE_H__
  37
  38#include <linux/slab.h>
  39#include <linux/list.h>
  40#include <linux/interrupt.h>
  41#include <linux/errno.h>
  42#include <linux/timer.h>
  43#include <linux/device.h>
  44#include <linux/usb/ch9.h>
  45#include <linux/usb/gadget.h>
  46#include <linux/usb.h>
  47#include <linux/usb/otg.h>
  48#include <linux/usb/musb.h>
  49
  50struct musb;
  51struct musb_hw_ep;
  52struct musb_ep;
  53
  54/* Helper defines for struct musb->hwvers */
  55#define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  56#define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  57#define MUSB_HWVERS_RC          0x8000
  58#define MUSB_HWVERS_1300        0x52C
  59#define MUSB_HWVERS_1400        0x590
  60#define MUSB_HWVERS_1800        0x720
  61#define MUSB_HWVERS_1900        0x784
  62#define MUSB_HWVERS_2000        0x800
  63
  64#include "musb_debug.h"
  65#include "musb_dma.h"
  66
  67#include "musb_io.h"
  68#include "musb_regs.h"
  69
  70#include "musb_gadget.h"
  71#include <linux/usb/hcd.h>
  72#include "musb_host.h"
  73
  74#define is_peripheral_enabled(musb)     ((musb)->board_mode != MUSB_HOST)
  75#define is_host_enabled(musb)           ((musb)->board_mode != MUSB_PERIPHERAL)
  76#define is_otg_enabled(musb)            ((musb)->board_mode == MUSB_OTG)
  77
  78/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  79 * OTG or host-only go to A_IDLE when ID is sensed.
  80 */
  81#define is_peripheral_active(m)         (!(m)->is_host)
  82#define is_host_active(m)               ((m)->is_host)
  83
  84#ifndef CONFIG_HAVE_CLK
  85/* Dummy stub for clk framework */
  86#define clk_get(dev, id)        NULL
  87#define clk_put(clock)          do {} while (0)
  88#define clk_enable(clock)       do {} while (0)
  89#define clk_disable(clock)      do {} while (0)
  90#endif
  91
  92#ifdef CONFIG_PROC_FS
  93#include <linux/fs.h>
  94#define MUSB_CONFIG_PROC_FS
  95#endif
  96
  97/****************************** PERIPHERAL ROLE *****************************/
  98
  99#define is_peripheral_capable() (1)
 100
 101extern irqreturn_t musb_g_ep0_irq(struct musb *);
 102extern void musb_g_tx(struct musb *, u8);
 103extern void musb_g_rx(struct musb *, u8);
 104extern void musb_g_reset(struct musb *);
 105extern void musb_g_suspend(struct musb *);
 106extern void musb_g_resume(struct musb *);
 107extern void musb_g_wakeup(struct musb *);
 108extern void musb_g_disconnect(struct musb *);
 109
 110/****************************** HOST ROLE ***********************************/
 111
 112#define is_host_capable()       (1)
 113
 114extern irqreturn_t musb_h_ep0_irq(struct musb *);
 115extern void musb_host_tx(struct musb *, u8);
 116extern void musb_host_rx(struct musb *, u8);
 117
 118/****************************** CONSTANTS ********************************/
 119
 120#ifndef MUSB_C_NUM_EPS
 121#define MUSB_C_NUM_EPS ((u8)16)
 122#endif
 123
 124#ifndef MUSB_MAX_END0_PACKET
 125#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
 126#endif
 127
 128/* host side ep0 states */
 129enum musb_h_ep0_state {
 130        MUSB_EP0_IDLE,
 131        MUSB_EP0_START,                 /* expect ack of setup */
 132        MUSB_EP0_IN,                    /* expect IN DATA */
 133        MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
 134        MUSB_EP0_STATUS,                /* expect ack of STATUS */
 135} __attribute__ ((packed));
 136
 137/* peripheral side ep0 states */
 138enum musb_g_ep0_state {
 139        MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
 140        MUSB_EP0_STAGE_SETUP,           /* received SETUP */
 141        MUSB_EP0_STAGE_TX,              /* IN data */
 142        MUSB_EP0_STAGE_RX,              /* OUT data */
 143        MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
 144        MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
 145        MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
 146} __attribute__ ((packed));
 147
 148/*
 149 * OTG protocol constants.  See USB OTG 1.3 spec,
 150 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 151 */
 152#define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
 153#define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
 154#define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
 155#define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
 156
 157
 158/*************************** REGISTER ACCESS ********************************/
 159
 160/* Endpoint registers (other than dynfifo setup) can be accessed either
 161 * directly with the "flat" model, or after setting up an index register.
 162 */
 163
 164#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
 165                || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
 166                || defined(CONFIG_ARCH_OMAP4)
 167/* REVISIT indexed access seemed to
 168 * misbehave (on DaVinci) for at least peripheral IN ...
 169 */
 170#define MUSB_FLAT_REG
 171#endif
 172
 173/* TUSB mapping: "flat" plus ep0 special cases */
 174#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 175        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 176#define musb_ep_select(_mbase, _epnum) \
 177        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 178#define MUSB_EP_OFFSET                  MUSB_TUSB_OFFSET
 179
 180/* "flat" mapping: each endpoint has its own i/o address */
 181#elif   defined(MUSB_FLAT_REG)
 182#define musb_ep_select(_mbase, _epnum)  (((void)(_mbase)), ((void)(_epnum)))
 183#define MUSB_EP_OFFSET                  MUSB_FLAT_OFFSET
 184
 185/* "indexed" mapping: INDEX register controls register bank select */
 186#else
 187#define musb_ep_select(_mbase, _epnum) \
 188        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 189#define MUSB_EP_OFFSET                  MUSB_INDEXED_OFFSET
 190#endif
 191
 192/****************************** FUNCTIONS ********************************/
 193
 194#define MUSB_HST_MODE(_musb)\
 195        { (_musb)->is_host = true; }
 196#define MUSB_DEV_MODE(_musb) \
 197        { (_musb)->is_host = false; }
 198
 199#define test_devctl_hst_mode(_x) \
 200        (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 201
 202#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 203
 204/******************************** TYPES *************************************/
 205
 206/**
 207 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 208 * @init:       turns on clocks, sets up platform-specific registers, etc
 209 * @exit:       undoes @init
 210 * @set_mode:   forcefully changes operating mode
 211 * @try_ilde:   tries to idle the IP
 212 * @vbus_status: returns vbus status if possible
 213 * @set_vbus:   forces vbus status
 214 * @adjust_channel_params: pre check for standard dma channel_program func
 215 */
 216struct musb_platform_ops {
 217        int     (*init)(struct musb *musb);
 218        int     (*exit)(struct musb *musb);
 219
 220        void    (*enable)(struct musb *musb);
 221        void    (*disable)(struct musb *musb);
 222
 223        int     (*set_mode)(struct musb *musb, u8 mode);
 224        void    (*try_idle)(struct musb *musb, unsigned long timeout);
 225
 226        int     (*vbus_status)(struct musb *musb);
 227        void    (*set_vbus)(struct musb *musb, int on);
 228
 229        int     (*adjust_channel_params)(struct dma_channel *channel,
 230                                u16 packet_sz, u8 *mode,
 231                                dma_addr_t *dma_addr, u32 *len);
 232};
 233
 234/*
 235 * struct musb_hw_ep - endpoint hardware (bidirectional)
 236 *
 237 * Ordered slightly for better cacheline locality.
 238 */
 239struct musb_hw_ep {
 240        struct musb             *musb;
 241        void __iomem            *fifo;
 242        void __iomem            *regs;
 243
 244#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 245        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 246        void __iomem            *conf;
 247#endif
 248
 249        /* index in musb->endpoints[]  */
 250        u8                      epnum;
 251
 252        /* hardware configuration, possibly dynamic */
 253        bool                    is_shared_fifo;
 254        bool                    tx_double_buffered;
 255        bool                    rx_double_buffered;
 256        u16                     max_packet_sz_tx;
 257        u16                     max_packet_sz_rx;
 258
 259        struct dma_channel      *tx_channel;
 260        struct dma_channel      *rx_channel;
 261
 262#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 263        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 264        /* TUSB has "asynchronous" and "synchronous" dma modes */
 265        dma_addr_t              fifo_async;
 266        dma_addr_t              fifo_sync;
 267        void __iomem            *fifo_sync_va;
 268#endif
 269
 270        void __iomem            *target_regs;
 271
 272        /* currently scheduled peripheral endpoint */
 273        struct musb_qh          *in_qh;
 274        struct musb_qh          *out_qh;
 275
 276        u8                      rx_reinit;
 277        u8                      tx_reinit;
 278
 279        /* peripheral side */
 280        struct musb_ep          ep_in;                  /* TX */
 281        struct musb_ep          ep_out;                 /* RX */
 282};
 283
 284static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 285{
 286        return next_request(&hw_ep->ep_in);
 287}
 288
 289static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 290{
 291        return next_request(&hw_ep->ep_out);
 292}
 293
 294struct musb_csr_regs {
 295        /* FIFO registers */
 296        u16 txmaxp, txcsr, rxmaxp, rxcsr;
 297        u16 rxfifoadd, txfifoadd;
 298        u8 txtype, txinterval, rxtype, rxinterval;
 299        u8 rxfifosz, txfifosz;
 300        u8 txfunaddr, txhubaddr, txhubport;
 301        u8 rxfunaddr, rxhubaddr, rxhubport;
 302};
 303
 304struct musb_context_registers {
 305
 306        u8 power;
 307        u16 intrtxe, intrrxe;
 308        u8 intrusbe;
 309        u16 frame;
 310        u8 index, testmode;
 311
 312        u8 devctl, busctl, misc;
 313        u32 otg_interfsel;
 314
 315        struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 316};
 317
 318/*
 319 * struct musb - Driver instance data.
 320 */
 321struct musb {
 322        /* device lock */
 323        spinlock_t              lock;
 324
 325        const struct musb_platform_ops *ops;
 326        struct musb_context_registers context;
 327
 328        irqreturn_t             (*isr)(int, void *);
 329        struct work_struct      irq_work;
 330        struct work_struct      otg_notifier_work;
 331        u16                     hwvers;
 332
 333/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 334#define MUSB_PORT_STAT_RESUME   (1 << 31)
 335
 336        u32                     port1_status;
 337
 338        unsigned long           rh_timer;
 339
 340        enum musb_h_ep0_state   ep0_stage;
 341
 342        /* bulk traffic normally dedicates endpoint hardware, and each
 343         * direction has its own ring of host side endpoints.
 344         * we try to progress the transfer at the head of each endpoint's
 345         * queue until it completes or NAKs too much; then we try the next
 346         * endpoint.
 347         */
 348        struct musb_hw_ep       *bulk_ep;
 349
 350        struct list_head        control;        /* of musb_qh */
 351        struct list_head        in_bulk;        /* of musb_qh */
 352        struct list_head        out_bulk;       /* of musb_qh */
 353
 354        struct timer_list       otg_timer;
 355        struct notifier_block   nb;
 356
 357        struct dma_controller   *dma_controller;
 358
 359        struct device           *controller;
 360        void __iomem            *ctrl_base;
 361        void __iomem            *mregs;
 362
 363#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 364        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 365        dma_addr_t              async;
 366        dma_addr_t              sync;
 367        void __iomem            *sync_va;
 368#endif
 369
 370        /* passed down from chip/board specific irq handlers */
 371        u8                      int_usb;
 372        u16                     int_rx;
 373        u16                     int_tx;
 374
 375        struct otg_transceiver  *xceiv;
 376        u8                      xceiv_event;
 377
 378        int nIrq;
 379        unsigned                irq_wake:1;
 380
 381        struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 382#define control_ep              endpoints
 383
 384#define VBUSERR_RETRY_COUNT     3
 385        u16                     vbuserr_retry;
 386        u16 epmask;
 387        u8 nr_endpoints;
 388
 389        u8 board_mode;          /* enum musb_mode */
 390        int                     (*board_set_power)(int state);
 391
 392        u8                      min_power;      /* vbus for periph, in mA/2 */
 393
 394        bool                    is_host;
 395
 396        int                     a_wait_bcon;    /* VBUS timeout in msecs */
 397        unsigned long           idle_timeout;   /* Next timeout in jiffies */
 398
 399        /* active means connected and not suspended */
 400        unsigned                is_active:1;
 401
 402        unsigned is_multipoint:1;
 403        unsigned ignore_disconnect:1;   /* during bus resets */
 404
 405        unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 406        unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 407        unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 408
 409        unsigned                bulk_split:1;
 410#define can_bulk_split(musb,type) \
 411        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 412
 413        unsigned                bulk_combine:1;
 414#define can_bulk_combine(musb,type) \
 415        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 416
 417        /* is_suspended means USB B_PERIPHERAL suspend */
 418        unsigned                is_suspended:1;
 419
 420        /* may_wakeup means remote wakeup is enabled */
 421        unsigned                may_wakeup:1;
 422
 423        /* is_self_powered is reported in device status and the
 424         * config descriptor.  is_bus_powered means B_PERIPHERAL
 425         * draws some VBUS current; both can be true.
 426         */
 427        unsigned                is_self_powered:1;
 428        unsigned                is_bus_powered:1;
 429
 430        unsigned                set_address:1;
 431        unsigned                test_mode:1;
 432        unsigned                softconnect:1;
 433
 434        u8                      address;
 435        u8                      test_mode_nr;
 436        u16                     ackpend;                /* ep0 */
 437        enum musb_g_ep0_state   ep0_state;
 438        struct usb_gadget       g;                      /* the gadget */
 439        struct usb_gadget_driver *gadget_driver;        /* its driver */
 440
 441        /*
 442         * FIXME: Remove this flag.
 443         *
 444         * This is only added to allow Blackfin to work
 445         * with current driver. For some unknown reason
 446         * Blackfin doesn't work with double buffering
 447         * and that's enabled by default.
 448         *
 449         * We added this flag to forcefully disable double
 450         * buffering until we get it working.
 451         */
 452        unsigned                double_buffer_not_ok:1 __deprecated;
 453
 454        struct musb_hdrc_config *config;
 455
 456#ifdef MUSB_CONFIG_PROC_FS
 457        struct proc_dir_entry *proc_entry;
 458#endif
 459};
 460
 461static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 462{
 463        return container_of(g, struct musb, g);
 464}
 465
 466#ifdef CONFIG_BLACKFIN
 467static inline int musb_read_fifosize(struct musb *musb,
 468                struct musb_hw_ep *hw_ep, u8 epnum)
 469{
 470        musb->nr_endpoints++;
 471        musb->epmask |= (1 << epnum);
 472
 473        if (epnum < 5) {
 474                hw_ep->max_packet_sz_tx = 128;
 475                hw_ep->max_packet_sz_rx = 128;
 476        } else {
 477                hw_ep->max_packet_sz_tx = 1024;
 478                hw_ep->max_packet_sz_rx = 1024;
 479        }
 480        hw_ep->is_shared_fifo = false;
 481
 482        return 0;
 483}
 484
 485static inline void musb_configure_ep0(struct musb *musb)
 486{
 487        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 488        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 489        musb->endpoints[0].is_shared_fifo = true;
 490}
 491
 492#else
 493
 494static inline int musb_read_fifosize(struct musb *musb,
 495                struct musb_hw_ep *hw_ep, u8 epnum)
 496{
 497        void *mbase = musb->mregs;
 498        u8 reg = 0;
 499
 500        /* read from core using indexed model */
 501        reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
 502        /* 0's returned when no more endpoints */
 503        if (!reg)
 504                return -ENODEV;
 505
 506        musb->nr_endpoints++;
 507        musb->epmask |= (1 << epnum);
 508
 509        hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 510
 511        /* shared TX/RX FIFO? */
 512        if ((reg & 0xf0) == 0xf0) {
 513                hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 514                hw_ep->is_shared_fifo = true;
 515                return 0;
 516        } else {
 517                hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 518                hw_ep->is_shared_fifo = false;
 519        }
 520
 521        return 0;
 522}
 523
 524static inline void musb_configure_ep0(struct musb *musb)
 525{
 526        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 527        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 528        musb->endpoints[0].is_shared_fifo = true;
 529}
 530#endif /* CONFIG_BLACKFIN */
 531
 532
 533/***************************** Glue it together *****************************/
 534
 535extern const char musb_driver_name[];
 536
 537extern void musb_start(struct musb *musb);
 538extern void musb_stop(struct musb *musb);
 539
 540extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 541extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 542
 543extern void musb_load_testpacket(struct musb *);
 544
 545extern irqreturn_t musb_interrupt(struct musb *);
 546
 547extern void musb_hnp_stop(struct musb *musb);
 548
 549static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 550{
 551        if (musb->ops->set_vbus)
 552                musb->ops->set_vbus(musb, is_on);
 553}
 554
 555static inline void musb_platform_enable(struct musb *musb)
 556{
 557        if (musb->ops->enable)
 558                musb->ops->enable(musb);
 559}
 560
 561static inline void musb_platform_disable(struct musb *musb)
 562{
 563        if (musb->ops->disable)
 564                musb->ops->disable(musb);
 565}
 566
 567static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 568{
 569        if (!musb->ops->set_mode)
 570                return 0;
 571
 572        return musb->ops->set_mode(musb, mode);
 573}
 574
 575static inline void musb_platform_try_idle(struct musb *musb,
 576                unsigned long timeout)
 577{
 578        if (musb->ops->try_idle)
 579                musb->ops->try_idle(musb, timeout);
 580}
 581
 582static inline int musb_platform_get_vbus_status(struct musb *musb)
 583{
 584        if (!musb->ops->vbus_status)
 585                return 0;
 586
 587        return musb->ops->vbus_status(musb);
 588}
 589
 590static inline int musb_platform_init(struct musb *musb)
 591{
 592        if (!musb->ops->init)
 593                return -EINVAL;
 594
 595        return musb->ops->init(musb);
 596}
 597
 598static inline int musb_platform_exit(struct musb *musb)
 599{
 600        if (!musb->ops->exit)
 601                return -EINVAL;
 602
 603        return musb->ops->exit(musb);
 604}
 605
 606#endif  /* __MUSB_CORE_H__ */
 607