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20#ifndef __OMAP2_DSS_FEATURES_H
21#define __OMAP2_DSS_FEATURES_H
22
23#if defined(CONFIG_OMAP4_DSS_HDMI)
24#include "ti_hdmi.h"
25#endif
26
27#define MAX_DSS_MANAGERS 3
28#define MAX_DSS_OVERLAYS 4
29#define MAX_DSS_LCD_MANAGERS 2
30#define MAX_NUM_DSI 2
31
32
33enum dss_feat_id {
34 FEAT_LCDENABLEPOL = 1 << 3,
35 FEAT_LCDENABLESIGNAL = 1 << 4,
36 FEAT_PCKFREEENABLE = 1 << 5,
37 FEAT_FUNCGATED = 1 << 6,
38 FEAT_MGR_LCD2 = 1 << 7,
39 FEAT_LINEBUFFERSPLIT = 1 << 8,
40 FEAT_ROWREPEATENABLE = 1 << 9,
41 FEAT_RESIZECONF = 1 << 10,
42
43 FEAT_CORE_CLK_DIV = 1 << 11,
44 FEAT_LCD_CLK_SRC = 1 << 12,
45
46 FEAT_DSI_PLL_PWR_BUG = 1 << 13,
47 FEAT_DSI_PLL_FREQSEL = 1 << 14,
48 FEAT_DSI_DCS_CMD_CONFIG_VC = 1 << 15,
49 FEAT_DSI_VC_OCP_WIDTH = 1 << 16,
50 FEAT_DSI_REVERSE_TXCLKESC = 1 << 17,
51 FEAT_DSI_GNQ = 1 << 18,
52 FEAT_HDMI_CTS_SWMODE = 1 << 19,
53 FEAT_HANDLE_UV_SEPARATE = 1 << 20,
54 FEAT_ATTR2 = 1 << 21,
55 FEAT_VENC_REQUIRES_TV_DAC_CLK = 1 << 22,
56 FEAT_CPR = 1 << 23,
57 FEAT_PRELOAD = 1 << 24,
58 FEAT_FIR_COEF_V = 1 << 25,
59 FEAT_ALPHA_FIXED_ZORDER = 1 << 26,
60 FEAT_ALPHA_FREE_ZORDER = 1 << 27,
61};
62
63
64enum dss_feat_reg_field {
65 FEAT_REG_FIRHINC,
66 FEAT_REG_FIRVINC,
67 FEAT_REG_FIFOHIGHTHRESHOLD,
68 FEAT_REG_FIFOLOWTHRESHOLD,
69 FEAT_REG_FIFOSIZE,
70 FEAT_REG_HORIZONTALACCU,
71 FEAT_REG_VERTICALACCU,
72 FEAT_REG_DISPC_CLK_SWITCH,
73 FEAT_REG_DSIPLL_REGN,
74 FEAT_REG_DSIPLL_REGM,
75 FEAT_REG_DSIPLL_REGM_DISPC,
76 FEAT_REG_DSIPLL_REGM_DSI,
77};
78
79enum dss_range_param {
80 FEAT_PARAM_DSS_FCK,
81 FEAT_PARAM_DSS_PCD,
82 FEAT_PARAM_DSIPLL_REGN,
83 FEAT_PARAM_DSIPLL_REGM,
84 FEAT_PARAM_DSIPLL_REGM_DISPC,
85 FEAT_PARAM_DSIPLL_REGM_DSI,
86 FEAT_PARAM_DSIPLL_FINT,
87 FEAT_PARAM_DSIPLL_LPDIV,
88 FEAT_PARAM_DOWNSCALE,
89 FEAT_PARAM_LINEWIDTH,
90};
91
92
93int dss_feat_get_num_mgrs(void);
94int dss_feat_get_num_ovls(void);
95unsigned long dss_feat_get_param_min(enum dss_range_param param);
96unsigned long dss_feat_get_param_max(enum dss_range_param param);
97enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
98enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
99enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
100bool dss_feat_color_mode_supported(enum omap_plane plane,
101 enum omap_color_mode color_mode);
102const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
103
104u32 dss_feat_get_buffer_size_unit(void);
105u32 dss_feat_get_burst_size_unit(void);
106
107bool dss_has_feature(enum dss_feat_id id);
108void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
109void dss_features_init(void);
110#if defined(CONFIG_OMAP4_DSS_HDMI)
111void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data);
112#endif
113#endif
114