LXR linux/arch/h8300/platform/h8300h/generic/crt0

   1/*
   2 *  linux/arch/h8300/platform/h8300h/generic/crt0_rom.S
   3 *
   4 *  Yoshinori Sato <ysato@users.sourceforge.jp>
   5 *
   6 *  Platform depend startup
   7 *  Target Archtecture: generic
   8 *  Memory Layout     : ROM
   9 */
  10
  11#define ASSEMBLY
  12
  13#include <asm/linkage.h>
  14        
  15        .global SYMBOL_NAME(_start)
  16        .global SYMBOL_NAME(_command_line)
  17        .global SYMBOL_NAME(_platform_gpio_table)
  18        .global SYMBOL_NAME(_target_name)
  19        
  20        .h8300h
  21        .section .text
  22        .file   "crt0_rom.S"
  23
  24        /* CPU Reset entry */
  25SYMBOL_NAME_LABEL(_start)
  26        mov.l   #__ramend,sp
  27        ldc     #0x80,ccr
  28
  29        /* Peripheral Setup */
  30        
  31        /* .bss clear */
  32        mov.l   #__sbss,er5
  33        mov.l   #__ebss,er4
  34        sub.l   er5,er4
  35        shlr    er4
  36        shlr    er4
  37        sub.l   er0,er0
  381:      
  39        mov.l   er0,@er5
  40        adds    #4,er5
  41        dec.l   #1,er4
  42        bne     1b
  43
  44        /* copy .data */
  45#if !defined(CONFIG_H8300H_SIM)
  46        /* copy .data */
  47        mov.l   #__begin_data,er5
  48        mov.l   #__sdata,er6
  49        mov.l   #__edata,er4
  50        sub.l   er6,er4
  51        shlr.l  er4
  52        shlr.l  er4
  531:      
  54        mov.l   @er5+,er0
  55        mov.l   er0,@er6
  56        adds    #4,er6
  57        dec.l   #1,er4
  58        bne     1b      
  59#endif
  60
  61        /* copy kernel commandline */
  62        mov.l   #COMMAND_START,er5
  63        mov.l   #SYMBOL_NAME(_command_line),er6
  64        mov.w   #512,r4
  65        eepmov.w
  66
  67        /* linux kernel start */
  68        ldc     #0x90,ccr       /* running kernel */
  69        mov.l   #SYMBOL_NAME(init_thread_union),sp
  70        add.l   #0x2000,sp
  71        jsr     @_start_kernel
  72_exit:
  73
  74        jmp     _exit
  75
  76        rts
  77
  78        /* I/O port assign information */
  79__platform_gpio_table:  
  80        mov.l   #gpio_table,er0
  81        rts
  82
  83gpio_table:
  84        ;; P1DDR
  85        .byte   0x00,0x00
  86        ;; P2DDR
  87        .byte   0x00,0x00
  88        ;; P3DDR
  89        .byte   0x00,0x00
  90        ;; P4DDR
  91        .byte   0x00,0x00
  92        ;; P5DDR
  93        .byte   0x00,0x00
  94        ;; P6DDR
  95        .byte   0x00,0x00
  96        ;; dummy
  97        .byte   0x00,0x00
  98        ;; P8DDR
  99        .byte   0x00,0x00
 100        ;; P9DDR
 101        .byte   0x00,0x00
 102        ;; PADDR
 103        .byte   0x00,0x00
 104        ;; PBDDR
 105        .byte   0x00,0x00
 106
 107        .section .rodata
 108__target_name:  
 109        .asciz  "generic"
 110        
 111        .section .bss
 112__command_line: 
 113        .space  512
 114
 115        /* interrupt vector */
 116        .section .vectors,"ax"
 117        .long   __start
 118vector  =       1
 119        .rept   64-1
 120        .long   _interrupt_redirect_table+vector*4
 121vector  =       vector + 1
 122        .endr
 123