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21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23#include <linux/firmware.h>
24#include <linux/pci_ids.h>
25#include <linux/uaccess.h>
26#include <linux/vmalloc.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30
31#include <asm/microcode.h>
32#include <asm/processor.h>
33#include <asm/msr.h>
34
35MODULE_DESCRIPTION("AMD Microcode Update Driver");
36MODULE_AUTHOR("Peter Oruba");
37MODULE_LICENSE("GPL v2");
38
39#define UCODE_MAGIC 0x00414d44
40#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
41#define UCODE_UCODE_TYPE 0x00000001
42
43struct equiv_cpu_entry {
44 u32 installed_cpu;
45 u32 fixed_errata_mask;
46 u32 fixed_errata_compare;
47 u16 equiv_cpu;
48 u16 res;
49} __attribute__((packed));
50
51struct microcode_header_amd {
52 u32 data_code;
53 u32 patch_id;
54 u16 mc_patch_data_id;
55 u8 mc_patch_data_len;
56 u8 init_flag;
57 u32 mc_patch_data_checksum;
58 u32 nb_dev_id;
59 u32 sb_dev_id;
60 u16 processor_rev_id;
61 u8 nb_rev_id;
62 u8 sb_rev_id;
63 u8 bios_api_rev;
64 u8 reserved1[3];
65 u32 match_reg[8];
66} __attribute__((packed));
67
68struct microcode_amd {
69 struct microcode_header_amd hdr;
70 unsigned int mpb[0];
71};
72
73#define SECTION_HDR_SIZE 8
74#define CONTAINER_HDR_SZ 12
75
76static struct equiv_cpu_entry *equiv_cpu_table;
77
78
79void *patch;
80
81static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
82{
83 struct cpuinfo_x86 *c = &cpu_data(cpu);
84
85 csig->rev = c->microcode;
86 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
87
88 return 0;
89}
90
91static unsigned int verify_ucode_size(int cpu, u32 patch_size,
92 unsigned int size)
93{
94 struct cpuinfo_x86 *c = &cpu_data(cpu);
95 u32 max_size;
96
97#define F1XH_MPB_MAX_SIZE 2048
98#define F14H_MPB_MAX_SIZE 1824
99#define F15H_MPB_MAX_SIZE 4096
100
101 switch (c->x86) {
102 case 0x14:
103 max_size = F14H_MPB_MAX_SIZE;
104 break;
105 case 0x15:
106 max_size = F15H_MPB_MAX_SIZE;
107 break;
108 default:
109 max_size = F1XH_MPB_MAX_SIZE;
110 break;
111 }
112
113 if (patch_size > min_t(u32, size, max_size)) {
114 pr_err("patch size mismatch\n");
115 return 0;
116 }
117
118 return patch_size;
119}
120
121static u16 find_equiv_id(void)
122{
123 unsigned int current_cpu_id, i = 0;
124
125 BUG_ON(equiv_cpu_table == NULL);
126
127 current_cpu_id = cpuid_eax(0x00000001);
128
129 while (equiv_cpu_table[i].installed_cpu != 0) {
130 if (current_cpu_id == equiv_cpu_table[i].installed_cpu)
131 return equiv_cpu_table[i].equiv_cpu;
132
133 i++;
134 }
135 return 0;
136}
137
138
139
140
141static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
142 unsigned int leftover_size, int rev,
143 unsigned int *current_size)
144{
145 struct microcode_header_amd *mc_hdr;
146 unsigned int actual_size;
147 u16 equiv_cpu_id;
148
149
150 *current_size = *(u32 *)(ucode_ptr + 4) + SECTION_HDR_SIZE;
151
152 equiv_cpu_id = find_equiv_id();
153 if (!equiv_cpu_id)
154 return 0;
155
156
157
158
159 mc_hdr = (struct microcode_header_amd *)(ucode_ptr + SECTION_HDR_SIZE);
160
161 if (mc_hdr->processor_rev_id != equiv_cpu_id)
162 return 0;
163
164
165 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
166 pr_err("CPU%d: chipset specific code not yet supported\n",
167 cpu);
168 return 0;
169 }
170
171 if (mc_hdr->patch_id <= rev)
172 return 0;
173
174
175
176
177 actual_size = verify_ucode_size(cpu, *current_size, leftover_size);
178 if (!actual_size)
179 return 0;
180
181
182 memset(patch, 0, PAGE_SIZE);
183
184
185 get_ucode_data(patch, ucode_ptr + SECTION_HDR_SIZE, actual_size);
186
187 return actual_size;
188}
189
190static int apply_microcode_amd(int cpu)
191{
192 u32 rev, dummy;
193 int cpu_num = raw_smp_processor_id();
194 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
195 struct microcode_amd *mc_amd = uci->mc;
196 struct cpuinfo_x86 *c = &cpu_data(cpu);
197
198
199 BUG_ON(cpu_num != cpu);
200
201 if (mc_amd == NULL)
202 return 0;
203
204 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
205
206 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
207
208
209 if (rev != mc_amd->hdr.patch_id) {
210 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
211 cpu, mc_amd->hdr.patch_id);
212 return -1;
213 }
214
215 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
216 uci->cpu_sig.rev = rev;
217 c->microcode = rev;
218
219 return 0;
220}
221
222static int install_equiv_cpu_table(const u8 *buf)
223{
224 unsigned int *ibuf = (unsigned int *)buf;
225 unsigned int type = ibuf[1];
226 unsigned int size = ibuf[2];
227
228 if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
229 pr_err("empty section/"
230 "invalid type field in container file section header\n");
231 return -EINVAL;
232 }
233
234 equiv_cpu_table = vmalloc(size);
235 if (!equiv_cpu_table) {
236 pr_err("failed to allocate equivalent CPU table\n");
237 return -ENOMEM;
238 }
239
240 get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
241
242
243 return size + CONTAINER_HDR_SZ;
244}
245
246static void free_equiv_cpu_table(void)
247{
248 vfree(equiv_cpu_table);
249 equiv_cpu_table = NULL;
250}
251
252static enum ucode_state
253generic_load_microcode(int cpu, const u8 *data, size_t size)
254{
255 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
256 struct microcode_header_amd *mc_hdr = NULL;
257 unsigned int mc_size, leftover, current_size = 0;
258 int offset;
259 const u8 *ucode_ptr = data;
260 void *new_mc = NULL;
261 unsigned int new_rev = uci->cpu_sig.rev;
262 enum ucode_state state = UCODE_ERROR;
263
264 offset = install_equiv_cpu_table(ucode_ptr);
265 if (offset < 0) {
266 pr_err("failed to create equivalent cpu table\n");
267 goto out;
268 }
269 ucode_ptr += offset;
270 leftover = size - offset;
271
272 if (*(u32 *)ucode_ptr != UCODE_UCODE_TYPE) {
273 pr_err("invalid type field in container file section header\n");
274 goto free_table;
275 }
276
277 while (leftover) {
278 mc_size = get_matching_microcode(cpu, ucode_ptr, leftover,
279 new_rev, ¤t_size);
280 if (mc_size) {
281 mc_hdr = patch;
282 new_mc = patch;
283 new_rev = mc_hdr->patch_id;
284 goto out_ok;
285 }
286
287 ucode_ptr += current_size;
288 leftover -= current_size;
289 }
290
291 if (!new_mc) {
292 state = UCODE_NFOUND;
293 goto free_table;
294 }
295
296out_ok:
297 uci->mc = new_mc;
298 state = UCODE_OK;
299 pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
300 cpu, uci->cpu_sig.rev, new_rev);
301
302free_table:
303 free_equiv_cpu_table();
304
305out:
306 return state;
307}
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324
325static enum ucode_state request_microcode_amd(int cpu, struct device *device)
326{
327 char fw_name[36] = "amd-ucode/microcode_amd.bin";
328 const struct firmware *fw;
329 enum ucode_state ret = UCODE_NFOUND;
330 struct cpuinfo_x86 *c = &cpu_data(cpu);
331
332 if (c->x86 >= 0x15)
333 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
334
335 if (request_firmware(&fw, (const char *)fw_name, device)) {
336 pr_err("failed to load file %s\n", fw_name);
337 goto out;
338 }
339
340 ret = UCODE_ERROR;
341 if (*(u32 *)fw->data != UCODE_MAGIC) {
342 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
343 goto fw_release;
344 }
345
346 ret = generic_load_microcode(cpu, fw->data, fw->size);
347
348fw_release:
349 release_firmware(fw);
350
351out:
352 return ret;
353}
354
355static enum ucode_state
356request_microcode_user(int cpu, const void __user *buf, size_t size)
357{
358 return UCODE_ERROR;
359}
360
361static void microcode_fini_cpu_amd(int cpu)
362{
363 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
364
365 uci->mc = NULL;
366}
367
368static struct microcode_ops microcode_amd_ops = {
369 .request_microcode_user = request_microcode_user,
370 .request_microcode_fw = request_microcode_amd,
371 .collect_cpu_info = collect_cpu_info_amd,
372 .apply_microcode = apply_microcode_amd,
373 .microcode_fini_cpu = microcode_fini_cpu_amd,
374};
375
376struct microcode_ops * __init init_amd_microcode(void)
377{
378 struct cpuinfo_x86 *c = &cpu_data(0);
379
380 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
381 pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
382 return NULL;
383 }
384
385 patch = (void *)get_zeroed_page(GFP_KERNEL);
386 if (!patch)
387 return NULL;
388
389 return µcode_amd_ops;
390}
391
392void __exit exit_amd_microcode(void)
393{
394 free_page((unsigned long)patch);
395}
396
