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36#include "ivtv-driver.h"
37#include "ivtv-fileops.h"
38#include "ivtv-queue.h"
39#include "ivtv-mailbox.h"
40#include "ivtv-ioctl.h"
41#include "ivtv-irq.h"
42#include "ivtv-yuv.h"
43#include "ivtv-cards.h"
44#include "ivtv-streams.h"
45#include "ivtv-firmware.h"
46#include <media/v4l2-event.h>
47
48static const struct v4l2_file_operations ivtv_v4l2_enc_fops = {
49 .owner = THIS_MODULE,
50 .read = ivtv_v4l2_read,
51 .write = ivtv_v4l2_write,
52 .open = ivtv_v4l2_open,
53 .unlocked_ioctl = ivtv_v4l2_ioctl,
54 .release = ivtv_v4l2_close,
55 .poll = ivtv_v4l2_enc_poll,
56};
57
58static const struct v4l2_file_operations ivtv_v4l2_dec_fops = {
59 .owner = THIS_MODULE,
60 .read = ivtv_v4l2_read,
61 .write = ivtv_v4l2_write,
62 .open = ivtv_v4l2_open,
63 .unlocked_ioctl = ivtv_v4l2_ioctl,
64 .release = ivtv_v4l2_close,
65 .poll = ivtv_v4l2_dec_poll,
66};
67
68#define IVTV_V4L2_DEC_MPG_OFFSET 16
69#define IVTV_V4L2_ENC_PCM_OFFSET 24
70#define IVTV_V4L2_ENC_YUV_OFFSET 32
71#define IVTV_V4L2_DEC_YUV_OFFSET 48
72#define IVTV_V4L2_DEC_VBI_OFFSET 8
73#define IVTV_V4L2_DEC_VOUT_OFFSET 16
74
75static struct {
76 const char *name;
77 int vfl_type;
78 int num_offset;
79 int dma, pio;
80 enum v4l2_buf_type buf_type;
81 u32 v4l2_caps;
82 const struct v4l2_file_operations *fops;
83} ivtv_stream_info[] = {
84 {
85 "encoder MPG",
86 VFL_TYPE_GRABBER, 0,
87 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_VIDEO_CAPTURE,
88 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER |
89 V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
90 &ivtv_v4l2_enc_fops
91 },
92 {
93 "encoder YUV",
94 VFL_TYPE_GRABBER, IVTV_V4L2_ENC_YUV_OFFSET,
95 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_VIDEO_CAPTURE,
96 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER |
97 V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
98 &ivtv_v4l2_enc_fops
99 },
100 {
101 "encoder VBI",
102 VFL_TYPE_VBI, 0,
103 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_VBI_CAPTURE,
104 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE | V4L2_CAP_TUNER |
105 V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
106 &ivtv_v4l2_enc_fops
107 },
108 {
109 "encoder PCM",
110 VFL_TYPE_GRABBER, IVTV_V4L2_ENC_PCM_OFFSET,
111 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_PRIVATE,
112 V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
113 &ivtv_v4l2_enc_fops
114 },
115 {
116 "encoder radio",
117 VFL_TYPE_RADIO, 0,
118 PCI_DMA_NONE, 1, V4L2_BUF_TYPE_PRIVATE,
119 V4L2_CAP_RADIO | V4L2_CAP_TUNER,
120 &ivtv_v4l2_enc_fops
121 },
122 {
123 "decoder MPG",
124 VFL_TYPE_GRABBER, IVTV_V4L2_DEC_MPG_OFFSET,
125 PCI_DMA_TODEVICE, 0, V4L2_BUF_TYPE_VIDEO_OUTPUT,
126 V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
127 &ivtv_v4l2_dec_fops
128 },
129 {
130 "decoder VBI",
131 VFL_TYPE_VBI, IVTV_V4L2_DEC_VBI_OFFSET,
132 PCI_DMA_NONE, 1, V4L2_BUF_TYPE_VBI_CAPTURE,
133 V4L2_CAP_SLICED_VBI_CAPTURE | V4L2_CAP_READWRITE,
134 &ivtv_v4l2_enc_fops
135 },
136 {
137 "decoder VOUT",
138 VFL_TYPE_VBI, IVTV_V4L2_DEC_VOUT_OFFSET,
139 PCI_DMA_NONE, 1, V4L2_BUF_TYPE_VBI_OUTPUT,
140 V4L2_CAP_SLICED_VBI_OUTPUT | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
141 &ivtv_v4l2_dec_fops
142 },
143 {
144 "decoder YUV",
145 VFL_TYPE_GRABBER, IVTV_V4L2_DEC_YUV_OFFSET,
146 PCI_DMA_TODEVICE, 0, V4L2_BUF_TYPE_VIDEO_OUTPUT,
147 V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
148 &ivtv_v4l2_dec_fops
149 }
150};
151
152static void ivtv_stream_init(struct ivtv *itv, int type)
153{
154 struct ivtv_stream *s = &itv->streams[type];
155 struct video_device *vdev = s->vdev;
156
157
158 memset(s, 0, sizeof(*s));
159 s->vdev = vdev;
160
161
162 s->itv = itv;
163 s->type = type;
164 s->name = ivtv_stream_info[type].name;
165 s->caps = ivtv_stream_info[type].v4l2_caps;
166
167 if (ivtv_stream_info[type].pio)
168 s->dma = PCI_DMA_NONE;
169 else
170 s->dma = ivtv_stream_info[type].dma;
171 s->buf_size = itv->stream_buf_size[type];
172 if (s->buf_size)
173 s->buffers = (itv->options.kilobytes[type] * 1024 + s->buf_size - 1) / s->buf_size;
174 spin_lock_init(&s->qlock);
175 init_waitqueue_head(&s->waitq);
176 s->sg_handle = IVTV_DMA_UNMAPPED;
177 ivtv_queue_init(&s->q_free);
178 ivtv_queue_init(&s->q_full);
179 ivtv_queue_init(&s->q_dma);
180 ivtv_queue_init(&s->q_predma);
181 ivtv_queue_init(&s->q_io);
182}
183
184static int ivtv_prep_dev(struct ivtv *itv, int type)
185{
186 struct ivtv_stream *s = &itv->streams[type];
187 int num_offset = ivtv_stream_info[type].num_offset;
188 int num = itv->instance + ivtv_first_minor + num_offset;
189
190
191
192
193 s->vdev = NULL;
194 s->itv = itv;
195 s->type = type;
196 s->name = ivtv_stream_info[type].name;
197
198
199 if (type == IVTV_ENC_STREAM_TYPE_RAD && !(itv->v4l2_cap & V4L2_CAP_RADIO))
200 return 0;
201 if (type >= IVTV_DEC_STREAM_TYPE_MPG && !(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
202 return 0;
203
204
205
206 if (ivtv_stream_info[type].dma != PCI_DMA_NONE &&
207 itv->options.kilobytes[type] == 0) {
208 IVTV_INFO("Disabled %s device\n", ivtv_stream_info[type].name);
209 return 0;
210 }
211
212 ivtv_stream_init(itv, type);
213
214
215 s->vdev = video_device_alloc();
216 if (s->vdev == NULL) {
217 IVTV_ERR("Couldn't allocate v4l2 video_device for %s\n", s->name);
218 return -ENOMEM;
219 }
220
221 snprintf(s->vdev->name, sizeof(s->vdev->name), "%s %s",
222 itv->v4l2_dev.name, s->name);
223
224 s->vdev->num = num;
225 s->vdev->v4l2_dev = &itv->v4l2_dev;
226 s->vdev->fops = ivtv_stream_info[type].fops;
227 s->vdev->ctrl_handler = itv->v4l2_dev.ctrl_handler;
228 s->vdev->release = video_device_release;
229 s->vdev->tvnorms = V4L2_STD_ALL;
230 s->vdev->lock = &itv->serialize_lock;
231 set_bit(V4L2_FL_USE_FH_PRIO, &s->vdev->flags);
232 ivtv_set_funcs(s->vdev);
233 return 0;
234}
235
236
237int ivtv_streams_setup(struct ivtv *itv)
238{
239 int type;
240
241
242 for (type = 0; type < IVTV_MAX_STREAMS; type++) {
243
244 if (ivtv_prep_dev(itv, type))
245 break;
246
247 if (itv->streams[type].vdev == NULL)
248 continue;
249
250
251 if (ivtv_stream_alloc(&itv->streams[type]))
252 break;
253 }
254 if (type == IVTV_MAX_STREAMS)
255 return 0;
256
257
258 ivtv_streams_cleanup(itv, 0);
259 return -ENOMEM;
260}
261
262static int ivtv_reg_dev(struct ivtv *itv, int type)
263{
264 struct ivtv_stream *s = &itv->streams[type];
265 int vfl_type = ivtv_stream_info[type].vfl_type;
266 const char *name;
267 int num;
268
269 if (s->vdev == NULL)
270 return 0;
271
272 num = s->vdev->num;
273
274 if (type != IVTV_ENC_STREAM_TYPE_MPG) {
275 struct ivtv_stream *s_mpg = &itv->streams[IVTV_ENC_STREAM_TYPE_MPG];
276
277 if (s_mpg->vdev)
278 num = s_mpg->vdev->num + ivtv_stream_info[type].num_offset;
279 }
280 video_set_drvdata(s->vdev, s);
281
282
283 if (video_register_device_no_warn(s->vdev, vfl_type, num)) {
284 IVTV_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
285 s->name, num);
286 video_device_release(s->vdev);
287 s->vdev = NULL;
288 return -ENOMEM;
289 }
290 name = video_device_node_name(s->vdev);
291
292 switch (vfl_type) {
293 case VFL_TYPE_GRABBER:
294 IVTV_INFO("Registered device %s for %s (%d kB)\n",
295 name, s->name, itv->options.kilobytes[type]);
296 break;
297 case VFL_TYPE_RADIO:
298 IVTV_INFO("Registered device %s for %s\n",
299 name, s->name);
300 break;
301 case VFL_TYPE_VBI:
302 if (itv->options.kilobytes[type])
303 IVTV_INFO("Registered device %s for %s (%d kB)\n",
304 name, s->name, itv->options.kilobytes[type]);
305 else
306 IVTV_INFO("Registered device %s for %s\n",
307 name, s->name);
308 break;
309 }
310 return 0;
311}
312
313
314int ivtv_streams_register(struct ivtv *itv)
315{
316 int type;
317 int err = 0;
318
319
320 for (type = 0; type < IVTV_MAX_STREAMS; type++)
321 err |= ivtv_reg_dev(itv, type);
322
323 if (err == 0)
324 return 0;
325
326
327 ivtv_streams_cleanup(itv, 1);
328 return -ENOMEM;
329}
330
331
332void ivtv_streams_cleanup(struct ivtv *itv, int unregister)
333{
334 int type;
335
336
337 for (type = 0; type < IVTV_MAX_STREAMS; type++) {
338 struct video_device *vdev = itv->streams[type].vdev;
339
340 itv->streams[type].vdev = NULL;
341 if (vdev == NULL)
342 continue;
343
344 ivtv_stream_free(&itv->streams[type]);
345
346 if (unregister)
347 video_unregister_device(vdev);
348 else
349 video_device_release(vdev);
350 }
351}
352
353static void ivtv_vbi_setup(struct ivtv *itv)
354{
355 int raw = ivtv_raw_vbi(itv);
356 u32 data[CX2341X_MBOX_MAX_DATA];
357 int lines;
358 int i;
359
360
361 ivtv_vapi(itv, CX2341X_ENC_SET_VBI_LINE, 5, 0xffff , 0, 0, 0, 0);
362
363
364 if (raw)
365 v4l2_subdev_call(itv->sd_video, vbi, s_raw_fmt, &itv->vbi.in.fmt.vbi);
366 else
367 v4l2_subdev_call(itv->sd_video, vbi, s_sliced_fmt, &itv->vbi.in.fmt.sliced);
368
369
370
371
372
373
374 if (raw) {
375 lines = itv->vbi.count * 2;
376 } else {
377 lines = itv->is_60hz ? 24 : 38;
378 if (itv->is_60hz && (itv->hw_flags & IVTV_HW_CX25840))
379 lines += 2;
380 }
381
382 itv->vbi.enc_size = lines * (raw ? itv->vbi.raw_size : itv->vbi.sliced_size);
383
384
385
386 data[0] = raw | 0x02 | (0xbd << 8);
387
388
389 data[1] = 1;
390
391 data[2] = raw ? 4 : 4 * (itv->vbi.raw_size / itv->vbi.enc_size);
392
393
394
395
396
397
398
399 if (itv->hw_flags & IVTV_HW_CX25840) {
400
401 if (raw) {
402 data[3] = 0x20602060;
403 data[4] = 0x30703070;
404 } else {
405 data[3] = 0xB0F0B0F0;
406 data[4] = 0xA0E0A0E0;
407 }
408
409 data[5] = lines;
410
411 data[6] = (raw ? itv->vbi.raw_size : itv->vbi.sliced_size);
412 } else {
413
414 if (raw) {
415 data[3] = 0x25256262;
416 data[4] = 0x387F7F7F;
417 } else {
418 data[3] = 0xABABECEC;
419 data[4] = 0xB6F1F1F1;
420 }
421
422 data[5] = lines;
423
424 data[6] = itv->vbi.enc_size / lines;
425 }
426
427 IVTV_DEBUG_INFO(
428 "Setup VBI API header 0x%08x pkts %d buffs %d ln %d sz %d\n",
429 data[0], data[1], data[2], data[5], data[6]);
430
431 ivtv_api(itv, CX2341X_ENC_SET_VBI_CONFIG, 7, data);
432
433
434 itv->vbi.enc_start = data[2];
435 itv->vbi.fpi = data[0];
436 if (!itv->vbi.fpi)
437 itv->vbi.fpi = 1;
438
439 IVTV_DEBUG_INFO("Setup VBI start 0x%08x frames %d fpi %d\n",
440 itv->vbi.enc_start, data[1], itv->vbi.fpi);
441
442
443
444 for (i = 2; i <= 24; i++) {
445 int valid;
446
447 if (itv->is_60hz) {
448 valid = i >= 10 && i < 22;
449 } else {
450 valid = i >= 6 && i < 24;
451 }
452 ivtv_vapi(itv, CX2341X_ENC_SET_VBI_LINE, 5, i - 1,
453 valid, 0 , 0, 0);
454 ivtv_vapi(itv, CX2341X_ENC_SET_VBI_LINE, 5, (i - 1) | 0x80000000,
455 valid, 0, 0, 0);
456 }
457
458
459
460
461
462
463
464}
465
466int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
467{
468 u32 data[CX2341X_MBOX_MAX_DATA];
469 struct ivtv *itv = s->itv;
470 int captype = 0, subtype = 0;
471 int enable_passthrough = 0;
472
473 if (s->vdev == NULL)
474 return -EINVAL;
475
476 IVTV_DEBUG_INFO("Start encoder stream %s\n", s->name);
477
478 switch (s->type) {
479 case IVTV_ENC_STREAM_TYPE_MPG:
480 captype = 0;
481 subtype = 3;
482
483
484 if (itv->output_mode == OUT_PASSTHROUGH) {
485 ivtv_passthrough_mode(itv, 0);
486 enable_passthrough = 1;
487 }
488 itv->mpg_data_received = itv->vbi_data_inserted = 0;
489 itv->dualwatch_jiffies = jiffies;
490 itv->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(itv->cxhdl.audio_mode);
491 itv->search_pack_header = 0;
492 break;
493
494 case IVTV_ENC_STREAM_TYPE_YUV:
495 if (itv->output_mode == OUT_PASSTHROUGH) {
496 captype = 2;
497 subtype = 11;
498 break;
499 }
500 captype = 1;
501 subtype = 1;
502 break;
503 case IVTV_ENC_STREAM_TYPE_PCM:
504 captype = 1;
505 subtype = 2;
506 break;
507 case IVTV_ENC_STREAM_TYPE_VBI:
508 captype = 1;
509 subtype = 4;
510
511 itv->vbi.frame = 0;
512 itv->vbi.inserted_frame = 0;
513 memset(itv->vbi.sliced_mpeg_size,
514 0, sizeof(itv->vbi.sliced_mpeg_size));
515 break;
516 default:
517 return -EINVAL;
518 }
519 s->subtype = subtype;
520 s->buffers_stolen = 0;
521
522
523 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
524
525 if (atomic_read(&itv->capturing) == 0) {
526 int digitizer;
527
528
529
530
531
532
533
534 ivtv_vapi(itv, CX2341X_ENC_SET_DMA_BLOCK_SIZE, 2, 1, 1);
535
536
537 ivtv_vapi(itv, CX2341X_ENC_SET_VERT_CROP_LINE, 1, 0);
538
539
540
541
542
543
544 ivtv_vapi(itv, CX2341X_ENC_MISC, 2, 3, !itv->has_cx23415);
545 ivtv_vapi(itv, CX2341X_ENC_MISC, 2, 8, 0);
546 ivtv_vapi(itv, CX2341X_ENC_MISC, 2, 4, 1);
547 ivtv_vapi(itv, CX2341X_ENC_MISC, 1, 12);
548
549
550 ivtv_vapi(itv, CX2341X_ENC_SET_PLACEHOLDER, 12,
551 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
552
553 if (itv->card->hw_all & (IVTV_HW_SAA7115 | IVTV_HW_SAA717X))
554 digitizer = 0xF1;
555 else if (itv->card->hw_all & IVTV_HW_SAA7114)
556 digitizer = 0xEF;
557 else
558 digitizer = 0x140;
559
560 ivtv_vapi(itv, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, digitizer, digitizer);
561
562
563 if (itv->v4l2_cap & V4L2_CAP_VBI_CAPTURE) {
564 ivtv_vbi_setup(itv);
565 }
566
567
568 ivtv_vapi_result(itv, data, CX2341X_ENC_SET_PGM_INDEX_INFO, 2, 7, 400);
569 itv->pgm_info_offset = data[0];
570 itv->pgm_info_num = data[1];
571 itv->pgm_info_write_idx = 0;
572 itv->pgm_info_read_idx = 0;
573
574 IVTV_DEBUG_INFO("PGM Index at 0x%08x with %d elements\n",
575 itv->pgm_info_offset, itv->pgm_info_num);
576
577
578 cx2341x_handler_setup(&itv->cxhdl);
579
580
581 if (test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags))
582 ivtv_vapi(itv, CX2341X_ENC_MUTE_VIDEO, 1,
583 1 | (v4l2_ctrl_g_ctrl(itv->cxhdl.video_mute_yuv) << 8));
584 }
585
586
587 if (itv->has_cx23415 && !test_and_set_bit(IVTV_F_I_DIG_RST, &itv->i_flags)) {
588
589 ivtv_vapi(itv, CX2341X_ENC_SET_EVENT_NOTIFICATION, 4, 0, 1, IVTV_IRQ_ENC_VIM_RST, -1);
590 ivtv_clear_irq_mask(itv, IVTV_IRQ_ENC_VIM_RST);
591 }
592
593 if (atomic_read(&itv->capturing) == 0) {
594
595 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_CAPTURE);
596
597 clear_bit(IVTV_F_I_EOS, &itv->i_flags);
598
599 cx2341x_handler_set_busy(&itv->cxhdl, 1);
600
601
602
603 v4l2_subdev_call(itv->sd_audio, audio, s_stream, 1);
604
605 v4l2_subdev_call(itv->sd_video, video, s_stream, 0);
606 ivtv_msleep_timeout(300, 0);
607 ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0);
608 v4l2_subdev_call(itv->sd_video, video, s_stream, 1);
609 }
610
611
612 if (ivtv_vapi(itv, CX2341X_ENC_START_CAPTURE, 2, captype, subtype))
613 {
614 IVTV_DEBUG_WARN( "Error starting capture!\n");
615 return -EINVAL;
616 }
617
618
619 if (enable_passthrough) {
620 ivtv_passthrough_mode(itv, 1);
621 }
622
623 if (s->type == IVTV_ENC_STREAM_TYPE_VBI)
624 ivtv_clear_irq_mask(itv, IVTV_IRQ_ENC_VBI_CAP);
625 else
626 ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_CAPTURE);
627
628
629 atomic_inc(&itv->capturing);
630 return 0;
631}
632
633static int ivtv_setup_v4l2_decode_stream(struct ivtv_stream *s)
634{
635 u32 data[CX2341X_MBOX_MAX_DATA];
636 struct ivtv *itv = s->itv;
637 int datatype;
638 u16 width;
639 u16 height;
640
641 if (s->vdev == NULL)
642 return -EINVAL;
643
644 IVTV_DEBUG_INFO("Setting some initial decoder settings\n");
645
646 width = itv->cxhdl.width;
647 height = itv->cxhdl.height;
648
649
650 ivtv_vapi(itv, CX2341X_DEC_SET_AUDIO_MODE, 2, itv->audio_bilingual_mode, itv->audio_stereo_mode);
651
652
653 ivtv_vapi(itv, CX2341X_DEC_SET_DISPLAY_BUFFERS, 1, 0);
654
655
656 ivtv_vapi(itv, CX2341X_DEC_SET_PREBUFFERING, 1, 1);
657
658
659 ivtv_vapi_result(itv, data, CX2341X_DEC_EXTRACT_VBI, 1, 1);
660 itv->vbi.dec_start = data[0];
661
662 IVTV_DEBUG_INFO("Decoder VBI RE-Insert start 0x%08x size 0x%08x\n",
663 itv->vbi.dec_start, data[1]);
664
665
666
667
668
669 switch (s->type) {
670 case IVTV_DEC_STREAM_TYPE_YUV:
671 if (itv->output_mode == OUT_PASSTHROUGH) {
672 datatype = 1;
673 } else {
674
675 datatype = 2;
676 width = 720;
677 height = itv->is_out_50hz ? 576 : 480;
678 }
679 IVTV_DEBUG_INFO("Setup DEC YUV Stream data[0] = %d\n", datatype);
680 break;
681 case IVTV_DEC_STREAM_TYPE_MPG:
682 default:
683 datatype = 0;
684 break;
685 }
686 if (ivtv_vapi(itv, CX2341X_DEC_SET_DECODER_SOURCE, 4, datatype,
687 width, height, itv->cxhdl.audio_properties)) {
688 IVTV_DEBUG_WARN("Couldn't initialize decoder source\n");
689 }
690
691
692 ivtv_msleep_timeout(10, 0);
693
694
695 return ivtv_firmware_check(itv, "ivtv_setup_v4l2_decode_stream");
696}
697
698int ivtv_start_v4l2_decode_stream(struct ivtv_stream *s, int gop_offset)
699{
700 struct ivtv *itv = s->itv;
701 int rc;
702
703 if (s->vdev == NULL)
704 return -EINVAL;
705
706 if (test_and_set_bit(IVTV_F_S_STREAMING, &s->s_flags))
707 return 0;
708
709 IVTV_DEBUG_INFO("Starting decode stream %s (gop_offset %d)\n", s->name, gop_offset);
710
711 rc = ivtv_setup_v4l2_decode_stream(s);
712 if (rc < 0) {
713 clear_bit(IVTV_F_S_STREAMING, &s->s_flags);
714 return rc;
715 }
716
717
718 ivtv_vapi(itv, CX2341X_DEC_SET_DMA_BLOCK_SIZE, 1, 65536);
719
720
721 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
722
723
724 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[0]);
725 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[1]);
726 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[2]);
727 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[3]);
728 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[0]);
729 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[1]);
730 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[2]);
731 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[3]);
732
733
734 ivtv_vapi(itv, CX2341X_DEC_SET_EVENT_NOTIFICATION, 4, 0, 1, IVTV_IRQ_DEC_AUD_MODE_CHG, -1);
735
736
737 ivtv_vapi(itv, CX2341X_DEC_START_PLAYBACK, 2, gop_offset, 0);
738
739
740 ivtv_msleep_timeout(10, 0);
741
742
743 ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_DECODE);
744 IVTV_DEBUG_IRQ("IRQ Mask is now: 0x%08x\n", itv->irqmask);
745
746
747 atomic_inc(&itv->decoding);
748 return 0;
749}
750
751void ivtv_stop_all_captures(struct ivtv *itv)
752{
753 int i;
754
755 for (i = IVTV_MAX_STREAMS - 1; i >= 0; i--) {
756 struct ivtv_stream *s = &itv->streams[i];
757
758 if (s->vdev == NULL)
759 continue;
760 if (test_bit(IVTV_F_S_STREAMING, &s->s_flags)) {
761 ivtv_stop_v4l2_encode_stream(s, 0);
762 }
763 }
764}
765
766int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end)
767{
768 struct ivtv *itv = s->itv;
769 DECLARE_WAITQUEUE(wait, current);
770 int cap_type;
771 int stopmode;
772
773 if (s->vdev == NULL)
774 return -EINVAL;
775
776
777
778
779 IVTV_DEBUG_INFO("Stop Capture\n");
780
781 if (s->type == IVTV_DEC_STREAM_TYPE_VOUT)
782 return 0;
783 if (atomic_read(&itv->capturing) == 0)
784 return 0;
785
786 switch (s->type) {
787 case IVTV_ENC_STREAM_TYPE_YUV:
788 cap_type = 1;
789 break;
790 case IVTV_ENC_STREAM_TYPE_PCM:
791 cap_type = 1;
792 break;
793 case IVTV_ENC_STREAM_TYPE_VBI:
794 cap_type = 1;
795 break;
796 case IVTV_ENC_STREAM_TYPE_MPG:
797 default:
798 cap_type = 0;
799 break;
800 }
801
802
803 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && gop_end) {
804 stopmode = 0;
805 } else {
806 stopmode = 1;
807 }
808
809
810
811 ivtv_vapi(itv, CX2341X_ENC_STOP_CAPTURE, 3, stopmode, cap_type, s->subtype);
812
813 if (!test_bit(IVTV_F_S_PASSTHROUGH, &s->s_flags)) {
814 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && gop_end) {
815
816 unsigned long duration;
817 unsigned long then = jiffies;
818
819 add_wait_queue(&itv->eos_waitq, &wait);
820
821 set_current_state(TASK_INTERRUPTIBLE);
822
823
824 while (!test_bit(IVTV_F_I_EOS, &itv->i_flags) &&
825 time_before(jiffies,
826 then + msecs_to_jiffies(2000))) {
827 schedule_timeout(msecs_to_jiffies(10));
828 }
829
830
831
832
833
834
835
836
837 duration = ((1000 + HZ / 2) / HZ) * (jiffies - then);
838
839 if (!test_bit(IVTV_F_I_EOS, &itv->i_flags)) {
840 IVTV_DEBUG_WARN("%s: EOS interrupt not received! stopping anyway.\n", s->name);
841 IVTV_DEBUG_WARN("%s: waited %lu ms.\n", s->name, duration);
842 } else {
843 IVTV_DEBUG_INFO("%s: EOS took %lu ms to occur.\n", s->name, duration);
844 }
845 set_current_state(TASK_RUNNING);
846 remove_wait_queue(&itv->eos_waitq, &wait);
847 set_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
848 }
849
850
851 ivtv_msleep_timeout(100, 0);
852 }
853
854 atomic_dec(&itv->capturing);
855
856
857 clear_bit(IVTV_F_S_STREAMING, &s->s_flags);
858
859 if (s->type == IVTV_ENC_STREAM_TYPE_VBI)
860 ivtv_set_irq_mask(itv, IVTV_IRQ_ENC_VBI_CAP);
861
862 if (atomic_read(&itv->capturing) > 0) {
863 return 0;
864 }
865
866 cx2341x_handler_set_busy(&itv->cxhdl, 0);
867
868
869 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_CAPTURE);
870 del_timer(&itv->dma_timer);
871
872
873 if (test_and_clear_bit(IVTV_F_I_DIG_RST, &itv->i_flags)) {
874
875
876 ivtv_vapi(itv, CX2341X_ENC_SET_EVENT_NOTIFICATION, 4, 0, 0, IVTV_IRQ_ENC_VIM_RST, -1);
877 ivtv_set_irq_mask(itv, IVTV_IRQ_ENC_VIM_RST);
878 }
879
880
881
882 ivtv_vapi(itv, CX2341X_ENC_STOP_CAPTURE, 3, 1, 2, 7);
883
884 wake_up(&s->waitq);
885
886 return 0;
887}
888
889int ivtv_stop_v4l2_decode_stream(struct ivtv_stream *s, int flags, u64 pts)
890{
891 static const struct v4l2_event ev = {
892 .type = V4L2_EVENT_EOS,
893 };
894 struct ivtv *itv = s->itv;
895
896 if (s->vdev == NULL)
897 return -EINVAL;
898
899 if (s->type != IVTV_DEC_STREAM_TYPE_YUV && s->type != IVTV_DEC_STREAM_TYPE_MPG)
900 return -EINVAL;
901
902 if (!test_bit(IVTV_F_S_STREAMING, &s->s_flags))
903 return 0;
904
905 IVTV_DEBUG_INFO("Stop Decode at %llu, flags: %x\n", (unsigned long long)pts, flags);
906
907
908 if (!(flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) || pts) {
909 u32 tmp = 0;
910
911
912 if (pts) {
913 ivtv_vapi(itv, CX2341X_DEC_STOP_PLAYBACK, 3,
914 0, (u32)(pts & 0xffffffff), (u32)(pts >> 32));
915 }
916 while (1) {
917 u32 data[CX2341X_MBOX_MAX_DATA];
918 ivtv_vapi_result(itv, data, CX2341X_DEC_GET_XFER_INFO, 0);
919 if (s->q_full.buffers + s->q_dma.buffers == 0) {
920 if (tmp == data[3])
921 break;
922 tmp = data[3];
923 }
924 if (ivtv_msleep_timeout(100, 1))
925 break;
926 }
927 }
928 ivtv_vapi(itv, CX2341X_DEC_STOP_PLAYBACK, 3, flags & V4L2_DEC_CMD_STOP_TO_BLACK, 0, 0);
929
930
931 ivtv_vapi(itv, CX2341X_DEC_SET_EVENT_NOTIFICATION, 4, 0, 0, IVTV_IRQ_DEC_AUD_MODE_CHG, -1);
932
933 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_DECODE);
934 del_timer(&itv->dma_timer);
935
936 clear_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags);
937 clear_bit(IVTV_F_S_STREAMING, &s->s_flags);
938 ivtv_flush_queues(s);
939
940
941 ivtv_msleep_timeout(40, 0);
942
943
944 atomic_dec(&itv->decoding);
945
946 set_bit(IVTV_F_I_EV_DEC_STOPPED, &itv->i_flags);
947 wake_up(&itv->event_waitq);
948 v4l2_event_queue(s->vdev, &ev);
949
950
951 wake_up(&s->waitq);
952
953 return 0;
954}
955
956int ivtv_passthrough_mode(struct ivtv *itv, int enable)
957{
958 struct ivtv_stream *yuv_stream = &itv->streams[IVTV_ENC_STREAM_TYPE_YUV];
959 struct ivtv_stream *dec_stream = &itv->streams[IVTV_DEC_STREAM_TYPE_YUV];
960
961 if (yuv_stream->vdev == NULL || dec_stream->vdev == NULL)
962 return -EINVAL;
963
964 IVTV_DEBUG_INFO("ivtv ioctl: Select passthrough mode\n");
965
966
967
968 if (enable) {
969 if (itv->output_mode == OUT_PASSTHROUGH) {
970 return 0;
971 }
972 if (ivtv_set_output_mode(itv, OUT_PASSTHROUGH) != OUT_PASSTHROUGH)
973 return -EBUSY;
974
975
976 set_bit(IVTV_F_S_PASSTHROUGH, &dec_stream->s_flags);
977 set_bit(IVTV_F_S_STREAMING, &dec_stream->s_flags);
978
979
980 ivtv_setup_v4l2_decode_stream(dec_stream);
981
982
983 ivtv_vapi(itv, CX2341X_DEC_START_PLAYBACK, 2, 0, 1);
984 atomic_inc(&itv->decoding);
985
986
987 if (atomic_read(&itv->capturing) == 0) {
988 cx2341x_handler_setup(&itv->cxhdl);
989 cx2341x_handler_set_busy(&itv->cxhdl, 1);
990 }
991
992
993 ivtv_vapi(itv, CX2341X_ENC_START_CAPTURE, 2, 2, 11);
994 atomic_inc(&itv->capturing);
995 return 0;
996 }
997
998 if (itv->output_mode != OUT_PASSTHROUGH)
999 return 0;
1000
1001
1002 ivtv_vapi(itv, CX2341X_ENC_STOP_CAPTURE, 3, 1, 2, 11);
1003 ivtv_vapi(itv, CX2341X_DEC_STOP_PLAYBACK, 3, 1, 0, 0);
1004
1005 atomic_dec(&itv->capturing);
1006 atomic_dec(&itv->decoding);
1007 clear_bit(IVTV_F_S_PASSTHROUGH, &dec_stream->s_flags);
1008 clear_bit(IVTV_F_S_STREAMING, &dec_stream->s_flags);
1009 itv->output_mode = OUT_NONE;
1010 if (atomic_read(&itv->capturing) == 0)
1011 cx2341x_handler_set_busy(&itv->cxhdl, 0);
1012
1013 return 0;
1014}
1015