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21
22#include "atl1c.h"
23
24#define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
25char atl1c_driver_name[] = "atl1c";
26char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29#define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060
30#define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062
31#define PCI_DEVICE_ID_ATHEROS_L1D 0x1073
32#define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083
33#define L2CB_V10 0xc0
34#define L2CB_V11 0xc1
35
36
37
38
39
40
41
42
43
44
45static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
52
53 { 0 }
54};
55MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
57MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
58MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
59MODULE_LICENSE("GPL");
60MODULE_VERSION(ATL1C_DRV_VERSION);
61
62static int atl1c_stop_mac(struct atl1c_hw *hw);
63static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
64static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
65static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
66static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
67static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
68static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
69 int *work_done, int work_to_do);
70static int atl1c_up(struct atl1c_adapter *adapter);
71static void atl1c_down(struct atl1c_adapter *adapter);
72
73static const u16 atl1c_pay_load_size[] = {
74 128, 256, 512, 1024, 2048, 4096,
75};
76
77static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
78{
79 REG_MB_RFD0_PROD_IDX,
80 REG_MB_RFD1_PROD_IDX,
81 REG_MB_RFD2_PROD_IDX,
82 REG_MB_RFD3_PROD_IDX
83};
84
85static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
86{
87 REG_RFD0_HEAD_ADDR_LO,
88 REG_RFD1_HEAD_ADDR_LO,
89 REG_RFD2_HEAD_ADDR_LO,
90 REG_RFD3_HEAD_ADDR_LO
91};
92
93static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
94{
95 REG_RRD0_HEAD_ADDR_LO,
96 REG_RRD1_HEAD_ADDR_LO,
97 REG_RRD2_HEAD_ADDR_LO,
98 REG_RRD3_HEAD_ADDR_LO
99};
100
101static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
102 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
103static void atl1c_pcie_patch(struct atl1c_hw *hw)
104{
105 u32 data;
106
107 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
108 data |= PCIE_PHYMISC_FORCE_RCV_DET;
109 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
110
111 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
112 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
113
114 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
115 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
116 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
117 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
118 PCIE_PHYMISC2_SERDES_TH_SHIFT);
119 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
120 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
121 }
122}
123
124
125
126
127
128static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
129{
130 u32 data;
131 u32 pci_cmd;
132 struct pci_dev *pdev = hw->adapter->pdev;
133
134 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
135 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
136 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
137 PCI_COMMAND_IO);
138 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
139
140
141
142
143 pci_enable_wake(pdev, PCI_D3hot, 0);
144 pci_enable_wake(pdev, PCI_D3cold, 0);
145
146
147
148
149 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
150 data &= ~PCIE_UC_SERVRITY_DLP;
151 data &= ~PCIE_UC_SERVRITY_FCP;
152 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
153
154 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
155 data &= ~LTSSM_ID_EN_WRO;
156 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
157
158 atl1c_pcie_patch(hw);
159 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
160 atl1c_disable_l0s_l1(hw);
161 if (flag & ATL1C_PCIE_PHY_RESET)
162 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
163 else
164 AT_WRITE_REG(hw, REG_GPHY_CTRL,
165 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
166
167 msleep(5);
168}
169
170
171
172
173
174static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
175{
176 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
177 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
178 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
179 AT_WRITE_FLUSH(&adapter->hw);
180 }
181}
182
183
184
185
186
187static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
188{
189 atomic_inc(&adapter->irq_sem);
190 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
191 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
192 AT_WRITE_FLUSH(&adapter->hw);
193 synchronize_irq(adapter->pdev->irq);
194}
195
196
197
198
199
200static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
201{
202 atomic_set(&adapter->irq_sem, 1);
203 atl1c_irq_enable(adapter);
204}
205
206
207
208
209
210static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
211{
212 int timeout;
213 u32 data;
214
215 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
216 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
217 if ((data & IDLE_STATUS_MASK) == 0)
218 return 0;
219 msleep(1);
220 }
221 return data;
222}
223
224
225
226
227
228static void atl1c_phy_config(unsigned long data)
229{
230 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
231 struct atl1c_hw *hw = &adapter->hw;
232 unsigned long flags;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 atl1c_restart_autoneg(hw);
236 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
237}
238
239void atl1c_reinit_locked(struct atl1c_adapter *adapter)
240{
241 WARN_ON(in_interrupt());
242 atl1c_down(adapter);
243 atl1c_up(adapter);
244 clear_bit(__AT_RESETTING, &adapter->flags);
245}
246
247static void atl1c_check_link_status(struct atl1c_adapter *adapter)
248{
249 struct atl1c_hw *hw = &adapter->hw;
250 struct net_device *netdev = adapter->netdev;
251 struct pci_dev *pdev = adapter->pdev;
252 int err;
253 unsigned long flags;
254 u16 speed, duplex, phy_data;
255
256 spin_lock_irqsave(&adapter->mdio_lock, flags);
257
258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
260 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
261
262 if ((phy_data & BMSR_LSTATUS) == 0) {
263
264 hw->hibernate = true;
265 if (atl1c_stop_mac(hw) != 0)
266 if (netif_msg_hw(adapter))
267 dev_warn(&pdev->dev, "stop mac failed\n");
268 atl1c_set_aspm(hw, false);
269 netif_carrier_off(netdev);
270 netif_stop_queue(netdev);
271 atl1c_phy_reset(hw);
272 atl1c_phy_init(&adapter->hw);
273 } else {
274
275 hw->hibernate = false;
276 spin_lock_irqsave(&adapter->mdio_lock, flags);
277 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
278 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
279 if (unlikely(err))
280 return;
281
282 if (adapter->link_speed != speed ||
283 adapter->link_duplex != duplex) {
284 adapter->link_speed = speed;
285 adapter->link_duplex = duplex;
286 atl1c_set_aspm(hw, true);
287 atl1c_enable_tx_ctrl(hw);
288 atl1c_enable_rx_ctrl(hw);
289 atl1c_setup_mac_ctrl(adapter);
290 if (netif_msg_link(adapter))
291 dev_info(&pdev->dev,
292 "%s: %s NIC Link is Up<%d Mbps %s>\n",
293 atl1c_driver_name, netdev->name,
294 adapter->link_speed,
295 adapter->link_duplex == FULL_DUPLEX ?
296 "Full Duplex" : "Half Duplex");
297 }
298 if (!netif_carrier_ok(netdev))
299 netif_carrier_on(netdev);
300 }
301}
302
303static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
304{
305 struct net_device *netdev = adapter->netdev;
306 struct pci_dev *pdev = adapter->pdev;
307 u16 phy_data;
308 u16 link_up;
309
310 spin_lock(&adapter->mdio_lock);
311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
313 spin_unlock(&adapter->mdio_lock);
314 link_up = phy_data & BMSR_LSTATUS;
315
316 if (!link_up) {
317 if (netif_carrier_ok(netdev)) {
318
319 netif_carrier_off(netdev);
320 if (netif_msg_link(adapter))
321 dev_info(&pdev->dev,
322 "%s: %s NIC Link is Down\n",
323 atl1c_driver_name, netdev->name);
324 adapter->link_speed = SPEED_0;
325 }
326 }
327
328 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
329 schedule_work(&adapter->common_task);
330}
331
332static void atl1c_common_task(struct work_struct *work)
333{
334 struct atl1c_adapter *adapter;
335 struct net_device *netdev;
336
337 adapter = container_of(work, struct atl1c_adapter, common_task);
338 netdev = adapter->netdev;
339
340 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
341 netif_device_detach(netdev);
342 atl1c_down(adapter);
343 atl1c_up(adapter);
344 netif_device_attach(netdev);
345 }
346
347 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
348 &adapter->work_event))
349 atl1c_check_link_status(adapter);
350}
351
352
353static void atl1c_del_timer(struct atl1c_adapter *adapter)
354{
355 del_timer_sync(&adapter->phy_config_timer);
356}
357
358
359
360
361
362
363static void atl1c_tx_timeout(struct net_device *netdev)
364{
365 struct atl1c_adapter *adapter = netdev_priv(netdev);
366
367
368 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
369 schedule_work(&adapter->common_task);
370}
371
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373
374
375
376
377
378
379
380
381static void atl1c_set_multi(struct net_device *netdev)
382{
383 struct atl1c_adapter *adapter = netdev_priv(netdev);
384 struct atl1c_hw *hw = &adapter->hw;
385 struct netdev_hw_addr *ha;
386 u32 mac_ctrl_data;
387 u32 hash_value;
388
389
390 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
391
392 if (netdev->flags & IFF_PROMISC) {
393 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
394 } else if (netdev->flags & IFF_ALLMULTI) {
395 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
396 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
397 } else {
398 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
399 }
400
401 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
402
403
404 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
405 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
406
407
408 netdev_for_each_mc_addr(ha, netdev) {
409 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
410 atl1c_hash_set(hw, hash_value);
411 }
412}
413
414static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
415{
416 if (features & NETIF_F_HW_VLAN_RX) {
417
418 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
419 } else {
420
421 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
422 }
423}
424
425static void atl1c_vlan_mode(struct net_device *netdev,
426 netdev_features_t features)
427{
428 struct atl1c_adapter *adapter = netdev_priv(netdev);
429 struct pci_dev *pdev = adapter->pdev;
430 u32 mac_ctrl_data = 0;
431
432 if (netif_msg_pktdata(adapter))
433 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
434
435 atl1c_irq_disable(adapter);
436 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
437 __atl1c_vlan_mode(features, &mac_ctrl_data);
438 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
439 atl1c_irq_enable(adapter);
440}
441
442static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
443{
444 struct pci_dev *pdev = adapter->pdev;
445
446 if (netif_msg_pktdata(adapter))
447 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
448 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
449}
450
451
452
453
454
455
456
457
458static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
459{
460 struct atl1c_adapter *adapter = netdev_priv(netdev);
461 struct sockaddr *addr = p;
462
463 if (!is_valid_ether_addr(addr->sa_data))
464 return -EADDRNOTAVAIL;
465
466 if (netif_running(netdev))
467 return -EBUSY;
468
469 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
470 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
471 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
472
473 atl1c_hw_set_mac_addr(&adapter->hw);
474
475 return 0;
476}
477
478static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
479 struct net_device *dev)
480{
481 int mtu = dev->mtu;
482
483 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
484 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
485}
486
487static netdev_features_t atl1c_fix_features(struct net_device *netdev,
488 netdev_features_t features)
489{
490
491
492
493
494 if (features & NETIF_F_HW_VLAN_RX)
495 features |= NETIF_F_HW_VLAN_TX;
496 else
497 features &= ~NETIF_F_HW_VLAN_TX;
498
499 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
500 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
501
502 return features;
503}
504
505static int atl1c_set_features(struct net_device *netdev,
506 netdev_features_t features)
507{
508 netdev_features_t changed = netdev->features ^ features;
509
510 if (changed & NETIF_F_HW_VLAN_RX)
511 atl1c_vlan_mode(netdev, features);
512
513 return 0;
514}
515
516
517
518
519
520
521
522
523static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
524{
525 struct atl1c_adapter *adapter = netdev_priv(netdev);
526 int old_mtu = netdev->mtu;
527 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
528
529 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
530 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
531 if (netif_msg_link(adapter))
532 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
533 return -EINVAL;
534 }
535
536 if (old_mtu != new_mtu && netif_running(netdev)) {
537 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
538 msleep(1);
539 netdev->mtu = new_mtu;
540 adapter->hw.max_frame_size = new_mtu;
541 atl1c_set_rxbufsize(adapter, netdev);
542 atl1c_down(adapter);
543 netdev_update_features(netdev);
544 atl1c_up(adapter);
545 clear_bit(__AT_RESETTING, &adapter->flags);
546 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
547 u32 phy_data;
548
549 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
550 phy_data |= 0x10000000;
551 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
552 }
553
554 }
555 return 0;
556}
557
558
559
560
561static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
562{
563 struct atl1c_adapter *adapter = netdev_priv(netdev);
564 u16 result;
565
566 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
567 return result;
568}
569
570static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
571 int reg_num, int val)
572{
573 struct atl1c_adapter *adapter = netdev_priv(netdev);
574
575 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
576}
577
578
579
580
581
582
583
584static int atl1c_mii_ioctl(struct net_device *netdev,
585 struct ifreq *ifr, int cmd)
586{
587 struct atl1c_adapter *adapter = netdev_priv(netdev);
588 struct pci_dev *pdev = adapter->pdev;
589 struct mii_ioctl_data *data = if_mii(ifr);
590 unsigned long flags;
591 int retval = 0;
592
593 if (!netif_running(netdev))
594 return -EINVAL;
595
596 spin_lock_irqsave(&adapter->mdio_lock, flags);
597 switch (cmd) {
598 case SIOCGMIIPHY:
599 data->phy_id = 0;
600 break;
601
602 case SIOCGMIIREG:
603 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
604 &data->val_out)) {
605 retval = -EIO;
606 goto out;
607 }
608 break;
609
610 case SIOCSMIIREG:
611 if (data->reg_num & ~(0x1F)) {
612 retval = -EFAULT;
613 goto out;
614 }
615
616 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
617 data->reg_num, data->val_in);
618 if (atl1c_write_phy_reg(&adapter->hw,
619 data->reg_num, data->val_in)) {
620 retval = -EIO;
621 goto out;
622 }
623 break;
624
625 default:
626 retval = -EOPNOTSUPP;
627 break;
628 }
629out:
630 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
631 return retval;
632}
633
634
635
636
637
638
639
640static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
641{
642 switch (cmd) {
643 case SIOCGMIIPHY:
644 case SIOCGMIIREG:
645 case SIOCSMIIREG:
646 return atl1c_mii_ioctl(netdev, ifr, cmd);
647 default:
648 return -EOPNOTSUPP;
649 }
650}
651
652
653
654
655
656
657static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
658{
659 return 0;
660}
661
662static void atl1c_set_mac_type(struct atl1c_hw *hw)
663{
664 switch (hw->device_id) {
665 case PCI_DEVICE_ID_ATTANSIC_L2C:
666 hw->nic_type = athr_l2c;
667 break;
668 case PCI_DEVICE_ID_ATTANSIC_L1C:
669 hw->nic_type = athr_l1c;
670 break;
671 case PCI_DEVICE_ID_ATHEROS_L2C_B:
672 hw->nic_type = athr_l2c_b;
673 break;
674 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
675 hw->nic_type = athr_l2c_b2;
676 break;
677 case PCI_DEVICE_ID_ATHEROS_L1D:
678 hw->nic_type = athr_l1d;
679 break;
680 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
681 hw->nic_type = athr_l1d_2;
682 break;
683 default:
684 break;
685 }
686}
687
688static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
689{
690 u32 phy_status_data;
691 u32 link_ctrl_data;
692
693 atl1c_set_mac_type(hw);
694 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
695 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
696
697 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
698 ATL1C_TXQ_MODE_ENHANCE;
699 if (link_ctrl_data & LINK_CTRL_L0S_EN)
700 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
701 if (link_ctrl_data & LINK_CTRL_L1_EN)
702 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
703 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
704 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
705 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
706
707 if (hw->nic_type == athr_l1c ||
708 hw->nic_type == athr_l1d ||
709 hw->nic_type == athr_l1d_2)
710 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
711 return 0;
712}
713
714
715
716
717
718
719
720
721static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
722{
723 struct atl1c_hw *hw = &adapter->hw;
724 struct pci_dev *pdev = adapter->pdev;
725 u32 revision;
726
727
728 adapter->wol = 0;
729 device_set_wakeup_enable(&pdev->dev, false);
730 adapter->link_speed = SPEED_0;
731 adapter->link_duplex = FULL_DUPLEX;
732 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
733 adapter->tpd_ring[0].count = 1024;
734 adapter->rfd_ring[0].count = 512;
735
736 hw->vendor_id = pdev->vendor;
737 hw->device_id = pdev->device;
738 hw->subsystem_vendor_id = pdev->subsystem_vendor;
739 hw->subsystem_id = pdev->subsystem_device;
740 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
741 hw->revision_id = revision & 0xFF;
742
743 hw->hibernate = true;
744 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
745 if (atl1c_setup_mac_funcs(hw) != 0) {
746 dev_err(&pdev->dev, "set mac function pointers failed\n");
747 return -1;
748 }
749 hw->intr_mask = IMR_NORMAL_MASK;
750 hw->phy_configured = false;
751 hw->preamble_len = 7;
752 hw->max_frame_size = adapter->netdev->mtu;
753 if (adapter->num_rx_queues < 2) {
754 hw->rss_type = atl1c_rss_disable;
755 hw->rss_mode = atl1c_rss_mode_disable;
756 } else {
757 hw->rss_type = atl1c_rss_ipv4;
758 hw->rss_mode = atl1c_rss_mul_que_mul_int;
759 hw->rss_hash_bits = 16;
760 }
761 hw->autoneg_advertised = ADVERTISED_Autoneg;
762 hw->indirect_tab = 0xE4E4E4E4;
763 hw->base_cpu = 0;
764
765 hw->ict = 50000;
766 hw->smb_timer = 200000;
767 hw->cmb_tpd = 4;
768 hw->cmb_tx_timer = 1;
769 hw->rx_imt = 200;
770 hw->tx_imt = 1000;
771
772 hw->tpd_burst = 5;
773 hw->rfd_burst = 8;
774 hw->dma_order = atl1c_dma_ord_out;
775 hw->dmar_block = atl1c_dma_req_1024;
776 hw->dmaw_block = atl1c_dma_req_1024;
777 hw->dmar_dly_cnt = 15;
778 hw->dmaw_dly_cnt = 4;
779
780 if (atl1c_alloc_queues(adapter)) {
781 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
782 return -ENOMEM;
783 }
784
785 atl1c_set_rxbufsize(adapter, adapter->netdev);
786 atomic_set(&adapter->irq_sem, 1);
787 spin_lock_init(&adapter->mdio_lock);
788 spin_lock_init(&adapter->tx_lock);
789 set_bit(__AT_DOWN, &adapter->flags);
790
791 return 0;
792}
793
794static inline void atl1c_clean_buffer(struct pci_dev *pdev,
795 struct atl1c_buffer *buffer_info, int in_irq)
796{
797 u16 pci_driection;
798 if (buffer_info->flags & ATL1C_BUFFER_FREE)
799 return;
800 if (buffer_info->dma) {
801 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
802 pci_driection = PCI_DMA_FROMDEVICE;
803 else
804 pci_driection = PCI_DMA_TODEVICE;
805
806 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
807 pci_unmap_single(pdev, buffer_info->dma,
808 buffer_info->length, pci_driection);
809 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
810 pci_unmap_page(pdev, buffer_info->dma,
811 buffer_info->length, pci_driection);
812 }
813 if (buffer_info->skb) {
814 if (in_irq)
815 dev_kfree_skb_irq(buffer_info->skb);
816 else
817 dev_kfree_skb(buffer_info->skb);
818 }
819 buffer_info->dma = 0;
820 buffer_info->skb = NULL;
821 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
822}
823
824
825
826
827static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
828 enum atl1c_trans_queue type)
829{
830 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
831 struct atl1c_buffer *buffer_info;
832 struct pci_dev *pdev = adapter->pdev;
833 u16 index, ring_count;
834
835 ring_count = tpd_ring->count;
836 for (index = 0; index < ring_count; index++) {
837 buffer_info = &tpd_ring->buffer_info[index];
838 atl1c_clean_buffer(pdev, buffer_info, 0);
839 }
840
841
842 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
843 ring_count);
844 atomic_set(&tpd_ring->next_to_clean, 0);
845 tpd_ring->next_to_use = 0;
846}
847
848
849
850
851
852static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
853{
854 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
855 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
856 struct atl1c_buffer *buffer_info;
857 struct pci_dev *pdev = adapter->pdev;
858 int i, j;
859
860 for (i = 0; i < adapter->num_rx_queues; i++) {
861 for (j = 0; j < rfd_ring[i].count; j++) {
862 buffer_info = &rfd_ring[i].buffer_info[j];
863 atl1c_clean_buffer(pdev, buffer_info, 0);
864 }
865
866 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
867 rfd_ring[i].next_to_clean = 0;
868 rfd_ring[i].next_to_use = 0;
869 rrd_ring[i].next_to_use = 0;
870 rrd_ring[i].next_to_clean = 0;
871 }
872}
873
874
875
876
877static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
878{
879 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
880 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
881 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
882 struct atl1c_buffer *buffer_info;
883 int i, j;
884
885 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
886 tpd_ring[i].next_to_use = 0;
887 atomic_set(&tpd_ring[i].next_to_clean, 0);
888 buffer_info = tpd_ring[i].buffer_info;
889 for (j = 0; j < tpd_ring->count; j++)
890 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
891 ATL1C_BUFFER_FREE);
892 }
893 for (i = 0; i < adapter->num_rx_queues; i++) {
894 rfd_ring[i].next_to_use = 0;
895 rfd_ring[i].next_to_clean = 0;
896 rrd_ring[i].next_to_use = 0;
897 rrd_ring[i].next_to_clean = 0;
898 for (j = 0; j < rfd_ring[i].count; j++) {
899 buffer_info = &rfd_ring[i].buffer_info[j];
900 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
901 }
902 }
903}
904
905
906
907
908
909
910
911static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
912{
913 struct pci_dev *pdev = adapter->pdev;
914
915 pci_free_consistent(pdev, adapter->ring_header.size,
916 adapter->ring_header.desc,
917 adapter->ring_header.dma);
918 adapter->ring_header.desc = NULL;
919
920
921
922 if (adapter->tpd_ring[0].buffer_info) {
923 kfree(adapter->tpd_ring[0].buffer_info);
924 adapter->tpd_ring[0].buffer_info = NULL;
925 }
926}
927
928
929
930
931
932
933
934static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
935{
936 struct pci_dev *pdev = adapter->pdev;
937 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
938 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
939 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
940 struct atl1c_ring_header *ring_header = &adapter->ring_header;
941 int num_rx_queues = adapter->num_rx_queues;
942 int size;
943 int i;
944 int count = 0;
945 int rx_desc_count = 0;
946 u32 offset = 0;
947
948 rrd_ring[0].count = rfd_ring[0].count;
949 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
950 tpd_ring[i].count = tpd_ring[0].count;
951
952 for (i = 1; i < adapter->num_rx_queues; i++)
953 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
954
955
956
957 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
958 rfd_ring->count * num_rx_queues);
959 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
960 if (unlikely(!tpd_ring->buffer_info)) {
961 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
962 size);
963 goto err_nomem;
964 }
965 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
966 tpd_ring[i].buffer_info =
967 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
968 count += tpd_ring[i].count;
969 }
970
971 for (i = 0; i < num_rx_queues; i++) {
972 rfd_ring[i].buffer_info =
973 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
974 count += rfd_ring[i].count;
975 rx_desc_count += rfd_ring[i].count;
976 }
977
978
979
980
981
982 ring_header->size = size =
983 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
984 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
985 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
986 sizeof(struct atl1c_hw_stats) +
987 8 * 4 + 8 * 2 * num_rx_queues;
988
989 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
990 &ring_header->dma);
991 if (unlikely(!ring_header->desc)) {
992 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
993 goto err_nomem;
994 }
995 memset(ring_header->desc, 0, ring_header->size);
996
997
998 tpd_ring[0].dma = roundup(ring_header->dma, 8);
999 offset = tpd_ring[0].dma - ring_header->dma;
1000 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
1001 tpd_ring[i].dma = ring_header->dma + offset;
1002 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
1003 tpd_ring[i].size =
1004 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1005 offset += roundup(tpd_ring[i].size, 8);
1006 }
1007
1008 for (i = 0; i < num_rx_queues; i++) {
1009 rfd_ring[i].dma = ring_header->dma + offset;
1010 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
1011 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
1012 rfd_ring[i].count;
1013 offset += roundup(rfd_ring[i].size, 8);
1014 }
1015
1016
1017 for (i = 0; i < num_rx_queues; i++) {
1018 rrd_ring[i].dma = ring_header->dma + offset;
1019 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
1020 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
1021 rrd_ring[i].count;
1022 offset += roundup(rrd_ring[i].size, 8);
1023 }
1024
1025 adapter->smb.dma = ring_header->dma + offset;
1026 adapter->smb.smb = (u8 *)ring_header->desc + offset;
1027 return 0;
1028
1029err_nomem:
1030 kfree(tpd_ring->buffer_info);
1031 return -ENOMEM;
1032}
1033
1034static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1035{
1036 struct atl1c_hw *hw = &adapter->hw;
1037 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
1038 adapter->rfd_ring;
1039 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
1040 adapter->rrd_ring;
1041 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1042 adapter->tpd_ring;
1043 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
1044 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
1045 int i;
1046 u32 data;
1047
1048
1049 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1050 (u32)((tpd_ring[atl1c_trans_normal].dma &
1051 AT_DMA_HI_ADDR_MASK) >> 32));
1052
1053 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
1054 (u32)(tpd_ring[atl1c_trans_normal].dma &
1055 AT_DMA_LO_ADDR_MASK));
1056 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
1057 (u32)(tpd_ring[atl1c_trans_high].dma &
1058 AT_DMA_LO_ADDR_MASK));
1059 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1060 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1061
1062
1063
1064 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1065 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
1066 for (i = 0; i < adapter->num_rx_queues; i++)
1067 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
1068 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1069
1070 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1071 rfd_ring[0].count & RFD_RING_SIZE_MASK);
1072 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1073 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1074
1075
1076 for (i = 0; i < adapter->num_rx_queues; i++)
1077 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
1078 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1079 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1080 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
1081
1082
1083 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1084
1085
1086 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1087 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1088 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1089 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1090 if (hw->nic_type == athr_l2c_b) {
1091 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1092 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1093 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1094 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1095 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1096 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1097 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0);
1098 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0);
1099 }
1100 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1101
1102 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1103 data |= SERDES_MAC_CLK_SLOWDOWN;
1104 data |= SERDES_PYH_CLK_SLOWDOWN;
1105 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1106 }
1107
1108 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1109}
1110
1111static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1112{
1113 struct atl1c_hw *hw = &adapter->hw;
1114 u32 dev_ctrl_data;
1115 u32 max_pay_load;
1116 u16 tx_offload_thresh;
1117 u32 txq_ctrl_data;
1118 u32 max_pay_load_data;
1119
1120 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1121 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1122 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1123 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1124 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1125 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1126 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
1127 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1128 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1129 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1130
1131 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1132 TXQ_NUM_TPD_BURST_SHIFT;
1133 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1134 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1135 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
1136 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1137 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1138 max_pay_load_data >>= 1;
1139 txq_ctrl_data |= max_pay_load_data;
1140
1141 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1142}
1143
1144static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1145{
1146 struct atl1c_hw *hw = &adapter->hw;
1147 u32 rxq_ctrl_data;
1148
1149 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1150 RXQ_RFD_BURST_NUM_SHIFT;
1151
1152 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1153 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1154 if (hw->rss_type == atl1c_rss_ipv4)
1155 rxq_ctrl_data |= RSS_HASH_IPV4;
1156 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1157 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1158 if (hw->rss_type == atl1c_rss_ipv6)
1159 rxq_ctrl_data |= RSS_HASH_IPV6;
1160 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1161 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1162 if (hw->rss_type != atl1c_rss_disable)
1163 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1164
1165 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1166 RSS_MODE_SHIFT;
1167 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1168 RSS_HASH_BITS_SHIFT;
1169 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1170 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
1171 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1172
1173 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1174}
1175
1176static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1177{
1178 struct atl1c_hw *hw = &adapter->hw;
1179
1180 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1181 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1182}
1183
1184static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1185{
1186 struct atl1c_hw *hw = &adapter->hw;
1187 u32 dma_ctrl_data;
1188
1189 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1190 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1191 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1192 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1193 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1194 else
1195 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1196
1197 switch (hw->dma_order) {
1198 case atl1c_dma_ord_in:
1199 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1200 break;
1201 case atl1c_dma_ord_enh:
1202 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1203 break;
1204 case atl1c_dma_ord_out:
1205 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1206 break;
1207 default:
1208 break;
1209 }
1210
1211 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1212 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1213 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1214 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1215 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1216 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1217 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1218 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1219
1220 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1221}
1222
1223
1224
1225
1226
1227
1228static int atl1c_stop_mac(struct atl1c_hw *hw)
1229{
1230 u32 data;
1231
1232 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1233 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1234 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1235 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1236
1237 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1238 data &= ~TXQ_CTRL_EN;
1239 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1240
1241 atl1c_wait_until_idle(hw);
1242
1243 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1244 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1245 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1246
1247 return (int)atl1c_wait_until_idle(hw);
1248}
1249
1250static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1251{
1252 u32 data;
1253
1254 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1255 switch (hw->adapter->num_rx_queues) {
1256 case 4:
1257 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1258 break;
1259 case 3:
1260 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1261 break;
1262 case 2:
1263 data |= RXQ1_CTRL_EN;
1264 break;
1265 default:
1266 break;
1267 }
1268 data |= RXQ_CTRL_EN;
1269 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1270}
1271
1272static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1273{
1274 u32 data;
1275
1276 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1277 data |= TXQ_CTRL_EN;
1278 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1279}
1280
1281
1282
1283
1284
1285
1286static int atl1c_reset_mac(struct atl1c_hw *hw)
1287{
1288 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1289 struct pci_dev *pdev = adapter->pdev;
1290 u32 master_ctrl_data = 0;
1291
1292 AT_WRITE_REG(hw, REG_IMR, 0);
1293 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1294
1295 atl1c_stop_mac(hw);
1296
1297
1298
1299
1300
1301
1302 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1303 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1304 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1305 & 0xFFFF));
1306
1307 AT_WRITE_FLUSH(hw);
1308 msleep(10);
1309
1310
1311 if (atl1c_wait_until_idle(hw)) {
1312 dev_err(&pdev->dev,
1313 "MAC state machine can't be idle since"
1314 " disabled for 10ms second\n");
1315 return -1;
1316 }
1317 return 0;
1318}
1319
1320static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1321{
1322 u32 pm_ctrl_data;
1323
1324 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1325 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1326 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1327 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1328 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1329 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1330 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1331 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1332
1333 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1334 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1335 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1336 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1337}
1338
1339
1340
1341
1342
1343static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1344{
1345 u32 pm_ctrl_data;
1346 u32 link_ctrl_data;
1347 u32 link_l1_timer = 0xF;
1348
1349 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1350 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1351
1352 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1353 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1354 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1355 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1356 PM_CTRL_LCKDET_TIMER_SHIFT);
1357 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
1358
1359 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1360 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1361 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1362 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1363 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
1364 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1365 }
1366
1367 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1368
1369 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1370 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1371 PM_CTRL_PM_REQ_TIMER_SHIFT);
1372 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1373 PM_CTRL_PM_REQ_TIMER_SHIFT;
1374 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1375 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1376 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1377 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1378 }
1379 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1380 if (linkup) {
1381 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1382 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1383 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1384 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1385 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1386 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1387
1388 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1389 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1390 if (hw->nic_type == athr_l2c_b)
1391 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1392 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1393 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1394 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1395 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1396 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1397 if (hw->adapter->link_speed == SPEED_100 ||
1398 hw->adapter->link_speed == SPEED_1000) {
1399 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1400 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1401 if (hw->nic_type == athr_l2c_b)
1402 link_l1_timer = 7;
1403 else if (hw->nic_type == athr_l2c_b2 ||
1404 hw->nic_type == athr_l1d_2)
1405 link_l1_timer = 4;
1406 pm_ctrl_data |= link_l1_timer <<
1407 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1408 }
1409 } else {
1410 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1411 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1412 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1413 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1414 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1415 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1416
1417 }
1418 } else {
1419 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1420 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1421 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1422 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1423
1424 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1425 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1426 else
1427 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1428 }
1429 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1430
1431 return;
1432}
1433
1434static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1435{
1436 struct atl1c_hw *hw = &adapter->hw;
1437 struct net_device *netdev = adapter->netdev;
1438 u32 mac_ctrl_data;
1439
1440 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1441 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1442
1443 if (adapter->link_duplex == FULL_DUPLEX) {
1444 hw->mac_duplex = true;
1445 mac_ctrl_data |= MAC_CTRL_DUPLX;
1446 }
1447
1448 if (adapter->link_speed == SPEED_1000)
1449 hw->mac_speed = atl1c_mac_speed_1000;
1450 else
1451 hw->mac_speed = atl1c_mac_speed_10_100;
1452
1453 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1454 MAC_CTRL_SPEED_SHIFT;
1455
1456 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1457 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1458 MAC_CTRL_PRMLEN_SHIFT);
1459
1460 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
1461
1462 mac_ctrl_data |= MAC_CTRL_BC_EN;
1463 if (netdev->flags & IFF_PROMISC)
1464 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1465 if (netdev->flags & IFF_ALLMULTI)
1466 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1467
1468 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1469 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1470 hw->nic_type == athr_l1d_2) {
1471 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1472 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1473 }
1474 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1475}
1476
1477
1478
1479
1480
1481
1482
1483static int atl1c_configure(struct atl1c_adapter *adapter)
1484{
1485 struct atl1c_hw *hw = &adapter->hw;
1486 u32 master_ctrl_data = 0;
1487 u32 intr_modrt_data;
1488 u32 data;
1489
1490
1491 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1492
1493 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1494
1495
1496
1497
1498
1499 data = CLK_GATING_EN_ALL;
1500 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1501 if (hw->nic_type == athr_l2c_b)
1502 data &= ~CLK_GATING_RXMAC_EN;
1503 } else
1504 data = 0;
1505 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1506
1507 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1508 hw->ict & INT_RETRIG_TIMER_MASK);
1509
1510 atl1c_configure_des_ring(adapter);
1511
1512 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1513 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1514 IRQ_MODRT_TX_TIMER_SHIFT;
1515 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1516 IRQ_MODRT_RX_TIMER_SHIFT;
1517 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1518 master_ctrl_data |=
1519 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1520 }
1521
1522 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1523 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1524
1525 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1526 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1527
1528 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1529 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1530 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1531 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1532 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1533 }
1534
1535 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1536 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1537 hw->smb_timer & SMB_STAT_TIMER_MASK);
1538
1539 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1540 VLAN_HLEN + ETH_FCS_LEN);
1541
1542 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1543
1544 atl1c_configure_tx(adapter);
1545 atl1c_configure_rx(adapter);
1546 atl1c_configure_rss(adapter);
1547 atl1c_configure_dma(adapter);
1548
1549 return 0;
1550}
1551
1552static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1553{
1554 u16 hw_reg_addr = 0;
1555 unsigned long *stats_item = NULL;
1556 u32 data;
1557
1558
1559 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1560 stats_item = &adapter->hw_stats.rx_ok;
1561 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1562 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1563 *stats_item += data;
1564 stats_item++;
1565 hw_reg_addr += 4;
1566 }
1567
1568 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1569 stats_item = &adapter->hw_stats.tx_ok;
1570 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1571 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1572 *stats_item += data;
1573 stats_item++;
1574 hw_reg_addr += 4;
1575 }
1576}
1577
1578
1579
1580
1581
1582
1583
1584
1585static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1586{
1587 struct atl1c_adapter *adapter = netdev_priv(netdev);
1588 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1589 struct net_device_stats *net_stats = &netdev->stats;
1590
1591 atl1c_update_hw_stats(adapter);
1592 net_stats->rx_packets = hw_stats->rx_ok;
1593 net_stats->tx_packets = hw_stats->tx_ok;
1594 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1595 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1596 net_stats->multicast = hw_stats->rx_mcast;
1597 net_stats->collisions = hw_stats->tx_1_col +
1598 hw_stats->tx_2_col * 2 +
1599 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1600 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1601 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1602 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1603 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1604 net_stats->rx_length_errors = hw_stats->rx_len_err;
1605 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1606 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1607 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1608
1609 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1610
1611 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1612 hw_stats->tx_underrun + hw_stats->tx_trunc;
1613 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1614 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1615 net_stats->tx_window_errors = hw_stats->tx_late_col;
1616
1617 return net_stats;
1618}
1619
1620static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1621{
1622 u16 phy_data;
1623
1624 spin_lock(&adapter->mdio_lock);
1625 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1626 spin_unlock(&adapter->mdio_lock);
1627}
1628
1629static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1630 enum atl1c_trans_queue type)
1631{
1632 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1633 &adapter->tpd_ring[type];
1634 struct atl1c_buffer *buffer_info;
1635 struct pci_dev *pdev = adapter->pdev;
1636 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1637 u16 hw_next_to_clean;
1638 u16 shift;
1639 u32 data;
1640
1641 if (type == atl1c_trans_high)
1642 shift = MB_HTPD_CONS_IDX_SHIFT;
1643 else
1644 shift = MB_NTPD_CONS_IDX_SHIFT;
1645
1646 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1647 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1648
1649 while (next_to_clean != hw_next_to_clean) {
1650 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1651 atl1c_clean_buffer(pdev, buffer_info, 1);
1652 if (++next_to_clean == tpd_ring->count)
1653 next_to_clean = 0;
1654 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1655 }
1656
1657 if (netif_queue_stopped(adapter->netdev) &&
1658 netif_carrier_ok(adapter->netdev)) {
1659 netif_wake_queue(adapter->netdev);
1660 }
1661
1662 return true;
1663}
1664
1665
1666
1667
1668
1669
1670
1671static irqreturn_t atl1c_intr(int irq, void *data)
1672{
1673 struct net_device *netdev = data;
1674 struct atl1c_adapter *adapter = netdev_priv(netdev);
1675 struct pci_dev *pdev = adapter->pdev;
1676 struct atl1c_hw *hw = &adapter->hw;
1677 int max_ints = AT_MAX_INT_WORK;
1678 int handled = IRQ_NONE;
1679 u32 status;
1680 u32 reg_data;
1681
1682 do {
1683 AT_READ_REG(hw, REG_ISR, ®_data);
1684 status = reg_data & hw->intr_mask;
1685
1686 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1687 if (max_ints != AT_MAX_INT_WORK)
1688 handled = IRQ_HANDLED;
1689 break;
1690 }
1691
1692 if (status & ISR_GPHY)
1693 atl1c_clear_phy_int(adapter);
1694
1695 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1696 if (status & ISR_RX_PKT) {
1697 if (likely(napi_schedule_prep(&adapter->napi))) {
1698 hw->intr_mask &= ~ISR_RX_PKT;
1699 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1700 __napi_schedule(&adapter->napi);
1701 }
1702 }
1703 if (status & ISR_TX_PKT)
1704 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1705
1706 handled = IRQ_HANDLED;
1707
1708 if (status & ISR_ERROR) {
1709 if (netif_msg_hw(adapter))
1710 dev_err(&pdev->dev,
1711 "atl1c hardware error (status = 0x%x)\n",
1712 status & ISR_ERROR);
1713
1714 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1715 schedule_work(&adapter->common_task);
1716 return IRQ_HANDLED;
1717 }
1718
1719 if (status & ISR_OVER)
1720 if (netif_msg_intr(adapter))
1721 dev_warn(&pdev->dev,
1722 "TX/RX overflow (status = 0x%x)\n",
1723 status & ISR_OVER);
1724
1725
1726 if (status & (ISR_GPHY | ISR_MANUAL)) {
1727 netdev->stats.tx_carrier_errors++;
1728 atl1c_link_chg_event(adapter);
1729 break;
1730 }
1731
1732 } while (--max_ints > 0);
1733
1734 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1735 return handled;
1736}
1737
1738static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1739 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1740{
1741
1742
1743
1744
1745
1746 skb_checksum_none_assert(skb);
1747}
1748
1749static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1750{
1751 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1752 struct pci_dev *pdev = adapter->pdev;
1753 struct atl1c_buffer *buffer_info, *next_info;
1754 struct sk_buff *skb;
1755 void *vir_addr = NULL;
1756 u16 num_alloc = 0;
1757 u16 rfd_next_to_use, next_next;
1758 struct atl1c_rx_free_desc *rfd_desc;
1759
1760 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1761 if (++next_next == rfd_ring->count)
1762 next_next = 0;
1763 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1764 next_info = &rfd_ring->buffer_info[next_next];
1765
1766 while (next_info->flags & ATL1C_BUFFER_FREE) {
1767 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1768
1769 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
1770 if (unlikely(!skb)) {
1771 if (netif_msg_rx_err(adapter))
1772 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1773 break;
1774 }
1775
1776
1777
1778
1779
1780
1781 vir_addr = skb->data;
1782 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1783 buffer_info->skb = skb;
1784 buffer_info->length = adapter->rx_buffer_len;
1785 buffer_info->dma = pci_map_single(pdev, vir_addr,
1786 buffer_info->length,
1787 PCI_DMA_FROMDEVICE);
1788 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1789 ATL1C_PCIMAP_FROMDEVICE);
1790 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1791 rfd_next_to_use = next_next;
1792 if (++next_next == rfd_ring->count)
1793 next_next = 0;
1794 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1795 next_info = &rfd_ring->buffer_info[next_next];
1796 num_alloc++;
1797 }
1798
1799 if (num_alloc) {
1800
1801 wmb();
1802 rfd_ring->next_to_use = rfd_next_to_use;
1803 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1804 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1805 }
1806
1807 return num_alloc;
1808}
1809
1810static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1811 struct atl1c_recv_ret_status *rrs, u16 num)
1812{
1813 u16 i;
1814
1815 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1816 rrd_ring->next_to_clean)) {
1817 rrs->word3 &= ~RRS_RXD_UPDATED;
1818 if (++rrd_ring->next_to_clean == rrd_ring->count)
1819 rrd_ring->next_to_clean = 0;
1820 }
1821}
1822
1823static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1824 struct atl1c_recv_ret_status *rrs, u16 num)
1825{
1826 u16 i;
1827 u16 rfd_index;
1828 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1829
1830 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1831 RRS_RX_RFD_INDEX_MASK;
1832 for (i = 0; i < num; i++) {
1833 buffer_info[rfd_index].skb = NULL;
1834 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1835 ATL1C_BUFFER_FREE);
1836 if (++rfd_index == rfd_ring->count)
1837 rfd_index = 0;
1838 }
1839 rfd_ring->next_to_clean = rfd_index;
1840}
1841
1842static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1843 int *work_done, int work_to_do)
1844{
1845 u16 rfd_num, rfd_index;
1846 u16 count = 0;
1847 u16 length;
1848 struct pci_dev *pdev = adapter->pdev;
1849 struct net_device *netdev = adapter->netdev;
1850 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1851 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1852 struct sk_buff *skb;
1853 struct atl1c_recv_ret_status *rrs;
1854 struct atl1c_buffer *buffer_info;
1855
1856 while (1) {
1857 if (*work_done >= work_to_do)
1858 break;
1859 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1860 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1861 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1862 RRS_RX_RFD_CNT_MASK;
1863 if (unlikely(rfd_num != 1))
1864
1865 if (netif_msg_rx_err(adapter))
1866 dev_warn(&pdev->dev,
1867 "Multi rfd not support yet!\n");
1868 goto rrs_checked;
1869 } else {
1870 break;
1871 }
1872rrs_checked:
1873 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1874 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1875 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1876 if (netif_msg_rx_err(adapter))
1877 dev_warn(&pdev->dev,
1878 "wrong packet! rrs word3 is %x\n",
1879 rrs->word3);
1880 continue;
1881 }
1882
1883 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1884 RRS_PKT_SIZE_MASK);
1885
1886 if (likely(rfd_num == 1)) {
1887 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1888 RRS_RX_RFD_INDEX_MASK;
1889 buffer_info = &rfd_ring->buffer_info[rfd_index];
1890 pci_unmap_single(pdev, buffer_info->dma,
1891 buffer_info->length, PCI_DMA_FROMDEVICE);
1892 skb = buffer_info->skb;
1893 } else {
1894
1895 if (netif_msg_rx_err(adapter))
1896 dev_warn(&pdev->dev,
1897 "Multi rfd not support yet!\n");
1898 break;
1899 }
1900 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1901 skb_put(skb, length - ETH_FCS_LEN);
1902 skb->protocol = eth_type_trans(skb, netdev);
1903 atl1c_rx_checksum(adapter, skb, rrs);
1904 if (rrs->word3 & RRS_VLAN_INS) {
1905 u16 vlan;
1906
1907 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1908 vlan = le16_to_cpu(vlan);
1909 __vlan_hwaccel_put_tag(skb, vlan);
1910 }
1911 netif_receive_skb(skb);
1912
1913 (*work_done)++;
1914 count++;
1915 }
1916 if (count)
1917 atl1c_alloc_rx_buffer(adapter, que);
1918}
1919
1920
1921
1922
1923
1924static int atl1c_clean(struct napi_struct *napi, int budget)
1925{
1926 struct atl1c_adapter *adapter =
1927 container_of(napi, struct atl1c_adapter, napi);
1928 int work_done = 0;
1929
1930
1931 if (!netif_carrier_ok(adapter->netdev))
1932 goto quit_polling;
1933
1934 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1935
1936 if (work_done < budget) {
1937quit_polling:
1938 napi_complete(napi);
1939 adapter->hw.intr_mask |= ISR_RX_PKT;
1940 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1941 }
1942 return work_done;
1943}
1944
1945#ifdef CONFIG_NET_POLL_CONTROLLER
1946
1947
1948
1949
1950
1951
1952static void atl1c_netpoll(struct net_device *netdev)
1953{
1954 struct atl1c_adapter *adapter = netdev_priv(netdev);
1955
1956 disable_irq(adapter->pdev->irq);
1957 atl1c_intr(adapter->pdev->irq, netdev);
1958 enable_irq(adapter->pdev->irq);
1959}
1960#endif
1961
1962static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1963{
1964 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1965 u16 next_to_use = 0;
1966 u16 next_to_clean = 0;
1967
1968 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1969 next_to_use = tpd_ring->next_to_use;
1970
1971 return (u16)(next_to_clean > next_to_use) ?
1972 (next_to_clean - next_to_use - 1) :
1973 (tpd_ring->count + next_to_clean - next_to_use - 1);
1974}
1975
1976
1977
1978
1979
1980
1981static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1982 enum atl1c_trans_queue type)
1983{
1984 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1985 struct atl1c_tpd_desc *tpd_desc;
1986 u16 next_to_use = 0;
1987
1988 next_to_use = tpd_ring->next_to_use;
1989 if (++tpd_ring->next_to_use == tpd_ring->count)
1990 tpd_ring->next_to_use = 0;
1991 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1992 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1993 return tpd_desc;
1994}
1995
1996static struct atl1c_buffer *
1997atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1998{
1999 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
2000
2001 return &tpd_ring->buffer_info[tpd -
2002 (struct atl1c_tpd_desc *)tpd_ring->desc];
2003}
2004
2005
2006static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
2007{
2008 u16 tpd_req;
2009 u16 proto_hdr_len = 0;
2010
2011 tpd_req = skb_shinfo(skb)->nr_frags + 1;
2012
2013 if (skb_is_gso(skb)) {
2014 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2015 if (proto_hdr_len < skb_headlen(skb))
2016 tpd_req++;
2017 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
2018 tpd_req++;
2019 }
2020 return tpd_req;
2021}
2022
2023static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2024 struct sk_buff *skb,
2025 struct atl1c_tpd_desc **tpd,
2026 enum atl1c_trans_queue type)
2027{
2028 struct pci_dev *pdev = adapter->pdev;
2029 u8 hdr_len;
2030 u32 real_len;
2031 unsigned short offload_type;
2032 int err;
2033
2034 if (skb_is_gso(skb)) {
2035 if (skb_header_cloned(skb)) {
2036 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2037 if (unlikely(err))
2038 return -1;
2039 }
2040 offload_type = skb_shinfo(skb)->gso_type;
2041
2042 if (offload_type & SKB_GSO_TCPV4) {
2043 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2044 + ntohs(ip_hdr(skb)->tot_len));
2045
2046 if (real_len < skb->len)
2047 pskb_trim(skb, real_len);
2048
2049 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2050 if (unlikely(skb->len == hdr_len)) {
2051
2052 if (netif_msg_tx_queued(adapter))
2053 dev_warn(&pdev->dev,
2054 "IPV4 tso with zero data??\n");
2055 goto check_sum;
2056 } else {
2057 ip_hdr(skb)->check = 0;
2058 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2059 ip_hdr(skb)->saddr,
2060 ip_hdr(skb)->daddr,
2061 0, IPPROTO_TCP, 0);
2062 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2063 }
2064 }
2065
2066 if (offload_type & SKB_GSO_TCPV6) {
2067 struct atl1c_tpd_ext_desc *etpd =
2068 *(struct atl1c_tpd_ext_desc **)(tpd);
2069
2070 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2071 *tpd = atl1c_get_tpd(adapter, type);
2072 ipv6_hdr(skb)->payload_len = 0;
2073
2074 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2075 if (unlikely(skb->len == hdr_len)) {
2076
2077 if (netif_msg_tx_queued(adapter))
2078 dev_warn(&pdev->dev,
2079 "IPV6 tso with zero data??\n");
2080 goto check_sum;
2081 } else
2082 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2083 &ipv6_hdr(skb)->saddr,
2084 &ipv6_hdr(skb)->daddr,
2085 0, IPPROTO_TCP, 0);
2086 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2087 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2088 etpd->pkt_len = cpu_to_le32(skb->len);
2089 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2090 }
2091
2092 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2093 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2094 TPD_TCPHDR_OFFSET_SHIFT;
2095 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2096 TPD_MSS_SHIFT;
2097 return 0;
2098 }
2099
2100check_sum:
2101 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2102 u8 css, cso;
2103 cso = skb_checksum_start_offset(skb);
2104
2105 if (unlikely(cso & 0x1)) {
2106 if (netif_msg_tx_err(adapter))
2107 dev_err(&adapter->pdev->dev,
2108 "payload offset should not an event number\n");
2109 return -1;
2110 } else {
2111 css = cso + skb->csum_offset;
2112
2113 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2114 TPD_PLOADOFFSET_SHIFT;
2115 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2116 TPD_CCSUM_OFFSET_SHIFT;
2117 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2118 }
2119 }
2120 return 0;
2121}
2122
2123static void atl1c_tx_map(struct atl1c_adapter *adapter,
2124 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2125 enum atl1c_trans_queue type)
2126{
2127 struct atl1c_tpd_desc *use_tpd = NULL;
2128 struct atl1c_buffer *buffer_info = NULL;
2129 u16 buf_len = skb_headlen(skb);
2130 u16 map_len = 0;
2131 u16 mapped_len = 0;
2132 u16 hdr_len = 0;
2133 u16 nr_frags;
2134 u16 f;
2135 int tso;
2136
2137 nr_frags = skb_shinfo(skb)->nr_frags;
2138 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2139 if (tso) {
2140
2141 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2142 use_tpd = tpd;
2143
2144 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2145 buffer_info->length = map_len;
2146 buffer_info->dma = pci_map_single(adapter->pdev,
2147 skb->data, hdr_len, PCI_DMA_TODEVICE);
2148 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2149 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2150 ATL1C_PCIMAP_TODEVICE);
2151 mapped_len += map_len;
2152 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2153 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2154 }
2155
2156 if (mapped_len < buf_len) {
2157
2158
2159 if (mapped_len == 0)
2160 use_tpd = tpd;
2161 else {
2162 use_tpd = atl1c_get_tpd(adapter, type);
2163 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2164 }
2165 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2166 buffer_info->length = buf_len - mapped_len;
2167 buffer_info->dma =
2168 pci_map_single(adapter->pdev, skb->data + mapped_len,
2169 buffer_info->length, PCI_DMA_TODEVICE);
2170 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2171 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2172 ATL1C_PCIMAP_TODEVICE);
2173 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2174 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2175 }
2176
2177 for (f = 0; f < nr_frags; f++) {
2178 struct skb_frag_struct *frag;
2179
2180 frag = &skb_shinfo(skb)->frags[f];
2181
2182 use_tpd = atl1c_get_tpd(adapter, type);
2183 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2184
2185 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2186 buffer_info->length = skb_frag_size(frag);
2187 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2188 frag, 0,
2189 buffer_info->length,
2190 DMA_TO_DEVICE);
2191 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2192 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2193 ATL1C_PCIMAP_TODEVICE);
2194 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2195 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2196 }
2197
2198
2199 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2200
2201
2202 buffer_info->skb = skb;
2203}
2204
2205static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2206 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2207{
2208 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2209 u32 prod_data;
2210
2211 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2212 switch (type) {
2213 case atl1c_trans_high:
2214 prod_data &= 0xFFFF0000;
2215 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2216 break;
2217 case atl1c_trans_normal:
2218 prod_data &= 0x0000FFFF;
2219 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2220 break;
2221 default:
2222 break;
2223 }
2224 wmb();
2225 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2226}
2227
2228static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2229 struct net_device *netdev)
2230{
2231 struct atl1c_adapter *adapter = netdev_priv(netdev);
2232 unsigned long flags;
2233 u16 tpd_req = 1;
2234 struct atl1c_tpd_desc *tpd;
2235 enum atl1c_trans_queue type = atl1c_trans_normal;
2236
2237 if (test_bit(__AT_DOWN, &adapter->flags)) {
2238 dev_kfree_skb_any(skb);
2239 return NETDEV_TX_OK;
2240 }
2241
2242 tpd_req = atl1c_cal_tpd_req(skb);
2243 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2244 if (netif_msg_pktdata(adapter))
2245 dev_info(&adapter->pdev->dev, "tx locked\n");
2246 return NETDEV_TX_LOCKED;
2247 }
2248
2249 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2250
2251 netif_stop_queue(netdev);
2252 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2253 return NETDEV_TX_BUSY;
2254 }
2255
2256 tpd = atl1c_get_tpd(adapter, type);
2257
2258
2259 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2260 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2261 dev_kfree_skb_any(skb);
2262 return NETDEV_TX_OK;
2263 }
2264
2265 if (unlikely(vlan_tx_tag_present(skb))) {
2266 u16 vlan = vlan_tx_tag_get(skb);
2267 __le16 tag;
2268
2269 vlan = cpu_to_le16(vlan);
2270 AT_VLAN_TO_TAG(vlan, tag);
2271 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2272 tpd->vlan_tag = tag;
2273 }
2274
2275 if (skb_network_offset(skb) != ETH_HLEN)
2276 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT;
2277
2278 atl1c_tx_map(adapter, skb, tpd, type);
2279 atl1c_tx_queue(adapter, skb, tpd, type);
2280
2281 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2282 return NETDEV_TX_OK;
2283}
2284
2285static void atl1c_free_irq(struct atl1c_adapter *adapter)
2286{
2287 struct net_device *netdev = adapter->netdev;
2288
2289 free_irq(adapter->pdev->irq, netdev);
2290
2291 if (adapter->have_msi)
2292 pci_disable_msi(adapter->pdev);
2293}
2294
2295static int atl1c_request_irq(struct atl1c_adapter *adapter)
2296{
2297 struct pci_dev *pdev = adapter->pdev;
2298 struct net_device *netdev = adapter->netdev;
2299 int flags = 0;
2300 int err = 0;
2301
2302 adapter->have_msi = true;
2303 err = pci_enable_msi(adapter->pdev);
2304 if (err) {
2305 if (netif_msg_ifup(adapter))
2306 dev_err(&pdev->dev,
2307 "Unable to allocate MSI interrupt Error: %d\n",
2308 err);
2309 adapter->have_msi = false;
2310 } else
2311 netdev->irq = pdev->irq;
2312
2313 if (!adapter->have_msi)
2314 flags |= IRQF_SHARED;
2315 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2316 netdev->name, netdev);
2317 if (err) {
2318 if (netif_msg_ifup(adapter))
2319 dev_err(&pdev->dev,
2320 "Unable to allocate interrupt Error: %d\n",
2321 err);
2322 if (adapter->have_msi)
2323 pci_disable_msi(adapter->pdev);
2324 return err;
2325 }
2326 if (netif_msg_ifup(adapter))
2327 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2328 return err;
2329}
2330
2331static int atl1c_up(struct atl1c_adapter *adapter)
2332{
2333 struct net_device *netdev = adapter->netdev;
2334 int num;
2335 int err;
2336 int i;
2337
2338 netif_carrier_off(netdev);
2339 atl1c_init_ring_ptrs(adapter);
2340 atl1c_set_multi(netdev);
2341 atl1c_restore_vlan(adapter);
2342
2343 for (i = 0; i < adapter->num_rx_queues; i++) {
2344 num = atl1c_alloc_rx_buffer(adapter, i);
2345 if (unlikely(num == 0)) {
2346 err = -ENOMEM;
2347 goto err_alloc_rx;
2348 }
2349 }
2350
2351 if (atl1c_configure(adapter)) {
2352 err = -EIO;
2353 goto err_up;
2354 }
2355
2356 err = atl1c_request_irq(adapter);
2357 if (unlikely(err))
2358 goto err_up;
2359
2360 clear_bit(__AT_DOWN, &adapter->flags);
2361 napi_enable(&adapter->napi);
2362 atl1c_irq_enable(adapter);
2363 atl1c_check_link_status(adapter);
2364 netif_start_queue(netdev);
2365 return err;
2366
2367err_up:
2368err_alloc_rx:
2369 atl1c_clean_rx_ring(adapter);
2370 return err;
2371}
2372
2373static void atl1c_down(struct atl1c_adapter *adapter)
2374{
2375 struct net_device *netdev = adapter->netdev;
2376
2377 atl1c_del_timer(adapter);
2378 adapter->work_event = 0;
2379
2380
2381 set_bit(__AT_DOWN, &adapter->flags);
2382 netif_carrier_off(netdev);
2383 napi_disable(&adapter->napi);
2384 atl1c_irq_disable(adapter);
2385 atl1c_free_irq(adapter);
2386
2387 atl1c_reset_mac(&adapter->hw);
2388 msleep(1);
2389
2390 adapter->link_speed = SPEED_0;
2391 adapter->link_duplex = -1;
2392 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2393 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2394 atl1c_clean_rx_ring(adapter);
2395}
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409static int atl1c_open(struct net_device *netdev)
2410{
2411 struct atl1c_adapter *adapter = netdev_priv(netdev);
2412 int err;
2413
2414
2415 if (test_bit(__AT_TESTING, &adapter->flags))
2416 return -EBUSY;
2417
2418
2419 err = atl1c_setup_ring_resources(adapter);
2420 if (unlikely(err))
2421 return err;
2422
2423 err = atl1c_up(adapter);
2424 if (unlikely(err))
2425 goto err_up;
2426
2427 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2428 u32 phy_data;
2429
2430 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2431 phy_data |= MDIO_AP_EN;
2432 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2433 }
2434 return 0;
2435
2436err_up:
2437 atl1c_free_irq(adapter);
2438 atl1c_free_ring_resources(adapter);
2439 atl1c_reset_mac(&adapter->hw);
2440 return err;
2441}
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454static int atl1c_close(struct net_device *netdev)
2455{
2456 struct atl1c_adapter *adapter = netdev_priv(netdev);
2457
2458 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2459 atl1c_down(adapter);
2460 atl1c_free_ring_resources(adapter);
2461 return 0;
2462}
2463
2464static int atl1c_suspend(struct device *dev)
2465{
2466 struct pci_dev *pdev = to_pci_dev(dev);
2467 struct net_device *netdev = pci_get_drvdata(pdev);
2468 struct atl1c_adapter *adapter = netdev_priv(netdev);
2469 struct atl1c_hw *hw = &adapter->hw;
2470 u32 mac_ctrl_data = 0;
2471 u32 master_ctrl_data = 0;
2472 u32 wol_ctrl_data = 0;
2473 u16 mii_intr_status_data = 0;
2474 u32 wufc = adapter->wol;
2475
2476 atl1c_disable_l0s_l1(hw);
2477 if (netif_running(netdev)) {
2478 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2479 atl1c_down(adapter);
2480 }
2481 netif_device_detach(netdev);
2482
2483 if (wufc)
2484 if (atl1c_phy_power_saving(hw) != 0)
2485 dev_dbg(&pdev->dev, "phy power saving failed");
2486
2487 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2488 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2489
2490 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2491 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2492 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2493 MAC_CTRL_PRMLEN_MASK) <<
2494 MAC_CTRL_PRMLEN_SHIFT);
2495 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2496 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2497
2498 if (wufc) {
2499 mac_ctrl_data |= MAC_CTRL_RX_EN;
2500 if (adapter->link_speed == SPEED_1000 ||
2501 adapter->link_speed == SPEED_0) {
2502 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2503 MAC_CTRL_SPEED_SHIFT;
2504 mac_ctrl_data |= MAC_CTRL_DUPLX;
2505 } else
2506 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2507 MAC_CTRL_SPEED_SHIFT;
2508
2509 if (adapter->link_duplex == DUPLEX_FULL)
2510 mac_ctrl_data |= MAC_CTRL_DUPLX;
2511
2512
2513 if (wufc & AT_WUFC_MAG)
2514 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2515
2516 if (wufc & AT_WUFC_LNKC) {
2517 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2518
2519 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2520 dev_dbg(&pdev->dev, "%s: read write phy "
2521 "register failed.\n",
2522 atl1c_driver_name);
2523 }
2524 }
2525
2526 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2527
2528 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
2529
2530
2531 if (wufc & AT_WUFC_MAG)
2532 mac_ctrl_data |= MAC_CTRL_BC_EN;
2533
2534 dev_dbg(&pdev->dev,
2535 "%s: suspend MAC=0x%x\n",
2536 atl1c_driver_name, mac_ctrl_data);
2537 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2538 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2539 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2540
2541 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2542 GPHY_CTRL_EXT_RESET);
2543 } else {
2544 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2545 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2546 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2547 mac_ctrl_data |= MAC_CTRL_DUPLX;
2548 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2549 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2550 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2551 hw->phy_configured = false;
2552 }
2553
2554 return 0;
2555}
2556
2557#ifdef CONFIG_PM_SLEEP
2558static int atl1c_resume(struct device *dev)
2559{
2560 struct pci_dev *pdev = to_pci_dev(dev);
2561 struct net_device *netdev = pci_get_drvdata(pdev);
2562 struct atl1c_adapter *adapter = netdev_priv(netdev);
2563
2564 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2565 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2566 ATL1C_PCIE_PHY_RESET);
2567
2568 atl1c_phy_reset(&adapter->hw);
2569 atl1c_reset_mac(&adapter->hw);
2570 atl1c_phy_init(&adapter->hw);
2571
2572#if 0
2573 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2574 pm_data &= ~PM_CTRLSTAT_PME_EN;
2575 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2576#endif
2577
2578 netif_device_attach(netdev);
2579 if (netif_running(netdev))
2580 atl1c_up(adapter);
2581
2582 return 0;
2583}
2584#endif
2585
2586static void atl1c_shutdown(struct pci_dev *pdev)
2587{
2588 struct net_device *netdev = pci_get_drvdata(pdev);
2589 struct atl1c_adapter *adapter = netdev_priv(netdev);
2590
2591 atl1c_suspend(&pdev->dev);
2592 pci_wake_from_d3(pdev, adapter->wol);
2593 pci_set_power_state(pdev, PCI_D3hot);
2594}
2595
2596static const struct net_device_ops atl1c_netdev_ops = {
2597 .ndo_open = atl1c_open,
2598 .ndo_stop = atl1c_close,
2599 .ndo_validate_addr = eth_validate_addr,
2600 .ndo_start_xmit = atl1c_xmit_frame,
2601 .ndo_set_mac_address = atl1c_set_mac_addr,
2602 .ndo_set_rx_mode = atl1c_set_multi,
2603 .ndo_change_mtu = atl1c_change_mtu,
2604 .ndo_fix_features = atl1c_fix_features,
2605 .ndo_set_features = atl1c_set_features,
2606 .ndo_do_ioctl = atl1c_ioctl,
2607 .ndo_tx_timeout = atl1c_tx_timeout,
2608 .ndo_get_stats = atl1c_get_stats,
2609#ifdef CONFIG_NET_POLL_CONTROLLER
2610 .ndo_poll_controller = atl1c_netpoll,
2611#endif
2612};
2613
2614static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2615{
2616 SET_NETDEV_DEV(netdev, &pdev->dev);
2617 pci_set_drvdata(pdev, netdev);
2618
2619 netdev->irq = pdev->irq;
2620 netdev->netdev_ops = &atl1c_netdev_ops;
2621 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2622 atl1c_set_ethtool_ops(netdev);
2623
2624
2625 netdev->hw_features = NETIF_F_SG |
2626 NETIF_F_HW_CSUM |
2627 NETIF_F_HW_VLAN_RX |
2628 NETIF_F_TSO |
2629 NETIF_F_TSO6;
2630 netdev->features = netdev->hw_features |
2631 NETIF_F_HW_VLAN_TX;
2632 return 0;
2633}
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646static int __devinit atl1c_probe(struct pci_dev *pdev,
2647 const struct pci_device_id *ent)
2648{
2649 struct net_device *netdev;
2650 struct atl1c_adapter *adapter;
2651 static int cards_found;
2652
2653 int err = 0;
2654
2655
2656 err = pci_enable_device_mem(pdev);
2657 if (err) {
2658 dev_err(&pdev->dev, "cannot enable PCI device\n");
2659 return err;
2660 }
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2673 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2674 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2675 goto err_dma;
2676 }
2677
2678 err = pci_request_regions(pdev, atl1c_driver_name);
2679 if (err) {
2680 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2681 goto err_pci_reg;
2682 }
2683
2684 pci_set_master(pdev);
2685
2686 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2687 if (netdev == NULL) {
2688 err = -ENOMEM;
2689 goto err_alloc_etherdev;
2690 }
2691
2692 err = atl1c_init_netdev(netdev, pdev);
2693 if (err) {
2694 dev_err(&pdev->dev, "init netdevice failed\n");
2695 goto err_init_netdev;
2696 }
2697 adapter = netdev_priv(netdev);
2698 adapter->bd_number = cards_found;
2699 adapter->netdev = netdev;
2700 adapter->pdev = pdev;
2701 adapter->hw.adapter = adapter;
2702 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2703 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2704 if (!adapter->hw.hw_addr) {
2705 err = -EIO;
2706 dev_err(&pdev->dev, "cannot map device registers\n");
2707 goto err_ioremap;
2708 }
2709 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2710
2711
2712 adapter->mii.dev = netdev;
2713 adapter->mii.mdio_read = atl1c_mdio_read;
2714 adapter->mii.mdio_write = atl1c_mdio_write;
2715 adapter->mii.phy_id_mask = 0x1f;
2716 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2717 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2718 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2719 (unsigned long)adapter);
2720
2721 err = atl1c_sw_init(adapter);
2722 if (err) {
2723 dev_err(&pdev->dev, "net device private data init failed\n");
2724 goto err_sw_init;
2725 }
2726 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2727 ATL1C_PCIE_PHY_RESET);
2728
2729
2730 atl1c_phy_reset(&adapter->hw);
2731
2732 err = atl1c_reset_mac(&adapter->hw);
2733 if (err) {
2734 err = -EIO;
2735 goto err_reset;
2736 }
2737
2738
2739
2740 err = atl1c_phy_init(&adapter->hw);
2741 if (err) {
2742 err = -EIO;
2743 goto err_reset;
2744 }
2745 if (atl1c_read_mac_addr(&adapter->hw)) {
2746
2747 netdev->addr_assign_type |= NET_ADDR_RANDOM;
2748 }
2749 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2750 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2751 if (netif_msg_probe(adapter))
2752 dev_dbg(&pdev->dev, "mac address : %pM\n",
2753 adapter->hw.mac_addr);
2754
2755 atl1c_hw_set_mac_addr(&adapter->hw);
2756 INIT_WORK(&adapter->common_task, atl1c_common_task);
2757 adapter->work_event = 0;
2758 err = register_netdev(netdev);
2759 if (err) {
2760 dev_err(&pdev->dev, "register netdevice failed\n");
2761 goto err_register;
2762 }
2763
2764 if (netif_msg_probe(adapter))
2765 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2766 cards_found++;
2767 return 0;
2768
2769err_reset:
2770err_register:
2771err_sw_init:
2772 iounmap(adapter->hw.hw_addr);
2773err_init_netdev:
2774err_ioremap:
2775 free_netdev(netdev);
2776err_alloc_etherdev:
2777 pci_release_regions(pdev);
2778err_pci_reg:
2779err_dma:
2780 pci_disable_device(pdev);
2781 return err;
2782}
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793static void __devexit atl1c_remove(struct pci_dev *pdev)
2794{
2795 struct net_device *netdev = pci_get_drvdata(pdev);
2796 struct atl1c_adapter *adapter = netdev_priv(netdev);
2797
2798 unregister_netdev(netdev);
2799 atl1c_phy_disable(&adapter->hw);
2800
2801 iounmap(adapter->hw.hw_addr);
2802
2803 pci_release_regions(pdev);
2804 pci_disable_device(pdev);
2805 free_netdev(netdev);
2806}
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2817 pci_channel_state_t state)
2818{
2819 struct net_device *netdev = pci_get_drvdata(pdev);
2820 struct atl1c_adapter *adapter = netdev_priv(netdev);
2821
2822 netif_device_detach(netdev);
2823
2824 if (state == pci_channel_io_perm_failure)
2825 return PCI_ERS_RESULT_DISCONNECT;
2826
2827 if (netif_running(netdev))
2828 atl1c_down(adapter);
2829
2830 pci_disable_device(pdev);
2831
2832
2833 return PCI_ERS_RESULT_NEED_RESET;
2834}
2835
2836
2837
2838
2839
2840
2841
2842
2843static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2844{
2845 struct net_device *netdev = pci_get_drvdata(pdev);
2846 struct atl1c_adapter *adapter = netdev_priv(netdev);
2847
2848 if (pci_enable_device(pdev)) {
2849 if (netif_msg_hw(adapter))
2850 dev_err(&pdev->dev,
2851 "Cannot re-enable PCI device after reset\n");
2852 return PCI_ERS_RESULT_DISCONNECT;
2853 }
2854 pci_set_master(pdev);
2855
2856 pci_enable_wake(pdev, PCI_D3hot, 0);
2857 pci_enable_wake(pdev, PCI_D3cold, 0);
2858
2859 atl1c_reset_mac(&adapter->hw);
2860
2861 return PCI_ERS_RESULT_RECOVERED;
2862}
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872static void atl1c_io_resume(struct pci_dev *pdev)
2873{
2874 struct net_device *netdev = pci_get_drvdata(pdev);
2875 struct atl1c_adapter *adapter = netdev_priv(netdev);
2876
2877 if (netif_running(netdev)) {
2878 if (atl1c_up(adapter)) {
2879 if (netif_msg_hw(adapter))
2880 dev_err(&pdev->dev,
2881 "Cannot bring device back up after reset\n");
2882 return;
2883 }
2884 }
2885
2886 netif_device_attach(netdev);
2887}
2888
2889static struct pci_error_handlers atl1c_err_handler = {
2890 .error_detected = atl1c_io_error_detected,
2891 .slot_reset = atl1c_io_slot_reset,
2892 .resume = atl1c_io_resume,
2893};
2894
2895static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2896
2897static struct pci_driver atl1c_driver = {
2898 .name = atl1c_driver_name,
2899 .id_table = atl1c_pci_tbl,
2900 .probe = atl1c_probe,
2901 .remove = __devexit_p(atl1c_remove),
2902 .shutdown = atl1c_shutdown,
2903 .err_handler = &atl1c_err_handler,
2904 .driver.pm = &atl1c_pm_ops,
2905};
2906
2907
2908
2909
2910
2911
2912
2913static int __init atl1c_init_module(void)
2914{
2915 return pci_register_driver(&atl1c_driver);
2916}
2917
2918
2919
2920
2921
2922
2923
2924static void __exit atl1c_exit_module(void)
2925{
2926 pci_unregister_driver(&atl1c_driver);
2927}
2928
2929module_init(atl1c_init_module);
2930module_exit(atl1c_exit_module);
2931