LXR linux/drivers/net/ethernet/intel/ixgbe/ixgbe

   1/*******************************************************************************
   2
   3  Intel 10 Gigabit PCI Express Linux driver
   4  Copyright(c) 1999 - 2012 Intel Corporation.
   5
   6  This program is free software; you can redistribute it and/or modify it
   7  under the terms and conditions of the GNU General Public License,
   8  version 2, as published by the Free Software Foundation.
   9
  10  This program is distributed in the hope it will be useful, but WITHOUT
  11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  more details.
  14
  15  You should have received a copy of the GNU General Public License along with
  16  this program; if not, write to the Free Software Foundation, Inc.,
  17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19  The full GNU General Public License is included in this distribution in
  20  the file called "COPYING".
  21
  22  Contact Information:
  23  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26*******************************************************************************/
  27
  28#ifndef _IXGBE_COMMON_H_
  29#define _IXGBE_COMMON_H_
  30
  31#include "ixgbe_type.h"
  32#include "ixgbe.h"
  33
  34u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
  35s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
  36s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
  37s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
  38s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
  39s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
  40s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
  41                                  u32 pba_num_size);
  42s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
  43s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
  44void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
  45s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
  46
  47s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
  48s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
  49
  50s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
  51s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  52s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  53                                               u16 words, u16 *data);
  54s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
  55s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  56                                   u16 words, u16 *data);
  57s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  58s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  59                                    u16 words, u16 *data);
  60s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  61                                       u16 *data);
  62s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  63                                              u16 words, u16 *data);
  64u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
  65s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
  66                                           u16 *checksum_val);
  67s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
  68
  69s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  70                          u32 enable_addr);
  71s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
  72s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
  73s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
  74                                      struct net_device *netdev);
  75s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
  76s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
  77s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);
  78s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);
  79s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
  80s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num);
  81s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw);
  82
  83s32 ixgbe_validate_mac_addr(u8 *mac_addr);
  84s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
  85void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
  86s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
  87s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  88s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  89s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
  90s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
  91                           u32 vind, bool vlan_on);
  92s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
  93s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
  94                                 ixgbe_link_speed *speed,
  95                                 bool *link_up, bool link_up_wait_to_complete);
  96s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
  97                                 u16 *wwpn_prefix);
  98s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
  99s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
 100void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf);
 101void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
 102s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
 103s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
 104                                 u8 build, u8 ver);
 105void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
 106
 107void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb,
 108                             u32 headroom, int strategy);
 109
 110#define IXGBE_WRITE_REG(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
 111
 112#ifndef writeq
 113#define writeq(val, addr) writel((u32) (val), addr); \
 114    writel((u32) (val >> 32), (addr + 4));
 115#endif
 116
 117#define IXGBE_WRITE_REG64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
 118
 119#define IXGBE_READ_REG(a, reg) readl((a)->hw_addr + (reg))
 120
 121#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
 122    writel((value), ((a)->hw_addr + (reg) + ((offset) << 2))))
 123
 124#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
 125    readl((a)->hw_addr + (reg) + ((offset) << 2)))
 126
 127#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
 128
 129#define hw_dbg(hw, format, arg...) \
 130        netdev_dbg(((struct ixgbe_adapter *)(hw->back))->netdev, format, ##arg)
 131#define e_dev_info(format, arg...) \
 132        dev_info(&adapter->pdev->dev, format, ## arg)
 133#define e_dev_warn(format, arg...) \
 134        dev_warn(&adapter->pdev->dev, format, ## arg)
 135#define e_dev_err(format, arg...) \
 136        dev_err(&adapter->pdev->dev, format, ## arg)
 137#define e_dev_notice(format, arg...) \
 138        dev_notice(&adapter->pdev->dev, format, ## arg)
 139#define e_info(msglvl, format, arg...) \
 140        netif_info(adapter, msglvl, adapter->netdev, format, ## arg)
 141#define e_err(msglvl, format, arg...) \
 142        netif_err(adapter, msglvl, adapter->netdev, format, ## arg)
 143#define e_warn(msglvl, format, arg...) \
 144        netif_warn(adapter, msglvl, adapter->netdev, format, ## arg)
 145#define e_crit(msglvl, format, arg...) \
 146        netif_crit(adapter, msglvl, adapter->netdev, format, ## arg)
 147#endif /* IXGBE_COMMON */
 148