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10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include "../iio.h"
20#include "../sysfs.h"
21#include "dac.h"
22
23#define AD5764_REG_SF_NOP 0x0
24#define AD5764_REG_SF_CONFIG 0x1
25#define AD5764_REG_SF_CLEAR 0x4
26#define AD5764_REG_SF_LOAD 0x5
27#define AD5764_REG_DATA(x) ((2 << 3) | (x))
28#define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
29#define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
30#define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
31
32#define AD5764_NUM_CHANNELS 4
33
34
35
36
37
38
39
40
41struct ad5764_chip_info {
42 unsigned long int_vref;
43 const struct iio_chan_spec *channels;
44};
45
46
47
48
49
50
51
52
53
54struct ad5764_state {
55 struct spi_device *spi;
56 const struct ad5764_chip_info *chip_info;
57 struct regulator_bulk_data vref_reg[2];
58
59
60
61
62
63 union {
64 __be32 d32;
65 u8 d8[4];
66 } data[2] ____cacheline_aligned;
67};
68
69enum ad5764_type {
70 ID_AD5744,
71 ID_AD5744R,
72 ID_AD5764,
73 ID_AD5764R,
74};
75
76#define AD5764_CHANNEL(_chan, _bits) { \
77 .type = IIO_VOLTAGE, \
78 .indexed = 1, \
79 .output = 1, \
80 .channel = (_chan), \
81 .address = (_chan), \
82 .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
83 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
84 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
85 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
86 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
87}
88
89#define DECLARE_AD5764_CHANNELS(_name, _bits) \
90const struct iio_chan_spec _name##_channels[] = { \
91 AD5764_CHANNEL(0, (_bits)), \
92 AD5764_CHANNEL(1, (_bits)), \
93 AD5764_CHANNEL(2, (_bits)), \
94 AD5764_CHANNEL(3, (_bits)), \
95};
96
97static DECLARE_AD5764_CHANNELS(ad5764, 16);
98static DECLARE_AD5764_CHANNELS(ad5744, 14);
99
100static const struct ad5764_chip_info ad5764_chip_infos[] = {
101 [ID_AD5744] = {
102 .int_vref = 0,
103 .channels = ad5744_channels,
104 },
105 [ID_AD5744R] = {
106 .int_vref = 5000000,
107 .channels = ad5744_channels,
108 },
109 [ID_AD5764] = {
110 .int_vref = 0,
111 .channels = ad5764_channels,
112 },
113 [ID_AD5764R] = {
114 .int_vref = 5000000,
115 .channels = ad5764_channels,
116 },
117};
118
119static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
120 unsigned int val)
121{
122 struct ad5764_state *st = iio_priv(indio_dev);
123 int ret;
124
125 mutex_lock(&indio_dev->mlock);
126 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
127
128 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
129 mutex_unlock(&indio_dev->mlock);
130
131 return ret;
132}
133
134static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
135 unsigned int *val)
136{
137 struct ad5764_state *st = iio_priv(indio_dev);
138 struct spi_message m;
139 int ret;
140 struct spi_transfer t[] = {
141 {
142 .tx_buf = &st->data[0].d8[1],
143 .len = 3,
144 .cs_change = 1,
145 }, {
146 .rx_buf = &st->data[1].d8[1],
147 .len = 3,
148 },
149 };
150
151 spi_message_init(&m);
152 spi_message_add_tail(&t[0], &m);
153 spi_message_add_tail(&t[1], &m);
154
155 mutex_lock(&indio_dev->mlock);
156
157 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
158
159 ret = spi_sync(st->spi, &m);
160 if (ret >= 0)
161 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
162
163 mutex_unlock(&indio_dev->mlock);
164
165 return ret;
166}
167
168static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
169{
170 switch (info) {
171 case 0:
172 return AD5764_REG_DATA(chan->address);
173 case IIO_CHAN_INFO_CALIBBIAS:
174 return AD5764_REG_OFFSET(chan->address);
175 case IIO_CHAN_INFO_CALIBSCALE:
176 return AD5764_REG_FINE_GAIN(chan->address);
177 default:
178 break;
179 }
180
181 return 0;
182}
183
184static int ad5764_write_raw(struct iio_dev *indio_dev,
185 struct iio_chan_spec const *chan, int val, int val2, long info)
186{
187 const int max_val = (1 << chan->scan_type.realbits);
188 unsigned int reg;
189
190 switch (info) {
191 case 0:
192 if (val >= max_val || val < 0)
193 return -EINVAL;
194 val <<= chan->scan_type.shift;
195 break;
196 case IIO_CHAN_INFO_CALIBBIAS:
197 if (val >= 128 || val < -128)
198 return -EINVAL;
199 break;
200 case IIO_CHAN_INFO_CALIBSCALE:
201 if (val >= 32 || val < -32)
202 return -EINVAL;
203 break;
204 default:
205 return -EINVAL;
206 }
207
208 reg = ad5764_chan_info_to_reg(chan, info);
209 return ad5764_write(indio_dev, reg, (u16)val);
210}
211
212static int ad5764_get_channel_vref(struct ad5764_state *st,
213 unsigned int channel)
214{
215 if (st->chip_info->int_vref)
216 return st->chip_info->int_vref;
217 else
218 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
219}
220
221static int ad5764_read_raw(struct iio_dev *indio_dev,
222 struct iio_chan_spec const *chan, int *val, int *val2, long info)
223{
224 struct ad5764_state *st = iio_priv(indio_dev);
225 unsigned long scale_uv;
226 unsigned int reg;
227 int vref;
228 int ret;
229
230 switch (info) {
231 case 0:
232 reg = AD5764_REG_DATA(chan->address);
233 ret = ad5764_read(indio_dev, reg, val);
234 if (ret < 0)
235 return ret;
236 *val >>= chan->scan_type.shift;
237 return IIO_VAL_INT;
238 case IIO_CHAN_INFO_CALIBBIAS:
239 reg = AD5764_REG_OFFSET(chan->address);
240 ret = ad5764_read(indio_dev, reg, val);
241 if (ret < 0)
242 return ret;
243 *val = sign_extend32(*val, 7);
244 return IIO_VAL_INT;
245 case IIO_CHAN_INFO_CALIBSCALE:
246 reg = AD5764_REG_FINE_GAIN(chan->address);
247 ret = ad5764_read(indio_dev, reg, val);
248 if (ret < 0)
249 return ret;
250 *val = sign_extend32(*val, 5);
251 return IIO_VAL_INT;
252 case IIO_CHAN_INFO_SCALE:
253
254 vref = ad5764_get_channel_vref(st, chan->channel);
255 if (vref < 0)
256 return vref;
257
258 scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
259 *val = scale_uv / 100000;
260 *val2 = (scale_uv % 100000) * 10;
261 return IIO_VAL_INT_PLUS_MICRO;
262 case IIO_CHAN_INFO_OFFSET:
263 *val = -(1 << chan->scan_type.realbits) / 2;
264 return IIO_VAL_INT;
265 }
266
267 return -EINVAL;
268}
269
270static const struct iio_info ad5764_info = {
271 .read_raw = ad5764_read_raw,
272 .write_raw = ad5764_write_raw,
273 .driver_module = THIS_MODULE,
274};
275
276static int __devinit ad5764_probe(struct spi_device *spi)
277{
278 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
279 struct iio_dev *indio_dev;
280 struct ad5764_state *st;
281 int ret;
282
283 indio_dev = iio_allocate_device(sizeof(*st));
284 if (indio_dev == NULL) {
285 dev_err(&spi->dev, "Failed to allocate iio device\n");
286 return -ENOMEM;
287 }
288
289 st = iio_priv(indio_dev);
290 spi_set_drvdata(spi, indio_dev);
291
292 st->spi = spi;
293 st->chip_info = &ad5764_chip_infos[type];
294
295 indio_dev->dev.parent = &spi->dev;
296 indio_dev->name = spi_get_device_id(spi)->name;
297 indio_dev->info = &ad5764_info;
298 indio_dev->modes = INDIO_DIRECT_MODE;
299 indio_dev->num_channels = AD5764_NUM_CHANNELS;
300 indio_dev->channels = st->chip_info->channels;
301
302 if (st->chip_info->int_vref == 0) {
303 st->vref_reg[0].supply = "vrefAB";
304 st->vref_reg[1].supply = "vrefCD";
305
306 ret = regulator_bulk_get(&st->spi->dev,
307 ARRAY_SIZE(st->vref_reg), st->vref_reg);
308 if (ret) {
309 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
310 ret);
311 goto error_free;
312 }
313
314 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
315 st->vref_reg);
316 if (ret) {
317 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
318 ret);
319 goto error_free_reg;
320 }
321 }
322
323 ret = iio_device_register(indio_dev);
324 if (ret) {
325 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
326 goto error_disable_reg;
327 }
328
329 return 0;
330
331error_disable_reg:
332 if (st->chip_info->int_vref == 0)
333 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
334error_free_reg:
335 if (st->chip_info->int_vref == 0)
336 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
337error_free:
338 iio_free_device(indio_dev);
339
340 return ret;
341}
342
343static int __devexit ad5764_remove(struct spi_device *spi)
344{
345 struct iio_dev *indio_dev = spi_get_drvdata(spi);
346 struct ad5764_state *st = iio_priv(indio_dev);
347
348 iio_device_unregister(indio_dev);
349
350 if (st->chip_info->int_vref == 0) {
351 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
352 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
353 }
354
355 iio_free_device(indio_dev);
356
357 return 0;
358}
359
360static const struct spi_device_id ad5764_ids[] = {
361 { "ad5744", ID_AD5744 },
362 { "ad5744r", ID_AD5744R },
363 { "ad5764", ID_AD5764 },
364 { "ad5764r", ID_AD5764R },
365 { }
366};
367MODULE_DEVICE_TABLE(spi, ad5764_ids);
368
369static struct spi_driver ad5764_driver = {
370 .driver = {
371 .name = "ad5764",
372 .owner = THIS_MODULE,
373 },
374 .probe = ad5764_probe,
375 .remove = __devexit_p(ad5764_remove),
376 .id_table = ad5764_ids,
377};
378module_spi_driver(ad5764_driver);
379
380MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
381MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
382MODULE_LICENSE("GPL v2");
383
