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17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/dma-mapping.h>
21#include <linux/interrupt.h>
22#include <linux/delay.h>
23#include <linux/gfp.h>
24#include <linux/of_platform.h>
25#include <linux/list.h>
26#include <linux/slab.h>
27
28#include <sound/core.h>
29#include <sound/pcm.h>
30#include <sound/pcm_params.h>
31#include <sound/soc.h>
32
33#include <asm/io.h>
34
35#include "fsl_dma.h"
36#include "fsl_ssi.h"
37
38
39
40
41
42#define FSLDMA_PCM_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
43 SNDRV_PCM_FMTBIT_U8 | \
44 SNDRV_PCM_FMTBIT_S16_LE | \
45 SNDRV_PCM_FMTBIT_S16_BE | \
46 SNDRV_PCM_FMTBIT_U16_LE | \
47 SNDRV_PCM_FMTBIT_U16_BE | \
48 SNDRV_PCM_FMTBIT_S24_LE | \
49 SNDRV_PCM_FMTBIT_S24_BE | \
50 SNDRV_PCM_FMTBIT_U24_LE | \
51 SNDRV_PCM_FMTBIT_U24_BE | \
52 SNDRV_PCM_FMTBIT_S32_LE | \
53 SNDRV_PCM_FMTBIT_S32_BE | \
54 SNDRV_PCM_FMTBIT_U32_LE | \
55 SNDRV_PCM_FMTBIT_U32_BE)
56
57#define FSLDMA_PCM_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
58 SNDRV_PCM_RATE_CONTINUOUS)
59
60struct dma_object {
61 struct snd_soc_platform_driver dai;
62 dma_addr_t ssi_stx_phys;
63 dma_addr_t ssi_srx_phys;
64 unsigned int ssi_fifo_depth;
65 struct ccsr_dma_channel __iomem *channel;
66 unsigned int irq;
67 bool assigned;
68 char path[1];
69};
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74
75#define NUM_DMA_LINKS 2
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98struct fsl_dma_private {
99 struct fsl_dma_link_descriptor link[NUM_DMA_LINKS];
100 struct ccsr_dma_channel __iomem *dma_channel;
101 unsigned int irq;
102 struct snd_pcm_substream *substream;
103 dma_addr_t ssi_sxx_phys;
104 unsigned int ssi_fifo_depth;
105 dma_addr_t ld_buf_phys;
106 unsigned int current_link;
107 dma_addr_t dma_buf_phys;
108 dma_addr_t dma_buf_next;
109 dma_addr_t dma_buf_end;
110 size_t period_size;
111 unsigned int num_periods;
112};
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133static const struct snd_pcm_hardware fsl_dma_hardware = {
134
135 .info = SNDRV_PCM_INFO_INTERLEAVED |
136 SNDRV_PCM_INFO_MMAP |
137 SNDRV_PCM_INFO_MMAP_VALID |
138 SNDRV_PCM_INFO_JOINT_DUPLEX |
139 SNDRV_PCM_INFO_PAUSE,
140 .formats = FSLDMA_PCM_FORMATS,
141 .rates = FSLDMA_PCM_RATES,
142 .rate_min = 5512,
143 .rate_max = 192000,
144 .period_bytes_min = 512,
145 .period_bytes_max = (u32) -1,
146 .periods_min = NUM_DMA_LINKS,
147 .periods_max = (unsigned int) -1,
148 .buffer_bytes_max = 128 * 1024,
149};
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156
157static void fsl_dma_abort_stream(struct snd_pcm_substream *substream)
158{
159 unsigned long flags;
160
161 snd_pcm_stream_lock_irqsave(substream, flags);
162
163 if (snd_pcm_running(substream))
164 snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
165
166 snd_pcm_stream_unlock_irqrestore(substream, flags);
167}
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174
175static void fsl_dma_update_pointers(struct fsl_dma_private *dma_private)
176{
177 struct fsl_dma_link_descriptor *link =
178 &dma_private->link[dma_private->current_link];
179
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183
184 if (dma_private->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
185 link->source_addr = cpu_to_be32(dma_private->dma_buf_next);
186#ifdef CONFIG_PHYS_64BIT
187 link->source_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP |
188 upper_32_bits(dma_private->dma_buf_next));
189#endif
190 } else {
191 link->dest_addr = cpu_to_be32(dma_private->dma_buf_next);
192#ifdef CONFIG_PHYS_64BIT
193 link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP |
194 upper_32_bits(dma_private->dma_buf_next));
195#endif
196 }
197
198
199 dma_private->dma_buf_next += dma_private->period_size;
200
201 if (dma_private->dma_buf_next >= dma_private->dma_buf_end)
202 dma_private->dma_buf_next = dma_private->dma_buf_phys;
203
204 if (++dma_private->current_link >= NUM_DMA_LINKS)
205 dma_private->current_link = 0;
206}
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213
214static irqreturn_t fsl_dma_isr(int irq, void *dev_id)
215{
216 struct fsl_dma_private *dma_private = dev_id;
217 struct snd_pcm_substream *substream = dma_private->substream;
218 struct snd_soc_pcm_runtime *rtd = substream->private_data;
219 struct device *dev = rtd->platform->dev;
220 struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
221 irqreturn_t ret = IRQ_NONE;
222 u32 sr, sr2 = 0;
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226
227 sr = in_be32(&dma_channel->sr);
228
229 if (sr & CCSR_DMA_SR_TE) {
230 dev_err(dev, "dma transmit error\n");
231 fsl_dma_abort_stream(substream);
232 sr2 |= CCSR_DMA_SR_TE;
233 ret = IRQ_HANDLED;
234 }
235
236 if (sr & CCSR_DMA_SR_CH)
237 ret = IRQ_HANDLED;
238
239 if (sr & CCSR_DMA_SR_PE) {
240 dev_err(dev, "dma programming error\n");
241 fsl_dma_abort_stream(substream);
242 sr2 |= CCSR_DMA_SR_PE;
243 ret = IRQ_HANDLED;
244 }
245
246 if (sr & CCSR_DMA_SR_EOLNI) {
247 sr2 |= CCSR_DMA_SR_EOLNI;
248 ret = IRQ_HANDLED;
249 }
250
251 if (sr & CCSR_DMA_SR_CB)
252 ret = IRQ_HANDLED;
253
254 if (sr & CCSR_DMA_SR_EOSI) {
255
256 snd_pcm_period_elapsed(substream);
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262
263 if (dma_private->num_periods != NUM_DMA_LINKS)
264 fsl_dma_update_pointers(dma_private);
265
266 sr2 |= CCSR_DMA_SR_EOSI;
267 ret = IRQ_HANDLED;
268 }
269
270 if (sr & CCSR_DMA_SR_EOLSI) {
271 sr2 |= CCSR_DMA_SR_EOLSI;
272 ret = IRQ_HANDLED;
273 }
274
275
276 if (sr2)
277 out_be32(&dma_channel->sr, sr2);
278
279 return ret;
280}
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297static int fsl_dma_new(struct snd_soc_pcm_runtime *rtd)
298{
299 struct snd_card *card = rtd->card->snd_card;
300 struct snd_pcm *pcm = rtd->pcm;
301 static u64 fsl_dma_dmamask = DMA_BIT_MASK(36);
302 int ret;
303
304 if (!card->dev->dma_mask)
305 card->dev->dma_mask = &fsl_dma_dmamask;
306
307 if (!card->dev->coherent_dma_mask)
308 card->dev->coherent_dma_mask = fsl_dma_dmamask;
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312
313
314 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
315 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, card->dev,
316 fsl_dma_hardware.buffer_bytes_max,
317 &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
318 if (ret) {
319 dev_err(card->dev, "can't alloc playback dma buffer\n");
320 return ret;
321 }
322 }
323
324 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
325 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, card->dev,
326 fsl_dma_hardware.buffer_bytes_max,
327 &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer);
328 if (ret) {
329 dev_err(card->dev, "can't alloc capture dma buffer\n");
330 snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
331 return ret;
332 }
333 }
334
335 return 0;
336}
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400static int fsl_dma_open(struct snd_pcm_substream *substream)
401{
402 struct snd_pcm_runtime *runtime = substream->runtime;
403 struct snd_soc_pcm_runtime *rtd = substream->private_data;
404 struct device *dev = rtd->platform->dev;
405 struct dma_object *dma =
406 container_of(rtd->platform->driver, struct dma_object, dai);
407 struct fsl_dma_private *dma_private;
408 struct ccsr_dma_channel __iomem *dma_channel;
409 dma_addr_t ld_buf_phys;
410 u64 temp_link;
411 u32 mr;
412 unsigned int channel;
413 int ret = 0;
414 unsigned int i;
415
416
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418
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420
421 ret = snd_pcm_hw_constraint_integer(runtime,
422 SNDRV_PCM_HW_PARAM_PERIODS);
423 if (ret < 0) {
424 dev_err(dev, "invalid buffer size\n");
425 return ret;
426 }
427
428 channel = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0 : 1;
429
430 if (dma->assigned) {
431 dev_err(dev, "dma channel already assigned\n");
432 return -EBUSY;
433 }
434
435 dma_private = dma_alloc_coherent(dev, sizeof(struct fsl_dma_private),
436 &ld_buf_phys, GFP_KERNEL);
437 if (!dma_private) {
438 dev_err(dev, "can't allocate dma private data\n");
439 return -ENOMEM;
440 }
441 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
442 dma_private->ssi_sxx_phys = dma->ssi_stx_phys;
443 else
444 dma_private->ssi_sxx_phys = dma->ssi_srx_phys;
445
446 dma_private->ssi_fifo_depth = dma->ssi_fifo_depth;
447 dma_private->dma_channel = dma->channel;
448 dma_private->irq = dma->irq;
449 dma_private->substream = substream;
450 dma_private->ld_buf_phys = ld_buf_phys;
451 dma_private->dma_buf_phys = substream->dma_buffer.addr;
452
453 ret = request_irq(dma_private->irq, fsl_dma_isr, 0, "fsldma-audio",
454 dma_private);
455 if (ret) {
456 dev_err(dev, "can't register ISR for IRQ %u (ret=%i)\n",
457 dma_private->irq, ret);
458 dma_free_coherent(dev, sizeof(struct fsl_dma_private),
459 dma_private, dma_private->ld_buf_phys);
460 return ret;
461 }
462
463 dma->assigned = 1;
464
465 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
466 snd_soc_set_runtime_hwparams(substream, &fsl_dma_hardware);
467 runtime->private_data = dma_private;
468
469
470
471 dma_channel = dma_private->dma_channel;
472
473 temp_link = dma_private->ld_buf_phys +
474 sizeof(struct fsl_dma_link_descriptor);
475
476 for (i = 0; i < NUM_DMA_LINKS; i++) {
477 dma_private->link[i].next = cpu_to_be64(temp_link);
478
479 temp_link += sizeof(struct fsl_dma_link_descriptor);
480 }
481
482 dma_private->link[i - 1].next = cpu_to_be64(dma_private->ld_buf_phys);
483
484
485 out_be32(&dma_channel->clndar,
486 CCSR_DMA_CLNDAR_ADDR(dma_private->ld_buf_phys));
487 out_be32(&dma_channel->eclndar,
488 CCSR_DMA_ECLNDAR_ADDR(dma_private->ld_buf_phys));
489
490
491 out_be32(&dma_channel->bcr, 0);
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497 mr = in_be32(&dma_channel->mr) &
498 ~(CCSR_DMA_MR_CA | CCSR_DMA_MR_DAHE | CCSR_DMA_MR_SAHE);
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515 mr |= CCSR_DMA_MR_EOSIE | CCSR_DMA_MR_EIE | CCSR_DMA_MR_EMP_EN |
516 CCSR_DMA_MR_EMS_EN;
517
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520 mr |= (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
521 CCSR_DMA_MR_DAHE : CCSR_DMA_MR_SAHE;
522
523 out_be32(&dma_channel->mr, mr);
524
525 return 0;
526}
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552static int fsl_dma_hw_params(struct snd_pcm_substream *substream,
553 struct snd_pcm_hw_params *hw_params)
554{
555 struct snd_pcm_runtime *runtime = substream->runtime;
556 struct fsl_dma_private *dma_private = runtime->private_data;
557 struct snd_soc_pcm_runtime *rtd = substream->private_data;
558 struct device *dev = rtd->platform->dev;
559
560
561 unsigned int sample_bits =
562 snd_pcm_format_physical_width(params_format(hw_params));
563
564
565 unsigned int sample_bytes = sample_bits / 8;
566
567
568 dma_addr_t ssi_sxx_phys = dma_private->ssi_sxx_phys;
569
570
571 size_t buffer_size = params_buffer_bytes(hw_params);
572
573
574 size_t period_size = params_period_bytes(hw_params);
575
576
577 dma_addr_t temp_addr = substream->dma_buffer.addr;
578
579
580 struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
581
582 u32 mr;
583
584 unsigned int i;
585
586
587 dma_private->period_size = period_size;
588 dma_private->num_periods = params_periods(hw_params);
589 dma_private->dma_buf_end = dma_private->dma_buf_phys + buffer_size;
590 dma_private->dma_buf_next = dma_private->dma_buf_phys +
591 (NUM_DMA_LINKS * period_size);
592
593 if (dma_private->dma_buf_next >= dma_private->dma_buf_end)
594
595 dma_private->dma_buf_next = dma_private->dma_buf_phys;
596
597 mr = in_be32(&dma_channel->mr) & ~(CCSR_DMA_MR_BWC_MASK |
598 CCSR_DMA_MR_SAHTS_MASK | CCSR_DMA_MR_DAHTS_MASK);
599
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603
604
605 switch (sample_bits) {
606 case 8:
607 mr |= CCSR_DMA_MR_DAHTS_1 | CCSR_DMA_MR_SAHTS_1;
608 ssi_sxx_phys += 3;
609 break;
610 case 16:
611 mr |= CCSR_DMA_MR_DAHTS_2 | CCSR_DMA_MR_SAHTS_2;
612 ssi_sxx_phys += 2;
613 break;
614 case 32:
615 mr |= CCSR_DMA_MR_DAHTS_4 | CCSR_DMA_MR_SAHTS_4;
616 break;
617 default:
618
619 dev_err(dev, "unsupported sample size %u\n", sample_bits);
620 return -EINVAL;
621 }
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654 mr |= CCSR_DMA_MR_BWC((dma_private->ssi_fifo_depth - 2) * sample_bytes);
655
656 out_be32(&dma_channel->mr, mr);
657
658 for (i = 0; i < NUM_DMA_LINKS; i++) {
659 struct fsl_dma_link_descriptor *link = &dma_private->link[i];
660
661 link->count = cpu_to_be32(period_size);
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680 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
681 link->source_addr = cpu_to_be32(temp_addr);
682 link->source_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP |
683 upper_32_bits(temp_addr));
684
685 link->dest_addr = cpu_to_be32(ssi_sxx_phys);
686 link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_NOSNOOP |
687 upper_32_bits(ssi_sxx_phys));
688 } else {
689 link->source_addr = cpu_to_be32(ssi_sxx_phys);
690 link->source_attr = cpu_to_be32(CCSR_DMA_ATR_NOSNOOP |
691 upper_32_bits(ssi_sxx_phys));
692
693 link->dest_addr = cpu_to_be32(temp_addr);
694 link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP |
695 upper_32_bits(temp_addr));
696 }
697
698 temp_addr += period_size;
699 }
700
701 return 0;
702}
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715
716static snd_pcm_uframes_t fsl_dma_pointer(struct snd_pcm_substream *substream)
717{
718 struct snd_pcm_runtime *runtime = substream->runtime;
719 struct fsl_dma_private *dma_private = runtime->private_data;
720 struct snd_soc_pcm_runtime *rtd = substream->private_data;
721 struct device *dev = rtd->platform->dev;
722 struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
723 dma_addr_t position;
724 snd_pcm_uframes_t frames;
725
726
727
728
729
730 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
731 position = in_be32(&dma_channel->sar);
732#ifdef CONFIG_PHYS_64BIT
733 position |= (u64)(in_be32(&dma_channel->satr) &
734 CCSR_DMA_ATR_ESAD_MASK) << 32;
735#endif
736 } else {
737 position = in_be32(&dma_channel->dar);
738#ifdef CONFIG_PHYS_64BIT
739 position |= (u64)(in_be32(&dma_channel->datr) &
740 CCSR_DMA_ATR_ESAD_MASK) << 32;
741#endif
742 }
743
744
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747
748
749
750
751 if (!position)
752 return 0;
753
754 if ((position < dma_private->dma_buf_phys) ||
755 (position > dma_private->dma_buf_end)) {
756 dev_err(dev, "dma pointer is out of range, halting stream\n");
757 return SNDRV_PCM_POS_XRUN;
758 }
759
760 frames = bytes_to_frames(runtime, position - dma_private->dma_buf_phys);
761
762
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764
765
766 if (frames == runtime->buffer_size)
767 frames = 0;
768
769 return frames;
770}
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780static int fsl_dma_hw_free(struct snd_pcm_substream *substream)
781{
782 struct snd_pcm_runtime *runtime = substream->runtime;
783 struct fsl_dma_private *dma_private = runtime->private_data;
784
785 if (dma_private) {
786 struct ccsr_dma_channel __iomem *dma_channel;
787
788 dma_channel = dma_private->dma_channel;
789
790
791 out_be32(&dma_channel->mr, CCSR_DMA_MR_CA);
792 out_be32(&dma_channel->mr, 0);
793
794
795 out_be32(&dma_channel->sr, -1);
796 out_be32(&dma_channel->clndar, 0);
797 out_be32(&dma_channel->eclndar, 0);
798 out_be32(&dma_channel->satr, 0);
799 out_be32(&dma_channel->sar, 0);
800 out_be32(&dma_channel->datr, 0);
801 out_be32(&dma_channel->dar, 0);
802 out_be32(&dma_channel->bcr, 0);
803 out_be32(&dma_channel->nlndar, 0);
804 out_be32(&dma_channel->enlndar, 0);
805 }
806
807 return 0;
808}
809
810
811
812
813static int fsl_dma_close(struct snd_pcm_substream *substream)
814{
815 struct snd_pcm_runtime *runtime = substream->runtime;
816 struct fsl_dma_private *dma_private = runtime->private_data;
817 struct snd_soc_pcm_runtime *rtd = substream->private_data;
818 struct device *dev = rtd->platform->dev;
819 struct dma_object *dma =
820 container_of(rtd->platform->driver, struct dma_object, dai);
821
822 if (dma_private) {
823 if (dma_private->irq)
824 free_irq(dma_private->irq, dma_private);
825
826 if (dma_private->ld_buf_phys) {
827 dma_unmap_single(dev, dma_private->ld_buf_phys,
828 sizeof(dma_private->link),
829 DMA_TO_DEVICE);
830 }
831
832
833 dma_free_coherent(dev, sizeof(struct fsl_dma_private),
834 dma_private, dma_private->ld_buf_phys);
835 substream->runtime->private_data = NULL;
836 }
837
838 dma->assigned = 0;
839
840 return 0;
841}
842
843
844
845
846static void fsl_dma_free_dma_buffers(struct snd_pcm *pcm)
847{
848 struct snd_pcm_substream *substream;
849 unsigned int i;
850
851 for (i = 0; i < ARRAY_SIZE(pcm->streams); i++) {
852 substream = pcm->streams[i].substream;
853 if (substream) {
854 snd_dma_free_pages(&substream->dma_buffer);
855 substream->dma_buffer.area = NULL;
856 substream->dma_buffer.addr = 0;
857 }
858 }
859}
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871
872static struct device_node *find_ssi_node(struct device_node *dma_channel_np)
873{
874 struct device_node *ssi_np, *np;
875
876 for_each_compatible_node(ssi_np, NULL, "fsl,mpc8610-ssi") {
877
878
879
880 np = of_parse_phandle(ssi_np, "fsl,playback-dma", 0);
881 of_node_put(np);
882 if (np == dma_channel_np)
883 return ssi_np;
884
885 np = of_parse_phandle(ssi_np, "fsl,capture-dma", 0);
886 of_node_put(np);
887 if (np == dma_channel_np)
888 return ssi_np;
889 }
890
891 return NULL;
892}
893
894static struct snd_pcm_ops fsl_dma_ops = {
895 .open = fsl_dma_open,
896 .close = fsl_dma_close,
897 .ioctl = snd_pcm_lib_ioctl,
898 .hw_params = fsl_dma_hw_params,
899 .hw_free = fsl_dma_hw_free,
900 .pointer = fsl_dma_pointer,
901};
902
903static int __devinit fsl_soc_dma_probe(struct platform_device *pdev)
904 {
905 struct dma_object *dma;
906 struct device_node *np = pdev->dev.of_node;
907 struct device_node *ssi_np;
908 struct resource res;
909 const uint32_t *iprop;
910 int ret;
911
912
913 ssi_np = find_ssi_node(np);
914 if (!ssi_np) {
915 dev_err(&pdev->dev, "cannot find parent SSI node\n");
916 return -ENODEV;
917 }
918
919 ret = of_address_to_resource(ssi_np, 0, &res);
920 if (ret) {
921 dev_err(&pdev->dev, "could not determine resources for %s\n",
922 ssi_np->full_name);
923 of_node_put(ssi_np);
924 return ret;
925 }
926
927 dma = kzalloc(sizeof(*dma) + strlen(np->full_name), GFP_KERNEL);
928 if (!dma) {
929 dev_err(&pdev->dev, "could not allocate dma object\n");
930 of_node_put(ssi_np);
931 return -ENOMEM;
932 }
933
934 strcpy(dma->path, np->full_name);
935 dma->dai.ops = &fsl_dma_ops;
936 dma->dai.pcm_new = fsl_dma_new;
937 dma->dai.pcm_free = fsl_dma_free_dma_buffers;
938
939
940 dma->ssi_stx_phys = res.start + offsetof(struct ccsr_ssi, stx0);
941 dma->ssi_srx_phys = res.start + offsetof(struct ccsr_ssi, srx0);
942
943 iprop = of_get_property(ssi_np, "fsl,fifo-depth", NULL);
944 if (iprop)
945 dma->ssi_fifo_depth = be32_to_cpup(iprop);
946 else
947
948 dma->ssi_fifo_depth = 8;
949
950 of_node_put(ssi_np);
951
952 ret = snd_soc_register_platform(&pdev->dev, &dma->dai);
953 if (ret) {
954 dev_err(&pdev->dev, "could not register platform\n");
955 kfree(dma);
956 return ret;
957 }
958
959 dma->channel = of_iomap(np, 0);
960 dma->irq = irq_of_parse_and_map(np, 0);
961
962 dev_set_drvdata(&pdev->dev, dma);
963
964 return 0;
965}
966
967static int __devexit fsl_soc_dma_remove(struct platform_device *pdev)
968{
969 struct dma_object *dma = dev_get_drvdata(&pdev->dev);
970
971 snd_soc_unregister_platform(&pdev->dev);
972 iounmap(dma->channel);
973 irq_dispose_mapping(dma->irq);
974 kfree(dma);
975
976 return 0;
977}
978
979static const struct of_device_id fsl_soc_dma_ids[] = {
980 { .compatible = "fsl,ssi-dma-channel", },
981 {}
982};
983MODULE_DEVICE_TABLE(of, fsl_soc_dma_ids);
984
985static struct platform_driver fsl_soc_dma_driver = {
986 .driver = {
987 .name = "fsl-pcm-audio",
988 .owner = THIS_MODULE,
989 .of_match_table = fsl_soc_dma_ids,
990 },
991 .probe = fsl_soc_dma_probe,
992 .remove = __devexit_p(fsl_soc_dma_remove),
993};
994
995module_platform_driver(fsl_soc_dma_driver);
996
997MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
998MODULE_DESCRIPTION("Freescale Elo DMA ASoC PCM Driver");
999MODULE_LICENSE("GPL v2");
1000