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10#include <linux/gpio.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h>
18#include <linux/ethtool.h>
19#include <net/dsa.h>
20#include <asm/mach-types.h>
21#include <asm/leds.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/pci.h>
24#include <mach/orion5x.h>
25#include "common.h"
26#include "mpp.h"
27
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32
33
34#define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
35#define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
36
37
38
39
40
41static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
42 .width = 1,
43};
44
45static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
46 .flags = IORESOURCE_MEM,
47 .start = RD88F5181L_FXO_NOR_BOOT_BASE,
48 .end = RD88F5181L_FXO_NOR_BOOT_BASE +
49 RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
50};
51
52static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
53 .name = "physmap-flash",
54 .id = 0,
55 .dev = {
56 .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
57 },
58 .num_resources = 1,
59 .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
60};
61
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64
65
66static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
67 MPP0_GPIO,
68 MPP1_GPIO,
69 MPP2_GPIO,
70 MPP3_GPIO,
71 MPP4_GPIO,
72 MPP5_GPIO,
73 MPP6_PCI_CLK,
74 MPP7_PCI_CLK,
75 MPP8_GPIO,
76 MPP9_GPIO,
77 MPP10_GPIO,
78 MPP11_GPIO,
79 MPP12_GIGE,
80 MPP13_GIGE,
81 MPP14_GIGE,
82 MPP15_GIGE,
83 MPP16_GIGE,
84 MPP17_GIGE,
85 MPP18_GIGE,
86 MPP19_GIGE,
87 0,
88};
89
90static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
91 .phy_addr = MV643XX_ETH_PHY_NONE,
92 .speed = SPEED_1000,
93 .duplex = DUPLEX_FULL,
94};
95
96static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
97 .port_names[0] = "lan2",
98 .port_names[1] = "lan1",
99 .port_names[2] = "wan",
100 .port_names[3] = "cpu",
101 .port_names[5] = "lan4",
102 .port_names[7] = "lan3",
103};
104
105static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = {
106 .nr_chips = 1,
107 .chip = &rd88f5181l_fxo_switch_chip_data,
108};
109
110static void __init rd88f5181l_fxo_init(void)
111{
112
113
114
115 orion5x_init();
116
117 orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
118
119
120
121
122 orion5x_ehci0_init();
123 orion5x_eth_init(&rd88f5181l_fxo_eth_data);
124 orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
125 orion5x_uart0_init();
126
127 orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
128 RD88F5181L_FXO_NOR_BOOT_SIZE);
129 platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
130}
131
132static int __init
133rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
134{
135 int irq;
136
137
138
139
140 irq = orion5x_pci_map_irq(dev, slot, pin);
141 if (irq != -1)
142 return irq;
143
144
145
146
147 return gpio_to_irq(1);
148}
149
150static struct hw_pci rd88f5181l_fxo_pci __initdata = {
151 .nr_controllers = 2,
152 .setup = orion5x_pci_sys_setup,
153 .scan = orion5x_pci_sys_scan_bus,
154 .map_irq = rd88f5181l_fxo_pci_map_irq,
155};
156
157static int __init rd88f5181l_fxo_pci_init(void)
158{
159 if (machine_is_rd88f5181l_fxo()) {
160 orion5x_pci_set_cardbus_mode();
161 pci_common_init(&rd88f5181l_fxo_pci);
162 }
163
164 return 0;
165}
166subsys_initcall(rd88f5181l_fxo_pci_init);
167
168MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
169
170 .atag_offset = 0x100,
171 .init_machine = rd88f5181l_fxo_init,
172 .map_io = orion5x_map_io,
173 .init_early = orion5x_init_early,
174 .init_irq = orion5x_init_irq,
175 .timer = &orion5x_timer,
176 .fixup = tag_fixup_mem32,
177 .restart = orion5x_restart,
178MACHINE_END
179
