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13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/mmc/host.h>
18#include <linux/mmc/sh_mobile_sdhi.h>
19#include <linux/mtd/physmap.h>
20#include <linux/delay.h>
21#include <linux/smc91x.h>
22#include <linux/gpio.h>
23#include <linux/input.h>
24#include <linux/input/sh_keysc.h>
25#include <linux/usb/r8a66597.h>
26#include <linux/sh_eth.h>
27#include <linux/sh_intc.h>
28#include <linux/videodev2.h>
29#include <video/sh_mobile_lcdc.h>
30#include <media/sh_mobile_ceu.h>
31#include <sound/sh_fsi.h>
32#include <sound/simple_card.h>
33#include <asm/io.h>
34#include <asm/heartbeat.h>
35#include <asm/clock.h>
36#include <asm/suspend.h>
37#include <cpu/sh7724.h>
38#include <mach-se/mach/se7724.h>
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67
68static struct resource heartbeat_resource = {
69 .start = PA_LED,
70 .end = PA_LED,
71 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
72};
73
74static struct platform_device heartbeat_device = {
75 .name = "heartbeat",
76 .id = -1,
77 .num_resources = 1,
78 .resource = &heartbeat_resource,
79};
80
81
82static struct smc91x_platdata smc91x_info = {
83 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
84};
85
86static struct resource smc91x_eth_resources[] = {
87 [0] = {
88 .name = "SMC91C111" ,
89 .start = 0x1a300300,
90 .end = 0x1a30030f,
91 .flags = IORESOURCE_MEM,
92 },
93 [1] = {
94 .start = IRQ0_SMC,
95 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
96 },
97};
98
99static struct platform_device smc91x_eth_device = {
100 .name = "smc91x",
101 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
102 .resource = smc91x_eth_resources,
103 .dev = {
104 .platform_data = &smc91x_info,
105 },
106};
107
108
109static struct mtd_partition nor_flash_partitions[] = {
110 {
111 .name = "uboot",
112 .offset = 0,
113 .size = (1 * 1024 * 1024),
114 .mask_flags = MTD_WRITEABLE,
115 }, {
116 .name = "kernel",
117 .offset = MTDPART_OFS_APPEND,
118 .size = (2 * 1024 * 1024),
119 }, {
120 .name = "free-area",
121 .offset = MTDPART_OFS_APPEND,
122 .size = MTDPART_SIZ_FULL,
123 },
124};
125
126static struct physmap_flash_data nor_flash_data = {
127 .width = 2,
128 .parts = nor_flash_partitions,
129 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
130};
131
132static struct resource nor_flash_resources[] = {
133 [0] = {
134 .name = "NOR Flash",
135 .start = 0x00000000,
136 .end = 0x01ffffff,
137 .flags = IORESOURCE_MEM,
138 }
139};
140
141static struct platform_device nor_flash_device = {
142 .name = "physmap-flash",
143 .resource = nor_flash_resources,
144 .num_resources = ARRAY_SIZE(nor_flash_resources),
145 .dev = {
146 .platform_data = &nor_flash_data,
147 },
148};
149
150
151static const struct fb_videomode lcdc_720p_modes[] = {
152 {
153 .name = "LB070WV1",
154 .sync = 0,
155 .xres = 1280,
156 .yres = 720,
157 .left_margin = 220,
158 .right_margin = 110,
159 .hsync_len = 40,
160 .upper_margin = 20,
161 .lower_margin = 5,
162 .vsync_len = 5,
163 },
164};
165
166static const struct fb_videomode lcdc_vga_modes[] = {
167 {
168 .name = "LB070WV1",
169 .sync = 0,
170 .xres = 640,
171 .yres = 480,
172 .left_margin = 105,
173 .right_margin = 50,
174 .hsync_len = 96,
175 .upper_margin = 33,
176 .lower_margin = 10,
177 .vsync_len = 2,
178 },
179};
180
181static struct sh_mobile_lcdc_info lcdc_info = {
182 .clock_source = LCDC_CLK_EXTERNAL,
183 .ch[0] = {
184 .chan = LCDC_CHAN_MAINLCD,
185 .fourcc = V4L2_PIX_FMT_RGB565,
186 .clock_divider = 1,
187 .panel_cfg = {
188 .width = 152,
189 .height = 91,
190 },
191 }
192};
193
194static struct resource lcdc_resources[] = {
195 [0] = {
196 .name = "LCDC",
197 .start = 0xfe940000,
198 .end = 0xfe942fff,
199 .flags = IORESOURCE_MEM,
200 },
201 [1] = {
202 .start = evt2irq(0xf40),
203 .flags = IORESOURCE_IRQ,
204 },
205};
206
207static struct platform_device lcdc_device = {
208 .name = "sh_mobile_lcdc_fb",
209 .num_resources = ARRAY_SIZE(lcdc_resources),
210 .resource = lcdc_resources,
211 .dev = {
212 .platform_data = &lcdc_info,
213 },
214};
215
216
217static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
218 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
219};
220
221static struct resource ceu0_resources[] = {
222 [0] = {
223 .name = "CEU0",
224 .start = 0xfe910000,
225 .end = 0xfe91009f,
226 .flags = IORESOURCE_MEM,
227 },
228 [1] = {
229 .start = evt2irq(0x880),
230 .flags = IORESOURCE_IRQ,
231 },
232 [2] = {
233
234 },
235};
236
237static struct platform_device ceu0_device = {
238 .name = "sh_mobile_ceu",
239 .id = 0,
240 .num_resources = ARRAY_SIZE(ceu0_resources),
241 .resource = ceu0_resources,
242 .dev = {
243 .platform_data = &sh_mobile_ceu0_info,
244 },
245};
246
247
248static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
249 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
250};
251
252static struct resource ceu1_resources[] = {
253 [0] = {
254 .name = "CEU1",
255 .start = 0xfe914000,
256 .end = 0xfe91409f,
257 .flags = IORESOURCE_MEM,
258 },
259 [1] = {
260 .start = evt2irq(0x9e0),
261 .flags = IORESOURCE_IRQ,
262 },
263 [2] = {
264
265 },
266};
267
268static struct platform_device ceu1_device = {
269 .name = "sh_mobile_ceu",
270 .id = 1,
271 .num_resources = ARRAY_SIZE(ceu1_resources),
272 .resource = ceu1_resources,
273 .dev = {
274 .platform_data = &sh_mobile_ceu1_info,
275 },
276};
277
278
279
280static struct sh_fsi_platform_info fsi_info = {
281 .port_a = {
282 .flags = SH_FSI_BRS_INV,
283 },
284};
285
286static struct resource fsi_resources[] = {
287 [0] = {
288 .name = "FSI",
289 .start = 0xFE3C0000,
290 .end = 0xFE3C021d,
291 .flags = IORESOURCE_MEM,
292 },
293 [1] = {
294 .start = evt2irq(0xf80),
295 .flags = IORESOURCE_IRQ,
296 },
297};
298
299static struct platform_device fsi_device = {
300 .name = "sh_fsi",
301 .id = 0,
302 .num_resources = ARRAY_SIZE(fsi_resources),
303 .resource = fsi_resources,
304 .dev = {
305 .platform_data = &fsi_info,
306 },
307};
308
309static struct asoc_simple_dai_init_info fsi2_ak4642_init_info = {
310 .fmt = SND_SOC_DAIFMT_LEFT_J,
311 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
312 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
313 .sysclk = 11289600,
314};
315
316static struct asoc_simple_card_info fsi_ak4642_info = {
317 .name = "AK4642",
318 .card = "FSIA-AK4642",
319 .cpu_dai = "fsia-dai",
320 .codec = "ak4642-codec.0-0012",
321 .platform = "sh_fsi.0",
322 .codec_dai = "ak4642-hifi",
323 .init = &fsi2_ak4642_init_info,
324};
325
326static struct platform_device fsi_ak4642_device = {
327 .name = "asoc-simple-card",
328 .dev = {
329 .platform_data = &fsi_ak4642_info,
330 },
331};
332
333
334static struct sh_keysc_info keysc_info = {
335 .mode = SH_KEYSC_MODE_1,
336 .scan_timing = 3,
337 .delay = 50,
338 .keycodes = {
339 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
340 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
341 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
342 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
343 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
344 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
345 },
346};
347
348static struct resource keysc_resources[] = {
349 [0] = {
350 .name = "KEYSC",
351 .start = 0x044b0000,
352 .end = 0x044b000f,
353 .flags = IORESOURCE_MEM,
354 },
355 [1] = {
356 .start = evt2irq(0xbe0),
357 .flags = IORESOURCE_IRQ,
358 },
359};
360
361static struct platform_device keysc_device = {
362 .name = "sh_keysc",
363 .id = 0,
364 .num_resources = ARRAY_SIZE(keysc_resources),
365 .resource = keysc_resources,
366 .dev = {
367 .platform_data = &keysc_info,
368 },
369};
370
371
372static struct resource sh_eth_resources[] = {
373 [0] = {
374 .start = SH_ETH_ADDR,
375 .end = SH_ETH_ADDR + 0x1FC,
376 .flags = IORESOURCE_MEM,
377 },
378 [1] = {
379 .start = evt2irq(0xd60),
380 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
381 },
382};
383
384static struct sh_eth_plat_data sh_eth_plat = {
385 .phy = 0x1f,
386 .edmac_endian = EDMAC_LITTLE_ENDIAN,
387};
388
389static struct platform_device sh_eth_device = {
390 .name = "sh-eth",
391 .id = 0,
392 .dev = {
393 .platform_data = &sh_eth_plat,
394 },
395 .num_resources = ARRAY_SIZE(sh_eth_resources),
396 .resource = sh_eth_resources,
397};
398
399static struct r8a66597_platdata sh7724_usb0_host_data = {
400 .on_chip = 1,
401};
402
403static struct resource sh7724_usb0_host_resources[] = {
404 [0] = {
405 .start = 0xa4d80000,
406 .end = 0xa4d80124 - 1,
407 .flags = IORESOURCE_MEM,
408 },
409 [1] = {
410 .start = evt2irq(0xa20),
411 .end = evt2irq(0xa20),
412 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
413 },
414};
415
416static struct platform_device sh7724_usb0_host_device = {
417 .name = "r8a66597_hcd",
418 .id = 0,
419 .dev = {
420 .dma_mask = NULL,
421 .coherent_dma_mask = 0xffffffff,
422 .platform_data = &sh7724_usb0_host_data,
423 },
424 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
425 .resource = sh7724_usb0_host_resources,
426};
427
428static struct r8a66597_platdata sh7724_usb1_gadget_data = {
429 .on_chip = 1,
430};
431
432static struct resource sh7724_usb1_gadget_resources[] = {
433 [0] = {
434 .start = 0xa4d90000,
435 .end = 0xa4d90123,
436 .flags = IORESOURCE_MEM,
437 },
438 [1] = {
439 .start = evt2irq(0xa40),
440 .end = evt2irq(0xa40),
441 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
442 },
443};
444
445static struct platform_device sh7724_usb1_gadget_device = {
446 .name = "r8a66597_udc",
447 .id = 1,
448 .dev = {
449 .dma_mask = NULL,
450 .coherent_dma_mask = 0xffffffff,
451 .platform_data = &sh7724_usb1_gadget_data,
452 },
453 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
454 .resource = sh7724_usb1_gadget_resources,
455};
456
457static struct resource sdhi0_cn7_resources[] = {
458 [0] = {
459 .name = "SDHI0",
460 .start = 0x04ce0000,
461 .end = 0x04ce00ff,
462 .flags = IORESOURCE_MEM,
463 },
464 [1] = {
465 .start = evt2irq(0xe80),
466 .flags = IORESOURCE_IRQ,
467 },
468};
469
470static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
471 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
472 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
473 .tmio_caps = MMC_CAP_SDIO_IRQ,
474};
475
476static struct platform_device sdhi0_cn7_device = {
477 .name = "sh_mobile_sdhi",
478 .id = 0,
479 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
480 .resource = sdhi0_cn7_resources,
481 .dev = {
482 .platform_data = &sh7724_sdhi0_data,
483 },
484};
485
486static struct resource sdhi1_cn8_resources[] = {
487 [0] = {
488 .name = "SDHI1",
489 .start = 0x04cf0000,
490 .end = 0x04cf00ff,
491 .flags = IORESOURCE_MEM,
492 },
493 [1] = {
494 .start = evt2irq(0x4e0),
495 .flags = IORESOURCE_IRQ,
496 },
497};
498
499static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
500 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
501 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
502 .tmio_caps = MMC_CAP_SDIO_IRQ,
503};
504
505static struct platform_device sdhi1_cn8_device = {
506 .name = "sh_mobile_sdhi",
507 .id = 1,
508 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
509 .resource = sdhi1_cn8_resources,
510 .dev = {
511 .platform_data = &sh7724_sdhi1_data,
512 },
513};
514
515
516static struct resource irda_resources[] = {
517 [0] = {
518 .name = "IrDA",
519 .start = 0xA45D0000,
520 .end = 0xA45D0049,
521 .flags = IORESOURCE_MEM,
522 },
523 [1] = {
524 .start = evt2irq(0x480),
525 .flags = IORESOURCE_IRQ,
526 },
527};
528
529static struct platform_device irda_device = {
530 .name = "sh_sir",
531 .num_resources = ARRAY_SIZE(irda_resources),
532 .resource = irda_resources,
533};
534
535#include <media/ak881x.h>
536#include <media/sh_vou.h>
537
538static struct ak881x_pdata ak881x_pdata = {
539 .flags = AK881X_IF_MODE_SLAVE,
540};
541
542static struct i2c_board_info ak8813 = {
543
544 I2C_BOARD_INFO("ak8813", 0x20),
545 .platform_data = &ak881x_pdata,
546};
547
548static struct sh_vou_pdata sh_vou_pdata = {
549 .bus_fmt = SH_VOU_BUS_8BIT,
550 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
551 .board_info = &ak8813,
552 .i2c_adap = 0,
553};
554
555static struct resource sh_vou_resources[] = {
556 [0] = {
557 .start = 0xfe960000,
558 .end = 0xfe962043,
559 .flags = IORESOURCE_MEM,
560 },
561 [1] = {
562 .start = evt2irq(0x8e0),
563 .flags = IORESOURCE_IRQ,
564 },
565};
566
567static struct platform_device vou_device = {
568 .name = "sh-vou",
569 .id = -1,
570 .num_resources = ARRAY_SIZE(sh_vou_resources),
571 .resource = sh_vou_resources,
572 .dev = {
573 .platform_data = &sh_vou_pdata,
574 },
575};
576
577static struct platform_device *ms7724se_devices[] __initdata = {
578 &heartbeat_device,
579 &smc91x_eth_device,
580 &lcdc_device,
581 &nor_flash_device,
582 &ceu0_device,
583 &ceu1_device,
584 &keysc_device,
585 &sh_eth_device,
586 &sh7724_usb0_host_device,
587 &sh7724_usb1_gadget_device,
588 &fsi_device,
589 &fsi_ak4642_device,
590 &sdhi0_cn7_device,
591 &sdhi1_cn8_device,
592 &irda_device,
593 &vou_device,
594};
595
596
597static struct i2c_board_info i2c0_devices[] = {
598 {
599 I2C_BOARD_INFO("ak4642", 0x12),
600 },
601};
602
603#define EEPROM_OP 0xBA206000
604#define EEPROM_ADR 0xBA206004
605#define EEPROM_DATA 0xBA20600C
606#define EEPROM_STAT 0xBA206010
607#define EEPROM_STRT 0xBA206014
608
609static int __init sh_eth_is_eeprom_ready(void)
610{
611 int t = 10000;
612
613 while (t--) {
614 if (!__raw_readw(EEPROM_STAT))
615 return 1;
616 udelay(1);
617 }
618
619 printk(KERN_ERR "ms7724se can not access to eeprom\n");
620 return 0;
621}
622
623static void __init sh_eth_init(void)
624{
625 int i;
626 u16 mac;
627
628
629 if (!sh_eth_is_eeprom_ready())
630 return;
631
632
633 for (i = 0 ; i < 3 ; i++) {
634 __raw_writew(0x0, EEPROM_OP);
635 __raw_writew(i*2, EEPROM_ADR);
636 __raw_writew(0x1, EEPROM_STRT);
637 if (!sh_eth_is_eeprom_ready())
638 return;
639
640 mac = __raw_readw(EEPROM_DATA);
641 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
642 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
643 }
644}
645
646#define SW4140 0xBA201000
647#define FPGA_OUT 0xBA200400
648#define PORT_HIZA 0xA4050158
649#define PORT_MSELCRB 0xA4050182
650
651#define SW41_A 0x0100
652#define SW41_B 0x0200
653#define SW41_C 0x0400
654#define SW41_D 0x0800
655#define SW41_E 0x1000
656#define SW41_F 0x2000
657#define SW41_G 0x4000
658#define SW41_H 0x8000
659
660extern char ms7724se_sdram_enter_start;
661extern char ms7724se_sdram_enter_end;
662extern char ms7724se_sdram_leave_start;
663extern char ms7724se_sdram_leave_end;
664
665static int __init arch_setup(void)
666{
667
668 i2c_register_board_info(0, i2c0_devices,
669 ARRAY_SIZE(i2c0_devices));
670 return 0;
671}
672arch_initcall(arch_setup);
673
674static int __init devices_setup(void)
675{
676 u16 sw = __raw_readw(SW4140);
677 struct clk *clk;
678 u16 fpga_out;
679
680
681 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
682 SUSP_SH_RSTANDBY,
683 &ms7724se_sdram_enter_start,
684 &ms7724se_sdram_enter_end,
685 &ms7724se_sdram_leave_start,
686 &ms7724se_sdram_leave_end);
687
688 fpga_out = __raw_readw(FPGA_OUT);
689
690 fpga_out &= ~((1 << 1) |
691 (1 << 4) |
692 (1 << 5) |
693 (1 << 6) |
694 (1 << 7) |
695 (1 << 8) |
696 (1 << 12) |
697 (1 << 14));
698 __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
699
700 udelay(10);
701
702
703 __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
704
705 udelay(10);
706
707 __raw_writew(fpga_out, FPGA_OUT);
708
709
710 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
711
712
713 gpio_request(GPIO_FN_STATUS2, NULL);
714
715
716 gpio_request(GPIO_FN_STATUS0, NULL);
717
718
719 gpio_request(GPIO_FN_PDSTATUS, NULL);
720
721
722 __raw_writew(0x0600, 0xa40501d4);
723
724
725 __raw_writew(0x0600, 0xa4050192);
726
727
728 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
729 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
730 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
731
732
733 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
734 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
735 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
736 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
737 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
738
739
740 gpio_request(GPIO_FN_LCDD23, NULL);
741 gpio_request(GPIO_FN_LCDD22, NULL);
742 gpio_request(GPIO_FN_LCDD21, NULL);
743 gpio_request(GPIO_FN_LCDD20, NULL);
744 gpio_request(GPIO_FN_LCDD19, NULL);
745 gpio_request(GPIO_FN_LCDD18, NULL);
746 gpio_request(GPIO_FN_LCDD17, NULL);
747 gpio_request(GPIO_FN_LCDD16, NULL);
748 gpio_request(GPIO_FN_LCDD15, NULL);
749 gpio_request(GPIO_FN_LCDD14, NULL);
750 gpio_request(GPIO_FN_LCDD13, NULL);
751 gpio_request(GPIO_FN_LCDD12, NULL);
752 gpio_request(GPIO_FN_LCDD11, NULL);
753 gpio_request(GPIO_FN_LCDD10, NULL);
754 gpio_request(GPIO_FN_LCDD9, NULL);
755 gpio_request(GPIO_FN_LCDD8, NULL);
756 gpio_request(GPIO_FN_LCDD7, NULL);
757 gpio_request(GPIO_FN_LCDD6, NULL);
758 gpio_request(GPIO_FN_LCDD5, NULL);
759 gpio_request(GPIO_FN_LCDD4, NULL);
760 gpio_request(GPIO_FN_LCDD3, NULL);
761 gpio_request(GPIO_FN_LCDD2, NULL);
762 gpio_request(GPIO_FN_LCDD1, NULL);
763 gpio_request(GPIO_FN_LCDD0, NULL);
764 gpio_request(GPIO_FN_LCDDISP, NULL);
765 gpio_request(GPIO_FN_LCDHSYN, NULL);
766 gpio_request(GPIO_FN_LCDDCK, NULL);
767 gpio_request(GPIO_FN_LCDVSYN, NULL);
768 gpio_request(GPIO_FN_LCDDON, NULL);
769 gpio_request(GPIO_FN_LCDVEPWC, NULL);
770 gpio_request(GPIO_FN_LCDVCPWC, NULL);
771 gpio_request(GPIO_FN_LCDRD, NULL);
772 gpio_request(GPIO_FN_LCDLCLK, NULL);
773 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
774
775
776 gpio_request(GPIO_FN_VIO0_D15, NULL);
777 gpio_request(GPIO_FN_VIO0_D14, NULL);
778 gpio_request(GPIO_FN_VIO0_D13, NULL);
779 gpio_request(GPIO_FN_VIO0_D12, NULL);
780 gpio_request(GPIO_FN_VIO0_D11, NULL);
781 gpio_request(GPIO_FN_VIO0_D10, NULL);
782 gpio_request(GPIO_FN_VIO0_D9, NULL);
783 gpio_request(GPIO_FN_VIO0_D8, NULL);
784 gpio_request(GPIO_FN_VIO0_D7, NULL);
785 gpio_request(GPIO_FN_VIO0_D6, NULL);
786 gpio_request(GPIO_FN_VIO0_D5, NULL);
787 gpio_request(GPIO_FN_VIO0_D4, NULL);
788 gpio_request(GPIO_FN_VIO0_D3, NULL);
789 gpio_request(GPIO_FN_VIO0_D2, NULL);
790 gpio_request(GPIO_FN_VIO0_D1, NULL);
791 gpio_request(GPIO_FN_VIO0_D0, NULL);
792 gpio_request(GPIO_FN_VIO0_VD, NULL);
793 gpio_request(GPIO_FN_VIO0_CLK, NULL);
794 gpio_request(GPIO_FN_VIO0_FLD, NULL);
795 gpio_request(GPIO_FN_VIO0_HD, NULL);
796 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
797
798
799 gpio_request(GPIO_FN_VIO1_D7, NULL);
800 gpio_request(GPIO_FN_VIO1_D6, NULL);
801 gpio_request(GPIO_FN_VIO1_D5, NULL);
802 gpio_request(GPIO_FN_VIO1_D4, NULL);
803 gpio_request(GPIO_FN_VIO1_D3, NULL);
804 gpio_request(GPIO_FN_VIO1_D2, NULL);
805 gpio_request(GPIO_FN_VIO1_D1, NULL);
806 gpio_request(GPIO_FN_VIO1_D0, NULL);
807 gpio_request(GPIO_FN_VIO1_FLD, NULL);
808 gpio_request(GPIO_FN_VIO1_HD, NULL);
809 gpio_request(GPIO_FN_VIO1_VD, NULL);
810 gpio_request(GPIO_FN_VIO1_CLK, NULL);
811 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
812
813
814 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
815 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
816 gpio_request(GPIO_FN_KEYIN4, NULL);
817 gpio_request(GPIO_FN_KEYIN3, NULL);
818 gpio_request(GPIO_FN_KEYIN2, NULL);
819 gpio_request(GPIO_FN_KEYIN1, NULL);
820 gpio_request(GPIO_FN_KEYIN0, NULL);
821 gpio_request(GPIO_FN_KEYOUT3, NULL);
822 gpio_request(GPIO_FN_KEYOUT2, NULL);
823 gpio_request(GPIO_FN_KEYOUT1, NULL);
824 gpio_request(GPIO_FN_KEYOUT0, NULL);
825
826
827 gpio_request(GPIO_FN_FSIMCKA, NULL);
828 gpio_request(GPIO_FN_FSIIASD, NULL);
829 gpio_request(GPIO_FN_FSIOASD, NULL);
830 gpio_request(GPIO_FN_FSIIABCK, NULL);
831 gpio_request(GPIO_FN_FSIIALRCK, NULL);
832 gpio_request(GPIO_FN_FSIOABCK, NULL);
833 gpio_request(GPIO_FN_FSIOALRCK, NULL);
834 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
835
836
837 clk = clk_get(NULL, "spu_clk");
838 if (!IS_ERR(clk)) {
839 clk_set_rate(clk, clk_round_rate(clk, 83333333));
840 clk_put(clk);
841 }
842
843
844 clk = clk_get(NULL, "fsia_clk");
845 if (!IS_ERR(clk)) {
846
847 clk_set_rate(&sh7724_fsimcka_clk, 48000);
848 clk_set_parent(clk, &sh7724_fsimcka_clk);
849 clk_set_rate(clk, 48000);
850 clk_put(clk);
851 }
852
853
854 gpio_request(GPIO_FN_SDHI0CD, NULL);
855 gpio_request(GPIO_FN_SDHI0WP, NULL);
856 gpio_request(GPIO_FN_SDHI0D3, NULL);
857 gpio_request(GPIO_FN_SDHI0D2, NULL);
858 gpio_request(GPIO_FN_SDHI0D1, NULL);
859 gpio_request(GPIO_FN_SDHI0D0, NULL);
860 gpio_request(GPIO_FN_SDHI0CMD, NULL);
861 gpio_request(GPIO_FN_SDHI0CLK, NULL);
862
863
864 gpio_request(GPIO_FN_SDHI1CD, NULL);
865 gpio_request(GPIO_FN_SDHI1WP, NULL);
866 gpio_request(GPIO_FN_SDHI1D3, NULL);
867 gpio_request(GPIO_FN_SDHI1D2, NULL);
868 gpio_request(GPIO_FN_SDHI1D1, NULL);
869 gpio_request(GPIO_FN_SDHI1D0, NULL);
870 gpio_request(GPIO_FN_SDHI1CMD, NULL);
871 gpio_request(GPIO_FN_SDHI1CLK, NULL);
872
873
874 gpio_request(GPIO_FN_IRDA_OUT, NULL);
875 gpio_request(GPIO_FN_IRDA_IN, NULL);
876
877
878
879
880
881
882
883
884
885 gpio_request(GPIO_FN_RMII_RXD0, NULL);
886 gpio_request(GPIO_FN_RMII_RXD1, NULL);
887 gpio_request(GPIO_FN_RMII_TXD0, NULL);
888 gpio_request(GPIO_FN_RMII_TXD1, NULL);
889 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
890 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
891 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
892 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
893 gpio_request(GPIO_FN_MDIO, NULL);
894 gpio_request(GPIO_FN_MDC, NULL);
895 gpio_request(GPIO_PTX5, NULL);
896 gpio_direction_input(GPIO_PTX5);
897 sh_eth_init();
898
899 if (sw & SW41_B) {
900
901 lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
902 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
903 } else {
904
905 lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
906 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
907 }
908
909 if (sw & SW41_A) {
910
911 lcdc_info.ch[0].interface_type = RGB18;
912 lcdc_info.ch[0].flags = 0;
913 } else {
914
915 lcdc_info.ch[0].interface_type = RGB24;
916 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
917 }
918
919
920 gpio_request(GPIO_FN_DV_D15, NULL);
921 gpio_request(GPIO_FN_DV_D14, NULL);
922 gpio_request(GPIO_FN_DV_D13, NULL);
923 gpio_request(GPIO_FN_DV_D12, NULL);
924 gpio_request(GPIO_FN_DV_D11, NULL);
925 gpio_request(GPIO_FN_DV_D10, NULL);
926 gpio_request(GPIO_FN_DV_D9, NULL);
927 gpio_request(GPIO_FN_DV_D8, NULL);
928 gpio_request(GPIO_FN_DV_CLKI, NULL);
929 gpio_request(GPIO_FN_DV_CLK, NULL);
930 gpio_request(GPIO_FN_DV_VSYNC, NULL);
931 gpio_request(GPIO_FN_DV_HSYNC, NULL);
932
933 return platform_add_devices(ms7724se_devices,
934 ARRAY_SIZE(ms7724se_devices));
935}
936device_initcall(devices_setup);
937
938static struct sh_machine_vector mv_ms7724se __initmv = {
939 .mv_name = "ms7724se",
940 .mv_init_irq = init_se7724_IRQ,
941};
942
