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17#include "drmP.h"
18#include "drm.h"
19#include "drm_crtc_helper.h"
20
21#include <video/cirrus.h>
22
23#include "cirrus_drv.h"
24
25#define CIRRUS_LUT_SIZE 256
26
27#define PALETTE_INDEX 0x8
28#define PALETTE_DATA 0x9
29
30
31
32
33
34static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
35{
36 struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
37 struct drm_device *dev = crtc->dev;
38 struct cirrus_device *cdev = dev->dev_private;
39 int i;
40
41 if (!crtc->enabled)
42 return;
43
44 for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
45
46 WREG8(PALETTE_INDEX, i);
47 WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
48 WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
49 WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
50 }
51}
52
53
54
55
56
57
58static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)
59{
60 struct drm_device *dev = crtc->dev;
61 struct cirrus_device *cdev = dev->dev_private;
62 u8 sr01, gr0e;
63
64 switch (mode) {
65 case DRM_MODE_DPMS_ON:
66 sr01 = 0x00;
67 gr0e = 0x00;
68 break;
69 case DRM_MODE_DPMS_STANDBY:
70 sr01 = 0x20;
71 gr0e = 0x02;
72 break;
73 case DRM_MODE_DPMS_SUSPEND:
74 sr01 = 0x20;
75 gr0e = 0x04;
76 break;
77 case DRM_MODE_DPMS_OFF:
78 sr01 = 0x20;
79 gr0e = 0x06;
80 break;
81 default:
82 return;
83 }
84
85 WREG8(SEQ_INDEX, 0x1);
86 sr01 |= RREG8(SEQ_DATA) & ~0x20;
87 WREG_SEQ(0x1, sr01);
88
89 WREG8(GFX_INDEX, 0xe);
90 gr0e |= RREG8(GFX_DATA) & ~0x06;
91 WREG_GFX(0xe, gr0e);
92}
93
94
95
96
97
98
99static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,
100 struct drm_display_mode *mode,
101 struct drm_display_mode *adjusted_mode)
102{
103 return true;
104}
105
106void cirrus_set_start_address(struct drm_crtc *crtc, unsigned offset)
107{
108 struct cirrus_device *cdev = crtc->dev->dev_private;
109 u32 addr;
110 u8 tmp;
111
112 addr = offset >> 2;
113 WREG_CRT(0x0c, (u8)((addr >> 8) & 0xff));
114 WREG_CRT(0x0d, (u8)(addr & 0xff));
115
116 WREG8(CRT_INDEX, 0x1b);
117 tmp = RREG8(CRT_DATA);
118 tmp &= 0xf2;
119 tmp |= (addr >> 16) & 0x01;
120 tmp |= (addr >> 15) & 0x0c;
121 WREG_CRT(0x1b, tmp);
122 WREG8(CRT_INDEX, 0x1d);
123 tmp = RREG8(CRT_DATA);
124 tmp &= 0x7f;
125 tmp |= (addr >> 12) & 0x80;
126 WREG_CRT(0x1d, tmp);
127}
128
129
130static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,
131 struct drm_framebuffer *fb,
132 int x, int y, int atomic)
133{
134 struct cirrus_device *cdev = crtc->dev->dev_private;
135 struct drm_gem_object *obj;
136 struct cirrus_framebuffer *cirrus_fb;
137 struct cirrus_bo *bo;
138 int ret;
139 u64 gpu_addr;
140
141
142 if (!atomic && fb) {
143 cirrus_fb = to_cirrus_framebuffer(fb);
144 obj = cirrus_fb->obj;
145 bo = gem_to_cirrus_bo(obj);
146 ret = cirrus_bo_reserve(bo, false);
147 if (ret)
148 return ret;
149 cirrus_bo_push_sysram(bo);
150 cirrus_bo_unreserve(bo);
151 }
152
153 cirrus_fb = to_cirrus_framebuffer(crtc->fb);
154 obj = cirrus_fb->obj;
155 bo = gem_to_cirrus_bo(obj);
156
157 ret = cirrus_bo_reserve(bo, false);
158 if (ret)
159 return ret;
160
161 ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
162 if (ret) {
163 cirrus_bo_unreserve(bo);
164 return ret;
165 }
166
167 if (&cdev->mode_info.gfbdev->gfb == cirrus_fb) {
168
169 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
170 if (ret)
171 DRM_ERROR("failed to kmap fbcon\n");
172 }
173 cirrus_bo_unreserve(bo);
174
175 cirrus_set_start_address(crtc, (u32)gpu_addr);
176 return 0;
177}
178
179static int cirrus_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
180 struct drm_framebuffer *old_fb)
181{
182 return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
183}
184
185
186
187
188
189
190
191
192
193static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
194 struct drm_display_mode *mode,
195 struct drm_display_mode *adjusted_mode,
196 int x, int y, struct drm_framebuffer *old_fb)
197{
198 struct drm_device *dev = crtc->dev;
199 struct cirrus_device *cdev = dev->dev_private;
200 int hsyncstart, hsyncend, htotal, hdispend;
201 int vtotal, vdispend;
202 int tmp;
203 int sr07 = 0, hdr = 0;
204
205 htotal = mode->htotal / 8;
206 hsyncend = mode->hsync_end / 8;
207 hsyncstart = mode->hsync_start / 8;
208 hdispend = mode->hdisplay / 8;
209
210 vtotal = mode->vtotal;
211 vdispend = mode->vdisplay;
212
213 vdispend -= 1;
214 vtotal -= 2;
215
216 htotal -= 5;
217 hdispend -= 1;
218 hsyncstart += 1;
219 hsyncend += 1;
220
221 WREG_CRT(VGA_CRTC_V_SYNC_END, 0x20);
222 WREG_CRT(VGA_CRTC_H_TOTAL, htotal);
223 WREG_CRT(VGA_CRTC_H_DISP, hdispend);
224 WREG_CRT(VGA_CRTC_H_SYNC_START, hsyncstart);
225 WREG_CRT(VGA_CRTC_H_SYNC_END, hsyncend);
226 WREG_CRT(VGA_CRTC_V_TOTAL, vtotal & 0xff);
227 WREG_CRT(VGA_CRTC_V_DISP_END, vdispend & 0xff);
228
229 tmp = 0x40;
230 if ((vdispend + 1) & 512)
231 tmp |= 0x20;
232 WREG_CRT(VGA_CRTC_MAX_SCAN, tmp);
233
234
235
236
237 tmp = 16;
238 if (vtotal & 256)
239 tmp |= 1;
240 if (vdispend & 256)
241 tmp |= 2;
242 if ((vdispend + 1) & 256)
243 tmp |= 8;
244 if (vtotal & 512)
245 tmp |= 32;
246 if (vdispend & 512)
247 tmp |= 64;
248 WREG_CRT(VGA_CRTC_OVERFLOW, tmp);
249
250 tmp = 0;
251
252
253
254 if ((htotal + 5) & 64)
255 tmp |= 16;
256 if ((htotal + 5) & 128)
257 tmp |= 32;
258 if (vtotal & 256)
259 tmp |= 64;
260 if (vtotal & 512)
261 tmp |= 128;
262
263 WREG_CRT(CL_CRT1A, tmp);
264
265
266 WREG_CRT(VGA_CRTC_MODE, 0x03);
267
268 WREG8(SEQ_INDEX, 0x7);
269 sr07 = RREG8(SEQ_DATA);
270 sr07 &= 0xe0;
271 hdr = 0;
272 switch (crtc->fb->bits_per_pixel) {
273 case 8:
274 sr07 |= 0x11;
275 break;
276 case 16:
277 sr07 |= 0xc1;
278 hdr = 0xc0;
279 break;
280 case 24:
281 sr07 |= 0x15;
282 hdr = 0xc5;
283 break;
284 case 32:
285 sr07 |= 0x19;
286 hdr = 0xc5;
287 break;
288 default:
289 return -1;
290 }
291
292 WREG_SEQ(0x7, sr07);
293
294
295 tmp = crtc->fb->pitches[0] / 8;
296 WREG_CRT(VGA_CRTC_OFFSET, tmp);
297
298
299 tmp = 0x22;
300 tmp |= (crtc->fb->pitches[0] >> 7) & 0x10;
301 tmp |= (crtc->fb->pitches[0] >> 6) & 0x40;
302 WREG_CRT(0x1b, tmp);
303
304
305 WREG_GFX(VGA_GFX_MODE, 0x40);
306
307
308 WREG_GFX(VGA_GFX_MISC, 0x01);
309
310 WREG_HDR(hdr);
311 cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
312 return 0;
313}
314
315
316
317
318
319
320static void cirrus_crtc_prepare(struct drm_crtc *crtc)
321{
322}
323
324
325
326
327
328static void cirrus_crtc_commit(struct drm_crtc *crtc)
329{
330}
331
332
333
334
335
336
337static void cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
338 u16 *blue, uint32_t start, uint32_t size)
339{
340 struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
341 int i;
342
343 if (size != CIRRUS_LUT_SIZE)
344 return;
345
346 for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
347 cirrus_crtc->lut_r[i] = red[i];
348 cirrus_crtc->lut_g[i] = green[i];
349 cirrus_crtc->lut_b[i] = blue[i];
350 }
351 cirrus_crtc_load_lut(crtc);
352}
353
354
355static void cirrus_crtc_destroy(struct drm_crtc *crtc)
356{
357 struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
358
359 drm_crtc_cleanup(crtc);
360 kfree(cirrus_crtc);
361}
362
363
364static const struct drm_crtc_funcs cirrus_crtc_funcs = {
365 .gamma_set = cirrus_crtc_gamma_set,
366 .set_config = drm_crtc_helper_set_config,
367 .destroy = cirrus_crtc_destroy,
368};
369
370static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {
371 .dpms = cirrus_crtc_dpms,
372 .mode_fixup = cirrus_crtc_mode_fixup,
373 .mode_set = cirrus_crtc_mode_set,
374 .mode_set_base = cirrus_crtc_mode_set_base,
375 .prepare = cirrus_crtc_prepare,
376 .commit = cirrus_crtc_commit,
377 .load_lut = cirrus_crtc_load_lut,
378};
379
380
381static void cirrus_crtc_init(struct drm_device *dev)
382{
383 struct cirrus_device *cdev = dev->dev_private;
384 struct cirrus_crtc *cirrus_crtc;
385 int i;
386
387 cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
388 (CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
389 GFP_KERNEL);
390
391 if (cirrus_crtc == NULL)
392 return;
393
394 drm_crtc_init(dev, &cirrus_crtc->base, &cirrus_crtc_funcs);
395
396 drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
397 cdev->mode_info.crtc = cirrus_crtc;
398
399 for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
400 cirrus_crtc->lut_r[i] = i;
401 cirrus_crtc->lut_g[i] = i;
402 cirrus_crtc->lut_b[i] = i;
403 }
404
405 drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
406}
407
408
409void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
410 u16 blue, int regno)
411{
412 struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
413
414 cirrus_crtc->lut_r[regno] = red;
415 cirrus_crtc->lut_g[regno] = green;
416 cirrus_crtc->lut_b[regno] = blue;
417}
418
419
420void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
421 u16 *blue, int regno)
422{
423 struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
424
425 *red = cirrus_crtc->lut_r[regno];
426 *green = cirrus_crtc->lut_g[regno];
427 *blue = cirrus_crtc->lut_b[regno];
428}
429
430
431static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,
432 struct drm_display_mode *mode,
433 struct drm_display_mode *adjusted_mode)
434{
435 return true;
436}
437
438static void cirrus_encoder_mode_set(struct drm_encoder *encoder,
439 struct drm_display_mode *mode,
440 struct drm_display_mode *adjusted_mode)
441{
442}
443
444static void cirrus_encoder_dpms(struct drm_encoder *encoder, int state)
445{
446 return;
447}
448
449static void cirrus_encoder_prepare(struct drm_encoder *encoder)
450{
451}
452
453static void cirrus_encoder_commit(struct drm_encoder *encoder)
454{
455}
456
457void cirrus_encoder_destroy(struct drm_encoder *encoder)
458{
459 struct cirrus_encoder *cirrus_encoder = to_cirrus_encoder(encoder);
460 drm_encoder_cleanup(encoder);
461 kfree(cirrus_encoder);
462}
463
464static const struct drm_encoder_helper_funcs cirrus_encoder_helper_funcs = {
465 .dpms = cirrus_encoder_dpms,
466 .mode_fixup = cirrus_encoder_mode_fixup,
467 .mode_set = cirrus_encoder_mode_set,
468 .prepare = cirrus_encoder_prepare,
469 .commit = cirrus_encoder_commit,
470};
471
472static const struct drm_encoder_funcs cirrus_encoder_encoder_funcs = {
473 .destroy = cirrus_encoder_destroy,
474};
475
476static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev)
477{
478 struct drm_encoder *encoder;
479 struct cirrus_encoder *cirrus_encoder;
480
481 cirrus_encoder = kzalloc(sizeof(struct cirrus_encoder), GFP_KERNEL);
482 if (!cirrus_encoder)
483 return NULL;
484
485 encoder = &cirrus_encoder->base;
486 encoder->possible_crtcs = 0x1;
487
488 drm_encoder_init(dev, encoder, &cirrus_encoder_encoder_funcs,
489 DRM_MODE_ENCODER_DAC);
490 drm_encoder_helper_add(encoder, &cirrus_encoder_helper_funcs);
491
492 return encoder;
493}
494
495
496int cirrus_vga_get_modes(struct drm_connector *connector)
497{
498
499 drm_add_modes_noedid(connector, 640, 480);
500 drm_add_modes_noedid(connector, 800, 600);
501 drm_add_modes_noedid(connector, 1024, 768);
502 drm_add_modes_noedid(connector, 1280, 1024);
503
504 return 4;
505}
506
507static int cirrus_vga_mode_valid(struct drm_connector *connector,
508 struct drm_display_mode *mode)
509{
510
511 return MODE_OK;
512}
513
514struct drm_encoder *cirrus_connector_best_encoder(struct drm_connector
515 *connector)
516{
517 int enc_id = connector->encoder_ids[0];
518 struct drm_mode_object *obj;
519 struct drm_encoder *encoder;
520
521
522 if (enc_id) {
523 obj =
524 drm_mode_object_find(connector->dev, enc_id,
525 DRM_MODE_OBJECT_ENCODER);
526 if (!obj)
527 return NULL;
528 encoder = obj_to_encoder(obj);
529 return encoder;
530 }
531 return NULL;
532}
533
534static enum drm_connector_status cirrus_vga_detect(struct drm_connector
535 *connector, bool force)
536{
537 return connector_status_connected;
538}
539
540static void cirrus_connector_destroy(struct drm_connector *connector)
541{
542 drm_connector_cleanup(connector);
543 kfree(connector);
544}
545
546struct drm_connector_helper_funcs cirrus_vga_connector_helper_funcs = {
547 .get_modes = cirrus_vga_get_modes,
548 .mode_valid = cirrus_vga_mode_valid,
549 .best_encoder = cirrus_connector_best_encoder,
550};
551
552struct drm_connector_funcs cirrus_vga_connector_funcs = {
553 .dpms = drm_helper_connector_dpms,
554 .detect = cirrus_vga_detect,
555 .fill_modes = drm_helper_probe_single_connector_modes,
556 .destroy = cirrus_connector_destroy,
557};
558
559static struct drm_connector *cirrus_vga_init(struct drm_device *dev)
560{
561 struct drm_connector *connector;
562 struct cirrus_connector *cirrus_connector;
563
564 cirrus_connector = kzalloc(sizeof(struct cirrus_connector), GFP_KERNEL);
565 if (!cirrus_connector)
566 return NULL;
567
568 connector = &cirrus_connector->base;
569
570 drm_connector_init(dev, connector,
571 &cirrus_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);
572
573 drm_connector_helper_add(connector, &cirrus_vga_connector_helper_funcs);
574
575 return connector;
576}
577
578
579int cirrus_modeset_init(struct cirrus_device *cdev)
580{
581 struct drm_encoder *encoder;
582 struct drm_connector *connector;
583 int ret;
584
585 drm_mode_config_init(cdev->dev);
586 cdev->mode_info.mode_config_initialized = true;
587
588 cdev->dev->mode_config.max_width = CIRRUS_MAX_FB_WIDTH;
589 cdev->dev->mode_config.max_height = CIRRUS_MAX_FB_HEIGHT;
590
591 cdev->dev->mode_config.fb_base = cdev->mc.vram_base;
592 cdev->dev->mode_config.preferred_depth = 24;
593
594 cdev->dev->mode_config.prefer_shadow = 0;
595
596 cirrus_crtc_init(cdev->dev);
597
598 encoder = cirrus_encoder_init(cdev->dev);
599 if (!encoder) {
600 DRM_ERROR("cirrus_encoder_init failed\n");
601 return -1;
602 }
603
604 connector = cirrus_vga_init(cdev->dev);
605 if (!connector) {
606 DRM_ERROR("cirrus_vga_init failed\n");
607 return -1;
608 }
609
610 drm_mode_connector_attach_encoder(connector, encoder);
611
612 ret = cirrus_fbdev_init(cdev);
613 if (ret) {
614 DRM_ERROR("cirrus_fbdev_init failed\n");
615 return ret;
616 }
617
618 return 0;
619}
620
621void cirrus_modeset_fini(struct cirrus_device *cdev)
622{
623 cirrus_fbdev_fini(cdev);
624
625 if (cdev->mode_info.mode_config_initialized) {
626 drm_mode_config_cleanup(cdev->dev);
627 cdev->mode_info.mode_config_initialized = false;
628 }
629}
630