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21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/timer.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/slab.h>
29#include <linux/videodev2.h>
30#include <linux/i2c.h>
31#include <linux/init.h>
32#include <linux/kthread.h>
33#include <linux/freezer.h>
34
35#include <media/tvaudio.h>
36#include <media/v4l2-device.h>
37#include <media/v4l2-chip-ident.h>
38
39#include <media/i2c-addr.h>
40
41
42
43
44static int debug;
45module_param(debug, int, 0644);
46
47MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
48MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
49MODULE_LICENSE("GPL");
50
51#define UNSET (-1U)
52
53
54
55
56#define MAXREGS 256
57
58struct CHIPSTATE;
59typedef int (*getvalue)(int);
60typedef int (*checkit)(struct CHIPSTATE*);
61typedef int (*initialize)(struct CHIPSTATE*);
62typedef int (*getmode)(struct CHIPSTATE*);
63typedef void (*setmode)(struct CHIPSTATE*, int mode);
64
65
66typedef struct AUDIOCMD {
67 int count;
68 unsigned char bytes[MAXREGS+1];
69} audiocmd;
70
71
72struct CHIPDESC {
73 char *name;
74 int addr_lo, addr_hi;
75 int registers;
76
77 int *insmodopt;
78 checkit checkit;
79 initialize initialize;
80 int flags;
81#define CHIP_HAS_VOLUME 1
82#define CHIP_HAS_BASSTREBLE 2
83#define CHIP_HAS_INPUTSEL 4
84#define CHIP_NEED_CHECKMODE 8
85
86
87 audiocmd init;
88
89
90 int leftreg,rightreg,treblereg,bassreg;
91
92
93 int leftinit,rightinit,trebleinit,bassinit;
94
95
96 getvalue volfunc,treblefunc,bassfunc;
97
98
99 getmode getmode;
100 setmode setmode;
101
102
103 int inputreg;
104 int inputmap[4];
105 int inputmute;
106 int inputmask;
107};
108
109
110struct CHIPSTATE {
111 struct v4l2_subdev sd;
112
113
114
115 struct CHIPDESC *desc;
116
117
118 audiocmd shadow;
119
120
121 __u16 left,right,treble,bass,muted,mode;
122 int prevmode;
123 int radio;
124 int input;
125
126
127 struct task_struct *thread;
128 struct timer_list wt;
129 int watch_stereo;
130 int audmode;
131};
132
133static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
134{
135 return container_of(sd, struct CHIPSTATE, sd);
136}
137
138
139
140
141
142static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
143{
144 struct v4l2_subdev *sd = &chip->sd;
145 struct i2c_client *c = v4l2_get_subdevdata(sd);
146 unsigned char buffer[2];
147
148 if (subaddr < 0) {
149 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
150 chip->shadow.bytes[1] = val;
151 buffer[0] = val;
152 if (1 != i2c_master_send(c, buffer, 1)) {
153 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
154 return -1;
155 }
156 } else {
157 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
158 v4l2_info(sd,
159 "Tried to access a non-existent register: %d\n",
160 subaddr);
161 return -EINVAL;
162 }
163
164 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
165 subaddr, val);
166 chip->shadow.bytes[subaddr+1] = val;
167 buffer[0] = subaddr;
168 buffer[1] = val;
169 if (2 != i2c_master_send(c, buffer, 2)) {
170 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
171 subaddr, val);
172 return -1;
173 }
174 }
175 return 0;
176}
177
178static int chip_write_masked(struct CHIPSTATE *chip,
179 int subaddr, int val, int mask)
180{
181 struct v4l2_subdev *sd = &chip->sd;
182
183 if (mask != 0) {
184 if (subaddr < 0) {
185 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
186 } else {
187 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
188 v4l2_info(sd,
189 "Tried to access a non-existent register: %d\n",
190 subaddr);
191 return -EINVAL;
192 }
193
194 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
195 }
196 }
197 return chip_write(chip, subaddr, val);
198}
199
200static int chip_read(struct CHIPSTATE *chip)
201{
202 struct v4l2_subdev *sd = &chip->sd;
203 struct i2c_client *c = v4l2_get_subdevdata(sd);
204 unsigned char buffer;
205
206 if (1 != i2c_master_recv(c, &buffer, 1)) {
207 v4l2_warn(sd, "I/O error (read)\n");
208 return -1;
209 }
210 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
211 return buffer;
212}
213
214static int chip_read2(struct CHIPSTATE *chip, int subaddr)
215{
216 struct v4l2_subdev *sd = &chip->sd;
217 struct i2c_client *c = v4l2_get_subdevdata(sd);
218 unsigned char write[1];
219 unsigned char read[1];
220 struct i2c_msg msgs[2] = {
221 { c->addr, 0, 1, write },
222 { c->addr, I2C_M_RD, 1, read }
223 };
224
225 write[0] = subaddr;
226
227 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
228 v4l2_warn(sd, "I/O error (read2)\n");
229 return -1;
230 }
231 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
232 subaddr, read[0]);
233 return read[0];
234}
235
236static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
237{
238 struct v4l2_subdev *sd = &chip->sd;
239 struct i2c_client *c = v4l2_get_subdevdata(sd);
240 int i;
241
242 if (0 == cmd->count)
243 return 0;
244
245 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
246 v4l2_info(sd,
247 "Tried to access a non-existent register range: %d to %d\n",
248 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
249 return -EINVAL;
250 }
251
252
253
254
255 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
256 name, cmd->bytes[0]);
257 for (i = 1; i < cmd->count; i++) {
258 if (debug)
259 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
260 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
261 }
262 if (debug)
263 printk(KERN_CONT "\n");
264
265
266 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
267 v4l2_warn(sd, "I/O error (%s)\n", name);
268 return -1;
269 }
270 return 0;
271}
272
273
274
275
276
277
278
279
280static void chip_thread_wake(unsigned long data)
281{
282 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
283 wake_up_process(chip->thread);
284}
285
286static int chip_thread(void *data)
287{
288 struct CHIPSTATE *chip = data;
289 struct CHIPDESC *desc = chip->desc;
290 struct v4l2_subdev *sd = &chip->sd;
291 int mode;
292
293 v4l2_dbg(1, debug, sd, "thread started\n");
294 set_freezable();
295 for (;;) {
296 set_current_state(TASK_INTERRUPTIBLE);
297 if (!kthread_should_stop())
298 schedule();
299 set_current_state(TASK_RUNNING);
300 try_to_freeze();
301 if (kthread_should_stop())
302 break;
303 v4l2_dbg(1, debug, sd, "thread wakeup\n");
304
305
306 if (chip->radio || chip->mode != 0)
307 continue;
308
309
310 mode = desc->getmode(chip);
311 if (mode == chip->prevmode)
312 continue;
313
314
315 v4l2_dbg(1, debug, sd, "thread checkmode\n");
316
317 chip->prevmode = mode;
318
319 if (mode & V4L2_TUNER_MODE_STEREO)
320 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
321 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
322 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
323 else if (mode & V4L2_TUNER_MODE_LANG1)
324 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
325 else if (mode & V4L2_TUNER_MODE_LANG2)
326 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
327 else
328 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
329
330
331 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
332 }
333
334 v4l2_dbg(1, debug, sd, "thread exiting\n");
335 return 0;
336}
337
338
339
340
341#define TDA9840_SW 0x00
342#define TDA9840_LVADJ 0x02
343#define TDA9840_STADJ 0x03
344#define TDA9840_TEST 0x04
345
346#define TDA9840_MONO 0x10
347#define TDA9840_STEREO 0x2a
348#define TDA9840_DUALA 0x12
349#define TDA9840_DUALB 0x1e
350#define TDA9840_DUALAB 0x1a
351#define TDA9840_DUALBA 0x16
352#define TDA9840_EXTERNAL 0x7a
353
354#define TDA9840_DS_DUAL 0x20
355#define TDA9840_ST_STEREO 0x40
356#define TDA9840_PONRES 0x80
357
358#define TDA9840_TEST_INT1SN 0x1
359#define TDA9840_TEST_INTFU 0x02
360
361static int tda9840_getmode(struct CHIPSTATE *chip)
362{
363 struct v4l2_subdev *sd = &chip->sd;
364 int val, mode;
365
366 val = chip_read(chip);
367 mode = V4L2_TUNER_MODE_MONO;
368 if (val & TDA9840_DS_DUAL)
369 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
370 if (val & TDA9840_ST_STEREO)
371 mode |= V4L2_TUNER_MODE_STEREO;
372
373 v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
374 val, mode);
375 return mode;
376}
377
378static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
379{
380 int update = 1;
381 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
382
383 switch (mode) {
384 case V4L2_TUNER_MODE_MONO:
385 t |= TDA9840_MONO;
386 break;
387 case V4L2_TUNER_MODE_STEREO:
388 t |= TDA9840_STEREO;
389 break;
390 case V4L2_TUNER_MODE_LANG1:
391 t |= TDA9840_DUALA;
392 break;
393 case V4L2_TUNER_MODE_LANG2:
394 t |= TDA9840_DUALB;
395 break;
396 default:
397 update = 0;
398 }
399
400 if (update)
401 chip_write(chip, TDA9840_SW, t);
402}
403
404static int tda9840_checkit(struct CHIPSTATE *chip)
405{
406 int rc;
407 rc = chip_read(chip);
408
409 return ((rc & 0x1f) == 0) ? 1 : 0;
410}
411
412
413
414
415
416#define TDA9855_VR 0x00
417#define TDA9855_VL 0x01
418#define TDA9855_BA 0x02
419#define TDA9855_TR 0x03
420#define TDA9855_SW 0x04
421
422
423#define TDA9850_C4 0x04
424
425
426#define TDA985x_C5 0x05
427#define TDA985x_C6 0x06
428#define TDA985x_C7 0x07
429#define TDA985x_A1 0x08
430#define TDA985x_A2 0x09
431#define TDA985x_A3 0x0a
432
433
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451
452
453
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459
460
461
462#define TDA9855_MUTE 1<<7
463#define TDA9855_AVL 1<<6
464#define TDA9855_LOUD 1<<5
465#define TDA9855_SUR 1<<3
466
467
468
469#define TDA9855_EXT 1<<2
470#define TDA9855_INT 0
471
472
473
474
475
476
477
478
479#define TDA985x_SAP 3<<6
480#define TDA985x_STEREO 1<<6
481#define TDA985x_MONO 0
482#define TDA985x_LMU 1<<3
483
484
485#define TDA9855_TZCM 1<<5
486#define TDA9855_VZCM 1<<4
487#define TDA9855_LINEAR 0
488#define TDA9855_PSEUDO 1
489#define TDA9855_SPAT_30 2
490#define TDA9855_SPAT_50 3
491#define TDA9855_E_MONO 7
492
493
494
495
496
497
498
499
500
501
502#define TDA985x_STP 1<<5
503#define TDA985x_SAPP 1<<6
504#define TDA985x_STS 1<<7
505
506
507
508
509
510#define TDA985x_ADJ 1<<7
511
512static int tda9855_volume(int val) { return val/0x2e8+0x27; }
513static int tda9855_bass(int val) { return val/0xccc+0x06; }
514static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
515
516static int tda985x_getmode(struct CHIPSTATE *chip)
517{
518 int mode;
519
520 mode = ((TDA985x_STP | TDA985x_SAPP) &
521 chip_read(chip)) >> 4;
522
523
524 return mode | V4L2_TUNER_MODE_MONO;
525}
526
527static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
528{
529 int update = 1;
530 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
531
532 switch (mode) {
533 case V4L2_TUNER_MODE_MONO:
534 c6 |= TDA985x_MONO;
535 break;
536 case V4L2_TUNER_MODE_STEREO:
537 c6 |= TDA985x_STEREO;
538 break;
539 case V4L2_TUNER_MODE_LANG1:
540 c6 |= TDA985x_SAP;
541 break;
542 default:
543 update = 0;
544 }
545 if (update)
546 chip_write(chip,TDA985x_C6,c6);
547}
548
549
550
551
552
553
554
555#define TDA9873_SW 0x00
556#define TDA9873_AD 0x01
557#define TDA9873_PT 0x02
558
559
560
561
562
563
564
565
566
567#define TDA9873_INP_MASK 3
568#define TDA9873_INTERNAL 0
569#define TDA9873_EXT_STEREO 2
570#define TDA9873_EXT_MONO 1
571
572
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575
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577
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580
581
582
583#define TDA9873_TR_MASK (7 << 2)
584#define TDA9873_TR_MONO 4
585#define TDA9873_TR_STEREO 1 << 4
586#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
587#define TDA9873_TR_DUALA 1 << 2
588#define TDA9873_TR_DUALB 1 << 3
589
590
591
592
593
594
595
596#define TDA9873_GAIN_NORMAL 1 << 5
597#define TDA9873_MUTE 1 << 6
598#define TDA9873_AUTOMUTE 1 << 7
599
600
601
602
603
604
605
606#define TDA9873_STEREO_ADJ 0x06
607
608
609
610
611
612
613
614
615
616
617#define TDA9873_BG 0
618#define TDA9873_M 1
619#define TDA9873_DK1 2
620#define TDA9873_DK2 3
621#define TDA9873_DK3 4
622#define TDA9873_I 5
623
624
625
626#define TDA9873_IDR_NORM 0
627#define TDA9873_IDR_FAST 1 << 7
628
629
630
631
632
633
634
635
636
637
638
639#define TDA9873_PORTS 3
640
641
642#define TDA9873_TST_PORT 1 << 2
643
644
645
646
647
648
649
650
651#define TDA9873_MOUT_MONO 0
652#define TDA9873_MOUT_FMONO 0
653#define TDA9873_MOUT_DUALA 0
654#define TDA9873_MOUT_DUALB 1 << 3
655#define TDA9873_MOUT_ST 1 << 4
656#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
657#define TDA9873_MOUT_EXTL 1 << 5
658#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
659#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
660#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
661
662
663#define TDA9873_PONR 0
664#define TDA9873_STEREO 2
665#define TDA9873_DUAL 4
666
667static int tda9873_getmode(struct CHIPSTATE *chip)
668{
669 struct v4l2_subdev *sd = &chip->sd;
670 int val,mode;
671
672 val = chip_read(chip);
673 mode = V4L2_TUNER_MODE_MONO;
674 if (val & TDA9873_STEREO)
675 mode |= V4L2_TUNER_MODE_STEREO;
676 if (val & TDA9873_DUAL)
677 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
678 v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
679 val, mode);
680 return mode;
681}
682
683static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
684{
685 struct v4l2_subdev *sd = &chip->sd;
686 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
687
688
689 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
690 v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
691 return;
692 }
693
694 v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
695 v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data = %d\n", sw_data);
696
697 switch (mode) {
698 case V4L2_TUNER_MODE_MONO:
699 sw_data |= TDA9873_TR_MONO;
700 break;
701 case V4L2_TUNER_MODE_STEREO:
702 sw_data |= TDA9873_TR_STEREO;
703 break;
704 case V4L2_TUNER_MODE_LANG1:
705 sw_data |= TDA9873_TR_DUALA;
706 break;
707 case V4L2_TUNER_MODE_LANG2:
708 sw_data |= TDA9873_TR_DUALB;
709 break;
710 default:
711 chip->mode = 0;
712 return;
713 }
714
715 chip_write(chip, TDA9873_SW, sw_data);
716 v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
717 mode, sw_data);
718}
719
720static int tda9873_checkit(struct CHIPSTATE *chip)
721{
722 int rc;
723
724 if (-1 == (rc = chip_read2(chip,254)))
725 return 0;
726 return (rc & ~0x1f) == 0x80;
727}
728
729
730
731
732
733
734
735#define TDA9874A_AGCGR 0x00
736#define TDA9874A_GCONR 0x01
737#define TDA9874A_MSR 0x02
738#define TDA9874A_C1FRA 0x03
739#define TDA9874A_C1FRB 0x04
740#define TDA9874A_C1FRC 0x05
741#define TDA9874A_C2FRA 0x06
742#define TDA9874A_C2FRB 0x07
743#define TDA9874A_C2FRC 0x08
744#define TDA9874A_DCR 0x09
745#define TDA9874A_FMER 0x0a
746#define TDA9874A_FMMR 0x0b
747#define TDA9874A_C1OLAR 0x0c
748#define TDA9874A_C2OLAR 0x0d
749#define TDA9874A_NCONR 0x0e
750#define TDA9874A_NOLAR 0x0f
751#define TDA9874A_NLELR 0x10
752#define TDA9874A_NUELR 0x11
753#define TDA9874A_AMCONR 0x12
754#define TDA9874A_SDACOSR 0x13
755#define TDA9874A_AOSR 0x14
756#define TDA9874A_DAICONR 0x15
757#define TDA9874A_I2SOSR 0x16
758#define TDA9874A_I2SOLAR 0x17
759#define TDA9874A_MDACOSR 0x18
760#define TDA9874A_ESP 0xFF
761
762
763#define TDA9874A_DSR 0x00
764#define TDA9874A_NSR 0x01
765#define TDA9874A_NECR 0x02
766#define TDA9874A_DR1 0x03
767#define TDA9874A_DR2 0x04
768#define TDA9874A_LLRA 0x05
769#define TDA9874A_LLRB 0x06
770#define TDA9874A_SIFLR 0x07
771#define TDA9874A_TR2 252
772#define TDA9874A_TR1 253
773#define TDA9874A_DIC 254
774#define TDA9874A_SIC 255
775
776
777static int tda9874a_mode = 1;
778static int tda9874a_GCONR = 0xc0;
779static int tda9874a_NCONR = 0x01;
780static int tda9874a_ESP = 0x07;
781static int tda9874a_dic = -1;
782
783
784static unsigned int tda9874a_SIF = UNSET;
785static unsigned int tda9874a_AMSEL = UNSET;
786static unsigned int tda9874a_STD = UNSET;
787module_param(tda9874a_SIF, int, 0444);
788module_param(tda9874a_AMSEL, int, 0444);
789module_param(tda9874a_STD, int, 0444);
790
791
792
793
794
795
796
797
798
799static struct tda9874a_MODES {
800 char *name;
801 audiocmd cmd;
802} tda9874a_modelist[9] = {
803 { "A2, B/G",
804 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
805 { "A2, M (Korea)",
806 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
807 { "A2, D/K (1)",
808 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
809 { "A2, D/K (2)",
810 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
811 { "A2, D/K (3)",
812 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
813 { "NICAM, I",
814 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
815 { "NICAM, B/G",
816 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
817 { "NICAM, D/K",
818 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
819 { "NICAM, L",
820 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
821};
822
823static int tda9874a_setup(struct CHIPSTATE *chip)
824{
825 struct v4l2_subdev *sd = &chip->sd;
826
827 chip_write(chip, TDA9874A_AGCGR, 0x00);
828 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
829 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
830 if(tda9874a_dic == 0x11) {
831 chip_write(chip, TDA9874A_FMMR, 0x80);
832 } else {
833 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
834 chip_write(chip, TDA9874A_FMMR, 0x00);
835 }
836 chip_write(chip, TDA9874A_C1OLAR, 0x00);
837 chip_write(chip, TDA9874A_C2OLAR, 0x00);
838 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
839 chip_write(chip, TDA9874A_NOLAR, 0x00);
840
841
842
843 chip_write(chip, TDA9874A_NLELR, 0x14);
844 chip_write(chip, TDA9874A_NUELR, 0x50);
845
846 if(tda9874a_dic == 0x11) {
847 chip_write(chip, TDA9874A_AMCONR, 0xf9);
848 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
849 chip_write(chip, TDA9874A_AOSR, 0x80);
850 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
851 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
852 } else {
853 chip_write(chip, TDA9874A_AMCONR, 0xfb);
854 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
855 chip_write(chip, TDA9874A_AOSR, 0x00);
856 }
857 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
858 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
859 return 1;
860}
861
862static int tda9874a_getmode(struct CHIPSTATE *chip)
863{
864 struct v4l2_subdev *sd = &chip->sd;
865 int dsr,nsr,mode;
866 int necr;
867
868 mode = V4L2_TUNER_MODE_MONO;
869
870 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
871 return mode;
872 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
873 return mode;
874 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
875 return mode;
876
877
878 chip->shadow.bytes[MAXREGS-2] = dsr;
879 chip->shadow.bytes[MAXREGS-1] = nsr;
880
881 if(tda9874a_mode) {
882
883
884
885
886
887
888
889
890 if(nsr & 0x02)
891 mode |= V4L2_TUNER_MODE_STEREO;
892 if(nsr & 0x01)
893 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
894 } else {
895 if(dsr & 0x02)
896 mode |= V4L2_TUNER_MODE_STEREO;
897 if(dsr & 0x04)
898 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
899 }
900
901 v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
902 dsr, nsr, necr, mode);
903 return mode;
904}
905
906static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
907{
908 struct v4l2_subdev *sd = &chip->sd;
909
910
911
912 if (tda9874a_mode) {
913 if(chip->shadow.bytes[MAXREGS-2] & 0x20)
914 tda9874a_NCONR &= 0xfe;
915 else
916 tda9874a_NCONR |= 0x01;
917 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
918 }
919
920
921
922
923
924
925
926 if(tda9874a_dic == 0x11) {
927 int aosr = 0x80;
928 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
929
930 switch(mode) {
931 case V4L2_TUNER_MODE_MONO:
932 case V4L2_TUNER_MODE_STEREO:
933 break;
934 case V4L2_TUNER_MODE_LANG1:
935 aosr = 0x80;
936 mdacosr = (tda9874a_mode) ? 0x82:0x80;
937 break;
938 case V4L2_TUNER_MODE_LANG2:
939 aosr = 0xa0;
940 mdacosr = (tda9874a_mode) ? 0x83:0x81;
941 break;
942 default:
943 chip->mode = 0;
944 return;
945 }
946 chip_write(chip, TDA9874A_AOSR, aosr);
947 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
948
949 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
950 mode, aosr, mdacosr);
951
952 } else {
953 int fmmr,aosr;
954
955 switch(mode) {
956 case V4L2_TUNER_MODE_MONO:
957 fmmr = 0x00;
958 aosr = 0x10;
959 break;
960 case V4L2_TUNER_MODE_STEREO:
961 if(tda9874a_mode) {
962 fmmr = 0x00;
963 aosr = 0x00;
964 } else {
965 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04;
966 aosr = 0x00;
967 }
968 break;
969 case V4L2_TUNER_MODE_LANG1:
970 fmmr = 0x02;
971 aosr = 0x10;
972 break;
973 case V4L2_TUNER_MODE_LANG2:
974 fmmr = 0x02;
975 aosr = 0x20;
976 break;
977 default:
978 chip->mode = 0;
979 return;
980 }
981 chip_write(chip, TDA9874A_FMMR, fmmr);
982 chip_write(chip, TDA9874A_AOSR, aosr);
983
984 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
985 mode, fmmr, aosr);
986 }
987}
988
989static int tda9874a_checkit(struct CHIPSTATE *chip)
990{
991 struct v4l2_subdev *sd = &chip->sd;
992 int dic,sic;
993
994 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
995 return 0;
996 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
997 return 0;
998
999 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1000
1001 if((dic == 0x11)||(dic == 0x07)) {
1002 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1003 tda9874a_dic = dic;
1004 return 1;
1005 }
1006 return 0;
1007}
1008
1009static int tda9874a_initialize(struct CHIPSTATE *chip)
1010{
1011 if (tda9874a_SIF > 2)
1012 tda9874a_SIF = 1;
1013 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1014 tda9874a_STD = 0;
1015 if(tda9874a_AMSEL > 1)
1016 tda9874a_AMSEL = 0;
1017
1018 if(tda9874a_SIF == 1)
1019 tda9874a_GCONR = 0xc0;
1020 else
1021 tda9874a_GCONR = 0xc1;
1022
1023 tda9874a_ESP = tda9874a_STD;
1024 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1025
1026 if(tda9874a_AMSEL == 0)
1027 tda9874a_NCONR = 0x01;
1028 else
1029 tda9874a_NCONR = 0x05;
1030
1031 tda9874a_setup(chip);
1032 return 0;
1033}
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044#define TDA9875_MUT 0x12
1045#define TDA9875_CFG 0x01
1046#define TDA9875_DACOS 0x13
1047#define TDA9875_LOSR 0x16
1048
1049#define TDA9875_CH1V 0x0c
1050#define TDA9875_CH2V 0x0d
1051#define TDA9875_SC1 0x14
1052#define TDA9875_SC2 0x15
1053
1054#define TDA9875_ADCIS 0x17
1055#define TDA9875_AER 0x19
1056#define TDA9875_MCS 0x18
1057#define TDA9875_MVL 0x1a
1058#define TDA9875_MVR 0x1b
1059#define TDA9875_MBA 0x1d
1060#define TDA9875_MTR 0x1e
1061#define TDA9875_ACS 0x1f
1062#define TDA9875_AVL 0x20
1063#define TDA9875_AVR 0x21
1064#define TDA9875_ABA 0x22
1065#define TDA9875_ATR 0x23
1066
1067#define TDA9875_MSR 0x02
1068#define TDA9875_C1MSB 0x03
1069#define TDA9875_C1MIB 0x04
1070#define TDA9875_C1LSB 0x05
1071#define TDA9875_C2MSB 0x06
1072#define TDA9875_C2MIB 0x07
1073#define TDA9875_C2LSB 0x08
1074#define TDA9875_DCR 0x09
1075#define TDA9875_DEEM 0x0a
1076#define TDA9875_FMAT 0x0b
1077
1078
1079#define TDA9875_MUTE_ON 0xff
1080#define TDA9875_MUTE_OFF 0xcc
1081
1082static int tda9875_initialize(struct CHIPSTATE *chip)
1083{
1084 chip_write(chip, TDA9875_CFG, 0xd0);
1085 chip_write(chip, TDA9875_MSR, 0x03);
1086 chip_write(chip, TDA9875_C1MSB, 0x00);
1087 chip_write(chip, TDA9875_C1MIB, 0x00);
1088 chip_write(chip, TDA9875_C1LSB, 0x00);
1089 chip_write(chip, TDA9875_C2MSB, 0x00);
1090 chip_write(chip, TDA9875_C2MIB, 0x00);
1091 chip_write(chip, TDA9875_C2LSB, 0x00);
1092 chip_write(chip, TDA9875_DCR, 0x00);
1093 chip_write(chip, TDA9875_DEEM, 0x44);
1094 chip_write(chip, TDA9875_FMAT, 0x00);
1095 chip_write(chip, TDA9875_SC1, 0x00);
1096 chip_write(chip, TDA9875_SC2, 0x01);
1097
1098 chip_write(chip, TDA9875_CH1V, 0x10);
1099 chip_write(chip, TDA9875_CH2V, 0x10);
1100 chip_write(chip, TDA9875_DACOS, 0x02);
1101 chip_write(chip, TDA9875_ADCIS, 0x6f);
1102 chip_write(chip, TDA9875_LOSR, 0x00);
1103 chip_write(chip, TDA9875_AER, 0x00);
1104 chip_write(chip, TDA9875_MCS, 0x44);
1105 chip_write(chip, TDA9875_MVL, 0x03);
1106 chip_write(chip, TDA9875_MVR, 0x03);
1107 chip_write(chip, TDA9875_MBA, 0x00);
1108 chip_write(chip, TDA9875_MTR, 0x00);
1109 chip_write(chip, TDA9875_ACS, 0x44);
1110 chip_write(chip, TDA9875_AVL, 0x00);
1111 chip_write(chip, TDA9875_AVR, 0x00);
1112 chip_write(chip, TDA9875_ABA, 0x00);
1113 chip_write(chip, TDA9875_ATR, 0x00);
1114
1115 chip_write(chip, TDA9875_MUT, 0xcc);
1116 return 0;
1117}
1118
1119static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1120static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1121static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1122
1123
1124
1125
1126
1127
1128
1129
1130static int tda9875_checkit(struct CHIPSTATE *chip)
1131{
1132 struct v4l2_subdev *sd = &chip->sd;
1133 int dic, rev;
1134
1135 dic = chip_read2(chip, 254);
1136 rev = chip_read2(chip, 255);
1137
1138 if (dic == 0 || dic == 2) {
1139 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1140 dic == 0 ? "" : "A", rev);
1141 return 1;
1142 }
1143 return 0;
1144}
1145
1146
1147
1148
1149#define TEA6300_VL 0x00
1150#define TEA6300_VR 0x01
1151#define TEA6300_BA 0x02
1152#define TEA6300_TR 0x03
1153#define TEA6300_FA 0x04
1154#define TEA6300_S 0x05
1155
1156#define TEA6300_S_SA 0x01
1157#define TEA6300_S_SB 0x02
1158#define TEA6300_S_SC 0x04
1159#define TEA6300_S_GMU 0x80
1160
1161#define TEA6320_V 0x00
1162#define TEA6320_FFR 0x01
1163#define TEA6320_FFL 0x02
1164#define TEA6320_FRR 0x03
1165#define TEA6320_FRL 0x04
1166#define TEA6320_BA 0x05
1167#define TEA6320_TR 0x06
1168#define TEA6320_S 0x07
1169
1170#define TEA6320_S_SA 0x07
1171#define TEA6320_S_SB 0x06
1172#define TEA6320_S_SC 0x05
1173#define TEA6320_S_SD 0x04
1174#define TEA6320_S_GMU 0x80
1175
1176#define TEA6420_S_SA 0x00
1177#define TEA6420_S_SB 0x01
1178#define TEA6420_S_SC 0x02
1179#define TEA6420_S_SD 0x03
1180#define TEA6420_S_SE 0x04
1181#define TEA6420_S_GMU 0x05
1182
1183static int tea6300_shift10(int val) { return val >> 10; }
1184static int tea6300_shift12(int val) { return val >> 12; }
1185
1186
1187
1188static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1189static int tea6320_shift11(int val) { return val >> 11; }
1190static int tea6320_initialize(struct CHIPSTATE * chip)
1191{
1192 chip_write(chip, TEA6320_FFR, 0x3f);
1193 chip_write(chip, TEA6320_FFL, 0x3f);
1194 chip_write(chip, TEA6320_FRR, 0x3f);
1195 chip_write(chip, TEA6320_FRL, 0x3f);
1196
1197 return 0;
1198}
1199
1200
1201
1202
1203
1204#define TDA8425_VL 0x00
1205#define TDA8425_VR 0x01
1206#define TDA8425_BA 0x02
1207#define TDA8425_TR 0x03
1208#define TDA8425_S1 0x08
1209
1210#define TDA8425_S1_OFF 0xEE
1211#define TDA8425_S1_CH1 0xCE
1212#define TDA8425_S1_CH2 0xCF
1213#define TDA8425_S1_MU 0x20
1214#define TDA8425_S1_STEREO 0x18
1215#define TDA8425_S1_STEREO_SPATIAL 0x18
1216#define TDA8425_S1_STEREO_LINEAR 0x08
1217#define TDA8425_S1_STEREO_PSEUDO 0x10
1218#define TDA8425_S1_STEREO_MONO 0x00
1219#define TDA8425_S1_ML 0x06
1220#define TDA8425_S1_ML_SOUND_A 0x02
1221#define TDA8425_S1_ML_SOUND_B 0x04
1222#define TDA8425_S1_ML_STEREO 0x06
1223#define TDA8425_S1_IS 0x01
1224
1225
1226static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1227static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1228
1229static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1230{
1231 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1232
1233 if (mode & V4L2_TUNER_MODE_LANG1) {
1234 s1 |= TDA8425_S1_ML_SOUND_A;
1235 s1 |= TDA8425_S1_STEREO_PSEUDO;
1236
1237 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1238 s1 |= TDA8425_S1_ML_SOUND_B;
1239 s1 |= TDA8425_S1_STEREO_PSEUDO;
1240
1241 } else {
1242 s1 |= TDA8425_S1_ML_STEREO;
1243
1244 if (mode & V4L2_TUNER_MODE_MONO)
1245 s1 |= TDA8425_S1_STEREO_MONO;
1246 if (mode & V4L2_TUNER_MODE_STEREO)
1247 s1 |= TDA8425_S1_STEREO_SPATIAL;
1248 }
1249 chip_write(chip,TDA8425_S1,s1);
1250}
1251
1252
1253
1254
1255
1256
1257#define PIC16C54_REG_KEY_CODE 0x01
1258#define PIC16C54_REG_MISC 0x02
1259
1260
1261#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01
1262
1263#define PIC16C54_MISC_MTS_MAIN 0x02
1264#define PIC16C54_MISC_MTS_SAP 0x04
1265#define PIC16C54_MISC_MTS_BOTH 0x08
1266#define PIC16C54_MISC_SND_MUTE 0x10
1267#define PIC16C54_MISC_SND_NOTMUTE 0x20
1268#define PIC16C54_MISC_SWITCH_TUNER 0x40
1269#define PIC16C54_MISC_SWITCH_LINE 0x80
1270
1271
1272
1273
1274
1275#define TA8874Z_LED_STE 0x80
1276#define TA8874Z_LED_BIL 0x40
1277#define TA8874Z_LED_EXT 0x20
1278#define TA8874Z_MONO_SET 0x10
1279#define TA8874Z_MUTE 0x08
1280#define TA8874Z_F_MONO 0x04
1281#define TA8874Z_MODE_SUB 0x02
1282#define TA8874Z_MODE_MAIN 0x01
1283
1284
1285
1286#define TA8874Z_SEPARATION 0x3f
1287#define TA8874Z_SEPARATION_DEFAULT 0x10
1288
1289
1290#define TA8874Z_B1 0x80
1291#define TA8874Z_B0 0x40
1292#define TA8874Z_CHAG_FLAG 0x20
1293
1294
1295
1296
1297
1298
1299
1300static int ta8874z_getmode(struct CHIPSTATE *chip)
1301{
1302 int val, mode;
1303
1304 val = chip_read(chip);
1305 mode = V4L2_TUNER_MODE_MONO;
1306 if (val & TA8874Z_B1){
1307 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1308 }else if (!(val & TA8874Z_B0)){
1309 mode |= V4L2_TUNER_MODE_STEREO;
1310 }
1311
1312 return mode;
1313}
1314
1315static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1316static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1317static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1318static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1319
1320static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1321{
1322 struct v4l2_subdev *sd = &chip->sd;
1323 int update = 1;
1324 audiocmd *t = NULL;
1325
1326 v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1327
1328 switch(mode){
1329 case V4L2_TUNER_MODE_MONO:
1330 t = &ta8874z_mono;
1331 break;
1332 case V4L2_TUNER_MODE_STEREO:
1333 t = &ta8874z_stereo;
1334 break;
1335 case V4L2_TUNER_MODE_LANG1:
1336 t = &ta8874z_main;
1337 break;
1338 case V4L2_TUNER_MODE_LANG2:
1339 t = &ta8874z_sub;
1340 break;
1341 default:
1342 update = 0;
1343 }
1344
1345 if(update)
1346 chip_cmd(chip, "TA8874Z", t);
1347}
1348
1349static int ta8874z_checkit(struct CHIPSTATE *chip)
1350{
1351 int rc;
1352 rc = chip_read(chip);
1353 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1354}
1355
1356
1357
1358
1359
1360static int tda8425 = 1;
1361static int tda9840 = 1;
1362static int tda9850 = 1;
1363static int tda9855 = 1;
1364static int tda9873 = 1;
1365static int tda9874a = 1;
1366static int tda9875 = 1;
1367static int tea6300;
1368static int tea6320;
1369static int tea6420 = 1;
1370static int pic16c54 = 1;
1371static int ta8874z;
1372
1373module_param(tda8425, int, 0444);
1374module_param(tda9840, int, 0444);
1375module_param(tda9850, int, 0444);
1376module_param(tda9855, int, 0444);
1377module_param(tda9873, int, 0444);
1378module_param(tda9874a, int, 0444);
1379module_param(tda9875, int, 0444);
1380module_param(tea6300, int, 0444);
1381module_param(tea6320, int, 0444);
1382module_param(tea6420, int, 0444);
1383module_param(pic16c54, int, 0444);
1384module_param(ta8874z, int, 0444);
1385
1386static struct CHIPDESC chiplist[] = {
1387 {
1388 .name = "tda9840",
1389 .insmodopt = &tda9840,
1390 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1391 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1392 .registers = 5,
1393 .flags = CHIP_NEED_CHECKMODE,
1394
1395
1396 .checkit = tda9840_checkit,
1397 .getmode = tda9840_getmode,
1398 .setmode = tda9840_setmode,
1399
1400 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1401 } }
1402 },
1403 {
1404 .name = "tda9873h",
1405 .insmodopt = &tda9873,
1406 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1407 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1408 .registers = 3,
1409 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1410
1411
1412 .checkit = tda9873_checkit,
1413 .getmode = tda9873_getmode,
1414 .setmode = tda9873_setmode,
1415
1416 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1417 .inputreg = TDA9873_SW,
1418 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1419 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1420 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1421
1422 },
1423 {
1424 .name = "tda9874h/a",
1425 .insmodopt = &tda9874a,
1426 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1427 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1428 .flags = CHIP_NEED_CHECKMODE,
1429
1430
1431 .initialize = tda9874a_initialize,
1432 .checkit = tda9874a_checkit,
1433 .getmode = tda9874a_getmode,
1434 .setmode = tda9874a_setmode,
1435 },
1436 {
1437 .name = "tda9875",
1438 .insmodopt = &tda9875,
1439 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1440 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1441 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1442
1443
1444 .initialize = tda9875_initialize,
1445 .checkit = tda9875_checkit,
1446 .volfunc = tda9875_volume,
1447 .bassfunc = tda9875_bass,
1448 .treblefunc = tda9875_treble,
1449 .leftreg = TDA9875_MVL,
1450 .rightreg = TDA9875_MVR,
1451 .bassreg = TDA9875_MBA,
1452 .treblereg = TDA9875_MTR,
1453 .leftinit = 58880,
1454 .rightinit = 58880,
1455 },
1456 {
1457 .name = "tda9850",
1458 .insmodopt = &tda9850,
1459 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1460 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1461 .registers = 11,
1462
1463 .getmode = tda985x_getmode,
1464 .setmode = tda985x_setmode,
1465
1466 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1467 },
1468 {
1469 .name = "tda9855",
1470 .insmodopt = &tda9855,
1471 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1472 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1473 .registers = 11,
1474 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1475
1476 .leftreg = TDA9855_VL,
1477 .rightreg = TDA9855_VR,
1478 .bassreg = TDA9855_BA,
1479 .treblereg = TDA9855_TR,
1480
1481
1482 .volfunc = tda9855_volume,
1483 .bassfunc = tda9855_bass,
1484 .treblefunc = tda9855_treble,
1485 .getmode = tda985x_getmode,
1486 .setmode = tda985x_setmode,
1487
1488 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1489 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1490 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1491 0x07, 0x10, 0x10, 0x03 }}
1492 },
1493 {
1494 .name = "tea6300",
1495 .insmodopt = &tea6300,
1496 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1497 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1498 .registers = 6,
1499 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1500
1501 .leftreg = TEA6300_VR,
1502 .rightreg = TEA6300_VL,
1503 .bassreg = TEA6300_BA,
1504 .treblereg = TEA6300_TR,
1505
1506
1507 .volfunc = tea6300_shift10,
1508 .bassfunc = tea6300_shift12,
1509 .treblefunc = tea6300_shift12,
1510
1511 .inputreg = TEA6300_S,
1512 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1513 .inputmute = TEA6300_S_GMU,
1514 },
1515 {
1516 .name = "tea6320",
1517 .insmodopt = &tea6320,
1518 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1519 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1520 .registers = 8,
1521 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1522
1523 .leftreg = TEA6320_V,
1524 .rightreg = TEA6320_V,
1525 .bassreg = TEA6320_BA,
1526 .treblereg = TEA6320_TR,
1527
1528
1529 .initialize = tea6320_initialize,
1530 .volfunc = tea6320_volume,
1531 .bassfunc = tea6320_shift11,
1532 .treblefunc = tea6320_shift11,
1533
1534 .inputreg = TEA6320_S,
1535 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1536 .inputmute = TEA6300_S_GMU,
1537 },
1538 {
1539 .name = "tea6420",
1540 .insmodopt = &tea6420,
1541 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1542 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1543 .registers = 1,
1544 .flags = CHIP_HAS_INPUTSEL,
1545
1546 .inputreg = -1,
1547 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1548 .inputmute = TEA6300_S_GMU,
1549 },
1550 {
1551 .name = "tda8425",
1552 .insmodopt = &tda8425,
1553 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1554 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1555 .registers = 9,
1556 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1557
1558 .leftreg = TDA8425_VL,
1559 .rightreg = TDA8425_VR,
1560 .bassreg = TDA8425_BA,
1561 .treblereg = TDA8425_TR,
1562
1563
1564 .volfunc = tda8425_shift10,
1565 .bassfunc = tda8425_shift12,
1566 .treblefunc = tda8425_shift12,
1567 .setmode = tda8425_setmode,
1568
1569 .inputreg = TDA8425_S1,
1570 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1571 .inputmute = TDA8425_S1_OFF,
1572
1573 },
1574 {
1575 .name = "pic16c54 (PV951)",
1576 .insmodopt = &pic16c54,
1577 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1578 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1579 .registers = 2,
1580 .flags = CHIP_HAS_INPUTSEL,
1581
1582 .inputreg = PIC16C54_REG_MISC,
1583 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1584 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1585 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1586 PIC16C54_MISC_SND_MUTE},
1587 .inputmute = PIC16C54_MISC_SND_MUTE,
1588 },
1589 {
1590 .name = "ta8874z",
1591 .checkit = ta8874z_checkit,
1592 .insmodopt = &ta8874z,
1593 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1594 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1595 .registers = 2,
1596 .flags = CHIP_NEED_CHECKMODE,
1597
1598
1599 .getmode = ta8874z_getmode,
1600 .setmode = ta8874z_setmode,
1601
1602 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1603 },
1604 { .name = NULL }
1605};
1606
1607
1608
1609
1610static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1611 struct v4l2_control *ctrl)
1612{
1613 struct CHIPSTATE *chip = to_state(sd);
1614 struct CHIPDESC *desc = chip->desc;
1615
1616 switch (ctrl->id) {
1617 case V4L2_CID_AUDIO_MUTE:
1618 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1619 break;
1620 ctrl->value=chip->muted;
1621 return 0;
1622 case V4L2_CID_AUDIO_VOLUME:
1623 if (!(desc->flags & CHIP_HAS_VOLUME))
1624 break;
1625 ctrl->value = max(chip->left,chip->right);
1626 return 0;
1627 case V4L2_CID_AUDIO_BALANCE:
1628 {
1629 int volume;
1630 if (!(desc->flags & CHIP_HAS_VOLUME))
1631 break;
1632 volume = max(chip->left,chip->right);
1633 if (volume)
1634 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1635 else
1636 ctrl->value=32768;
1637 return 0;
1638 }
1639 case V4L2_CID_AUDIO_BASS:
1640 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1641 break;
1642 ctrl->value = chip->bass;
1643 return 0;
1644 case V4L2_CID_AUDIO_TREBLE:
1645 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1646 break;
1647 ctrl->value = chip->treble;
1648 return 0;
1649 }
1650 return -EINVAL;
1651}
1652
1653static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1654 struct v4l2_control *ctrl)
1655{
1656 struct CHIPSTATE *chip = to_state(sd);
1657 struct CHIPDESC *desc = chip->desc;
1658
1659 switch (ctrl->id) {
1660 case V4L2_CID_AUDIO_MUTE:
1661 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1662 break;
1663
1664 if (ctrl->value < 0 || ctrl->value >= 2)
1665 return -ERANGE;
1666 chip->muted = ctrl->value;
1667 if (chip->muted)
1668 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1669 else
1670 chip_write_masked(chip,desc->inputreg,
1671 desc->inputmap[chip->input],desc->inputmask);
1672 return 0;
1673 case V4L2_CID_AUDIO_VOLUME:
1674 {
1675 int volume,balance;
1676
1677 if (!(desc->flags & CHIP_HAS_VOLUME))
1678 break;
1679
1680 volume = max(chip->left,chip->right);
1681 if (volume)
1682 balance=(32768*min(chip->left,chip->right))/volume;
1683 else
1684 balance=32768;
1685
1686 volume=ctrl->value;
1687 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1688 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1689
1690 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1691 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1692
1693 return 0;
1694 }
1695 case V4L2_CID_AUDIO_BALANCE:
1696 {
1697 int volume, balance;
1698
1699 if (!(desc->flags & CHIP_HAS_VOLUME))
1700 break;
1701
1702 volume = max(chip->left, chip->right);
1703 balance = ctrl->value;
1704 chip->left = (min(65536 - balance, 32768) * volume) / 32768;
1705 chip->right = (min(balance, volume * (__u16)32768)) / 32768;
1706
1707 chip_write(chip, desc->leftreg, desc->volfunc(chip->left));
1708 chip_write(chip, desc->rightreg, desc->volfunc(chip->right));
1709
1710 return 0;
1711 }
1712 case V4L2_CID_AUDIO_BASS:
1713 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1714 break;
1715 chip->bass = ctrl->value;
1716 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1717
1718 return 0;
1719 case V4L2_CID_AUDIO_TREBLE:
1720 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1721 break;
1722 chip->treble = ctrl->value;
1723 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1724
1725 return 0;
1726 }
1727 return -EINVAL;
1728}
1729
1730
1731
1732
1733
1734static int tvaudio_s_radio(struct v4l2_subdev *sd)
1735{
1736 struct CHIPSTATE *chip = to_state(sd);
1737
1738 chip->radio = 1;
1739 chip->watch_stereo = 0;
1740
1741 return 0;
1742}
1743
1744static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1745{
1746 struct CHIPSTATE *chip = to_state(sd);
1747 struct CHIPDESC *desc = chip->desc;
1748
1749 switch (qc->id) {
1750 case V4L2_CID_AUDIO_MUTE:
1751 if (desc->flags & CHIP_HAS_INPUTSEL)
1752 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1753 break;
1754 case V4L2_CID_AUDIO_VOLUME:
1755 if (desc->flags & CHIP_HAS_VOLUME)
1756 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1757 break;
1758 case V4L2_CID_AUDIO_BALANCE:
1759 if (desc->flags & CHIP_HAS_VOLUME)
1760 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1761 break;
1762 case V4L2_CID_AUDIO_BASS:
1763 case V4L2_CID_AUDIO_TREBLE:
1764 if (desc->flags & CHIP_HAS_BASSTREBLE)
1765 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1766 break;
1767 default:
1768 break;
1769 }
1770 return -EINVAL;
1771}
1772
1773static int tvaudio_s_routing(struct v4l2_subdev *sd,
1774 u32 input, u32 output, u32 config)
1775{
1776 struct CHIPSTATE *chip = to_state(sd);
1777 struct CHIPDESC *desc = chip->desc;
1778
1779 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1780 return 0;
1781 if (input >= 4)
1782 return -EINVAL;
1783
1784 chip->input = input;
1785 if (chip->muted)
1786 return 0;
1787 chip_write_masked(chip, desc->inputreg,
1788 desc->inputmap[chip->input], desc->inputmask);
1789 return 0;
1790}
1791
1792static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1793{
1794 struct CHIPSTATE *chip = to_state(sd);
1795 struct CHIPDESC *desc = chip->desc;
1796 int mode = 0;
1797
1798 if (!desc->setmode)
1799 return 0;
1800 if (chip->radio)
1801 return 0;
1802
1803 switch (vt->audmode) {
1804 case V4L2_TUNER_MODE_MONO:
1805 case V4L2_TUNER_MODE_STEREO:
1806 case V4L2_TUNER_MODE_LANG1:
1807 case V4L2_TUNER_MODE_LANG2:
1808 mode = vt->audmode;
1809 break;
1810 case V4L2_TUNER_MODE_LANG1_LANG2:
1811 mode = V4L2_TUNER_MODE_STEREO;
1812 break;
1813 default:
1814 return -EINVAL;
1815 }
1816 chip->audmode = vt->audmode;
1817
1818 if (mode) {
1819 chip->watch_stereo = 0;
1820
1821 chip->mode = mode;
1822 desc->setmode(chip, mode);
1823 }
1824 return 0;
1825}
1826
1827static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1828{
1829 struct CHIPSTATE *chip = to_state(sd);
1830 struct CHIPDESC *desc = chip->desc;
1831 int mode = V4L2_TUNER_MODE_MONO;
1832
1833 if (!desc->getmode)
1834 return 0;
1835 if (chip->radio)
1836 return 0;
1837
1838 vt->audmode = chip->audmode;
1839 vt->rxsubchans = 0;
1840 vt->capability = V4L2_TUNER_CAP_STEREO |
1841 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1842
1843 mode = desc->getmode(chip);
1844
1845 if (mode & V4L2_TUNER_MODE_MONO)
1846 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1847 if (mode & V4L2_TUNER_MODE_STEREO)
1848 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1849
1850
1851
1852 if (mode & V4L2_TUNER_MODE_LANG1)
1853 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1854 V4L2_TUNER_SUB_LANG2;
1855 return 0;
1856}
1857
1858static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1859{
1860 struct CHIPSTATE *chip = to_state(sd);
1861
1862 chip->radio = 0;
1863 return 0;
1864}
1865
1866static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1867{
1868 struct CHIPSTATE *chip = to_state(sd);
1869 struct CHIPDESC *desc = chip->desc;
1870
1871 chip->mode = 0;
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881 if (chip->thread) {
1882 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1883 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1884 chip->prevmode = -1;
1885 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1886 }
1887 return 0;
1888}
1889
1890static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1891{
1892 struct i2c_client *client = v4l2_get_subdevdata(sd);
1893
1894 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1895}
1896
1897
1898
1899static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1900 .g_chip_ident = tvaudio_g_chip_ident,
1901 .queryctrl = tvaudio_queryctrl,
1902 .g_ctrl = tvaudio_g_ctrl,
1903 .s_ctrl = tvaudio_s_ctrl,
1904 .s_std = tvaudio_s_std,
1905};
1906
1907static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1908 .s_radio = tvaudio_s_radio,
1909 .s_frequency = tvaudio_s_frequency,
1910 .s_tuner = tvaudio_s_tuner,
1911 .g_tuner = tvaudio_g_tuner,
1912};
1913
1914static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1915 .s_routing = tvaudio_s_routing,
1916};
1917
1918static const struct v4l2_subdev_ops tvaudio_ops = {
1919 .core = &tvaudio_core_ops,
1920 .tuner = &tvaudio_tuner_ops,
1921 .audio = &tvaudio_audio_ops,
1922};
1923
1924
1925
1926
1927
1928
1929static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1930{
1931 struct CHIPSTATE *chip;
1932 struct CHIPDESC *desc;
1933 struct v4l2_subdev *sd;
1934
1935 if (debug) {
1936 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1937 printk(KERN_INFO "tvaudio: known chips: ");
1938 for (desc = chiplist; desc->name != NULL; desc++)
1939 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1940 printk("\n");
1941 }
1942
1943 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1944 if (!chip)
1945 return -ENOMEM;
1946 sd = &chip->sd;
1947 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1948
1949
1950 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1951 for (desc = chiplist; desc->name != NULL; desc++) {
1952 if (0 == *(desc->insmodopt))
1953 continue;
1954 if (client->addr < desc->addr_lo ||
1955 client->addr > desc->addr_hi)
1956 continue;
1957 if (desc->checkit && !desc->checkit(chip))
1958 continue;
1959 break;
1960 }
1961 if (desc->name == NULL) {
1962 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1963 kfree(chip);
1964 return -EIO;
1965 }
1966 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1967 if (desc->flags) {
1968 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1969 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1970 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1971 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1972 }
1973
1974
1975 if (!id)
1976 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1977 chip->desc = desc;
1978 chip->shadow.count = desc->registers+1;
1979 chip->prevmode = -1;
1980 chip->audmode = V4L2_TUNER_MODE_LANG1;
1981
1982
1983 if (desc->initialize != NULL)
1984 desc->initialize(chip);
1985 else
1986 chip_cmd(chip, "init", &desc->init);
1987
1988 if (desc->flags & CHIP_HAS_VOLUME) {
1989 if (!desc->volfunc) {
1990
1991
1992
1993 v4l2_info(sd, "volume callback undefined!\n");
1994 desc->flags &= ~CHIP_HAS_VOLUME;
1995 } else {
1996 chip->left = desc->leftinit ? desc->leftinit : 65535;
1997 chip->right = desc->rightinit ? desc->rightinit : 65535;
1998 chip_write(chip, desc->leftreg,
1999 desc->volfunc(chip->left));
2000 chip_write(chip, desc->rightreg,
2001 desc->volfunc(chip->right));
2002 }
2003 }
2004 if (desc->flags & CHIP_HAS_BASSTREBLE) {
2005 if (!desc->bassfunc || !desc->treblefunc) {
2006
2007
2008
2009 v4l2_info(sd, "bass/treble callbacks undefined!\n");
2010 desc->flags &= ~CHIP_HAS_BASSTREBLE;
2011 } else {
2012 chip->treble = desc->trebleinit ?
2013 desc->trebleinit : 32768;
2014 chip->bass = desc->bassinit ?
2015 desc->bassinit : 32768;
2016 chip_write(chip, desc->bassreg,
2017 desc->bassfunc(chip->bass));
2018 chip_write(chip, desc->treblereg,
2019 desc->treblefunc(chip->treble));
2020 }
2021 }
2022
2023 chip->thread = NULL;
2024 init_timer(&chip->wt);
2025 if (desc->flags & CHIP_NEED_CHECKMODE) {
2026 if (!desc->getmode || !desc->setmode) {
2027
2028
2029
2030 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2031 return 0;
2032 }
2033
2034 chip->wt.function = chip_thread_wake;
2035 chip->wt.data = (unsigned long)chip;
2036 chip->thread = kthread_run(chip_thread, chip, client->name);
2037 if (IS_ERR(chip->thread)) {
2038 v4l2_warn(sd, "failed to create kthread\n");
2039 chip->thread = NULL;
2040 }
2041 }
2042 return 0;
2043}
2044
2045static int tvaudio_remove(struct i2c_client *client)
2046{
2047 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2048 struct CHIPSTATE *chip = to_state(sd);
2049
2050 del_timer_sync(&chip->wt);
2051 if (chip->thread) {
2052
2053 kthread_stop(chip->thread);
2054 chip->thread = NULL;
2055 }
2056
2057 v4l2_device_unregister_subdev(sd);
2058 kfree(chip);
2059 return 0;
2060}
2061
2062
2063
2064
2065static const struct i2c_device_id tvaudio_id[] = {
2066 { "tvaudio", 0 },
2067 { }
2068};
2069MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2070
2071static struct i2c_driver tvaudio_driver = {
2072 .driver = {
2073 .owner = THIS_MODULE,
2074 .name = "tvaudio",
2075 },
2076 .probe = tvaudio_probe,
2077 .remove = tvaudio_remove,
2078 .id_table = tvaudio_id,
2079};
2080
2081module_i2c_driver(tvaudio_driver);
2082