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35#ifndef __CXGB4_H__
36#define __CXGB4_H__
37
38#include <linux/bitops.h>
39#include <linux/cache.h>
40#include <linux/interrupt.h>
41#include <linux/list.h>
42#include <linux/netdevice.h>
43#include <linux/pci.h>
44#include <linux/spinlock.h>
45#include <linux/timer.h>
46#include <asm/io.h>
47#include "cxgb4_uld.h"
48#include "t4_hw.h"
49
50#define FW_VERSION_MAJOR 1
51#define FW_VERSION_MINOR 1
52#define FW_VERSION_MICRO 0
53
54#define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
55
56enum {
57 MAX_NPORTS = 4,
58 SERNUM_LEN = 24,
59 EC_LEN = 16,
60 ID_LEN = 16,
61};
62
63enum {
64 MEM_EDC0,
65 MEM_EDC1,
66 MEM_MC
67};
68
69enum {
70 MEMWIN0_APERTURE = 65536,
71 MEMWIN0_BASE = 0x30000,
72 MEMWIN1_APERTURE = 32768,
73 MEMWIN1_BASE = 0x28000,
74 MEMWIN2_APERTURE = 2048,
75 MEMWIN2_BASE = 0x1b800,
76};
77
78enum dev_master {
79 MASTER_CANT,
80 MASTER_MAY,
81 MASTER_MUST
82};
83
84enum dev_state {
85 DEV_STATE_UNINIT,
86 DEV_STATE_INIT,
87 DEV_STATE_ERR
88};
89
90enum {
91 PAUSE_RX = 1 << 0,
92 PAUSE_TX = 1 << 1,
93 PAUSE_AUTONEG = 1 << 2
94};
95
96struct port_stats {
97 u64 tx_octets;
98 u64 tx_frames;
99 u64 tx_bcast_frames;
100 u64 tx_mcast_frames;
101 u64 tx_ucast_frames;
102 u64 tx_error_frames;
103
104 u64 tx_frames_64;
105 u64 tx_frames_65_127;
106 u64 tx_frames_128_255;
107 u64 tx_frames_256_511;
108 u64 tx_frames_512_1023;
109 u64 tx_frames_1024_1518;
110 u64 tx_frames_1519_max;
111
112 u64 tx_drop;
113 u64 tx_pause;
114 u64 tx_ppp0;
115 u64 tx_ppp1;
116 u64 tx_ppp2;
117 u64 tx_ppp3;
118 u64 tx_ppp4;
119 u64 tx_ppp5;
120 u64 tx_ppp6;
121 u64 tx_ppp7;
122
123 u64 rx_octets;
124 u64 rx_frames;
125 u64 rx_bcast_frames;
126 u64 rx_mcast_frames;
127 u64 rx_ucast_frames;
128 u64 rx_too_long;
129 u64 rx_jabber;
130 u64 rx_fcs_err;
131 u64 rx_len_err;
132 u64 rx_symbol_err;
133 u64 rx_runt;
134
135 u64 rx_frames_64;
136 u64 rx_frames_65_127;
137 u64 rx_frames_128_255;
138 u64 rx_frames_256_511;
139 u64 rx_frames_512_1023;
140 u64 rx_frames_1024_1518;
141 u64 rx_frames_1519_max;
142
143 u64 rx_pause;
144 u64 rx_ppp0;
145 u64 rx_ppp1;
146 u64 rx_ppp2;
147 u64 rx_ppp3;
148 u64 rx_ppp4;
149 u64 rx_ppp5;
150 u64 rx_ppp6;
151 u64 rx_ppp7;
152
153 u64 rx_ovflow0;
154 u64 rx_ovflow1;
155 u64 rx_ovflow2;
156 u64 rx_ovflow3;
157 u64 rx_trunc0;
158 u64 rx_trunc1;
159 u64 rx_trunc2;
160 u64 rx_trunc3;
161};
162
163struct lb_port_stats {
164 u64 octets;
165 u64 frames;
166 u64 bcast_frames;
167 u64 mcast_frames;
168 u64 ucast_frames;
169 u64 error_frames;
170
171 u64 frames_64;
172 u64 frames_65_127;
173 u64 frames_128_255;
174 u64 frames_256_511;
175 u64 frames_512_1023;
176 u64 frames_1024_1518;
177 u64 frames_1519_max;
178
179 u64 drop;
180
181 u64 ovflow0;
182 u64 ovflow1;
183 u64 ovflow2;
184 u64 ovflow3;
185 u64 trunc0;
186 u64 trunc1;
187 u64 trunc2;
188 u64 trunc3;
189};
190
191struct tp_tcp_stats {
192 u32 tcpOutRsts;
193 u64 tcpInSegs;
194 u64 tcpOutSegs;
195 u64 tcpRetransSegs;
196};
197
198struct tp_err_stats {
199 u32 macInErrs[4];
200 u32 hdrInErrs[4];
201 u32 tcpInErrs[4];
202 u32 tnlCongDrops[4];
203 u32 ofldChanDrops[4];
204 u32 tnlTxDrops[4];
205 u32 ofldVlanDrops[4];
206 u32 tcp6InErrs[4];
207 u32 ofldNoNeigh;
208 u32 ofldCongDefer;
209};
210
211struct tp_params {
212 unsigned int ntxchan;
213 unsigned int tre;
214};
215
216struct vpd_params {
217 unsigned int cclk;
218 u8 ec[EC_LEN + 1];
219 u8 sn[SERNUM_LEN + 1];
220 u8 id[ID_LEN + 1];
221};
222
223struct pci_params {
224 unsigned char speed;
225 unsigned char width;
226};
227
228struct adapter_params {
229 struct tp_params tp;
230 struct vpd_params vpd;
231 struct pci_params pci;
232
233 unsigned int sf_size;
234 unsigned int sf_nsec;
235 unsigned int sf_fw_start;
236
237 unsigned int fw_vers;
238 unsigned int tp_vers;
239 u8 api_vers[7];
240
241 unsigned short mtus[NMTUS];
242 unsigned short a_wnd[NCCTRL_WIN];
243 unsigned short b_wnd[NCCTRL_WIN];
244
245 unsigned char nports;
246 unsigned char portvec;
247 unsigned char rev;
248 unsigned char offload;
249
250 unsigned int ofldq_wr_cred;
251};
252
253struct trace_params {
254 u32 data[TRACE_LEN / 4];
255 u32 mask[TRACE_LEN / 4];
256 unsigned short snap_len;
257 unsigned short min_len;
258 unsigned char skip_ofst;
259 unsigned char skip_len;
260 unsigned char invert;
261 unsigned char port;
262};
263
264struct link_config {
265 unsigned short supported;
266 unsigned short advertising;
267 unsigned short requested_speed;
268 unsigned short speed;
269 unsigned char requested_fc;
270 unsigned char fc;
271 unsigned char autoneg;
272 unsigned char link_ok;
273};
274
275#define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16)
276
277enum {
278 MAX_ETH_QSETS = 32,
279 MAX_OFLD_QSETS = 16,
280 MAX_CTRL_QUEUES = NCHAN,
281 MAX_RDMA_QUEUES = NCHAN,
282};
283
284enum {
285 MAX_EGRQ = 128,
286 MAX_INGQ = 64
287};
288
289struct adapter;
290struct sge_rspq;
291
292struct port_info {
293 struct adapter *adapter;
294 u16 viid;
295 s16 xact_addr_filt;
296 u16 rss_size;
297 s8 mdio_addr;
298 u8 port_type;
299 u8 mod_type;
300 u8 port_id;
301 u8 tx_chan;
302 u8 lport;
303 u8 nqsets;
304 u8 first_qset;
305 u8 rss_mode;
306 struct link_config link_cfg;
307 u16 *rss;
308};
309
310struct dentry;
311struct work_struct;
312
313enum {
314 FULL_INIT_DONE = (1 << 0),
315 USING_MSI = (1 << 1),
316 USING_MSIX = (1 << 2),
317 FW_OK = (1 << 4),
318};
319
320struct rx_sw_desc;
321
322struct sge_fl {
323 unsigned int avail;
324 unsigned int pend_cred;
325 unsigned int cidx;
326 unsigned int pidx;
327 unsigned long alloc_failed;
328 unsigned long large_alloc_failed;
329 unsigned long starving;
330
331 unsigned int cntxt_id;
332 unsigned int size;
333 struct rx_sw_desc *sdesc;
334 __be64 *desc;
335 dma_addr_t addr;
336};
337
338
339struct pkt_gl {
340 struct page_frag frags[MAX_SKB_FRAGS];
341 void *va;
342 unsigned int nfrags;
343 unsigned int tot_len;
344};
345
346typedef int (*rspq_handler_t)(struct sge_rspq *q, const __be64 *rsp,
347 const struct pkt_gl *gl);
348
349struct sge_rspq {
350 struct napi_struct napi;
351 const __be64 *cur_desc;
352 unsigned int cidx;
353 u8 gen;
354 u8 intr_params;
355 u8 next_intr_params;
356 u8 pktcnt_idx;
357 u8 uld;
358 u8 idx;
359 int offset;
360 u16 cntxt_id;
361 u16 abs_id;
362 __be64 *desc;
363 dma_addr_t phys_addr;
364 unsigned int iqe_len;
365 unsigned int size;
366 struct adapter *adap;
367 struct net_device *netdev;
368 rspq_handler_t handler;
369};
370
371struct sge_eth_stats {
372 unsigned long pkts;
373 unsigned long lro_pkts;
374 unsigned long lro_merged;
375 unsigned long rx_cso;
376 unsigned long vlan_ex;
377 unsigned long rx_drops;
378};
379
380struct sge_eth_rxq {
381 struct sge_rspq rspq;
382 struct sge_fl fl;
383 struct sge_eth_stats stats;
384} ____cacheline_aligned_in_smp;
385
386struct sge_ofld_stats {
387 unsigned long pkts;
388 unsigned long imm;
389 unsigned long an;
390 unsigned long nomem;
391};
392
393struct sge_ofld_rxq {
394 struct sge_rspq rspq;
395 struct sge_fl fl;
396 struct sge_ofld_stats stats;
397} ____cacheline_aligned_in_smp;
398
399struct tx_desc {
400 __be64 flit[8];
401};
402
403struct tx_sw_desc;
404
405struct sge_txq {
406 unsigned int in_use;
407 unsigned int size;
408 unsigned int cidx;
409 unsigned int pidx;
410 unsigned long stops;
411 unsigned long restarts;
412 unsigned int cntxt_id;
413 struct tx_desc *desc;
414 struct tx_sw_desc *sdesc;
415 struct sge_qstat *stat;
416 dma_addr_t phys_addr;
417 spinlock_t db_lock;
418 int db_disabled;
419 unsigned short db_pidx;
420};
421
422struct sge_eth_txq {
423 struct sge_txq q;
424 struct netdev_queue *txq;
425 unsigned long tso;
426 unsigned long tx_cso;
427 unsigned long vlan_ins;
428 unsigned long mapping_err;
429} ____cacheline_aligned_in_smp;
430
431struct sge_ofld_txq {
432 struct sge_txq q;
433 struct adapter *adap;
434 struct sk_buff_head sendq;
435 struct tasklet_struct qresume_tsk;
436 u8 full;
437 unsigned long mapping_err;
438} ____cacheline_aligned_in_smp;
439
440struct sge_ctrl_txq {
441 struct sge_txq q;
442 struct adapter *adap;
443 struct sk_buff_head sendq;
444 struct tasklet_struct qresume_tsk;
445 u8 full;
446} ____cacheline_aligned_in_smp;
447
448struct sge {
449 struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
450 struct sge_ofld_txq ofldtxq[MAX_OFLD_QSETS];
451 struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
452
453 struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
454 struct sge_ofld_rxq ofldrxq[MAX_OFLD_QSETS];
455 struct sge_ofld_rxq rdmarxq[MAX_RDMA_QUEUES];
456 struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
457
458 struct sge_rspq intrq ____cacheline_aligned_in_smp;
459 spinlock_t intrq_lock;
460
461 u16 max_ethqsets;
462 u16 ethqsets;
463 u16 ethtxq_rover;
464 u16 ofldqsets;
465 u16 rdmaqs;
466 u16 ofld_rxq[MAX_OFLD_QSETS];
467 u16 rdma_rxq[NCHAN];
468 u16 timer_val[SGE_NTIMERS];
469 u8 counter_val[SGE_NCOUNTERS];
470 unsigned int starve_thres;
471 u8 idma_state[2];
472 unsigned int egr_start;
473 unsigned int ingr_start;
474 void *egr_map[MAX_EGRQ];
475 struct sge_rspq *ingr_map[MAX_INGQ];
476 DECLARE_BITMAP(starving_fl, MAX_EGRQ);
477 DECLARE_BITMAP(txq_maperr, MAX_EGRQ);
478 struct timer_list rx_timer;
479 struct timer_list tx_timer;
480};
481
482#define for_each_ethrxq(sge, i) for (i = 0; i < (sge)->ethqsets; i++)
483#define for_each_ofldrxq(sge, i) for (i = 0; i < (sge)->ofldqsets; i++)
484#define for_each_rdmarxq(sge, i) for (i = 0; i < (sge)->rdmaqs; i++)
485
486struct l2t_data;
487
488struct adapter {
489 void __iomem *regs;
490 struct pci_dev *pdev;
491 struct device *pdev_dev;
492 unsigned int mbox;
493 unsigned int fn;
494 unsigned int flags;
495
496 int msg_enable;
497
498 struct adapter_params params;
499 struct cxgb4_virt_res vres;
500 unsigned int swintr;
501
502 unsigned int wol;
503
504 struct {
505 unsigned short vec;
506 char desc[IFNAMSIZ + 10];
507 } msix_info[MAX_INGQ + 1];
508
509 struct sge sge;
510
511 struct net_device *port[MAX_NPORTS];
512 u8 chan_map[NCHAN];
513
514 struct l2t_data *l2t;
515 void *uld_handle[CXGB4_ULD_MAX];
516 struct list_head list_node;
517
518 struct tid_info tids;
519 void **tid_release_head;
520 spinlock_t tid_release_lock;
521 struct work_struct tid_release_task;
522 struct work_struct db_full_task;
523 struct work_struct db_drop_task;
524 bool tid_release_task_busy;
525
526 struct dentry *debugfs_root;
527
528 spinlock_t stats_lock;
529};
530
531static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr)
532{
533 return readl(adap->regs + reg_addr);
534}
535
536static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val)
537{
538 writel(val, adap->regs + reg_addr);
539}
540
541#ifndef readq
542static inline u64 readq(const volatile void __iomem *addr)
543{
544 return readl(addr) + ((u64)readl(addr + 4) << 32);
545}
546
547static inline void writeq(u64 val, volatile void __iomem *addr)
548{
549 writel(val, addr);
550 writel(val >> 32, addr + 4);
551}
552#endif
553
554static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr)
555{
556 return readq(adap->regs + reg_addr);
557}
558
559static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val)
560{
561 writeq(val, adap->regs + reg_addr);
562}
563
564
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569
570static inline struct port_info *netdev2pinfo(const struct net_device *dev)
571{
572 return netdev_priv(dev);
573}
574
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581
582static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
583{
584 return netdev_priv(adap->port[idx]);
585}
586
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588
589
590
591
592
593static inline struct adapter *netdev2adap(const struct net_device *dev)
594{
595 return netdev2pinfo(dev)->adapter;
596}
597
598void t4_os_portmod_changed(const struct adapter *adap, int port_id);
599void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat);
600
601void *t4_alloc_mem(size_t size);
602
603void t4_free_sge_resources(struct adapter *adap);
604irq_handler_t t4_intr_handler(struct adapter *adap);
605netdev_tx_t t4_eth_xmit(struct sk_buff *skb, struct net_device *dev);
606int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
607 const struct pkt_gl *gl);
608int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
609int t4_ofld_send(struct adapter *adap, struct sk_buff *skb);
610int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
611 struct net_device *dev, int intr_idx,
612 struct sge_fl *fl, rspq_handler_t hnd);
613int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq,
614 struct net_device *dev, struct netdev_queue *netdevq,
615 unsigned int iqid);
616int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq,
617 struct net_device *dev, unsigned int iqid,
618 unsigned int cmplqid);
619int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq,
620 struct net_device *dev, unsigned int iqid);
621irqreturn_t t4_sge_intr_msix(int irq, void *cookie);
622void t4_sge_init(struct adapter *adap);
623void t4_sge_start(struct adapter *adap);
624void t4_sge_stop(struct adapter *adap);
625extern int dbfifo_int_thresh;
626
627#define for_each_port(adapter, iter) \
628 for (iter = 0; iter < (adapter)->params.nports; ++iter)
629
630static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
631{
632 return adap->params.vpd.cclk / 1000;
633}
634
635static inline unsigned int us_to_core_ticks(const struct adapter *adap,
636 unsigned int us)
637{
638 return (us * adap->params.vpd.cclk) / 1000;
639}
640
641void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
642 u32 val);
643
644int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
645 void *rpl, bool sleep_ok);
646
647static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
648 int size, void *rpl)
649{
650 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
651}
652
653static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
654 int size, void *rpl)
655{
656 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
657}
658
659void t4_intr_enable(struct adapter *adapter);
660void t4_intr_disable(struct adapter *adapter);
661int t4_slow_intr_handler(struct adapter *adapter);
662
663int t4_wait_dev_ready(struct adapter *adap);
664int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
665 struct link_config *lc);
666int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
667int t4_seeprom_wp(struct adapter *adapter, bool enable);
668int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
669int t4_check_fw_version(struct adapter *adapter);
670int t4_prep_adapter(struct adapter *adapter);
671int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
672void t4_fatal_err(struct adapter *adapter);
673int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
674 int start, int n, const u16 *rspq, unsigned int nrspq);
675int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
676 unsigned int flags);
677int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
678int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
679 u64 *parity);
680
681void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
682void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
683void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
684 struct tp_tcp_stats *v6);
685void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
686 const unsigned short *alpha, const unsigned short *beta);
687
688void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
689 const u8 *addr);
690int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
691 u64 mask0, u64 mask1, unsigned int crc, bool enable);
692
693int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
694 enum dev_master master, enum dev_state *state);
695int t4_fw_bye(struct adapter *adap, unsigned int mbox);
696int t4_early_init(struct adapter *adap, unsigned int mbox);
697int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
698int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
699 unsigned int vf, unsigned int nparams, const u32 *params,
700 u32 *val);
701int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
702 unsigned int vf, unsigned int nparams, const u32 *params,
703 const u32 *val);
704int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
705 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
706 unsigned int rxqi, unsigned int rxq, unsigned int tc,
707 unsigned int vi, unsigned int cmask, unsigned int pmask,
708 unsigned int nexact, unsigned int rcaps, unsigned int wxcaps);
709int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
710 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
711 unsigned int *rss_size);
712int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
713 int mtu, int promisc, int all_multi, int bcast, int vlanex,
714 bool sleep_ok);
715int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
716 unsigned int viid, bool free, unsigned int naddr,
717 const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok);
718int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
719 int idx, const u8 *addr, bool persist, bool add_smt);
720int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
721 bool ucast, u64 vec, bool sleep_ok);
722int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
723 bool rx_en, bool tx_en);
724int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
725 unsigned int nblinks);
726int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
727 unsigned int mmd, unsigned int reg, u16 *valp);
728int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
729 unsigned int mmd, unsigned int reg, u16 val);
730int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
731 unsigned int vf, unsigned int iqtype, unsigned int iqid,
732 unsigned int fl0id, unsigned int fl1id);
733int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
734 unsigned int vf, unsigned int eqid);
735int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
736 unsigned int vf, unsigned int eqid);
737int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
738 unsigned int vf, unsigned int eqid);
739int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
740void t4_db_full(struct adapter *adapter);
741void t4_db_dropped(struct adapter *adapter);
742int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len);
743int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
744 u32 addr, u32 val);
745#endif
746