1
2
3
4
5
6
7
8
9
10
11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
23#include <linux/slab.h>
24#include <net/iucv/af_iucv.h>
25
26#include <asm/ebcdic.h>
27#include <asm/io.h>
28#include <asm/sysinfo.h>
29#include <asm/compat.h>
30
31#include "qeth_core.h"
32
33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34
35
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
49static struct kmem_cache *qeth_qdio_outbuf_cache;
50
51static struct device *qeth_core_root_dev;
52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
53static struct lock_class_key qdio_out_skb_queue_key;
54static struct mutex qeth_mod_mutex;
55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
63static void qeth_free_qdio_buffers(struct qeth_card *);
64static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
65 struct qeth_qdio_out_buffer *buf,
66 enum iucv_tx_notify notification);
67static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
68static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
69 struct qeth_qdio_out_buffer *buf,
70 enum qeth_qdio_buffer_states newbufstate);
71static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
72
73static inline const char *qeth_get_cardname(struct qeth_card *card)
74{
75 if (card->info.guestlan) {
76 switch (card->info.type) {
77 case QETH_CARD_TYPE_OSD:
78 return " Guest LAN QDIO";
79 case QETH_CARD_TYPE_IQD:
80 return " Guest LAN Hiper";
81 case QETH_CARD_TYPE_OSM:
82 return " Guest LAN QDIO - OSM";
83 case QETH_CARD_TYPE_OSX:
84 return " Guest LAN QDIO - OSX";
85 default:
86 return " unknown";
87 }
88 } else {
89 switch (card->info.type) {
90 case QETH_CARD_TYPE_OSD:
91 return " OSD Express";
92 case QETH_CARD_TYPE_IQD:
93 return " HiperSockets";
94 case QETH_CARD_TYPE_OSN:
95 return " OSN QDIO";
96 case QETH_CARD_TYPE_OSM:
97 return " OSM QDIO";
98 case QETH_CARD_TYPE_OSX:
99 return " OSX QDIO";
100 default:
101 return " unknown";
102 }
103 }
104 return " n/a";
105}
106
107
108const char *qeth_get_cardname_short(struct qeth_card *card)
109{
110 if (card->info.guestlan) {
111 switch (card->info.type) {
112 case QETH_CARD_TYPE_OSD:
113 return "GuestLAN QDIO";
114 case QETH_CARD_TYPE_IQD:
115 return "GuestLAN Hiper";
116 case QETH_CARD_TYPE_OSM:
117 return "GuestLAN OSM";
118 case QETH_CARD_TYPE_OSX:
119 return "GuestLAN OSX";
120 default:
121 return "unknown";
122 }
123 } else {
124 switch (card->info.type) {
125 case QETH_CARD_TYPE_OSD:
126 switch (card->info.link_type) {
127 case QETH_LINK_TYPE_FAST_ETH:
128 return "OSD_100";
129 case QETH_LINK_TYPE_HSTR:
130 return "HSTR";
131 case QETH_LINK_TYPE_GBIT_ETH:
132 return "OSD_1000";
133 case QETH_LINK_TYPE_10GBIT_ETH:
134 return "OSD_10GIG";
135 case QETH_LINK_TYPE_LANE_ETH100:
136 return "OSD_FE_LANE";
137 case QETH_LINK_TYPE_LANE_TR:
138 return "OSD_TR_LANE";
139 case QETH_LINK_TYPE_LANE_ETH1000:
140 return "OSD_GbE_LANE";
141 case QETH_LINK_TYPE_LANE:
142 return "OSD_ATM_LANE";
143 default:
144 return "OSD_Express";
145 }
146 case QETH_CARD_TYPE_IQD:
147 return "HiperSockets";
148 case QETH_CARD_TYPE_OSN:
149 return "OSN";
150 case QETH_CARD_TYPE_OSM:
151 return "OSM_1000";
152 case QETH_CARD_TYPE_OSX:
153 return "OSX_10GIG";
154 default:
155 return "unknown";
156 }
157 }
158 return "n/a";
159}
160
161void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
162 int clear_start_mask)
163{
164 unsigned long flags;
165
166 spin_lock_irqsave(&card->thread_mask_lock, flags);
167 card->thread_allowed_mask = threads;
168 if (clear_start_mask)
169 card->thread_start_mask &= threads;
170 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
171 wake_up(&card->wait_q);
172}
173EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
174
175int qeth_threads_running(struct qeth_card *card, unsigned long threads)
176{
177 unsigned long flags;
178 int rc = 0;
179
180 spin_lock_irqsave(&card->thread_mask_lock, flags);
181 rc = (card->thread_running_mask & threads);
182 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
183 return rc;
184}
185EXPORT_SYMBOL_GPL(qeth_threads_running);
186
187int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
188{
189 return wait_event_interruptible(card->wait_q,
190 qeth_threads_running(card, threads) == 0);
191}
192EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
193
194void qeth_clear_working_pool_list(struct qeth_card *card)
195{
196 struct qeth_buffer_pool_entry *pool_entry, *tmp;
197
198 QETH_CARD_TEXT(card, 5, "clwrklst");
199 list_for_each_entry_safe(pool_entry, tmp,
200 &card->qdio.in_buf_pool.entry_list, list){
201 list_del(&pool_entry->list);
202 }
203}
204EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
205
206static int qeth_alloc_buffer_pool(struct qeth_card *card)
207{
208 struct qeth_buffer_pool_entry *pool_entry;
209 void *ptr;
210 int i, j;
211
212 QETH_CARD_TEXT(card, 5, "alocpool");
213 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
214 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
215 if (!pool_entry) {
216 qeth_free_buffer_pool(card);
217 return -ENOMEM;
218 }
219 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
220 ptr = (void *) __get_free_page(GFP_KERNEL);
221 if (!ptr) {
222 while (j > 0)
223 free_page((unsigned long)
224 pool_entry->elements[--j]);
225 kfree(pool_entry);
226 qeth_free_buffer_pool(card);
227 return -ENOMEM;
228 }
229 pool_entry->elements[j] = ptr;
230 }
231 list_add(&pool_entry->init_list,
232 &card->qdio.init_pool.entry_list);
233 }
234 return 0;
235}
236
237int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
238{
239 QETH_CARD_TEXT(card, 2, "realcbp");
240
241 if ((card->state != CARD_STATE_DOWN) &&
242 (card->state != CARD_STATE_RECOVER))
243 return -EPERM;
244
245
246 qeth_clear_working_pool_list(card);
247 qeth_free_buffer_pool(card);
248 card->qdio.in_buf_pool.buf_count = bufcnt;
249 card->qdio.init_pool.buf_count = bufcnt;
250 return qeth_alloc_buffer_pool(card);
251}
252EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
253
254static inline int qeth_cq_init(struct qeth_card *card)
255{
256 int rc;
257
258 if (card->options.cq == QETH_CQ_ENABLED) {
259 QETH_DBF_TEXT(SETUP, 2, "cqinit");
260 memset(card->qdio.c_q->qdio_bufs, 0,
261 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
262 card->qdio.c_q->next_buf_to_init = 127;
263 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
264 card->qdio.no_in_queues - 1, 0,
265 127);
266 if (rc) {
267 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
268 goto out;
269 }
270 }
271 rc = 0;
272out:
273 return rc;
274}
275
276static inline int qeth_alloc_cq(struct qeth_card *card)
277{
278 int rc;
279
280 if (card->options.cq == QETH_CQ_ENABLED) {
281 int i;
282 struct qdio_outbuf_state *outbuf_states;
283
284 QETH_DBF_TEXT(SETUP, 2, "cqon");
285 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
286 GFP_KERNEL);
287 if (!card->qdio.c_q) {
288 rc = -1;
289 goto kmsg_out;
290 }
291 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
292
293 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
294 card->qdio.c_q->bufs[i].buffer =
295 &card->qdio.c_q->qdio_bufs[i];
296 }
297
298 card->qdio.no_in_queues = 2;
299
300 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
301 kzalloc(card->qdio.no_out_queues *
302 QDIO_MAX_BUFFERS_PER_Q *
303 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
304 outbuf_states = card->qdio.out_bufstates;
305 if (outbuf_states == NULL) {
306 rc = -1;
307 goto free_cq_out;
308 }
309 for (i = 0; i < card->qdio.no_out_queues; ++i) {
310 card->qdio.out_qs[i]->bufstates = outbuf_states;
311 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
312 }
313 } else {
314 QETH_DBF_TEXT(SETUP, 2, "nocq");
315 card->qdio.c_q = NULL;
316 card->qdio.no_in_queues = 1;
317 }
318 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
319 rc = 0;
320out:
321 return rc;
322free_cq_out:
323 kfree(card->qdio.c_q);
324 card->qdio.c_q = NULL;
325kmsg_out:
326 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
327 goto out;
328}
329
330static inline void qeth_free_cq(struct qeth_card *card)
331{
332 if (card->qdio.c_q) {
333 --card->qdio.no_in_queues;
334 kfree(card->qdio.c_q);
335 card->qdio.c_q = NULL;
336 }
337 kfree(card->qdio.out_bufstates);
338 card->qdio.out_bufstates = NULL;
339}
340
341static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
342 int delayed) {
343 enum iucv_tx_notify n;
344
345 switch (sbalf15) {
346 case 0:
347 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
348 break;
349 case 4:
350 case 16:
351 case 17:
352 case 18:
353 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
354 TX_NOTIFY_UNREACHABLE;
355 break;
356 default:
357 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
358 TX_NOTIFY_GENERALERROR;
359 break;
360 }
361
362 return n;
363}
364
365static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
366 int bidx, int forced_cleanup)
367{
368 if (q->card->options.cq != QETH_CQ_ENABLED)
369 return;
370
371 if (q->bufs[bidx]->next_pending != NULL) {
372 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
373 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
374
375 while (c) {
376 if (forced_cleanup ||
377 atomic_read(&c->state) ==
378 QETH_QDIO_BUF_HANDLED_DELAYED) {
379 struct qeth_qdio_out_buffer *f = c;
380 QETH_CARD_TEXT(f->q->card, 5, "fp");
381 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
382
383
384
385 qeth_release_skbs(c);
386
387 c = f->next_pending;
388 BUG_ON(head->next_pending != f);
389 head->next_pending = c;
390 kmem_cache_free(qeth_qdio_outbuf_cache, f);
391 } else {
392 head = c;
393 c = c->next_pending;
394 }
395
396 }
397 }
398 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
399 QETH_QDIO_BUF_HANDLED_DELAYED)) {
400
401 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
402 qeth_init_qdio_out_buf(q, bidx);
403 QETH_CARD_TEXT(q->card, 2, "clprecov");
404 }
405}
406
407
408static inline void qeth_qdio_handle_aob(struct qeth_card *card,
409 unsigned long phys_aob_addr) {
410 struct qaob *aob;
411 struct qeth_qdio_out_buffer *buffer;
412 enum iucv_tx_notify notification;
413
414 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
415 QETH_CARD_TEXT(card, 5, "haob");
416 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
417 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
418 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
419
420 BUG_ON(buffer == NULL);
421
422 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
423 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
424 notification = TX_NOTIFY_OK;
425 } else {
426 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
427 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
428 notification = TX_NOTIFY_DELAYED_OK;
429 }
430
431 if (aob->aorc != 0) {
432 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
433 notification = qeth_compute_cq_notification(aob->aorc, 1);
434 }
435 qeth_notify_skbs(buffer->q, buffer, notification);
436
437 buffer->aob = NULL;
438 qeth_clear_output_buffer(buffer->q, buffer,
439 QETH_QDIO_BUF_HANDLED_DELAYED);
440
441
442 qdio_release_aob(aob);
443}
444
445static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
446{
447 return card->options.cq == QETH_CQ_ENABLED &&
448 card->qdio.c_q != NULL &&
449 queue != 0 &&
450 queue == card->qdio.no_in_queues - 1;
451}
452
453
454static int qeth_issue_next_read(struct qeth_card *card)
455{
456 int rc;
457 struct qeth_cmd_buffer *iob;
458
459 QETH_CARD_TEXT(card, 5, "issnxrd");
460 if (card->read.state != CH_STATE_UP)
461 return -EIO;
462 iob = qeth_get_buffer(&card->read);
463 if (!iob) {
464 dev_warn(&card->gdev->dev, "The qeth device driver "
465 "failed to recover an error on the device\n");
466 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
467 "available\n", dev_name(&card->gdev->dev));
468 return -ENOMEM;
469 }
470 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
471 QETH_CARD_TEXT(card, 6, "noirqpnd");
472 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
473 (addr_t) iob, 0, 0);
474 if (rc) {
475 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
476 "rc=%i\n", dev_name(&card->gdev->dev), rc);
477 atomic_set(&card->read.irq_pending, 0);
478 card->read_or_write_problem = 1;
479 qeth_schedule_recovery(card);
480 wake_up(&card->wait_q);
481 }
482 return rc;
483}
484
485static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
486{
487 struct qeth_reply *reply;
488
489 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
490 if (reply) {
491 atomic_set(&reply->refcnt, 1);
492 atomic_set(&reply->received, 0);
493 reply->card = card;
494 };
495 return reply;
496}
497
498static void qeth_get_reply(struct qeth_reply *reply)
499{
500 WARN_ON(atomic_read(&reply->refcnt) <= 0);
501 atomic_inc(&reply->refcnt);
502}
503
504static void qeth_put_reply(struct qeth_reply *reply)
505{
506 WARN_ON(atomic_read(&reply->refcnt) <= 0);
507 if (atomic_dec_and_test(&reply->refcnt))
508 kfree(reply);
509}
510
511static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
512 struct qeth_card *card)
513{
514 char *ipa_name;
515 int com = cmd->hdr.command;
516 ipa_name = qeth_get_ipa_cmd_name(com);
517 if (rc)
518 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
519 "x%X \"%s\"\n",
520 ipa_name, com, dev_name(&card->gdev->dev),
521 QETH_CARD_IFNAME(card), rc,
522 qeth_get_ipa_msg(rc));
523 else
524 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
525 ipa_name, com, dev_name(&card->gdev->dev),
526 QETH_CARD_IFNAME(card));
527}
528
529static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
530 struct qeth_cmd_buffer *iob)
531{
532 struct qeth_ipa_cmd *cmd = NULL;
533
534 QETH_CARD_TEXT(card, 5, "chkipad");
535 if (IS_IPA(iob->data)) {
536 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
537 if (IS_IPA_REPLY(cmd)) {
538 if (cmd->hdr.command != IPA_CMD_SETCCID &&
539 cmd->hdr.command != IPA_CMD_DELCCID &&
540 cmd->hdr.command != IPA_CMD_MODCCID &&
541 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
542 qeth_issue_ipa_msg(cmd,
543 cmd->hdr.return_code, card);
544 return cmd;
545 } else {
546 switch (cmd->hdr.command) {
547 case IPA_CMD_STOPLAN:
548 dev_warn(&card->gdev->dev,
549 "The link for interface %s on CHPID"
550 " 0x%X failed\n",
551 QETH_CARD_IFNAME(card),
552 card->info.chpid);
553 card->lan_online = 0;
554 if (card->dev && netif_carrier_ok(card->dev))
555 netif_carrier_off(card->dev);
556 return NULL;
557 case IPA_CMD_STARTLAN:
558 dev_info(&card->gdev->dev,
559 "The link for %s on CHPID 0x%X has"
560 " been restored\n",
561 QETH_CARD_IFNAME(card),
562 card->info.chpid);
563 netif_carrier_on(card->dev);
564 card->lan_online = 1;
565 if (card->info.hwtrap)
566 card->info.hwtrap = 2;
567 qeth_schedule_recovery(card);
568 return NULL;
569 case IPA_CMD_MODCCID:
570 return cmd;
571 case IPA_CMD_REGISTER_LOCAL_ADDR:
572 QETH_CARD_TEXT(card, 3, "irla");
573 break;
574 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
575 QETH_CARD_TEXT(card, 3, "urla");
576 break;
577 default:
578 QETH_DBF_MESSAGE(2, "Received data is IPA "
579 "but not a reply!\n");
580 break;
581 }
582 }
583 }
584 return cmd;
585}
586
587void qeth_clear_ipacmd_list(struct qeth_card *card)
588{
589 struct qeth_reply *reply, *r;
590 unsigned long flags;
591
592 QETH_CARD_TEXT(card, 4, "clipalst");
593
594 spin_lock_irqsave(&card->lock, flags);
595 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
596 qeth_get_reply(reply);
597 reply->rc = -EIO;
598 atomic_inc(&reply->received);
599 list_del_init(&reply->list);
600 wake_up(&reply->wait_q);
601 qeth_put_reply(reply);
602 }
603 spin_unlock_irqrestore(&card->lock, flags);
604 atomic_set(&card->write.irq_pending, 0);
605}
606EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
607
608static int qeth_check_idx_response(struct qeth_card *card,
609 unsigned char *buffer)
610{
611 if (!buffer)
612 return 0;
613
614 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
615 if ((buffer[2] & 0xc0) == 0xc0) {
616 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
617 "with cause code 0x%02x%s\n",
618 buffer[4],
619 ((buffer[4] == 0x22) ?
620 " -- try another portname" : ""));
621 QETH_CARD_TEXT(card, 2, "ckidxres");
622 QETH_CARD_TEXT(card, 2, " idxterm");
623 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
624 if (buffer[4] == 0xf6) {
625 dev_err(&card->gdev->dev,
626 "The qeth device is not configured "
627 "for the OSI layer required by z/VM\n");
628 return -EPERM;
629 }
630 return -EIO;
631 }
632 return 0;
633}
634
635static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
636 __u32 len)
637{
638 struct qeth_card *card;
639
640 card = CARD_FROM_CDEV(channel->ccwdev);
641 QETH_CARD_TEXT(card, 4, "setupccw");
642 if (channel == &card->read)
643 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
644 else
645 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
646 channel->ccw.count = len;
647 channel->ccw.cda = (__u32) __pa(iob);
648}
649
650static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
651{
652 __u8 index;
653
654 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
655 index = channel->io_buf_no;
656 do {
657 if (channel->iob[index].state == BUF_STATE_FREE) {
658 channel->iob[index].state = BUF_STATE_LOCKED;
659 channel->io_buf_no = (channel->io_buf_no + 1) %
660 QETH_CMD_BUFFER_NO;
661 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
662 return channel->iob + index;
663 }
664 index = (index + 1) % QETH_CMD_BUFFER_NO;
665 } while (index != channel->io_buf_no);
666
667 return NULL;
668}
669
670void qeth_release_buffer(struct qeth_channel *channel,
671 struct qeth_cmd_buffer *iob)
672{
673 unsigned long flags;
674
675 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
676 spin_lock_irqsave(&channel->iob_lock, flags);
677 memset(iob->data, 0, QETH_BUFSIZE);
678 iob->state = BUF_STATE_FREE;
679 iob->callback = qeth_send_control_data_cb;
680 iob->rc = 0;
681 spin_unlock_irqrestore(&channel->iob_lock, flags);
682 wake_up(&channel->wait_q);
683}
684EXPORT_SYMBOL_GPL(qeth_release_buffer);
685
686static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
687{
688 struct qeth_cmd_buffer *buffer = NULL;
689 unsigned long flags;
690
691 spin_lock_irqsave(&channel->iob_lock, flags);
692 buffer = __qeth_get_buffer(channel);
693 spin_unlock_irqrestore(&channel->iob_lock, flags);
694 return buffer;
695}
696
697struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
698{
699 struct qeth_cmd_buffer *buffer;
700 wait_event(channel->wait_q,
701 ((buffer = qeth_get_buffer(channel)) != NULL));
702 return buffer;
703}
704EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
705
706void qeth_clear_cmd_buffers(struct qeth_channel *channel)
707{
708 int cnt;
709
710 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
711 qeth_release_buffer(channel, &channel->iob[cnt]);
712 channel->buf_no = 0;
713 channel->io_buf_no = 0;
714}
715EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
716
717static void qeth_send_control_data_cb(struct qeth_channel *channel,
718 struct qeth_cmd_buffer *iob)
719{
720 struct qeth_card *card;
721 struct qeth_reply *reply, *r;
722 struct qeth_ipa_cmd *cmd;
723 unsigned long flags;
724 int keep_reply;
725 int rc = 0;
726
727 card = CARD_FROM_CDEV(channel->ccwdev);
728 QETH_CARD_TEXT(card, 4, "sndctlcb");
729 rc = qeth_check_idx_response(card, iob->data);
730 switch (rc) {
731 case 0:
732 break;
733 case -EIO:
734 qeth_clear_ipacmd_list(card);
735 qeth_schedule_recovery(card);
736
737 default:
738 goto out;
739 }
740
741 cmd = qeth_check_ipa_data(card, iob);
742 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
743 goto out;
744
745 if (card->info.type == QETH_CARD_TYPE_OSN &&
746 cmd &&
747 cmd->hdr.command != IPA_CMD_STARTLAN &&
748 card->osn_info.assist_cb != NULL) {
749 card->osn_info.assist_cb(card->dev, cmd);
750 goto out;
751 }
752
753 spin_lock_irqsave(&card->lock, flags);
754 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
755 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
756 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
757 qeth_get_reply(reply);
758 list_del_init(&reply->list);
759 spin_unlock_irqrestore(&card->lock, flags);
760 keep_reply = 0;
761 if (reply->callback != NULL) {
762 if (cmd) {
763 reply->offset = (__u16)((char *)cmd -
764 (char *)iob->data);
765 keep_reply = reply->callback(card,
766 reply,
767 (unsigned long)cmd);
768 } else
769 keep_reply = reply->callback(card,
770 reply,
771 (unsigned long)iob);
772 }
773 if (cmd)
774 reply->rc = (u16) cmd->hdr.return_code;
775 else if (iob->rc)
776 reply->rc = iob->rc;
777 if (keep_reply) {
778 spin_lock_irqsave(&card->lock, flags);
779 list_add_tail(&reply->list,
780 &card->cmd_waiter_list);
781 spin_unlock_irqrestore(&card->lock, flags);
782 } else {
783 atomic_inc(&reply->received);
784 wake_up(&reply->wait_q);
785 }
786 qeth_put_reply(reply);
787 goto out;
788 }
789 }
790 spin_unlock_irqrestore(&card->lock, flags);
791out:
792 memcpy(&card->seqno.pdu_hdr_ack,
793 QETH_PDU_HEADER_SEQ_NO(iob->data),
794 QETH_SEQ_NO_LENGTH);
795 qeth_release_buffer(channel, iob);
796}
797
798static int qeth_setup_channel(struct qeth_channel *channel)
799{
800 int cnt;
801
802 QETH_DBF_TEXT(SETUP, 2, "setupch");
803 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
804 channel->iob[cnt].data =
805 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
806 if (channel->iob[cnt].data == NULL)
807 break;
808 channel->iob[cnt].state = BUF_STATE_FREE;
809 channel->iob[cnt].channel = channel;
810 channel->iob[cnt].callback = qeth_send_control_data_cb;
811 channel->iob[cnt].rc = 0;
812 }
813 if (cnt < QETH_CMD_BUFFER_NO) {
814 while (cnt-- > 0)
815 kfree(channel->iob[cnt].data);
816 return -ENOMEM;
817 }
818 channel->buf_no = 0;
819 channel->io_buf_no = 0;
820 atomic_set(&channel->irq_pending, 0);
821 spin_lock_init(&channel->iob_lock);
822
823 init_waitqueue_head(&channel->wait_q);
824 return 0;
825}
826
827static int qeth_set_thread_start_bit(struct qeth_card *card,
828 unsigned long thread)
829{
830 unsigned long flags;
831
832 spin_lock_irqsave(&card->thread_mask_lock, flags);
833 if (!(card->thread_allowed_mask & thread) ||
834 (card->thread_start_mask & thread)) {
835 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
836 return -EPERM;
837 }
838 card->thread_start_mask |= thread;
839 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
840 return 0;
841}
842
843void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
844{
845 unsigned long flags;
846
847 spin_lock_irqsave(&card->thread_mask_lock, flags);
848 card->thread_start_mask &= ~thread;
849 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
850 wake_up(&card->wait_q);
851}
852EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
853
854void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
855{
856 unsigned long flags;
857
858 spin_lock_irqsave(&card->thread_mask_lock, flags);
859 card->thread_running_mask &= ~thread;
860 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
861 wake_up(&card->wait_q);
862}
863EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
864
865static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
866{
867 unsigned long flags;
868 int rc = 0;
869
870 spin_lock_irqsave(&card->thread_mask_lock, flags);
871 if (card->thread_start_mask & thread) {
872 if ((card->thread_allowed_mask & thread) &&
873 !(card->thread_running_mask & thread)) {
874 rc = 1;
875 card->thread_start_mask &= ~thread;
876 card->thread_running_mask |= thread;
877 } else
878 rc = -EPERM;
879 }
880 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
881 return rc;
882}
883
884int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
885{
886 int rc = 0;
887
888 wait_event(card->wait_q,
889 (rc = __qeth_do_run_thread(card, thread)) >= 0);
890 return rc;
891}
892EXPORT_SYMBOL_GPL(qeth_do_run_thread);
893
894void qeth_schedule_recovery(struct qeth_card *card)
895{
896 QETH_CARD_TEXT(card, 2, "startrec");
897 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
898 schedule_work(&card->kernel_thread_starter);
899}
900EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
901
902static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
903{
904 int dstat, cstat;
905 char *sense;
906 struct qeth_card *card;
907
908 sense = (char *) irb->ecw;
909 cstat = irb->scsw.cmd.cstat;
910 dstat = irb->scsw.cmd.dstat;
911 card = CARD_FROM_CDEV(cdev);
912
913 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
914 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
915 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
916 QETH_CARD_TEXT(card, 2, "CGENCHK");
917 dev_warn(&cdev->dev, "The qeth device driver "
918 "failed to recover an error on the device\n");
919 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
920 dev_name(&cdev->dev), dstat, cstat);
921 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
922 16, 1, irb, 64, 1);
923 return 1;
924 }
925
926 if (dstat & DEV_STAT_UNIT_CHECK) {
927 if (sense[SENSE_RESETTING_EVENT_BYTE] &
928 SENSE_RESETTING_EVENT_FLAG) {
929 QETH_CARD_TEXT(card, 2, "REVIND");
930 return 1;
931 }
932 if (sense[SENSE_COMMAND_REJECT_BYTE] &
933 SENSE_COMMAND_REJECT_FLAG) {
934 QETH_CARD_TEXT(card, 2, "CMDREJi");
935 return 1;
936 }
937 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
938 QETH_CARD_TEXT(card, 2, "AFFE");
939 return 1;
940 }
941 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
942 QETH_CARD_TEXT(card, 2, "ZEROSEN");
943 return 0;
944 }
945 QETH_CARD_TEXT(card, 2, "DGENCHK");
946 return 1;
947 }
948 return 0;
949}
950
951static long __qeth_check_irb_error(struct ccw_device *cdev,
952 unsigned long intparm, struct irb *irb)
953{
954 struct qeth_card *card;
955
956 card = CARD_FROM_CDEV(cdev);
957
958 if (!IS_ERR(irb))
959 return 0;
960
961 switch (PTR_ERR(irb)) {
962 case -EIO:
963 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
964 dev_name(&cdev->dev));
965 QETH_CARD_TEXT(card, 2, "ckirberr");
966 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
967 break;
968 case -ETIMEDOUT:
969 dev_warn(&cdev->dev, "A hardware operation timed out"
970 " on the device\n");
971 QETH_CARD_TEXT(card, 2, "ckirberr");
972 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
973 if (intparm == QETH_RCD_PARM) {
974 if (card && (card->data.ccwdev == cdev)) {
975 card->data.state = CH_STATE_DOWN;
976 wake_up(&card->wait_q);
977 }
978 }
979 break;
980 default:
981 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
982 dev_name(&cdev->dev), PTR_ERR(irb));
983 QETH_CARD_TEXT(card, 2, "ckirberr");
984 QETH_CARD_TEXT(card, 2, " rc???");
985 }
986 return PTR_ERR(irb);
987}
988
989static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
990 struct irb *irb)
991{
992 int rc;
993 int cstat, dstat;
994 struct qeth_cmd_buffer *buffer;
995 struct qeth_channel *channel;
996 struct qeth_card *card;
997 struct qeth_cmd_buffer *iob;
998 __u8 index;
999
1000 if (__qeth_check_irb_error(cdev, intparm, irb))
1001 return;
1002 cstat = irb->scsw.cmd.cstat;
1003 dstat = irb->scsw.cmd.dstat;
1004
1005 card = CARD_FROM_CDEV(cdev);
1006 if (!card)
1007 return;
1008
1009 QETH_CARD_TEXT(card, 5, "irq");
1010
1011 if (card->read.ccwdev == cdev) {
1012 channel = &card->read;
1013 QETH_CARD_TEXT(card, 5, "read");
1014 } else if (card->write.ccwdev == cdev) {
1015 channel = &card->write;
1016 QETH_CARD_TEXT(card, 5, "write");
1017 } else {
1018 channel = &card->data;
1019 QETH_CARD_TEXT(card, 5, "data");
1020 }
1021 atomic_set(&channel->irq_pending, 0);
1022
1023 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1024 channel->state = CH_STATE_STOPPED;
1025
1026 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1027 channel->state = CH_STATE_HALTED;
1028
1029
1030 if ((channel == &card->data) && (intparm != 0) &&
1031 (intparm != QETH_RCD_PARM))
1032 goto out;
1033
1034 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1035 QETH_CARD_TEXT(card, 6, "clrchpar");
1036
1037 intparm = 0;
1038 }
1039 if (intparm == QETH_HALT_CHANNEL_PARM) {
1040 QETH_CARD_TEXT(card, 6, "hltchpar");
1041
1042 intparm = 0;
1043 }
1044 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1045 (dstat & DEV_STAT_UNIT_CHECK) ||
1046 (cstat)) {
1047 if (irb->esw.esw0.erw.cons) {
1048 dev_warn(&channel->ccwdev->dev,
1049 "The qeth device driver failed to recover "
1050 "an error on the device\n");
1051 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1052 "0x%X dstat 0x%X\n",
1053 dev_name(&channel->ccwdev->dev), cstat, dstat);
1054 print_hex_dump(KERN_WARNING, "qeth: irb ",
1055 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1056 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1057 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1058 }
1059 if (intparm == QETH_RCD_PARM) {
1060 channel->state = CH_STATE_DOWN;
1061 goto out;
1062 }
1063 rc = qeth_get_problem(cdev, irb);
1064 if (rc) {
1065 qeth_clear_ipacmd_list(card);
1066 qeth_schedule_recovery(card);
1067 goto out;
1068 }
1069 }
1070
1071 if (intparm == QETH_RCD_PARM) {
1072 channel->state = CH_STATE_RCD_DONE;
1073 goto out;
1074 }
1075 if (intparm) {
1076 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1077 buffer->state = BUF_STATE_PROCESSED;
1078 }
1079 if (channel == &card->data)
1080 return;
1081 if (channel == &card->read &&
1082 channel->state == CH_STATE_UP)
1083 qeth_issue_next_read(card);
1084
1085 iob = channel->iob;
1086 index = channel->buf_no;
1087 while (iob[index].state == BUF_STATE_PROCESSED) {
1088 if (iob[index].callback != NULL)
1089 iob[index].callback(channel, iob + index);
1090
1091 index = (index + 1) % QETH_CMD_BUFFER_NO;
1092 }
1093 channel->buf_no = index;
1094out:
1095 wake_up(&card->wait_q);
1096 return;
1097}
1098
1099static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1100 struct qeth_qdio_out_buffer *buf,
1101 enum iucv_tx_notify notification)
1102{
1103 struct sk_buff *skb;
1104
1105 if (skb_queue_empty(&buf->skb_list))
1106 goto out;
1107 skb = skb_peek(&buf->skb_list);
1108 while (skb) {
1109 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1110 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1111 if (skb->protocol == ETH_P_AF_IUCV) {
1112 if (skb->sk) {
1113 struct iucv_sock *iucv = iucv_sk(skb->sk);
1114 iucv->sk_txnotify(skb, notification);
1115 }
1116 }
1117 if (skb_queue_is_last(&buf->skb_list, skb))
1118 skb = NULL;
1119 else
1120 skb = skb_queue_next(&buf->skb_list, skb);
1121 }
1122out:
1123 return;
1124}
1125
1126static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1127{
1128 struct sk_buff *skb;
1129 struct iucv_sock *iucv;
1130 int notify_general_error = 0;
1131
1132 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1133 notify_general_error = 1;
1134
1135
1136 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1137
1138 skb = skb_dequeue(&buf->skb_list);
1139 while (skb) {
1140 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1141 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1142 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1143 if (skb->sk) {
1144 iucv = iucv_sk(skb->sk);
1145 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1146 }
1147 }
1148 atomic_dec(&skb->users);
1149 dev_kfree_skb_any(skb);
1150 skb = skb_dequeue(&buf->skb_list);
1151 }
1152}
1153
1154static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1155 struct qeth_qdio_out_buffer *buf,
1156 enum qeth_qdio_buffer_states newbufstate)
1157{
1158 int i;
1159
1160
1161 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1162 atomic_dec(&queue->set_pci_flags_count);
1163
1164 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1165 qeth_release_skbs(buf);
1166 }
1167 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1168 if (buf->buffer->element[i].addr && buf->is_header[i])
1169 kmem_cache_free(qeth_core_header_cache,
1170 buf->buffer->element[i].addr);
1171 buf->is_header[i] = 0;
1172 buf->buffer->element[i].length = 0;
1173 buf->buffer->element[i].addr = NULL;
1174 buf->buffer->element[i].eflags = 0;
1175 buf->buffer->element[i].sflags = 0;
1176 }
1177 buf->buffer->element[15].eflags = 0;
1178 buf->buffer->element[15].sflags = 0;
1179 buf->next_element_to_fill = 0;
1180 atomic_set(&buf->state, newbufstate);
1181}
1182
1183static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1184{
1185 int j;
1186
1187 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1188 if (!q->bufs[j])
1189 continue;
1190 qeth_cleanup_handled_pending(q, j, 1);
1191 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1192 if (free) {
1193 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1194 q->bufs[j] = NULL;
1195 }
1196 }
1197}
1198
1199void qeth_clear_qdio_buffers(struct qeth_card *card)
1200{
1201 int i;
1202
1203 QETH_CARD_TEXT(card, 2, "clearqdbf");
1204
1205 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1206 if (card->qdio.out_qs[i]) {
1207 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1208 }
1209 }
1210}
1211EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1212
1213static void qeth_free_buffer_pool(struct qeth_card *card)
1214{
1215 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1216 int i = 0;
1217 list_for_each_entry_safe(pool_entry, tmp,
1218 &card->qdio.init_pool.entry_list, init_list){
1219 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1220 free_page((unsigned long)pool_entry->elements[i]);
1221 list_del(&pool_entry->init_list);
1222 kfree(pool_entry);
1223 }
1224}
1225
1226static void qeth_free_qdio_buffers(struct qeth_card *card)
1227{
1228 int i, j;
1229
1230 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1231 QETH_QDIO_UNINITIALIZED)
1232 return;
1233
1234 qeth_free_cq(card);
1235 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1236 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1237 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1238 kfree(card->qdio.in_q);
1239 card->qdio.in_q = NULL;
1240
1241 qeth_free_buffer_pool(card);
1242
1243 if (card->qdio.out_qs) {
1244 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1245 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1246 kfree(card->qdio.out_qs[i]);
1247 }
1248 kfree(card->qdio.out_qs);
1249 card->qdio.out_qs = NULL;
1250 }
1251}
1252
1253static void qeth_clean_channel(struct qeth_channel *channel)
1254{
1255 int cnt;
1256
1257 QETH_DBF_TEXT(SETUP, 2, "freech");
1258 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1259 kfree(channel->iob[cnt].data);
1260}
1261
1262static void qeth_get_channel_path_desc(struct qeth_card *card)
1263{
1264 struct ccw_device *ccwdev;
1265 struct channelPath_dsc {
1266 u8 flags;
1267 u8 lsn;
1268 u8 desc;
1269 u8 chpid;
1270 u8 swla;
1271 u8 zeroes;
1272 u8 chla;
1273 u8 chpp;
1274 } *chp_dsc;
1275
1276 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1277
1278 ccwdev = card->data.ccwdev;
1279 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1280 if (chp_dsc != NULL) {
1281 if (card->info.type != QETH_CARD_TYPE_IQD) {
1282
1283 if ((chp_dsc->chpp & 0x02) == 0x02) {
1284 if ((atomic_read(&card->qdio.state) !=
1285 QETH_QDIO_UNINITIALIZED) &&
1286 (card->qdio.no_out_queues == 4))
1287
1288 qeth_free_qdio_buffers(card);
1289 card->qdio.no_out_queues = 1;
1290 if (card->qdio.default_out_queue != 0)
1291 dev_info(&card->gdev->dev,
1292 "Priority Queueing not supported\n");
1293 card->qdio.default_out_queue = 0;
1294 } else {
1295 if ((atomic_read(&card->qdio.state) !=
1296 QETH_QDIO_UNINITIALIZED) &&
1297 (card->qdio.no_out_queues == 1)) {
1298
1299 qeth_free_qdio_buffers(card);
1300 card->qdio.default_out_queue = 2;
1301 }
1302 card->qdio.no_out_queues = 4;
1303 }
1304 }
1305 card->info.func_level = 0x4100 + chp_dsc->desc;
1306 kfree(chp_dsc);
1307 }
1308 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1309 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1310 return;
1311}
1312
1313static void qeth_init_qdio_info(struct qeth_card *card)
1314{
1315 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1316 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1317
1318 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1319 if (card->info.type == QETH_CARD_TYPE_IQD)
1320 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1321 else
1322 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1323 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1324 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1325 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1326}
1327
1328static void qeth_set_intial_options(struct qeth_card *card)
1329{
1330 card->options.route4.type = NO_ROUTER;
1331 card->options.route6.type = NO_ROUTER;
1332 card->options.fake_broadcast = 0;
1333 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1334 card->options.performance_stats = 0;
1335 card->options.rx_sg_cb = QETH_RX_SG_CB;
1336 card->options.isolation = ISOLATION_MODE_NONE;
1337 card->options.cq = QETH_CQ_DISABLED;
1338}
1339
1340static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1341{
1342 unsigned long flags;
1343 int rc = 0;
1344
1345 spin_lock_irqsave(&card->thread_mask_lock, flags);
1346 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1347 (u8) card->thread_start_mask,
1348 (u8) card->thread_allowed_mask,
1349 (u8) card->thread_running_mask);
1350 rc = (card->thread_start_mask & thread);
1351 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1352 return rc;
1353}
1354
1355static void qeth_start_kernel_thread(struct work_struct *work)
1356{
1357 struct task_struct *ts;
1358 struct qeth_card *card = container_of(work, struct qeth_card,
1359 kernel_thread_starter);
1360 QETH_CARD_TEXT(card , 2, "strthrd");
1361
1362 if (card->read.state != CH_STATE_UP &&
1363 card->write.state != CH_STATE_UP)
1364 return;
1365 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1366 ts = kthread_run(card->discipline->recover, (void *)card,
1367 "qeth_recover");
1368 if (IS_ERR(ts)) {
1369 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1370 qeth_clear_thread_running_bit(card,
1371 QETH_RECOVER_THREAD);
1372 }
1373 }
1374}
1375
1376static int qeth_setup_card(struct qeth_card *card)
1377{
1378
1379 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1380 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1381
1382 card->read.state = CH_STATE_DOWN;
1383 card->write.state = CH_STATE_DOWN;
1384 card->data.state = CH_STATE_DOWN;
1385 card->state = CARD_STATE_DOWN;
1386 card->lan_online = 0;
1387 card->read_or_write_problem = 0;
1388 card->dev = NULL;
1389 spin_lock_init(&card->vlanlock);
1390 spin_lock_init(&card->mclock);
1391 spin_lock_init(&card->lock);
1392 spin_lock_init(&card->ip_lock);
1393 spin_lock_init(&card->thread_mask_lock);
1394 mutex_init(&card->conf_mutex);
1395 mutex_init(&card->discipline_mutex);
1396 card->thread_start_mask = 0;
1397 card->thread_allowed_mask = 0;
1398 card->thread_running_mask = 0;
1399 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1400 INIT_LIST_HEAD(&card->ip_list);
1401 INIT_LIST_HEAD(card->ip_tbd_list);
1402 INIT_LIST_HEAD(&card->cmd_waiter_list);
1403 init_waitqueue_head(&card->wait_q);
1404
1405 qeth_set_intial_options(card);
1406
1407 INIT_LIST_HEAD(&card->ipato.entries);
1408 card->ipato.enabled = 0;
1409 card->ipato.invert4 = 0;
1410 card->ipato.invert6 = 0;
1411
1412 qeth_init_qdio_info(card);
1413 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1414 return 0;
1415}
1416
1417static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1418{
1419 struct qeth_card *card = container_of(slr, struct qeth_card,
1420 qeth_service_level);
1421 if (card->info.mcl_level[0])
1422 seq_printf(m, "qeth: %s firmware level %s\n",
1423 CARD_BUS_ID(card), card->info.mcl_level);
1424}
1425
1426static struct qeth_card *qeth_alloc_card(void)
1427{
1428 struct qeth_card *card;
1429
1430 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1431 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1432 if (!card)
1433 goto out;
1434 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1435 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1436 if (!card->ip_tbd_list) {
1437 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1438 goto out_card;
1439 }
1440 if (qeth_setup_channel(&card->read))
1441 goto out_ip;
1442 if (qeth_setup_channel(&card->write))
1443 goto out_channel;
1444 card->options.layer2 = -1;
1445 card->qeth_service_level.seq_print = qeth_core_sl_print;
1446 register_service_level(&card->qeth_service_level);
1447 return card;
1448
1449out_channel:
1450 qeth_clean_channel(&card->read);
1451out_ip:
1452 kfree(card->ip_tbd_list);
1453out_card:
1454 kfree(card);
1455out:
1456 return NULL;
1457}
1458
1459static int qeth_determine_card_type(struct qeth_card *card)
1460{
1461 int i = 0;
1462
1463 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1464
1465 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1466 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1467 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1468 if ((CARD_RDEV(card)->id.dev_type ==
1469 known_devices[i][QETH_DEV_TYPE_IND]) &&
1470 (CARD_RDEV(card)->id.dev_model ==
1471 known_devices[i][QETH_DEV_MODEL_IND])) {
1472 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1473 card->qdio.no_out_queues =
1474 known_devices[i][QETH_QUEUE_NO_IND];
1475 card->qdio.no_in_queues = 1;
1476 card->info.is_multicast_different =
1477 known_devices[i][QETH_MULTICAST_IND];
1478 qeth_get_channel_path_desc(card);
1479 return 0;
1480 }
1481 i++;
1482 }
1483 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1484 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1485 "unknown type\n");
1486 return -ENOENT;
1487}
1488
1489static int qeth_clear_channel(struct qeth_channel *channel)
1490{
1491 unsigned long flags;
1492 struct qeth_card *card;
1493 int rc;
1494
1495 card = CARD_FROM_CDEV(channel->ccwdev);
1496 QETH_CARD_TEXT(card, 3, "clearch");
1497 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1498 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1499 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1500
1501 if (rc)
1502 return rc;
1503 rc = wait_event_interruptible_timeout(card->wait_q,
1504 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1505 if (rc == -ERESTARTSYS)
1506 return rc;
1507 if (channel->state != CH_STATE_STOPPED)
1508 return -ETIME;
1509 channel->state = CH_STATE_DOWN;
1510 return 0;
1511}
1512
1513static int qeth_halt_channel(struct qeth_channel *channel)
1514{
1515 unsigned long flags;
1516 struct qeth_card *card;
1517 int rc;
1518
1519 card = CARD_FROM_CDEV(channel->ccwdev);
1520 QETH_CARD_TEXT(card, 3, "haltch");
1521 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1522 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1523 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1524
1525 if (rc)
1526 return rc;
1527 rc = wait_event_interruptible_timeout(card->wait_q,
1528 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1529 if (rc == -ERESTARTSYS)
1530 return rc;
1531 if (channel->state != CH_STATE_HALTED)
1532 return -ETIME;
1533 return 0;
1534}
1535
1536static int qeth_halt_channels(struct qeth_card *card)
1537{
1538 int rc1 = 0, rc2 = 0, rc3 = 0;
1539
1540 QETH_CARD_TEXT(card, 3, "haltchs");
1541 rc1 = qeth_halt_channel(&card->read);
1542 rc2 = qeth_halt_channel(&card->write);
1543 rc3 = qeth_halt_channel(&card->data);
1544 if (rc1)
1545 return rc1;
1546 if (rc2)
1547 return rc2;
1548 return rc3;
1549}
1550
1551static int qeth_clear_channels(struct qeth_card *card)
1552{
1553 int rc1 = 0, rc2 = 0, rc3 = 0;
1554
1555 QETH_CARD_TEXT(card, 3, "clearchs");
1556 rc1 = qeth_clear_channel(&card->read);
1557 rc2 = qeth_clear_channel(&card->write);
1558 rc3 = qeth_clear_channel(&card->data);
1559 if (rc1)
1560 return rc1;
1561 if (rc2)
1562 return rc2;
1563 return rc3;
1564}
1565
1566static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1567{
1568 int rc = 0;
1569
1570 QETH_CARD_TEXT(card, 3, "clhacrd");
1571
1572 if (halt)
1573 rc = qeth_halt_channels(card);
1574 if (rc)
1575 return rc;
1576 return qeth_clear_channels(card);
1577}
1578
1579int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1580{
1581 int rc = 0;
1582
1583 QETH_CARD_TEXT(card, 3, "qdioclr");
1584 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1585 QETH_QDIO_CLEANING)) {
1586 case QETH_QDIO_ESTABLISHED:
1587 if (card->info.type == QETH_CARD_TYPE_IQD)
1588 rc = qdio_shutdown(CARD_DDEV(card),
1589 QDIO_FLAG_CLEANUP_USING_HALT);
1590 else
1591 rc = qdio_shutdown(CARD_DDEV(card),
1592 QDIO_FLAG_CLEANUP_USING_CLEAR);
1593 if (rc)
1594 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1595 qdio_free(CARD_DDEV(card));
1596 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1597 break;
1598 case QETH_QDIO_CLEANING:
1599 return rc;
1600 default:
1601 break;
1602 }
1603 rc = qeth_clear_halt_card(card, use_halt);
1604 if (rc)
1605 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1606 card->state = CARD_STATE_DOWN;
1607 return rc;
1608}
1609EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1610
1611static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1612 int *length)
1613{
1614 struct ciw *ciw;
1615 char *rcd_buf;
1616 int ret;
1617 struct qeth_channel *channel = &card->data;
1618 unsigned long flags;
1619
1620
1621
1622
1623 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1624 if (!ciw || ciw->cmd == 0)
1625 return -EOPNOTSUPP;
1626 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1627 if (!rcd_buf)
1628 return -ENOMEM;
1629
1630 channel->ccw.cmd_code = ciw->cmd;
1631 channel->ccw.cda = (__u32) __pa(rcd_buf);
1632 channel->ccw.count = ciw->count;
1633 channel->ccw.flags = CCW_FLAG_SLI;
1634 channel->state = CH_STATE_RCD;
1635 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1636 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1637 QETH_RCD_PARM, LPM_ANYPATH, 0,
1638 QETH_RCD_TIMEOUT);
1639 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1640 if (!ret)
1641 wait_event(card->wait_q,
1642 (channel->state == CH_STATE_RCD_DONE ||
1643 channel->state == CH_STATE_DOWN));
1644 if (channel->state == CH_STATE_DOWN)
1645 ret = -EIO;
1646 else
1647 channel->state = CH_STATE_DOWN;
1648 if (ret) {
1649 kfree(rcd_buf);
1650 *buffer = NULL;
1651 *length = 0;
1652 } else {
1653 *length = ciw->count;
1654 *buffer = rcd_buf;
1655 }
1656 return ret;
1657}
1658
1659static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1660{
1661 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1662 card->info.chpid = prcd[30];
1663 card->info.unit_addr2 = prcd[31];
1664 card->info.cula = prcd[63];
1665 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1666 (prcd[0x11] == _ascebc['M']));
1667}
1668
1669static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1670{
1671 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1672
1673 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1674 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
1675 card->info.blkt.time_total = 250;
1676 card->info.blkt.inter_packet = 5;
1677 card->info.blkt.inter_packet_jumbo = 15;
1678 } else {
1679 card->info.blkt.time_total = 0;
1680 card->info.blkt.inter_packet = 0;
1681 card->info.blkt.inter_packet_jumbo = 0;
1682 }
1683}
1684
1685static void qeth_init_tokens(struct qeth_card *card)
1686{
1687 card->token.issuer_rm_w = 0x00010103UL;
1688 card->token.cm_filter_w = 0x00010108UL;
1689 card->token.cm_connection_w = 0x0001010aUL;
1690 card->token.ulp_filter_w = 0x0001010bUL;
1691 card->token.ulp_connection_w = 0x0001010dUL;
1692}
1693
1694static void qeth_init_func_level(struct qeth_card *card)
1695{
1696 switch (card->info.type) {
1697 case QETH_CARD_TYPE_IQD:
1698 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1699 break;
1700 case QETH_CARD_TYPE_OSD:
1701 case QETH_CARD_TYPE_OSN:
1702 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1703 break;
1704 default:
1705 break;
1706 }
1707}
1708
1709static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1710 void (*idx_reply_cb)(struct qeth_channel *,
1711 struct qeth_cmd_buffer *))
1712{
1713 struct qeth_cmd_buffer *iob;
1714 unsigned long flags;
1715 int rc;
1716 struct qeth_card *card;
1717
1718 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1719 card = CARD_FROM_CDEV(channel->ccwdev);
1720 iob = qeth_get_buffer(channel);
1721 iob->callback = idx_reply_cb;
1722 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1723 channel->ccw.count = QETH_BUFSIZE;
1724 channel->ccw.cda = (__u32) __pa(iob->data);
1725
1726 wait_event(card->wait_q,
1727 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1728 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1729 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1730 rc = ccw_device_start(channel->ccwdev,
1731 &channel->ccw, (addr_t) iob, 0, 0);
1732 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1733
1734 if (rc) {
1735 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1736 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1737 atomic_set(&channel->irq_pending, 0);
1738 wake_up(&card->wait_q);
1739 return rc;
1740 }
1741 rc = wait_event_interruptible_timeout(card->wait_q,
1742 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1743 if (rc == -ERESTARTSYS)
1744 return rc;
1745 if (channel->state != CH_STATE_UP) {
1746 rc = -ETIME;
1747 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1748 qeth_clear_cmd_buffers(channel);
1749 } else
1750 rc = 0;
1751 return rc;
1752}
1753
1754static int qeth_idx_activate_channel(struct qeth_channel *channel,
1755 void (*idx_reply_cb)(struct qeth_channel *,
1756 struct qeth_cmd_buffer *))
1757{
1758 struct qeth_card *card;
1759 struct qeth_cmd_buffer *iob;
1760 unsigned long flags;
1761 __u16 temp;
1762 __u8 tmp;
1763 int rc;
1764 struct ccw_dev_id temp_devid;
1765
1766 card = CARD_FROM_CDEV(channel->ccwdev);
1767
1768 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1769
1770 iob = qeth_get_buffer(channel);
1771 iob->callback = idx_reply_cb;
1772 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1773 channel->ccw.count = IDX_ACTIVATE_SIZE;
1774 channel->ccw.cda = (__u32) __pa(iob->data);
1775 if (channel == &card->write) {
1776 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1777 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1778 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1779 card->seqno.trans_hdr++;
1780 } else {
1781 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1782 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1783 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1784 }
1785 tmp = ((__u8)card->info.portno) | 0x80;
1786 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1787 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1788 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1789 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1790 &card->info.func_level, sizeof(__u16));
1791 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1792 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1793 temp = (card->info.cula << 8) + card->info.unit_addr2;
1794 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1795
1796 wait_event(card->wait_q,
1797 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1798 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1799 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1800 rc = ccw_device_start(channel->ccwdev,
1801 &channel->ccw, (addr_t) iob, 0, 0);
1802 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1803
1804 if (rc) {
1805 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1806 rc);
1807 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1808 atomic_set(&channel->irq_pending, 0);
1809 wake_up(&card->wait_q);
1810 return rc;
1811 }
1812 rc = wait_event_interruptible_timeout(card->wait_q,
1813 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1814 if (rc == -ERESTARTSYS)
1815 return rc;
1816 if (channel->state != CH_STATE_ACTIVATING) {
1817 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1818 " failed to recover an error on the device\n");
1819 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1820 dev_name(&channel->ccwdev->dev));
1821 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1822 qeth_clear_cmd_buffers(channel);
1823 return -ETIME;
1824 }
1825 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1826}
1827
1828static int qeth_peer_func_level(int level)
1829{
1830 if ((level & 0xff) == 8)
1831 return (level & 0xff) + 0x400;
1832 if (((level >> 8) & 3) == 1)
1833 return (level & 0xff) + 0x200;
1834 return level;
1835}
1836
1837static void qeth_idx_write_cb(struct qeth_channel *channel,
1838 struct qeth_cmd_buffer *iob)
1839{
1840 struct qeth_card *card;
1841 __u16 temp;
1842
1843 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1844
1845 if (channel->state == CH_STATE_DOWN) {
1846 channel->state = CH_STATE_ACTIVATING;
1847 goto out;
1848 }
1849 card = CARD_FROM_CDEV(channel->ccwdev);
1850
1851 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1852 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1853 dev_err(&card->write.ccwdev->dev,
1854 "The adapter is used exclusively by another "
1855 "host\n");
1856 else
1857 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1858 " negative reply\n",
1859 dev_name(&card->write.ccwdev->dev));
1860 goto out;
1861 }
1862 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1863 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1864 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1865 "function level mismatch (sent: 0x%x, received: "
1866 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1867 card->info.func_level, temp);
1868 goto out;
1869 }
1870 channel->state = CH_STATE_UP;
1871out:
1872 qeth_release_buffer(channel, iob);
1873}
1874
1875static void qeth_idx_read_cb(struct qeth_channel *channel,
1876 struct qeth_cmd_buffer *iob)
1877{
1878 struct qeth_card *card;
1879 __u16 temp;
1880
1881 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1882 if (channel->state == CH_STATE_DOWN) {
1883 channel->state = CH_STATE_ACTIVATING;
1884 goto out;
1885 }
1886
1887 card = CARD_FROM_CDEV(channel->ccwdev);
1888 if (qeth_check_idx_response(card, iob->data))
1889 goto out;
1890
1891 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1892 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1893 case QETH_IDX_ACT_ERR_EXCL:
1894 dev_err(&card->write.ccwdev->dev,
1895 "The adapter is used exclusively by another "
1896 "host\n");
1897 break;
1898 case QETH_IDX_ACT_ERR_AUTH:
1899 case QETH_IDX_ACT_ERR_AUTH_USER:
1900 dev_err(&card->read.ccwdev->dev,
1901 "Setting the device online failed because of "
1902 "insufficient authorization\n");
1903 break;
1904 default:
1905 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1906 " negative reply\n",
1907 dev_name(&card->read.ccwdev->dev));
1908 }
1909 QETH_CARD_TEXT_(card, 2, "idxread%c",
1910 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1911 goto out;
1912 }
1913
1914
1915
1916
1917
1918 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1919 (card->info.type == QETH_CARD_TYPE_OSD))
1920 card->info.portname_required = 1;
1921
1922 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1923 if (temp != qeth_peer_func_level(card->info.func_level)) {
1924 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1925 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1926 dev_name(&card->read.ccwdev->dev),
1927 card->info.func_level, temp);
1928 goto out;
1929 }
1930 memcpy(&card->token.issuer_rm_r,
1931 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1932 QETH_MPC_TOKEN_LENGTH);
1933 memcpy(&card->info.mcl_level[0],
1934 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1935 channel->state = CH_STATE_UP;
1936out:
1937 qeth_release_buffer(channel, iob);
1938}
1939
1940void qeth_prepare_control_data(struct qeth_card *card, int len,
1941 struct qeth_cmd_buffer *iob)
1942{
1943 qeth_setup_ccw(&card->write, iob->data, len);
1944 iob->callback = qeth_release_buffer;
1945
1946 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1947 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1948 card->seqno.trans_hdr++;
1949 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1950 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1951 card->seqno.pdu_hdr++;
1952 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1953 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1954 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1955}
1956EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1957
1958int qeth_send_control_data(struct qeth_card *card, int len,
1959 struct qeth_cmd_buffer *iob,
1960 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1961 unsigned long),
1962 void *reply_param)
1963{
1964 int rc;
1965 unsigned long flags;
1966 struct qeth_reply *reply = NULL;
1967 unsigned long timeout, event_timeout;
1968 struct qeth_ipa_cmd *cmd;
1969
1970 QETH_CARD_TEXT(card, 2, "sendctl");
1971
1972 if (card->read_or_write_problem) {
1973 qeth_release_buffer(iob->channel, iob);
1974 return -EIO;
1975 }
1976 reply = qeth_alloc_reply(card);
1977 if (!reply) {
1978 return -ENOMEM;
1979 }
1980 reply->callback = reply_cb;
1981 reply->param = reply_param;
1982 if (card->state == CARD_STATE_DOWN)
1983 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1984 else
1985 reply->seqno = card->seqno.ipa++;
1986 init_waitqueue_head(&reply->wait_q);
1987 spin_lock_irqsave(&card->lock, flags);
1988 list_add_tail(&reply->list, &card->cmd_waiter_list);
1989 spin_unlock_irqrestore(&card->lock, flags);
1990 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1991
1992 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1993 qeth_prepare_control_data(card, len, iob);
1994
1995 if (IS_IPA(iob->data))
1996 event_timeout = QETH_IPA_TIMEOUT;
1997 else
1998 event_timeout = QETH_TIMEOUT;
1999 timeout = jiffies + event_timeout;
2000
2001 QETH_CARD_TEXT(card, 6, "noirqpnd");
2002 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2003 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2004 (addr_t) iob, 0, 0);
2005 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2006 if (rc) {
2007 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2008 "ccw_device_start rc = %i\n",
2009 dev_name(&card->write.ccwdev->dev), rc);
2010 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2011 spin_lock_irqsave(&card->lock, flags);
2012 list_del_init(&reply->list);
2013 qeth_put_reply(reply);
2014 spin_unlock_irqrestore(&card->lock, flags);
2015 qeth_release_buffer(iob->channel, iob);
2016 atomic_set(&card->write.irq_pending, 0);
2017 wake_up(&card->wait_q);
2018 return rc;
2019 }
2020
2021
2022
2023 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2024 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2025 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2026 if (!wait_event_timeout(reply->wait_q,
2027 atomic_read(&reply->received), event_timeout))
2028 goto time_err;
2029 } else {
2030 while (!atomic_read(&reply->received)) {
2031 if (time_after(jiffies, timeout))
2032 goto time_err;
2033 cpu_relax();
2034 };
2035 }
2036
2037 if (reply->rc == -EIO)
2038 goto error;
2039 rc = reply->rc;
2040 qeth_put_reply(reply);
2041 return rc;
2042
2043time_err:
2044 reply->rc = -ETIME;
2045 spin_lock_irqsave(&reply->card->lock, flags);
2046 list_del_init(&reply->list);
2047 spin_unlock_irqrestore(&reply->card->lock, flags);
2048 atomic_inc(&reply->received);
2049error:
2050 atomic_set(&card->write.irq_pending, 0);
2051 qeth_release_buffer(iob->channel, iob);
2052 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2053 rc = reply->rc;
2054 qeth_put_reply(reply);
2055 return rc;
2056}
2057EXPORT_SYMBOL_GPL(qeth_send_control_data);
2058
2059static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2060 unsigned long data)
2061{
2062 struct qeth_cmd_buffer *iob;
2063
2064 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2065
2066 iob = (struct qeth_cmd_buffer *) data;
2067 memcpy(&card->token.cm_filter_r,
2068 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2069 QETH_MPC_TOKEN_LENGTH);
2070 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2071 return 0;
2072}
2073
2074static int qeth_cm_enable(struct qeth_card *card)
2075{
2076 int rc;
2077 struct qeth_cmd_buffer *iob;
2078
2079 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2080
2081 iob = qeth_wait_for_buffer(&card->write);
2082 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2083 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2084 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2085 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2086 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2087
2088 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2089 qeth_cm_enable_cb, NULL);
2090 return rc;
2091}
2092
2093static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2094 unsigned long data)
2095{
2096
2097 struct qeth_cmd_buffer *iob;
2098
2099 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2100
2101 iob = (struct qeth_cmd_buffer *) data;
2102 memcpy(&card->token.cm_connection_r,
2103 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2104 QETH_MPC_TOKEN_LENGTH);
2105 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2106 return 0;
2107}
2108
2109static int qeth_cm_setup(struct qeth_card *card)
2110{
2111 int rc;
2112 struct qeth_cmd_buffer *iob;
2113
2114 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2115
2116 iob = qeth_wait_for_buffer(&card->write);
2117 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2118 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2119 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2120 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2121 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2122 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2123 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2124 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2125 qeth_cm_setup_cb, NULL);
2126 return rc;
2127
2128}
2129
2130static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2131{
2132 switch (card->info.type) {
2133 case QETH_CARD_TYPE_UNKNOWN:
2134 return 1500;
2135 case QETH_CARD_TYPE_IQD:
2136 return card->info.max_mtu;
2137 case QETH_CARD_TYPE_OSD:
2138 switch (card->info.link_type) {
2139 case QETH_LINK_TYPE_HSTR:
2140 case QETH_LINK_TYPE_LANE_TR:
2141 return 2000;
2142 default:
2143 return 1492;
2144 }
2145 case QETH_CARD_TYPE_OSM:
2146 case QETH_CARD_TYPE_OSX:
2147 return 1492;
2148 default:
2149 return 1500;
2150 }
2151}
2152
2153static inline int qeth_get_mtu_outof_framesize(int framesize)
2154{
2155 switch (framesize) {
2156 case 0x4000:
2157 return 8192;
2158 case 0x6000:
2159 return 16384;
2160 case 0xa000:
2161 return 32768;
2162 case 0xffff:
2163 return 57344;
2164 default:
2165 return 0;
2166 }
2167}
2168
2169static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2170{
2171 switch (card->info.type) {
2172 case QETH_CARD_TYPE_OSD:
2173 case QETH_CARD_TYPE_OSM:
2174 case QETH_CARD_TYPE_OSX:
2175 case QETH_CARD_TYPE_IQD:
2176 return ((mtu >= 576) &&
2177 (mtu <= card->info.max_mtu));
2178 case QETH_CARD_TYPE_OSN:
2179 case QETH_CARD_TYPE_UNKNOWN:
2180 default:
2181 return 1;
2182 }
2183}
2184
2185static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2186 unsigned long data)
2187{
2188
2189 __u16 mtu, framesize;
2190 __u16 len;
2191 __u8 link_type;
2192 struct qeth_cmd_buffer *iob;
2193
2194 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2195
2196 iob = (struct qeth_cmd_buffer *) data;
2197 memcpy(&card->token.ulp_filter_r,
2198 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2199 QETH_MPC_TOKEN_LENGTH);
2200 if (card->info.type == QETH_CARD_TYPE_IQD) {
2201 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2202 mtu = qeth_get_mtu_outof_framesize(framesize);
2203 if (!mtu) {
2204 iob->rc = -EINVAL;
2205 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2206 return 0;
2207 }
2208 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2209
2210 if (card->dev &&
2211 ((card->dev->mtu == card->info.initial_mtu) ||
2212 (card->dev->mtu > mtu)))
2213 card->dev->mtu = mtu;
2214 qeth_free_qdio_buffers(card);
2215 }
2216 card->info.initial_mtu = mtu;
2217 card->info.max_mtu = mtu;
2218 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2219 } else {
2220 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2221 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2222 iob->data);
2223 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2224 }
2225
2226 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2227 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2228 memcpy(&link_type,
2229 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2230 card->info.link_type = link_type;
2231 } else
2232 card->info.link_type = 0;
2233 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2234 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2235 return 0;
2236}
2237
2238static int qeth_ulp_enable(struct qeth_card *card)
2239{
2240 int rc;
2241 char prot_type;
2242 struct qeth_cmd_buffer *iob;
2243
2244
2245 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2246
2247 iob = qeth_wait_for_buffer(&card->write);
2248 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2249
2250 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2251 (__u8) card->info.portno;
2252 if (card->options.layer2)
2253 if (card->info.type == QETH_CARD_TYPE_OSN)
2254 prot_type = QETH_PROT_OSN2;
2255 else
2256 prot_type = QETH_PROT_LAYER2;
2257 else
2258 prot_type = QETH_PROT_TCPIP;
2259
2260 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2261 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2262 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2263 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2264 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2265 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2266 card->info.portname, 9);
2267 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2268 qeth_ulp_enable_cb, NULL);
2269 return rc;
2270
2271}
2272
2273static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2274 unsigned long data)
2275{
2276 struct qeth_cmd_buffer *iob;
2277 int rc = 0;
2278
2279 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2280
2281 iob = (struct qeth_cmd_buffer *) data;
2282 memcpy(&card->token.ulp_connection_r,
2283 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2284 QETH_MPC_TOKEN_LENGTH);
2285 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2286 3)) {
2287 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2288 dev_err(&card->gdev->dev, "A connection could not be "
2289 "established because of an OLM limit\n");
2290 iob->rc = -EMLINK;
2291 }
2292 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2293 return rc;
2294}
2295
2296static int qeth_ulp_setup(struct qeth_card *card)
2297{
2298 int rc;
2299 __u16 temp;
2300 struct qeth_cmd_buffer *iob;
2301 struct ccw_dev_id dev_id;
2302
2303 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2304
2305 iob = qeth_wait_for_buffer(&card->write);
2306 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2307
2308 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2309 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2310 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2311 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2312 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2313 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2314
2315 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2316 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2317 temp = (card->info.cula << 8) + card->info.unit_addr2;
2318 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2319 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2320 qeth_ulp_setup_cb, NULL);
2321 return rc;
2322}
2323
2324static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2325{
2326 int rc;
2327 struct qeth_qdio_out_buffer *newbuf;
2328
2329 rc = 0;
2330 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2331 if (!newbuf) {
2332 rc = -ENOMEM;
2333 goto out;
2334 }
2335 newbuf->buffer = &q->qdio_bufs[bidx];
2336 skb_queue_head_init(&newbuf->skb_list);
2337 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2338 newbuf->q = q;
2339 newbuf->aob = NULL;
2340 newbuf->next_pending = q->bufs[bidx];
2341 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2342 q->bufs[bidx] = newbuf;
2343 if (q->bufstates) {
2344 q->bufstates[bidx].user = newbuf;
2345 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2346 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2347 QETH_CARD_TEXT_(q->card, 2, "%lx",
2348 (long) newbuf->next_pending);
2349 }
2350out:
2351 return rc;
2352}
2353
2354
2355static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2356{
2357 int i, j;
2358
2359 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2360
2361 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2362 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2363 return 0;
2364
2365 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2366 GFP_KERNEL);
2367 if (!card->qdio.in_q)
2368 goto out_nomem;
2369 QETH_DBF_TEXT(SETUP, 2, "inq");
2370 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2371 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2372
2373 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2374 card->qdio.in_q->bufs[i].buffer =
2375 &card->qdio.in_q->qdio_bufs[i];
2376 card->qdio.in_q->bufs[i].rx_skb = NULL;
2377 }
2378
2379 if (qeth_alloc_buffer_pool(card))
2380 goto out_freeinq;
2381
2382
2383 card->qdio.out_qs =
2384 kzalloc(card->qdio.no_out_queues *
2385 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2386 if (!card->qdio.out_qs)
2387 goto out_freepool;
2388 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2389 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2390 GFP_KERNEL);
2391 if (!card->qdio.out_qs[i])
2392 goto out_freeoutq;
2393 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2394 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2395 card->qdio.out_qs[i]->queue_no = i;
2396
2397 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2398 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2399 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2400 goto out_freeoutqbufs;
2401 }
2402 }
2403
2404
2405 if (qeth_alloc_cq(card))
2406 goto out_freeoutq;
2407
2408 return 0;
2409
2410out_freeoutqbufs:
2411 while (j > 0) {
2412 --j;
2413 kmem_cache_free(qeth_qdio_outbuf_cache,
2414 card->qdio.out_qs[i]->bufs[j]);
2415 card->qdio.out_qs[i]->bufs[j] = NULL;
2416 }
2417out_freeoutq:
2418 while (i > 0) {
2419 kfree(card->qdio.out_qs[--i]);
2420 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2421 }
2422 kfree(card->qdio.out_qs);
2423 card->qdio.out_qs = NULL;
2424out_freepool:
2425 qeth_free_buffer_pool(card);
2426out_freeinq:
2427 kfree(card->qdio.in_q);
2428 card->qdio.in_q = NULL;
2429out_nomem:
2430 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2431 return -ENOMEM;
2432}
2433
2434static void qeth_create_qib_param_field(struct qeth_card *card,
2435 char *param_field)
2436{
2437
2438 param_field[0] = _ascebc['P'];
2439 param_field[1] = _ascebc['C'];
2440 param_field[2] = _ascebc['I'];
2441 param_field[3] = _ascebc['T'];
2442 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2443 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2444 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2445}
2446
2447static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2448 char *param_field)
2449{
2450 param_field[16] = _ascebc['B'];
2451 param_field[17] = _ascebc['L'];
2452 param_field[18] = _ascebc['K'];
2453 param_field[19] = _ascebc['T'];
2454 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2455 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2456 *((unsigned int *) (¶m_field[28])) =
2457 card->info.blkt.inter_packet_jumbo;
2458}
2459
2460static int qeth_qdio_activate(struct qeth_card *card)
2461{
2462 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2463 return qdio_activate(CARD_DDEV(card));
2464}
2465
2466static int qeth_dm_act(struct qeth_card *card)
2467{
2468 int rc;
2469 struct qeth_cmd_buffer *iob;
2470
2471 QETH_DBF_TEXT(SETUP, 2, "dmact");
2472
2473 iob = qeth_wait_for_buffer(&card->write);
2474 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2475
2476 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2477 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2478 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2479 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2480 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2481 return rc;
2482}
2483
2484static int qeth_mpc_initialize(struct qeth_card *card)
2485{
2486 int rc;
2487
2488 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2489
2490 rc = qeth_issue_next_read(card);
2491 if (rc) {
2492 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2493 return rc;
2494 }
2495 rc = qeth_cm_enable(card);
2496 if (rc) {
2497 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2498 goto out_qdio;
2499 }
2500 rc = qeth_cm_setup(card);
2501 if (rc) {
2502 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2503 goto out_qdio;
2504 }
2505 rc = qeth_ulp_enable(card);
2506 if (rc) {
2507 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2508 goto out_qdio;
2509 }
2510 rc = qeth_ulp_setup(card);
2511 if (rc) {
2512 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2513 goto out_qdio;
2514 }
2515 rc = qeth_alloc_qdio_buffers(card);
2516 if (rc) {
2517 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2518 goto out_qdio;
2519 }
2520 rc = qeth_qdio_establish(card);
2521 if (rc) {
2522 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2523 qeth_free_qdio_buffers(card);
2524 goto out_qdio;
2525 }
2526 rc = qeth_qdio_activate(card);
2527 if (rc) {
2528 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2529 goto out_qdio;
2530 }
2531 rc = qeth_dm_act(card);
2532 if (rc) {
2533 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2534 goto out_qdio;
2535 }
2536
2537 return 0;
2538out_qdio:
2539 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2540 return rc;
2541}
2542
2543static void qeth_print_status_with_portname(struct qeth_card *card)
2544{
2545 char dbf_text[15];
2546 int i;
2547
2548 sprintf(dbf_text, "%s", card->info.portname + 1);
2549 for (i = 0; i < 8; i++)
2550 dbf_text[i] =
2551 (char) _ebcasc[(__u8) dbf_text[i]];
2552 dbf_text[8] = 0;
2553 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2554 "with link type %s (portname: %s)\n",
2555 qeth_get_cardname(card),
2556 (card->info.mcl_level[0]) ? " (level: " : "",
2557 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2558 (card->info.mcl_level[0]) ? ")" : "",
2559 qeth_get_cardname_short(card),
2560 dbf_text);
2561
2562}
2563
2564static void qeth_print_status_no_portname(struct qeth_card *card)
2565{
2566 if (card->info.portname[0])
2567 dev_info(&card->gdev->dev, "Device is a%s "
2568 "card%s%s%s\nwith link type %s "
2569 "(no portname needed by interface).\n",
2570 qeth_get_cardname(card),
2571 (card->info.mcl_level[0]) ? " (level: " : "",
2572 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2573 (card->info.mcl_level[0]) ? ")" : "",
2574 qeth_get_cardname_short(card));
2575 else
2576 dev_info(&card->gdev->dev, "Device is a%s "
2577 "card%s%s%s\nwith link type %s.\n",
2578 qeth_get_cardname(card),
2579 (card->info.mcl_level[0]) ? " (level: " : "",
2580 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2581 (card->info.mcl_level[0]) ? ")" : "",
2582 qeth_get_cardname_short(card));
2583}
2584
2585void qeth_print_status_message(struct qeth_card *card)
2586{
2587 switch (card->info.type) {
2588 case QETH_CARD_TYPE_OSD:
2589 case QETH_CARD_TYPE_OSM:
2590 case QETH_CARD_TYPE_OSX:
2591
2592
2593
2594
2595 if (!card->info.mcl_level[0]) {
2596 sprintf(card->info.mcl_level, "%02x%02x",
2597 card->info.mcl_level[2],
2598 card->info.mcl_level[3]);
2599
2600 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2601 break;
2602 }
2603
2604 case QETH_CARD_TYPE_IQD:
2605 if ((card->info.guestlan) ||
2606 (card->info.mcl_level[0] & 0x80)) {
2607 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2608 card->info.mcl_level[0]];
2609 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2610 card->info.mcl_level[1]];
2611 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2612 card->info.mcl_level[2]];
2613 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2614 card->info.mcl_level[3]];
2615 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2616 }
2617 break;
2618 default:
2619 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2620 }
2621 if (card->info.portname_required)
2622 qeth_print_status_with_portname(card);
2623 else
2624 qeth_print_status_no_portname(card);
2625}
2626EXPORT_SYMBOL_GPL(qeth_print_status_message);
2627
2628static void qeth_initialize_working_pool_list(struct qeth_card *card)
2629{
2630 struct qeth_buffer_pool_entry *entry;
2631
2632 QETH_CARD_TEXT(card, 5, "inwrklst");
2633
2634 list_for_each_entry(entry,
2635 &card->qdio.init_pool.entry_list, init_list) {
2636 qeth_put_buffer_pool_entry(card, entry);
2637 }
2638}
2639
2640static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2641 struct qeth_card *card)
2642{
2643 struct list_head *plh;
2644 struct qeth_buffer_pool_entry *entry;
2645 int i, free;
2646 struct page *page;
2647
2648 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2649 return NULL;
2650
2651 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2652 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2653 free = 1;
2654 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2655 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2656 free = 0;
2657 break;
2658 }
2659 }
2660 if (free) {
2661 list_del_init(&entry->list);
2662 return entry;
2663 }
2664 }
2665
2666
2667 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2668 struct qeth_buffer_pool_entry, list);
2669 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2670 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2671 page = alloc_page(GFP_ATOMIC);
2672 if (!page) {
2673 return NULL;
2674 } else {
2675 free_page((unsigned long)entry->elements[i]);
2676 entry->elements[i] = page_address(page);
2677 if (card->options.performance_stats)
2678 card->perf_stats.sg_alloc_page_rx++;
2679 }
2680 }
2681 }
2682 list_del_init(&entry->list);
2683 return entry;
2684}
2685
2686static int qeth_init_input_buffer(struct qeth_card *card,
2687 struct qeth_qdio_buffer *buf)
2688{
2689 struct qeth_buffer_pool_entry *pool_entry;
2690 int i;
2691
2692 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2693 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2694 if (!buf->rx_skb)
2695 return 1;
2696 }
2697
2698 pool_entry = qeth_find_free_buffer_pool_entry(card);
2699 if (!pool_entry)
2700 return 1;
2701
2702
2703
2704
2705
2706
2707
2708
2709 buf->pool_entry = pool_entry;
2710 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2711 buf->buffer->element[i].length = PAGE_SIZE;
2712 buf->buffer->element[i].addr = pool_entry->elements[i];
2713 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2714 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2715 else
2716 buf->buffer->element[i].eflags = 0;
2717 buf->buffer->element[i].sflags = 0;
2718 }
2719 return 0;
2720}
2721
2722int qeth_init_qdio_queues(struct qeth_card *card)
2723{
2724 int i, j;
2725 int rc;
2726
2727 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2728
2729
2730 memset(card->qdio.in_q->qdio_bufs, 0,
2731 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2732 qeth_initialize_working_pool_list(card);
2733
2734 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2735 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2736 card->qdio.in_q->next_buf_to_init =
2737 card->qdio.in_buf_pool.buf_count - 1;
2738 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2739 card->qdio.in_buf_pool.buf_count - 1);
2740 if (rc) {
2741 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2742 return rc;
2743 }
2744
2745
2746 rc = qeth_cq_init(card);
2747 if (rc) {
2748 return rc;
2749 }
2750
2751
2752 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2753 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2754 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2755 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2756 qeth_clear_output_buffer(card->qdio.out_qs[i],
2757 card->qdio.out_qs[i]->bufs[j],
2758 QETH_QDIO_BUF_EMPTY);
2759 }
2760 card->qdio.out_qs[i]->card = card;
2761 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2762 card->qdio.out_qs[i]->do_pack = 0;
2763 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2764 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2765 atomic_set(&card->qdio.out_qs[i]->state,
2766 QETH_OUT_Q_UNLOCKED);
2767 }
2768 return 0;
2769}
2770EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2771
2772static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2773{
2774 switch (link_type) {
2775 case QETH_LINK_TYPE_HSTR:
2776 return 2;
2777 default:
2778 return 1;
2779 }
2780}
2781
2782static void qeth_fill_ipacmd_header(struct qeth_card *card,
2783 struct qeth_ipa_cmd *cmd, __u8 command,
2784 enum qeth_prot_versions prot)
2785{
2786 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2787 cmd->hdr.command = command;
2788 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2789 cmd->hdr.seqno = card->seqno.ipa;
2790 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2791 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2792 if (card->options.layer2)
2793 cmd->hdr.prim_version_no = 2;
2794 else
2795 cmd->hdr.prim_version_no = 1;
2796 cmd->hdr.param_count = 1;
2797 cmd->hdr.prot_version = prot;
2798 cmd->hdr.ipa_supported = 0;
2799 cmd->hdr.ipa_enabled = 0;
2800}
2801
2802struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2803 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2804{
2805 struct qeth_cmd_buffer *iob;
2806 struct qeth_ipa_cmd *cmd;
2807
2808 iob = qeth_wait_for_buffer(&card->write);
2809 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2810 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2811
2812 return iob;
2813}
2814EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2815
2816void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2817 char prot_type)
2818{
2819 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2820 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2821 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2822 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2823}
2824EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2825
2826int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2827 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2828 unsigned long),
2829 void *reply_param)
2830{
2831 int rc;
2832 char prot_type;
2833
2834 QETH_CARD_TEXT(card, 4, "sendipa");
2835
2836 if (card->options.layer2)
2837 if (card->info.type == QETH_CARD_TYPE_OSN)
2838 prot_type = QETH_PROT_OSN2;
2839 else
2840 prot_type = QETH_PROT_LAYER2;
2841 else
2842 prot_type = QETH_PROT_TCPIP;
2843 qeth_prepare_ipa_cmd(card, iob, prot_type);
2844 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2845 iob, reply_cb, reply_param);
2846 if (rc == -ETIME) {
2847 qeth_clear_ipacmd_list(card);
2848 qeth_schedule_recovery(card);
2849 }
2850 return rc;
2851}
2852EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2853
2854int qeth_send_startlan(struct qeth_card *card)
2855{
2856 int rc;
2857 struct qeth_cmd_buffer *iob;
2858
2859 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2860
2861 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2862 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2863 return rc;
2864}
2865EXPORT_SYMBOL_GPL(qeth_send_startlan);
2866
2867int qeth_default_setadapterparms_cb(struct qeth_card *card,
2868 struct qeth_reply *reply, unsigned long data)
2869{
2870 struct qeth_ipa_cmd *cmd;
2871
2872 QETH_CARD_TEXT(card, 4, "defadpcb");
2873
2874 cmd = (struct qeth_ipa_cmd *) data;
2875 if (cmd->hdr.return_code == 0)
2876 cmd->hdr.return_code =
2877 cmd->data.setadapterparms.hdr.return_code;
2878 return 0;
2879}
2880EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2881
2882static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2883 struct qeth_reply *reply, unsigned long data)
2884{
2885 struct qeth_ipa_cmd *cmd;
2886
2887 QETH_CARD_TEXT(card, 3, "quyadpcb");
2888
2889 cmd = (struct qeth_ipa_cmd *) data;
2890 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2891 card->info.link_type =
2892 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2893 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2894 }
2895 card->options.adp.supported_funcs =
2896 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2897 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2898}
2899
2900struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2901 __u32 command, __u32 cmdlen)
2902{
2903 struct qeth_cmd_buffer *iob;
2904 struct qeth_ipa_cmd *cmd;
2905
2906 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2907 QETH_PROT_IPV4);
2908 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2909 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2910 cmd->data.setadapterparms.hdr.command_code = command;
2911 cmd->data.setadapterparms.hdr.used_total = 1;
2912 cmd->data.setadapterparms.hdr.seq_no = 1;
2913
2914 return iob;
2915}
2916EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2917
2918int qeth_query_setadapterparms(struct qeth_card *card)
2919{
2920 int rc;
2921 struct qeth_cmd_buffer *iob;
2922
2923 QETH_CARD_TEXT(card, 3, "queryadp");
2924 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2925 sizeof(struct qeth_ipacmd_setadpparms));
2926 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2927 return rc;
2928}
2929EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2930
2931static int qeth_query_ipassists_cb(struct qeth_card *card,
2932 struct qeth_reply *reply, unsigned long data)
2933{
2934 struct qeth_ipa_cmd *cmd;
2935
2936 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2937
2938 cmd = (struct qeth_ipa_cmd *) data;
2939 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2940 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2941 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2942 } else {
2943 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2944 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2945 }
2946 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2947 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);
2948 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);
2949 return 0;
2950}
2951
2952int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2953{
2954 int rc;
2955 struct qeth_cmd_buffer *iob;
2956
2957 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2958 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2959 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2960 return rc;
2961}
2962EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2963
2964static int qeth_query_setdiagass_cb(struct qeth_card *card,
2965 struct qeth_reply *reply, unsigned long data)
2966{
2967 struct qeth_ipa_cmd *cmd;
2968 __u16 rc;
2969
2970 cmd = (struct qeth_ipa_cmd *)data;
2971 rc = cmd->hdr.return_code;
2972 if (rc)
2973 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2974 else
2975 card->info.diagass_support = cmd->data.diagass.ext;
2976 return 0;
2977}
2978
2979static int qeth_query_setdiagass(struct qeth_card *card)
2980{
2981 struct qeth_cmd_buffer *iob;
2982 struct qeth_ipa_cmd *cmd;
2983
2984 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2985 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2986 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2987 cmd->data.diagass.subcmd_len = 16;
2988 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2989 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2990}
2991
2992static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2993{
2994 unsigned long info = get_zeroed_page(GFP_KERNEL);
2995 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2996 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2997 struct ccw_dev_id ccwid;
2998 int level, rc;
2999
3000 tid->chpid = card->info.chpid;
3001 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3002 tid->ssid = ccwid.ssid;
3003 tid->devno = ccwid.devno;
3004 if (!info)
3005 return;
3006
3007 rc = stsi(NULL, 0, 0, 0);
3008 if (rc == -ENOSYS)
3009 level = rc;
3010 else
3011 level = (((unsigned int) rc) >> 28);
3012
3013 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
3014 tid->lparnr = info222->lpar_number;
3015
3016 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
3017 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3018 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3019 }
3020 free_page(info);
3021 return;
3022}
3023
3024static int qeth_hw_trap_cb(struct qeth_card *card,
3025 struct qeth_reply *reply, unsigned long data)
3026{
3027 struct qeth_ipa_cmd *cmd;
3028 __u16 rc;
3029
3030 cmd = (struct qeth_ipa_cmd *)data;
3031 rc = cmd->hdr.return_code;
3032 if (rc)
3033 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3034 return 0;
3035}
3036
3037int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3038{
3039 struct qeth_cmd_buffer *iob;
3040 struct qeth_ipa_cmd *cmd;
3041
3042 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3043 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3044 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3045 cmd->data.diagass.subcmd_len = 80;
3046 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3047 cmd->data.diagass.type = 1;
3048 cmd->data.diagass.action = action;
3049 switch (action) {
3050 case QETH_DIAGS_TRAP_ARM:
3051 cmd->data.diagass.options = 0x0003;
3052 cmd->data.diagass.ext = 0x00010000 +
3053 sizeof(struct qeth_trap_id);
3054 qeth_get_trap_id(card,
3055 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3056 break;
3057 case QETH_DIAGS_TRAP_DISARM:
3058 cmd->data.diagass.options = 0x0001;
3059 break;
3060 case QETH_DIAGS_TRAP_CAPTURE:
3061 break;
3062 }
3063 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3064}
3065EXPORT_SYMBOL_GPL(qeth_hw_trap);
3066
3067int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3068 unsigned int qdio_error, const char *dbftext)
3069{
3070 if (qdio_error) {
3071 QETH_CARD_TEXT(card, 2, dbftext);
3072 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3073 buf->element[15].sflags);
3074 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3075 buf->element[14].sflags);
3076 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3077 if ((buf->element[15].sflags) == 0x12) {
3078 card->stats.rx_dropped++;
3079 return 0;
3080 } else
3081 return 1;
3082 }
3083 return 0;
3084}
3085EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3086
3087void qeth_buffer_reclaim_work(struct work_struct *work)
3088{
3089 struct qeth_card *card = container_of(work, struct qeth_card,
3090 buffer_reclaim_work.work);
3091
3092 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3093 qeth_queue_input_buffer(card, card->reclaim_index);
3094}
3095
3096void qeth_queue_input_buffer(struct qeth_card *card, int index)
3097{
3098 struct qeth_qdio_q *queue = card->qdio.in_q;
3099 struct list_head *lh;
3100 int count;
3101 int i;
3102 int rc;
3103 int newcount = 0;
3104
3105 count = (index < queue->next_buf_to_init)?
3106 card->qdio.in_buf_pool.buf_count -
3107 (queue->next_buf_to_init - index) :
3108 card->qdio.in_buf_pool.buf_count -
3109 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3110
3111 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3112 for (i = queue->next_buf_to_init;
3113 i < queue->next_buf_to_init + count; ++i) {
3114 if (qeth_init_input_buffer(card,
3115 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3116 break;
3117 } else {
3118 newcount++;
3119 }
3120 }
3121
3122 if (newcount < count) {
3123
3124
3125 atomic_set(&card->force_alloc_skb, 3);
3126 count = newcount;
3127 } else {
3128 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3129 }
3130
3131 if (!count) {
3132 i = 0;
3133 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3134 i++;
3135 if (i == card->qdio.in_buf_pool.buf_count) {
3136 QETH_CARD_TEXT(card, 2, "qsarbw");
3137 card->reclaim_index = index;
3138 schedule_delayed_work(
3139 &card->buffer_reclaim_work,
3140 QETH_RECLAIM_WORK_TIME);
3141 }
3142 return;
3143 }
3144
3145
3146
3147
3148
3149
3150
3151
3152 if (card->options.performance_stats) {
3153 card->perf_stats.inbound_do_qdio_cnt++;
3154 card->perf_stats.inbound_do_qdio_start_time =
3155 qeth_get_micros();
3156 }
3157 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3158 queue->next_buf_to_init, count);
3159 if (card->options.performance_stats)
3160 card->perf_stats.inbound_do_qdio_time +=
3161 qeth_get_micros() -
3162 card->perf_stats.inbound_do_qdio_start_time;
3163 if (rc) {
3164 QETH_CARD_TEXT(card, 2, "qinberr");
3165 }
3166 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3167 QDIO_MAX_BUFFERS_PER_Q;
3168 }
3169}
3170EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3171
3172static int qeth_handle_send_error(struct qeth_card *card,
3173 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3174{
3175 int sbalf15 = buffer->buffer->element[15].sflags;
3176
3177 QETH_CARD_TEXT(card, 6, "hdsnderr");
3178 if (card->info.type == QETH_CARD_TYPE_IQD) {
3179 if (sbalf15 == 0) {
3180 qdio_err = 0;
3181 } else {
3182 qdio_err = 1;
3183 }
3184 }
3185 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3186
3187 if (!qdio_err)
3188 return QETH_SEND_ERROR_NONE;
3189
3190 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3191 return QETH_SEND_ERROR_RETRY;
3192
3193 QETH_CARD_TEXT(card, 1, "lnkfail");
3194 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3195 (u16)qdio_err, (u8)sbalf15);
3196 return QETH_SEND_ERROR_LINK_FAILURE;
3197}
3198
3199
3200
3201
3202
3203static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3204{
3205 if (!queue->do_pack) {
3206 if (atomic_read(&queue->used_buffers)
3207 >= QETH_HIGH_WATERMARK_PACK){
3208
3209 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3210 if (queue->card->options.performance_stats)
3211 queue->card->perf_stats.sc_dp_p++;
3212 queue->do_pack = 1;
3213 }
3214 }
3215}
3216
3217
3218
3219
3220
3221
3222
3223static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3224{
3225 struct qeth_qdio_out_buffer *buffer;
3226 int flush_count = 0;
3227
3228 if (queue->do_pack) {
3229 if (atomic_read(&queue->used_buffers)
3230 <= QETH_LOW_WATERMARK_PACK) {
3231
3232 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3233 if (queue->card->options.performance_stats)
3234 queue->card->perf_stats.sc_p_dp++;
3235 queue->do_pack = 0;
3236
3237 buffer = queue->bufs[queue->next_buf_to_fill];
3238 if ((atomic_read(&buffer->state) ==
3239 QETH_QDIO_BUF_EMPTY) &&
3240 (buffer->next_element_to_fill > 0)) {
3241 atomic_set(&buffer->state,
3242 QETH_QDIO_BUF_PRIMED);
3243 flush_count++;
3244 queue->next_buf_to_fill =
3245 (queue->next_buf_to_fill + 1) %
3246 QDIO_MAX_BUFFERS_PER_Q;
3247 }
3248 }
3249 }
3250 return flush_count;
3251}
3252
3253
3254
3255
3256
3257
3258
3259static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3260{
3261 struct qeth_qdio_out_buffer *buffer;
3262
3263 buffer = queue->bufs[queue->next_buf_to_fill];
3264 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3265 (buffer->next_element_to_fill > 0)) {
3266
3267 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3268 queue->next_buf_to_fill =
3269 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3270 return 1;
3271 }
3272 return 0;
3273}
3274
3275static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3276 int count)
3277{
3278 struct qeth_qdio_out_buffer *buf;
3279 int rc;
3280 int i;
3281 unsigned int qdio_flags;
3282
3283 for (i = index; i < index + count; ++i) {
3284 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3285 buf = queue->bufs[bidx];
3286 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3287 SBAL_EFLAGS_LAST_ENTRY;
3288
3289 if (queue->bufstates)
3290 queue->bufstates[bidx].user = buf;
3291
3292 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3293 continue;
3294
3295 if (!queue->do_pack) {
3296 if ((atomic_read(&queue->used_buffers) >=
3297 (QETH_HIGH_WATERMARK_PACK -
3298 QETH_WATERMARK_PACK_FUZZ)) &&
3299 !atomic_read(&queue->set_pci_flags_count)) {
3300
3301
3302 atomic_inc(&queue->set_pci_flags_count);
3303 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3304 }
3305 } else {
3306 if (!atomic_read(&queue->set_pci_flags_count)) {
3307
3308
3309
3310
3311
3312
3313
3314
3315 atomic_inc(&queue->set_pci_flags_count);
3316 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3317 }
3318 }
3319 }
3320
3321 queue->card->dev->trans_start = jiffies;
3322 if (queue->card->options.performance_stats) {
3323 queue->card->perf_stats.outbound_do_qdio_cnt++;
3324 queue->card->perf_stats.outbound_do_qdio_start_time =
3325 qeth_get_micros();
3326 }
3327 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3328 if (atomic_read(&queue->set_pci_flags_count))
3329 qdio_flags |= QDIO_FLAG_PCI_OUT;
3330 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3331 queue->queue_no, index, count);
3332 if (queue->card->options.performance_stats)
3333 queue->card->perf_stats.outbound_do_qdio_time +=
3334 qeth_get_micros() -
3335 queue->card->perf_stats.outbound_do_qdio_start_time;
3336 atomic_add(count, &queue->used_buffers);
3337 if (rc) {
3338 queue->card->stats.tx_errors += count;
3339
3340 if (rc == -ENOBUFS)
3341 return;
3342 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3343 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3344 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3345 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3346 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3347
3348
3349
3350 qeth_schedule_recovery(queue->card);
3351 return;
3352 }
3353 if (queue->card->options.performance_stats)
3354 queue->card->perf_stats.bufs_sent += count;
3355}
3356
3357static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3358{
3359 int index;
3360 int flush_cnt = 0;
3361 int q_was_packing = 0;
3362
3363
3364
3365
3366
3367 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3368 !atomic_read(&queue->set_pci_flags_count)) {
3369 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3370 QETH_OUT_Q_UNLOCKED) {
3371
3372
3373
3374
3375
3376 netif_stop_queue(queue->card->dev);
3377 index = queue->next_buf_to_fill;
3378 q_was_packing = queue->do_pack;
3379
3380 barrier();
3381 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3382 if (!flush_cnt &&
3383 !atomic_read(&queue->set_pci_flags_count))
3384 flush_cnt +=
3385 qeth_flush_buffers_on_no_pci(queue);
3386 if (queue->card->options.performance_stats &&
3387 q_was_packing)
3388 queue->card->perf_stats.bufs_sent_pack +=
3389 flush_cnt;
3390 if (flush_cnt)
3391 qeth_flush_buffers(queue, index, flush_cnt);
3392 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3393 }
3394 }
3395}
3396
3397void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3398 unsigned long card_ptr)
3399{
3400 struct qeth_card *card = (struct qeth_card *)card_ptr;
3401
3402 if (card->dev && (card->dev->flags & IFF_UP))
3403 napi_schedule(&card->napi);
3404}
3405EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3406
3407int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3408{
3409 int rc;
3410
3411 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3412 rc = -1;
3413 goto out;
3414 } else {
3415 if (card->options.cq == cq) {
3416 rc = 0;
3417 goto out;
3418 }
3419
3420 if (card->state != CARD_STATE_DOWN &&
3421 card->state != CARD_STATE_RECOVER) {
3422 rc = -1;
3423 goto out;
3424 }
3425
3426 qeth_free_qdio_buffers(card);
3427 card->options.cq = cq;
3428 rc = 0;
3429 }
3430out:
3431 return rc;
3432
3433}
3434EXPORT_SYMBOL_GPL(qeth_configure_cq);
3435
3436
3437static void qeth_qdio_cq_handler(struct qeth_card *card,
3438 unsigned int qdio_err,
3439 unsigned int queue, int first_element, int count) {
3440 struct qeth_qdio_q *cq = card->qdio.c_q;
3441 int i;
3442 int rc;
3443
3444 if (!qeth_is_cq(card, queue))
3445 goto out;
3446
3447 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3448 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3449 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3450
3451 if (qdio_err) {
3452 netif_stop_queue(card->dev);
3453 qeth_schedule_recovery(card);
3454 goto out;
3455 }
3456
3457 if (card->options.performance_stats) {
3458 card->perf_stats.cq_cnt++;
3459 card->perf_stats.cq_start_time = qeth_get_micros();
3460 }
3461
3462 for (i = first_element; i < first_element + count; ++i) {
3463 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3464 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3465 int e;
3466
3467 e = 0;
3468 while (buffer->element[e].addr) {
3469 unsigned long phys_aob_addr;
3470
3471 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3472 qeth_qdio_handle_aob(card, phys_aob_addr);
3473 buffer->element[e].addr = NULL;
3474 buffer->element[e].eflags = 0;
3475 buffer->element[e].sflags = 0;
3476 buffer->element[e].length = 0;
3477
3478 ++e;
3479 }
3480
3481 buffer->element[15].eflags = 0;
3482 buffer->element[15].sflags = 0;
3483 }
3484 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3485 card->qdio.c_q->next_buf_to_init,
3486 count);
3487 if (rc) {
3488 dev_warn(&card->gdev->dev,
3489 "QDIO reported an error, rc=%i\n", rc);
3490 QETH_CARD_TEXT(card, 2, "qcqherr");
3491 }
3492 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3493 + count) % QDIO_MAX_BUFFERS_PER_Q;
3494
3495 netif_wake_queue(card->dev);
3496
3497 if (card->options.performance_stats) {
3498 int delta_t = qeth_get_micros();
3499 delta_t -= card->perf_stats.cq_start_time;
3500 card->perf_stats.cq_time += delta_t;
3501 }
3502out:
3503 return;
3504}
3505
3506void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3507 unsigned int queue, int first_elem, int count,
3508 unsigned long card_ptr)
3509{
3510 struct qeth_card *card = (struct qeth_card *)card_ptr;
3511
3512 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3513 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3514
3515 if (qeth_is_cq(card, queue))
3516 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3517 else if (qdio_err)
3518 qeth_schedule_recovery(card);
3519
3520
3521}
3522EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3523
3524void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3525 unsigned int qdio_error, int __queue, int first_element,
3526 int count, unsigned long card_ptr)
3527{
3528 struct qeth_card *card = (struct qeth_card *) card_ptr;
3529 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3530 struct qeth_qdio_out_buffer *buffer;
3531 int i;
3532
3533 QETH_CARD_TEXT(card, 6, "qdouhdl");
3534 if (qdio_error & QDIO_ERROR_FATAL) {
3535 QETH_CARD_TEXT(card, 2, "achkcond");
3536 netif_stop_queue(card->dev);
3537 qeth_schedule_recovery(card);
3538 return;
3539 }
3540 if (card->options.performance_stats) {
3541 card->perf_stats.outbound_handler_cnt++;
3542 card->perf_stats.outbound_handler_start_time =
3543 qeth_get_micros();
3544 }
3545 for (i = first_element; i < (first_element + count); ++i) {
3546 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3547 buffer = queue->bufs[bidx];
3548 qeth_handle_send_error(card, buffer, qdio_error);
3549
3550 if (queue->bufstates &&
3551 (queue->bufstates[bidx].flags &
3552 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3553 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3554
3555 if (atomic_cmpxchg(&buffer->state,
3556 QETH_QDIO_BUF_PRIMED,
3557 QETH_QDIO_BUF_PENDING) ==
3558 QETH_QDIO_BUF_PRIMED) {
3559 qeth_notify_skbs(queue, buffer,
3560 TX_NOTIFY_PENDING);
3561 }
3562 buffer->aob = queue->bufstates[bidx].aob;
3563 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3564 QETH_CARD_TEXT(queue->card, 5, "aob");
3565 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3566 virt_to_phys(buffer->aob));
3567 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
3568 if (qeth_init_qdio_out_buf(queue, bidx)) {
3569 QETH_CARD_TEXT(card, 2, "outofbuf");
3570 qeth_schedule_recovery(card);
3571 }
3572 } else {
3573 if (card->options.cq == QETH_CQ_ENABLED) {
3574 enum iucv_tx_notify n;
3575
3576 n = qeth_compute_cq_notification(
3577 buffer->buffer->element[15].sflags, 0);
3578 qeth_notify_skbs(queue, buffer, n);
3579 }
3580
3581 qeth_clear_output_buffer(queue, buffer,
3582 QETH_QDIO_BUF_EMPTY);
3583 }
3584 qeth_cleanup_handled_pending(queue, bidx, 0);
3585 }
3586 atomic_sub(count, &queue->used_buffers);
3587
3588 if (card->info.type != QETH_CARD_TYPE_IQD)
3589 qeth_check_outbound_queue(queue);
3590
3591 netif_wake_queue(queue->card->dev);
3592 if (card->options.performance_stats)
3593 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3594 card->perf_stats.outbound_handler_start_time;
3595}
3596EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3597
3598int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3599 int ipv, int cast_type)
3600{
3601 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3602 card->info.type == QETH_CARD_TYPE_OSX))
3603 return card->qdio.default_out_queue;
3604 switch (card->qdio.no_out_queues) {
3605 case 4:
3606 if (cast_type && card->info.is_multicast_different)
3607 return card->info.is_multicast_different &
3608 (card->qdio.no_out_queues - 1);
3609 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3610 const u8 tos = ip_hdr(skb)->tos;
3611
3612 if (card->qdio.do_prio_queueing ==
3613 QETH_PRIO_Q_ING_TOS) {
3614 if (tos & IP_TOS_NOTIMPORTANT)
3615 return 3;
3616 if (tos & IP_TOS_HIGHRELIABILITY)
3617 return 2;
3618 if (tos & IP_TOS_HIGHTHROUGHPUT)
3619 return 1;
3620 if (tos & IP_TOS_LOWDELAY)
3621 return 0;
3622 }
3623 if (card->qdio.do_prio_queueing ==
3624 QETH_PRIO_Q_ING_PREC)
3625 return 3 - (tos >> 6);
3626 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3627
3628 }
3629 return card->qdio.default_out_queue;
3630 case 1:
3631 default:
3632 return card->qdio.default_out_queue;
3633 }
3634}
3635EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3636
3637int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3638 struct sk_buff *skb, int elems)
3639{
3640 int dlen = skb->len - skb->data_len;
3641 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3642 PFN_DOWN((unsigned long)skb->data);
3643
3644 elements_needed += skb_shinfo(skb)->nr_frags;
3645 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3646 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3647 "(Number=%d / Length=%d). Discarded.\n",
3648 (elements_needed+elems), skb->len);
3649 return 0;
3650 }
3651 return elements_needed;
3652}
3653EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3654
3655int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3656{
3657 int hroom, inpage, rest;
3658
3659 if (((unsigned long)skb->data & PAGE_MASK) !=
3660 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3661 hroom = skb_headroom(skb);
3662 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3663 rest = len - inpage;
3664 if (rest > hroom)
3665 return 1;
3666 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3667 skb->data -= rest;
3668 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3669 }
3670 return 0;
3671}
3672EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3673
3674static inline void __qeth_fill_buffer(struct sk_buff *skb,
3675 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3676 int offset)
3677{
3678 int length = skb->len - skb->data_len;
3679 int length_here;
3680 int element;
3681 char *data;
3682 int first_lap, cnt;
3683 struct skb_frag_struct *frag;
3684
3685 element = *next_element_to_fill;
3686 data = skb->data;
3687 first_lap = (is_tso == 0 ? 1 : 0);
3688
3689 if (offset >= 0) {
3690 data = skb->data + offset;
3691 length -= offset;
3692 first_lap = 0;
3693 }
3694
3695 while (length > 0) {
3696
3697 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3698 if (length < length_here)
3699 length_here = length;
3700
3701 buffer->element[element].addr = data;
3702 buffer->element[element].length = length_here;
3703 length -= length_here;
3704 if (!length) {
3705 if (first_lap)
3706 if (skb_shinfo(skb)->nr_frags)
3707 buffer->element[element].eflags =
3708 SBAL_EFLAGS_FIRST_FRAG;
3709 else
3710 buffer->element[element].eflags = 0;
3711 else
3712 buffer->element[element].eflags =
3713 SBAL_EFLAGS_MIDDLE_FRAG;
3714 } else {
3715 if (first_lap)
3716 buffer->element[element].eflags =
3717 SBAL_EFLAGS_FIRST_FRAG;
3718 else
3719 buffer->element[element].eflags =
3720 SBAL_EFLAGS_MIDDLE_FRAG;
3721 }
3722 data += length_here;
3723 element++;
3724 first_lap = 0;
3725 }
3726
3727 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3728 frag = &skb_shinfo(skb)->frags[cnt];
3729 buffer->element[element].addr = (char *)
3730 page_to_phys(skb_frag_page(frag))
3731 + frag->page_offset;
3732 buffer->element[element].length = frag->size;
3733 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3734 element++;
3735 }
3736
3737 if (buffer->element[element - 1].eflags)
3738 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3739 *next_element_to_fill = element;
3740}
3741
3742static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3743 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3744 struct qeth_hdr *hdr, int offset, int hd_len)
3745{
3746 struct qdio_buffer *buffer;
3747 int flush_cnt = 0, hdr_len, large_send = 0;
3748
3749 buffer = buf->buffer;
3750 atomic_inc(&skb->users);
3751 skb_queue_tail(&buf->skb_list, skb);
3752
3753
3754 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3755 int element = buf->next_element_to_fill;
3756
3757 hdr_len = sizeof(struct qeth_hdr_tso) +
3758 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3759
3760 buffer->element[element].addr = skb->data;
3761 buffer->element[element].length = hdr_len;
3762 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3763 buf->next_element_to_fill++;
3764 skb->data += hdr_len;
3765 skb->len -= hdr_len;
3766 large_send = 1;
3767 }
3768
3769 if (offset >= 0) {
3770 int element = buf->next_element_to_fill;
3771 buffer->element[element].addr = hdr;
3772 buffer->element[element].length = sizeof(struct qeth_hdr) +
3773 hd_len;
3774 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3775 buf->is_header[element] = 1;
3776 buf->next_element_to_fill++;
3777 }
3778
3779 __qeth_fill_buffer(skb, buffer, large_send,
3780 (int *)&buf->next_element_to_fill, offset);
3781
3782 if (!queue->do_pack) {
3783 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3784
3785 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3786 flush_cnt = 1;
3787 } else {
3788 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3789 if (queue->card->options.performance_stats)
3790 queue->card->perf_stats.skbs_sent_pack++;
3791 if (buf->next_element_to_fill >=
3792 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3793
3794
3795
3796
3797 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3798 flush_cnt = 1;
3799 }
3800 }
3801 return flush_cnt;
3802}
3803
3804int qeth_do_send_packet_fast(struct qeth_card *card,
3805 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3806 struct qeth_hdr *hdr, int elements_needed,
3807 int offset, int hd_len)
3808{
3809 struct qeth_qdio_out_buffer *buffer;
3810 int index;
3811
3812
3813 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3814 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3815
3816 index = queue->next_buf_to_fill;
3817 buffer = queue->bufs[queue->next_buf_to_fill];
3818
3819
3820
3821
3822 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3823 goto out;
3824 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3825 QDIO_MAX_BUFFERS_PER_Q;
3826 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3827 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3828 qeth_flush_buffers(queue, index, 1);
3829 return 0;
3830out:
3831 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3832 return -EBUSY;
3833}
3834EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3835
3836int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3837 struct sk_buff *skb, struct qeth_hdr *hdr,
3838 int elements_needed)
3839{
3840 struct qeth_qdio_out_buffer *buffer;
3841 int start_index;
3842 int flush_count = 0;
3843 int do_pack = 0;
3844 int tmp;
3845 int rc = 0;
3846
3847
3848 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3849 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3850 start_index = queue->next_buf_to_fill;
3851 buffer = queue->bufs[queue->next_buf_to_fill];
3852
3853
3854
3855
3856 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3857 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3858 return -EBUSY;
3859 }
3860
3861 qeth_switch_to_packing_if_needed(queue);
3862 if (queue->do_pack) {
3863 do_pack = 1;
3864
3865 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3866 buffer->next_element_to_fill) < elements_needed) {
3867
3868 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3869 flush_count++;
3870 queue->next_buf_to_fill =
3871 (queue->next_buf_to_fill + 1) %
3872 QDIO_MAX_BUFFERS_PER_Q;
3873 buffer = queue->bufs[queue->next_buf_to_fill];
3874
3875
3876 if (atomic_read(&buffer->state) !=
3877 QETH_QDIO_BUF_EMPTY) {
3878 qeth_flush_buffers(queue, start_index,
3879 flush_count);
3880 atomic_set(&queue->state,
3881 QETH_OUT_Q_UNLOCKED);
3882 return -EBUSY;
3883 }
3884 }
3885 }
3886 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3887 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3888 QDIO_MAX_BUFFERS_PER_Q;
3889 flush_count += tmp;
3890 if (flush_count)
3891 qeth_flush_buffers(queue, start_index, flush_count);
3892 else if (!atomic_read(&queue->set_pci_flags_count))
3893 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3894
3895
3896
3897
3898
3899
3900 while (atomic_dec_return(&queue->state)) {
3901 flush_count = 0;
3902 start_index = queue->next_buf_to_fill;
3903
3904 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3905
3906
3907
3908
3909 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3910 flush_count += qeth_flush_buffers_on_no_pci(queue);
3911 if (flush_count)
3912 qeth_flush_buffers(queue, start_index, flush_count);
3913 }
3914
3915 if (queue->card->options.performance_stats && do_pack)
3916 queue->card->perf_stats.bufs_sent_pack += flush_count;
3917
3918 return rc;
3919}
3920EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3921
3922static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3923 struct qeth_reply *reply, unsigned long data)
3924{
3925 struct qeth_ipa_cmd *cmd;
3926 struct qeth_ipacmd_setadpparms *setparms;
3927
3928 QETH_CARD_TEXT(card, 4, "prmadpcb");
3929
3930 cmd = (struct qeth_ipa_cmd *) data;
3931 setparms = &(cmd->data.setadapterparms);
3932
3933 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3934 if (cmd->hdr.return_code) {
3935 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3936 setparms->data.mode = SET_PROMISC_MODE_OFF;
3937 }
3938 card->info.promisc_mode = setparms->data.mode;
3939 return 0;
3940}
3941
3942void qeth_setadp_promisc_mode(struct qeth_card *card)
3943{
3944 enum qeth_ipa_promisc_modes mode;
3945 struct net_device *dev = card->dev;
3946 struct qeth_cmd_buffer *iob;
3947 struct qeth_ipa_cmd *cmd;
3948
3949 QETH_CARD_TEXT(card, 4, "setprom");
3950
3951 if (((dev->flags & IFF_PROMISC) &&
3952 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3953 (!(dev->flags & IFF_PROMISC) &&
3954 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3955 return;
3956 mode = SET_PROMISC_MODE_OFF;
3957 if (dev->flags & IFF_PROMISC)
3958 mode = SET_PROMISC_MODE_ON;
3959 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3960
3961 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3962 sizeof(struct qeth_ipacmd_setadpparms));
3963 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3964 cmd->data.setadapterparms.data.mode = mode;
3965 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3966}
3967EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3968
3969int qeth_change_mtu(struct net_device *dev, int new_mtu)
3970{
3971 struct qeth_card *card;
3972 char dbf_text[15];
3973
3974 card = dev->ml_priv;
3975
3976 QETH_CARD_TEXT(card, 4, "chgmtu");
3977 sprintf(dbf_text, "%8x", new_mtu);
3978 QETH_CARD_TEXT(card, 4, dbf_text);
3979
3980 if (new_mtu < 64)
3981 return -EINVAL;
3982 if (new_mtu > 65535)
3983 return -EINVAL;
3984 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3985 (!qeth_mtu_is_valid(card, new_mtu)))
3986 return -EINVAL;
3987 dev->mtu = new_mtu;
3988 return 0;
3989}
3990EXPORT_SYMBOL_GPL(qeth_change_mtu);
3991
3992struct net_device_stats *qeth_get_stats(struct net_device *dev)
3993{
3994 struct qeth_card *card;
3995
3996 card = dev->ml_priv;
3997
3998 QETH_CARD_TEXT(card, 5, "getstat");
3999
4000 return &card->stats;
4001}
4002EXPORT_SYMBOL_GPL(qeth_get_stats);
4003
4004static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4005 struct qeth_reply *reply, unsigned long data)
4006{
4007 struct qeth_ipa_cmd *cmd;
4008
4009 QETH_CARD_TEXT(card, 4, "chgmaccb");
4010
4011 cmd = (struct qeth_ipa_cmd *) data;
4012 if (!card->options.layer2 ||
4013 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4014 memcpy(card->dev->dev_addr,
4015 &cmd->data.setadapterparms.data.change_addr.addr,
4016 OSA_ADDR_LEN);
4017 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4018 }
4019 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4020 return 0;
4021}
4022
4023int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4024{
4025 int rc;
4026 struct qeth_cmd_buffer *iob;
4027 struct qeth_ipa_cmd *cmd;
4028
4029 QETH_CARD_TEXT(card, 4, "chgmac");
4030
4031 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4032 sizeof(struct qeth_ipacmd_setadpparms));
4033 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4034 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4035 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4036 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4037 card->dev->dev_addr, OSA_ADDR_LEN);
4038 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4039 NULL);
4040 return rc;
4041}
4042EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4043
4044static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4045 struct qeth_reply *reply, unsigned long data)
4046{
4047 struct qeth_ipa_cmd *cmd;
4048 struct qeth_set_access_ctrl *access_ctrl_req;
4049
4050 QETH_CARD_TEXT(card, 4, "setaccb");
4051
4052 cmd = (struct qeth_ipa_cmd *) data;
4053 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4054 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4055 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4056 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4057 cmd->data.setadapterparms.hdr.return_code);
4058 switch (cmd->data.setadapterparms.hdr.return_code) {
4059 case SET_ACCESS_CTRL_RC_SUCCESS:
4060 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4061 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4062 {
4063 card->options.isolation = access_ctrl_req->subcmd_code;
4064 if (card->options.isolation == ISOLATION_MODE_NONE) {
4065 dev_info(&card->gdev->dev,
4066 "QDIO data connection isolation is deactivated\n");
4067 } else {
4068 dev_info(&card->gdev->dev,
4069 "QDIO data connection isolation is activated\n");
4070 }
4071 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4072 card->gdev->dev.kobj.name,
4073 access_ctrl_req->subcmd_code,
4074 cmd->data.setadapterparms.hdr.return_code);
4075 break;
4076 }
4077 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4078 {
4079 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4080 card->gdev->dev.kobj.name,
4081 access_ctrl_req->subcmd_code,
4082 cmd->data.setadapterparms.hdr.return_code);
4083 dev_err(&card->gdev->dev, "Adapter does not "
4084 "support QDIO data connection isolation\n");
4085
4086
4087 card->options.isolation = ISOLATION_MODE_NONE;
4088 break;
4089 }
4090 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4091 {
4092 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4093 card->gdev->dev.kobj.name,
4094 access_ctrl_req->subcmd_code,
4095 cmd->data.setadapterparms.hdr.return_code);
4096 dev_err(&card->gdev->dev,
4097 "Adapter is dedicated. "
4098 "QDIO data connection isolation not supported\n");
4099
4100
4101 card->options.isolation = ISOLATION_MODE_NONE;
4102 break;
4103 }
4104 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4105 {
4106 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4107 card->gdev->dev.kobj.name,
4108 access_ctrl_req->subcmd_code,
4109 cmd->data.setadapterparms.hdr.return_code);
4110 dev_err(&card->gdev->dev,
4111 "TSO does not permit QDIO data connection isolation\n");
4112
4113
4114 card->options.isolation = ISOLATION_MODE_NONE;
4115 break;
4116 }
4117 default:
4118 {
4119
4120 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4121 "==UNKNOWN\n",
4122 card->gdev->dev.kobj.name,
4123 access_ctrl_req->subcmd_code,
4124 cmd->data.setadapterparms.hdr.return_code);
4125
4126
4127 card->options.isolation = ISOLATION_MODE_NONE;
4128 break;
4129 }
4130 }
4131 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4132 return 0;
4133}
4134
4135static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4136 enum qeth_ipa_isolation_modes isolation)
4137{
4138 int rc;
4139 struct qeth_cmd_buffer *iob;
4140 struct qeth_ipa_cmd *cmd;
4141 struct qeth_set_access_ctrl *access_ctrl_req;
4142
4143 QETH_CARD_TEXT(card, 4, "setacctl");
4144
4145 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4146 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4147
4148 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4149 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4150 sizeof(struct qeth_set_access_ctrl));
4151 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4152 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4153 access_ctrl_req->subcmd_code = isolation;
4154
4155 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4156 NULL);
4157 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4158 return rc;
4159}
4160
4161int qeth_set_access_ctrl_online(struct qeth_card *card)
4162{
4163 int rc = 0;
4164
4165 QETH_CARD_TEXT(card, 4, "setactlo");
4166
4167 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4168 card->info.type == QETH_CARD_TYPE_OSX) &&
4169 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4170 rc = qeth_setadpparms_set_access_ctrl(card,
4171 card->options.isolation);
4172 if (rc) {
4173 QETH_DBF_MESSAGE(3,
4174 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4175 card->gdev->dev.kobj.name,
4176 rc);
4177 }
4178 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4179 card->options.isolation = ISOLATION_MODE_NONE;
4180
4181 dev_err(&card->gdev->dev, "Adapter does not "
4182 "support QDIO data connection isolation\n");
4183 rc = -EOPNOTSUPP;
4184 }
4185 return rc;
4186}
4187EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4188
4189void qeth_tx_timeout(struct net_device *dev)
4190{
4191 struct qeth_card *card;
4192
4193 card = dev->ml_priv;
4194 QETH_CARD_TEXT(card, 4, "txtimeo");
4195 card->stats.tx_errors++;
4196 qeth_schedule_recovery(card);
4197}
4198EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4199
4200int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4201{
4202 struct qeth_card *card = dev->ml_priv;
4203 int rc = 0;
4204
4205 switch (regnum) {
4206 case MII_BMCR:
4207 rc = BMCR_FULLDPLX;
4208 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4209 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4210 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4211 rc |= BMCR_SPEED100;
4212 break;
4213 case MII_BMSR:
4214 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4215 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4216 BMSR_100BASE4;
4217 break;
4218 case MII_PHYSID1:
4219 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4220 dev->dev_addr[2];
4221 rc = (rc >> 5) & 0xFFFF;
4222 break;
4223 case MII_PHYSID2:
4224 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4225 break;
4226 case MII_ADVERTISE:
4227 rc = ADVERTISE_ALL;
4228 break;
4229 case MII_LPA:
4230 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4231 LPA_100BASE4 | LPA_LPACK;
4232 break;
4233 case MII_EXPANSION:
4234 break;
4235 case MII_DCOUNTER:
4236 break;
4237 case MII_FCSCOUNTER:
4238 break;
4239 case MII_NWAYTEST:
4240 break;
4241 case MII_RERRCOUNTER:
4242 rc = card->stats.rx_errors;
4243 break;
4244 case MII_SREVISION:
4245 break;
4246 case MII_RESV1:
4247 break;
4248 case MII_LBRERROR:
4249 break;
4250 case MII_PHYADDR:
4251 break;
4252 case MII_RESV2:
4253 break;
4254 case MII_TPISTATUS:
4255 break;
4256 case MII_NCONFIG:
4257 break;
4258 default:
4259 break;
4260 }
4261 return rc;
4262}
4263EXPORT_SYMBOL_GPL(qeth_mdio_read);
4264
4265static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4266 struct qeth_cmd_buffer *iob, int len,
4267 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4268 unsigned long),
4269 void *reply_param)
4270{
4271 u16 s1, s2;
4272
4273 QETH_CARD_TEXT(card, 4, "sendsnmp");
4274
4275 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4276 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4277 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4278
4279 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4280 s2 = (u32) len;
4281 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4282 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4283 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4284 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4285 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4286 reply_cb, reply_param);
4287}
4288
4289static int qeth_snmp_command_cb(struct qeth_card *card,
4290 struct qeth_reply *reply, unsigned long sdata)
4291{
4292 struct qeth_ipa_cmd *cmd;
4293 struct qeth_arp_query_info *qinfo;
4294 struct qeth_snmp_cmd *snmp;
4295 unsigned char *data;
4296 __u16 data_len;
4297
4298 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4299
4300 cmd = (struct qeth_ipa_cmd *) sdata;
4301 data = (unsigned char *)((char *)cmd - reply->offset);
4302 qinfo = (struct qeth_arp_query_info *) reply->param;
4303 snmp = &cmd->data.setadapterparms.data.snmp;
4304
4305 if (cmd->hdr.return_code) {
4306 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4307 return 0;
4308 }
4309 if (cmd->data.setadapterparms.hdr.return_code) {
4310 cmd->hdr.return_code =
4311 cmd->data.setadapterparms.hdr.return_code;
4312 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4313 return 0;
4314 }
4315 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4316 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4317 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4318 else
4319 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4320
4321
4322 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4323 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4324 cmd->hdr.return_code = IPA_RC_ENOMEM;
4325 return 0;
4326 }
4327 QETH_CARD_TEXT_(card, 4, "snore%i",
4328 cmd->data.setadapterparms.hdr.used_total);
4329 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4330 cmd->data.setadapterparms.hdr.seq_no);
4331
4332 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4333 memcpy(qinfo->udata + qinfo->udata_offset,
4334 (char *)snmp,
4335 data_len + offsetof(struct qeth_snmp_cmd, data));
4336 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4337 } else {
4338 memcpy(qinfo->udata + qinfo->udata_offset,
4339 (char *)&snmp->request, data_len);
4340 }
4341 qinfo->udata_offset += data_len;
4342
4343 QETH_CARD_TEXT_(card, 4, "srtot%i",
4344 cmd->data.setadapterparms.hdr.used_total);
4345 QETH_CARD_TEXT_(card, 4, "srseq%i",
4346 cmd->data.setadapterparms.hdr.seq_no);
4347 if (cmd->data.setadapterparms.hdr.seq_no <
4348 cmd->data.setadapterparms.hdr.used_total)
4349 return 1;
4350 return 0;
4351}
4352
4353int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4354{
4355 struct qeth_cmd_buffer *iob;
4356 struct qeth_ipa_cmd *cmd;
4357 struct qeth_snmp_ureq *ureq;
4358 int req_len;
4359 struct qeth_arp_query_info qinfo = {0, };
4360 int rc = 0;
4361
4362 QETH_CARD_TEXT(card, 3, "snmpcmd");
4363
4364 if (card->info.guestlan)
4365 return -EOPNOTSUPP;
4366
4367 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4368 (!card->options.layer2)) {
4369 return -EOPNOTSUPP;
4370 }
4371
4372 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4373 return -EFAULT;
4374 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4375 if (IS_ERR(ureq)) {
4376 QETH_CARD_TEXT(card, 2, "snmpnome");
4377 return PTR_ERR(ureq);
4378 }
4379 qinfo.udata_len = ureq->hdr.data_len;
4380 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4381 if (!qinfo.udata) {
4382 kfree(ureq);
4383 return -ENOMEM;
4384 }
4385 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4386
4387 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4388 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4389 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4390 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4391 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4392 qeth_snmp_command_cb, (void *)&qinfo);
4393 if (rc)
4394 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4395 QETH_CARD_IFNAME(card), rc);
4396 else {
4397 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4398 rc = -EFAULT;
4399 }
4400
4401 kfree(ureq);
4402 kfree(qinfo.udata);
4403 return rc;
4404}
4405EXPORT_SYMBOL_GPL(qeth_snmp_command);
4406
4407static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4408 struct qeth_reply *reply, unsigned long data)
4409{
4410 struct qeth_ipa_cmd *cmd;
4411 struct qeth_qoat_priv *priv;
4412 char *resdata;
4413 int resdatalen;
4414
4415 QETH_CARD_TEXT(card, 3, "qoatcb");
4416
4417 cmd = (struct qeth_ipa_cmd *)data;
4418 priv = (struct qeth_qoat_priv *)reply->param;
4419 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4420 resdata = (char *)data + 28;
4421
4422 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4423 cmd->hdr.return_code = IPA_RC_FFFF;
4424 return 0;
4425 }
4426
4427 memcpy((priv->buffer + priv->response_len), resdata,
4428 resdatalen);
4429 priv->response_len += resdatalen;
4430
4431 if (cmd->data.setadapterparms.hdr.seq_no <
4432 cmd->data.setadapterparms.hdr.used_total)
4433 return 1;
4434 return 0;
4435}
4436
4437int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4438{
4439 int rc = 0;
4440 struct qeth_cmd_buffer *iob;
4441 struct qeth_ipa_cmd *cmd;
4442 struct qeth_query_oat *oat_req;
4443 struct qeth_query_oat_data oat_data;
4444 struct qeth_qoat_priv priv;
4445 void __user *tmp;
4446
4447 QETH_CARD_TEXT(card, 3, "qoatcmd");
4448
4449 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4450 rc = -EOPNOTSUPP;
4451 goto out;
4452 }
4453
4454 if (copy_from_user(&oat_data, udata,
4455 sizeof(struct qeth_query_oat_data))) {
4456 rc = -EFAULT;
4457 goto out;
4458 }
4459
4460 priv.buffer_len = oat_data.buffer_len;
4461 priv.response_len = 0;
4462 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4463 if (!priv.buffer) {
4464 rc = -ENOMEM;
4465 goto out;
4466 }
4467
4468 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4469 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4470 sizeof(struct qeth_query_oat));
4471 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4472 oat_req = &cmd->data.setadapterparms.data.query_oat;
4473 oat_req->subcmd_code = oat_data.command;
4474
4475 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4476 &priv);
4477 if (!rc) {
4478 if (is_compat_task())
4479 tmp = compat_ptr(oat_data.ptr);
4480 else
4481 tmp = (void __user *)(unsigned long)oat_data.ptr;
4482
4483 if (copy_to_user(tmp, priv.buffer,
4484 priv.response_len)) {
4485 rc = -EFAULT;
4486 goto out_free;
4487 }
4488
4489 oat_data.response_len = priv.response_len;
4490
4491 if (copy_to_user(udata, &oat_data,
4492 sizeof(struct qeth_query_oat_data)))
4493 rc = -EFAULT;
4494 } else
4495 if (rc == IPA_RC_FFFF)
4496 rc = -EFAULT;
4497
4498out_free:
4499 kfree(priv.buffer);
4500out:
4501 return rc;
4502}
4503EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4504
4505static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4506{
4507 switch (card->info.type) {
4508 case QETH_CARD_TYPE_IQD:
4509 return 2;
4510 default:
4511 return 0;
4512 }
4513}
4514
4515static void qeth_determine_capabilities(struct qeth_card *card)
4516{
4517 int rc;
4518 int length;
4519 char *prcd;
4520 struct ccw_device *ddev;
4521 int ddev_offline = 0;
4522
4523 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4524 ddev = CARD_DDEV(card);
4525 if (!ddev->online) {
4526 ddev_offline = 1;
4527 rc = ccw_device_set_online(ddev);
4528 if (rc) {
4529 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4530 goto out;
4531 }
4532 }
4533
4534 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4535 if (rc) {
4536 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4537 dev_name(&card->gdev->dev), rc);
4538 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4539 goto out_offline;
4540 }
4541 qeth_configure_unitaddr(card, prcd);
4542 if (ddev_offline)
4543 qeth_configure_blkt_default(card, prcd);
4544 kfree(prcd);
4545
4546 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4547 if (rc)
4548 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4549
4550 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4551 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4552 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4553 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4554 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4555 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4556 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4557 dev_info(&card->gdev->dev,
4558 "Completion Queueing supported\n");
4559 } else {
4560 card->options.cq = QETH_CQ_NOTAVAILABLE;
4561 }
4562
4563
4564out_offline:
4565 if (ddev_offline == 1)
4566 ccw_device_set_offline(ddev);
4567out:
4568 return;
4569}
4570
4571static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4572 struct qdio_buffer **in_sbal_ptrs,
4573 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4574 int i;
4575
4576 if (card->options.cq == QETH_CQ_ENABLED) {
4577 int offset = QDIO_MAX_BUFFERS_PER_Q *
4578 (card->qdio.no_in_queues - 1);
4579 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4580 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4581 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4582 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4583 }
4584
4585 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4586 }
4587}
4588
4589static int qeth_qdio_establish(struct qeth_card *card)
4590{
4591 struct qdio_initialize init_data;
4592 char *qib_param_field;
4593 struct qdio_buffer **in_sbal_ptrs;
4594 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4595 struct qdio_buffer **out_sbal_ptrs;
4596 int i, j, k;
4597 int rc = 0;
4598
4599 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4600
4601 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4602 GFP_KERNEL);
4603 if (!qib_param_field) {
4604 rc = -ENOMEM;
4605 goto out_free_nothing;
4606 }
4607
4608 qeth_create_qib_param_field(card, qib_param_field);
4609 qeth_create_qib_param_field_blkt(card, qib_param_field);
4610
4611 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4612 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4613 GFP_KERNEL);
4614 if (!in_sbal_ptrs) {
4615 rc = -ENOMEM;
4616 goto out_free_qib_param;
4617 }
4618 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4619 in_sbal_ptrs[i] = (struct qdio_buffer *)
4620 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4621 }
4622
4623 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4624 GFP_KERNEL);
4625 if (!queue_start_poll) {
4626 rc = -ENOMEM;
4627 goto out_free_in_sbals;
4628 }
4629 for (i = 0; i < card->qdio.no_in_queues; ++i)
4630 queue_start_poll[i] = card->discipline->start_poll;
4631
4632 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4633
4634 out_sbal_ptrs =
4635 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4636 sizeof(void *), GFP_KERNEL);
4637 if (!out_sbal_ptrs) {
4638 rc = -ENOMEM;
4639 goto out_free_queue_start_poll;
4640 }
4641 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4642 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4643 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4644 card->qdio.out_qs[i]->bufs[j]->buffer);
4645 }
4646
4647 memset(&init_data, 0, sizeof(struct qdio_initialize));
4648 init_data.cdev = CARD_DDEV(card);
4649 init_data.q_format = qeth_get_qdio_q_format(card);
4650 init_data.qib_param_field_format = 0;
4651 init_data.qib_param_field = qib_param_field;
4652 init_data.no_input_qs = card->qdio.no_in_queues;
4653 init_data.no_output_qs = card->qdio.no_out_queues;
4654 init_data.input_handler = card->discipline->input_handler;
4655 init_data.output_handler = card->discipline->output_handler;
4656 init_data.queue_start_poll_array = queue_start_poll;
4657 init_data.int_parm = (unsigned long) card;
4658 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4659 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4660 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4661 init_data.scan_threshold =
4662 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4663
4664 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4665 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4666 rc = qdio_allocate(&init_data);
4667 if (rc) {
4668 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4669 goto out;
4670 }
4671 rc = qdio_establish(&init_data);
4672 if (rc) {
4673 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4674 qdio_free(CARD_DDEV(card));
4675 }
4676 }
4677
4678 switch (card->options.cq) {
4679 case QETH_CQ_ENABLED:
4680 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4681 break;
4682 case QETH_CQ_DISABLED:
4683 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4684 break;
4685 default:
4686 break;
4687 }
4688out:
4689 kfree(out_sbal_ptrs);
4690out_free_queue_start_poll:
4691 kfree(queue_start_poll);
4692out_free_in_sbals:
4693 kfree(in_sbal_ptrs);
4694out_free_qib_param:
4695 kfree(qib_param_field);
4696out_free_nothing:
4697 return rc;
4698}
4699
4700static void qeth_core_free_card(struct qeth_card *card)
4701{
4702
4703 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4704 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4705 qeth_clean_channel(&card->read);
4706 qeth_clean_channel(&card->write);
4707 if (card->dev)
4708 free_netdev(card->dev);
4709 kfree(card->ip_tbd_list);
4710 qeth_free_qdio_buffers(card);
4711 unregister_service_level(&card->qeth_service_level);
4712 kfree(card);
4713}
4714
4715static struct ccw_device_id qeth_ids[] = {
4716 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4717 .driver_info = QETH_CARD_TYPE_OSD},
4718 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4719 .driver_info = QETH_CARD_TYPE_IQD},
4720 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4721 .driver_info = QETH_CARD_TYPE_OSN},
4722 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4723 .driver_info = QETH_CARD_TYPE_OSM},
4724 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4725 .driver_info = QETH_CARD_TYPE_OSX},
4726 {},
4727};
4728MODULE_DEVICE_TABLE(ccw, qeth_ids);
4729
4730static struct ccw_driver qeth_ccw_driver = {
4731 .driver = {
4732 .owner = THIS_MODULE,
4733 .name = "qeth",
4734 },
4735 .ids = qeth_ids,
4736 .probe = ccwgroup_probe_ccwdev,
4737 .remove = ccwgroup_remove_ccwdev,
4738};
4739
4740int qeth_core_hardsetup_card(struct qeth_card *card)
4741{
4742 int retries = 0;
4743 int rc;
4744
4745 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4746 atomic_set(&card->force_alloc_skb, 0);
4747 qeth_get_channel_path_desc(card);
4748retry:
4749 if (retries)
4750 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4751 dev_name(&card->gdev->dev));
4752 ccw_device_set_offline(CARD_DDEV(card));
4753 ccw_device_set_offline(CARD_WDEV(card));
4754 ccw_device_set_offline(CARD_RDEV(card));
4755 rc = ccw_device_set_online(CARD_RDEV(card));
4756 if (rc)
4757 goto retriable;
4758 rc = ccw_device_set_online(CARD_WDEV(card));
4759 if (rc)
4760 goto retriable;
4761 rc = ccw_device_set_online(CARD_DDEV(card));
4762 if (rc)
4763 goto retriable;
4764 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4765retriable:
4766 if (rc == -ERESTARTSYS) {
4767 QETH_DBF_TEXT(SETUP, 2, "break1");
4768 return rc;
4769 } else if (rc) {
4770 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4771 if (++retries > 3)
4772 goto out;
4773 else
4774 goto retry;
4775 }
4776 qeth_determine_capabilities(card);
4777 qeth_init_tokens(card);
4778 qeth_init_func_level(card);
4779 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4780 if (rc == -ERESTARTSYS) {
4781 QETH_DBF_TEXT(SETUP, 2, "break2");
4782 return rc;
4783 } else if (rc) {
4784 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4785 if (--retries < 0)
4786 goto out;
4787 else
4788 goto retry;
4789 }
4790 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4791 if (rc == -ERESTARTSYS) {
4792 QETH_DBF_TEXT(SETUP, 2, "break3");
4793 return rc;
4794 } else if (rc) {
4795 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4796 if (--retries < 0)
4797 goto out;
4798 else
4799 goto retry;
4800 }
4801 card->read_or_write_problem = 0;
4802 rc = qeth_mpc_initialize(card);
4803 if (rc) {
4804 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4805 goto out;
4806 }
4807
4808 card->options.ipa4.supported_funcs = 0;
4809 card->options.adp.supported_funcs = 0;
4810 card->info.diagass_support = 0;
4811 qeth_query_ipassists(card, QETH_PROT_IPV4);
4812 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4813 qeth_query_setadapterparms(card);
4814 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4815 qeth_query_setdiagass(card);
4816 return 0;
4817out:
4818 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4819 "an error on the device\n");
4820 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4821 dev_name(&card->gdev->dev), rc);
4822 return rc;
4823}
4824EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4825
4826static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4827 struct qdio_buffer_element *element,
4828 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4829{
4830 struct page *page = virt_to_page(element->addr);
4831 if (*pskb == NULL) {
4832 if (qethbuffer->rx_skb) {
4833
4834 *pskb = qethbuffer->rx_skb;
4835 qethbuffer->rx_skb = NULL;
4836 } else {
4837 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4838 if (!(*pskb))
4839 return -ENOMEM;
4840 }
4841
4842 skb_reserve(*pskb, ETH_HLEN);
4843 if (data_len <= QETH_RX_PULL_LEN) {
4844 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4845 data_len);
4846 } else {
4847 get_page(page);
4848 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4849 element->addr + offset, QETH_RX_PULL_LEN);
4850 skb_fill_page_desc(*pskb, *pfrag, page,
4851 offset + QETH_RX_PULL_LEN,
4852 data_len - QETH_RX_PULL_LEN);
4853 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4854 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4855 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4856 (*pfrag)++;
4857 }
4858 } else {
4859 get_page(page);
4860 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4861 (*pskb)->data_len += data_len;
4862 (*pskb)->len += data_len;
4863 (*pskb)->truesize += data_len;
4864 (*pfrag)++;
4865 }
4866
4867
4868 return 0;
4869}
4870
4871struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4872 struct qeth_qdio_buffer *qethbuffer,
4873 struct qdio_buffer_element **__element, int *__offset,
4874 struct qeth_hdr **hdr)
4875{
4876 struct qdio_buffer_element *element = *__element;
4877 struct qdio_buffer *buffer = qethbuffer->buffer;
4878 int offset = *__offset;
4879 struct sk_buff *skb = NULL;
4880 int skb_len = 0;
4881 void *data_ptr;
4882 int data_len;
4883 int headroom = 0;
4884 int use_rx_sg = 0;
4885 int frag = 0;
4886
4887
4888 if (element->length < offset + sizeof(struct qeth_hdr)) {
4889 if (qeth_is_last_sbale(element))
4890 return NULL;
4891 element++;
4892 offset = 0;
4893 if (element->length < sizeof(struct qeth_hdr))
4894 return NULL;
4895 }
4896 *hdr = element->addr + offset;
4897
4898 offset += sizeof(struct qeth_hdr);
4899 switch ((*hdr)->hdr.l2.id) {
4900 case QETH_HEADER_TYPE_LAYER2:
4901 skb_len = (*hdr)->hdr.l2.pkt_length;
4902 break;
4903 case QETH_HEADER_TYPE_LAYER3:
4904 skb_len = (*hdr)->hdr.l3.length;
4905 headroom = ETH_HLEN;
4906 break;
4907 case QETH_HEADER_TYPE_OSN:
4908 skb_len = (*hdr)->hdr.osn.pdu_length;
4909 headroom = sizeof(struct qeth_hdr);
4910 break;
4911 default:
4912 break;
4913 }
4914
4915 if (!skb_len)
4916 return NULL;
4917
4918 if (((skb_len >= card->options.rx_sg_cb) &&
4919 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4920 (!atomic_read(&card->force_alloc_skb))) ||
4921 (card->options.cq == QETH_CQ_ENABLED)) {
4922 use_rx_sg = 1;
4923 } else {
4924 skb = dev_alloc_skb(skb_len + headroom);
4925 if (!skb)
4926 goto no_mem;
4927 if (headroom)
4928 skb_reserve(skb, headroom);
4929 }
4930
4931 data_ptr = element->addr + offset;
4932 while (skb_len) {
4933 data_len = min(skb_len, (int)(element->length - offset));
4934 if (data_len) {
4935 if (use_rx_sg) {
4936 if (qeth_create_skb_frag(qethbuffer, element,
4937 &skb, offset, &frag, data_len))
4938 goto no_mem;
4939 } else {
4940 memcpy(skb_put(skb, data_len), data_ptr,
4941 data_len);
4942 }
4943 }
4944 skb_len -= data_len;
4945 if (skb_len) {
4946 if (qeth_is_last_sbale(element)) {
4947 QETH_CARD_TEXT(card, 4, "unexeob");
4948 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4949 dev_kfree_skb_any(skb);
4950 card->stats.rx_errors++;
4951 return NULL;
4952 }
4953 element++;
4954 offset = 0;
4955 data_ptr = element->addr;
4956 } else {
4957 offset += data_len;
4958 }
4959 }
4960 *__element = element;
4961 *__offset = offset;
4962 if (use_rx_sg && card->options.performance_stats) {
4963 card->perf_stats.sg_skbs_rx++;
4964 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4965 }
4966 return skb;
4967no_mem:
4968 if (net_ratelimit()) {
4969 QETH_CARD_TEXT(card, 2, "noskbmem");
4970 }
4971 card->stats.rx_dropped++;
4972 return NULL;
4973}
4974EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4975
4976static void qeth_unregister_dbf_views(void)
4977{
4978 int x;
4979 for (x = 0; x < QETH_DBF_INFOS; x++) {
4980 debug_unregister(qeth_dbf[x].id);
4981 qeth_dbf[x].id = NULL;
4982 }
4983}
4984
4985void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4986{
4987 char dbf_txt_buf[32];
4988 va_list args;
4989
4990 if (level > id->level)
4991 return;
4992 va_start(args, fmt);
4993 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4994 va_end(args);
4995 debug_text_event(id, level, dbf_txt_buf);
4996}
4997EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4998
4999static int qeth_register_dbf_views(void)
5000{
5001 int ret;
5002 int x;
5003
5004 for (x = 0; x < QETH_DBF_INFOS; x++) {
5005
5006 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5007 qeth_dbf[x].pages,
5008 qeth_dbf[x].areas,
5009 qeth_dbf[x].len);
5010 if (qeth_dbf[x].id == NULL) {
5011 qeth_unregister_dbf_views();
5012 return -ENOMEM;
5013 }
5014
5015
5016 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5017 if (ret) {
5018 qeth_unregister_dbf_views();
5019 return ret;
5020 }
5021
5022
5023 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5024 }
5025
5026 return 0;
5027}
5028
5029int qeth_core_load_discipline(struct qeth_card *card,
5030 enum qeth_discipline_id discipline)
5031{
5032 int rc = 0;
5033 mutex_lock(&qeth_mod_mutex);
5034 switch (discipline) {
5035 case QETH_DISCIPLINE_LAYER3:
5036 card->discipline = try_then_request_module(
5037 symbol_get(qeth_l3_discipline), "qeth_l3");
5038 break;
5039 case QETH_DISCIPLINE_LAYER2:
5040 card->discipline = try_then_request_module(
5041 symbol_get(qeth_l2_discipline), "qeth_l2");
5042 break;
5043 }
5044 if (!card->discipline) {
5045 dev_err(&card->gdev->dev, "There is no kernel module to "
5046 "support discipline %d\n", discipline);
5047 rc = -EINVAL;
5048 }
5049 mutex_unlock(&qeth_mod_mutex);
5050 return rc;
5051}
5052
5053void qeth_core_free_discipline(struct qeth_card *card)
5054{
5055 if (card->options.layer2)
5056 symbol_put(qeth_l2_discipline);
5057 else
5058 symbol_put(qeth_l3_discipline);
5059 card->discipline = NULL;
5060}
5061
5062static const struct device_type qeth_generic_devtype = {
5063 .name = "qeth_generic",
5064 .groups = qeth_generic_attr_groups,
5065};
5066static const struct device_type qeth_osn_devtype = {
5067 .name = "qeth_osn",
5068 .groups = qeth_osn_attr_groups,
5069};
5070
5071static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5072{
5073 struct qeth_card *card;
5074 struct device *dev;
5075 int rc;
5076 unsigned long flags;
5077 char dbf_name[20];
5078
5079 QETH_DBF_TEXT(SETUP, 2, "probedev");
5080
5081 dev = &gdev->dev;
5082 if (!get_device(dev))
5083 return -ENODEV;
5084
5085 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5086
5087 card = qeth_alloc_card();
5088 if (!card) {
5089 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5090 rc = -ENOMEM;
5091 goto err_dev;
5092 }
5093
5094 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5095 dev_name(&gdev->dev));
5096 card->debug = debug_register(dbf_name, 2, 1, 8);
5097 if (!card->debug) {
5098 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5099 rc = -ENOMEM;
5100 goto err_card;
5101 }
5102 debug_register_view(card->debug, &debug_hex_ascii_view);
5103
5104 card->read.ccwdev = gdev->cdev[0];
5105 card->write.ccwdev = gdev->cdev[1];
5106 card->data.ccwdev = gdev->cdev[2];
5107 dev_set_drvdata(&gdev->dev, card);
5108 card->gdev = gdev;
5109 gdev->cdev[0]->handler = qeth_irq;
5110 gdev->cdev[1]->handler = qeth_irq;
5111 gdev->cdev[2]->handler = qeth_irq;
5112
5113 rc = qeth_determine_card_type(card);
5114 if (rc) {
5115 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5116 goto err_dbf;
5117 }
5118 rc = qeth_setup_card(card);
5119 if (rc) {
5120 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5121 goto err_dbf;
5122 }
5123
5124 if (card->info.type == QETH_CARD_TYPE_OSN)
5125 gdev->dev.type = &qeth_osn_devtype;
5126 else
5127 gdev->dev.type = &qeth_generic_devtype;
5128
5129 switch (card->info.type) {
5130 case QETH_CARD_TYPE_OSN:
5131 case QETH_CARD_TYPE_OSM:
5132 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5133 if (rc)
5134 goto err_dbf;
5135 rc = card->discipline->setup(card->gdev);
5136 if (rc)
5137 goto err_disc;
5138 case QETH_CARD_TYPE_OSD:
5139 case QETH_CARD_TYPE_OSX:
5140 default:
5141 break;
5142 }
5143
5144 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5145 list_add_tail(&card->list, &qeth_core_card_list.list);
5146 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5147
5148 qeth_determine_capabilities(card);
5149 return 0;
5150
5151err_disc:
5152 qeth_core_free_discipline(card);
5153err_dbf:
5154 debug_unregister(card->debug);
5155err_card:
5156 qeth_core_free_card(card);
5157err_dev:
5158 put_device(dev);
5159 return rc;
5160}
5161
5162static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5163{
5164 unsigned long flags;
5165 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5166
5167 QETH_DBF_TEXT(SETUP, 2, "removedv");
5168
5169 if (card->discipline) {
5170 card->discipline->remove(gdev);
5171 qeth_core_free_discipline(card);
5172 }
5173
5174 debug_unregister(card->debug);
5175 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5176 list_del(&card->list);
5177 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5178 qeth_core_free_card(card);
5179 dev_set_drvdata(&gdev->dev, NULL);
5180 put_device(&gdev->dev);
5181 return;
5182}
5183
5184static int qeth_core_set_online(struct ccwgroup_device *gdev)
5185{
5186 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5187 int rc = 0;
5188 int def_discipline;
5189
5190 if (!card->discipline) {
5191 if (card->info.type == QETH_CARD_TYPE_IQD)
5192 def_discipline = QETH_DISCIPLINE_LAYER3;
5193 else
5194 def_discipline = QETH_DISCIPLINE_LAYER2;
5195 rc = qeth_core_load_discipline(card, def_discipline);
5196 if (rc)
5197 goto err;
5198 rc = card->discipline->setup(card->gdev);
5199 if (rc)
5200 goto err;
5201 }
5202 rc = card->discipline->set_online(gdev);
5203err:
5204 return rc;
5205}
5206
5207static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5208{
5209 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5210 return card->discipline->set_offline(gdev);
5211}
5212
5213static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5214{
5215 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5216 if (card->discipline && card->discipline->shutdown)
5217 card->discipline->shutdown(gdev);
5218}
5219
5220static int qeth_core_prepare(struct ccwgroup_device *gdev)
5221{
5222 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5223 if (card->discipline && card->discipline->prepare)
5224 return card->discipline->prepare(gdev);
5225 return 0;
5226}
5227
5228static void qeth_core_complete(struct ccwgroup_device *gdev)
5229{
5230 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5231 if (card->discipline && card->discipline->complete)
5232 card->discipline->complete(gdev);
5233}
5234
5235static int qeth_core_freeze(struct ccwgroup_device *gdev)
5236{
5237 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5238 if (card->discipline && card->discipline->freeze)
5239 return card->discipline->freeze(gdev);
5240 return 0;
5241}
5242
5243static int qeth_core_thaw(struct ccwgroup_device *gdev)
5244{
5245 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5246 if (card->discipline && card->discipline->thaw)
5247 return card->discipline->thaw(gdev);
5248 return 0;
5249}
5250
5251static int qeth_core_restore(struct ccwgroup_device *gdev)
5252{
5253 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5254 if (card->discipline && card->discipline->restore)
5255 return card->discipline->restore(gdev);
5256 return 0;
5257}
5258
5259static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5260 .driver = {
5261 .owner = THIS_MODULE,
5262 .name = "qeth",
5263 },
5264 .setup = qeth_core_probe_device,
5265 .remove = qeth_core_remove_device,
5266 .set_online = qeth_core_set_online,
5267 .set_offline = qeth_core_set_offline,
5268 .shutdown = qeth_core_shutdown,
5269 .prepare = qeth_core_prepare,
5270 .complete = qeth_core_complete,
5271 .freeze = qeth_core_freeze,
5272 .thaw = qeth_core_thaw,
5273 .restore = qeth_core_restore,
5274};
5275
5276static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5277 const char *buf, size_t count)
5278{
5279 int err;
5280
5281 err = ccwgroup_create_dev(qeth_core_root_dev,
5282 &qeth_core_ccwgroup_driver, 3, buf);
5283
5284 return err ? err : count;
5285}
5286static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5287
5288static struct attribute *qeth_drv_attrs[] = {
5289 &driver_attr_group.attr,
5290 NULL,
5291};
5292static struct attribute_group qeth_drv_attr_group = {
5293 .attrs = qeth_drv_attrs,
5294};
5295static const struct attribute_group *qeth_drv_attr_groups[] = {
5296 &qeth_drv_attr_group,
5297 NULL,
5298};
5299
5300static struct {
5301 const char str[ETH_GSTRING_LEN];
5302} qeth_ethtool_stats_keys[] = {
5303{"rx skbs"},
5304 {"rx buffers"},
5305 {"tx skbs"},
5306 {"tx buffers"},
5307 {"tx skbs no packing"},
5308 {"tx buffers no packing"},
5309 {"tx skbs packing"},
5310 {"tx buffers packing"},
5311 {"tx sg skbs"},
5312 {"tx sg frags"},
5313{"rx sg skbs"},
5314 {"rx sg frags"},
5315 {"rx sg page allocs"},
5316 {"tx large kbytes"},
5317 {"tx large count"},
5318 {"tx pk state ch n->p"},
5319 {"tx pk state ch p->n"},
5320 {"tx pk watermark low"},
5321 {"tx pk watermark high"},
5322 {"queue 0 buffer usage"},
5323{"queue 1 buffer usage"},
5324 {"queue 2 buffer usage"},
5325 {"queue 3 buffer usage"},
5326 {"rx poll time"},
5327 {"rx poll count"},
5328 {"rx do_QDIO time"},
5329 {"rx do_QDIO count"},
5330 {"tx handler time"},
5331 {"tx handler count"},
5332 {"tx time"},
5333{"tx count"},
5334 {"tx do_QDIO time"},
5335 {"tx do_QDIO count"},
5336 {"tx csum"},
5337 {"tx lin"},
5338 {"cq handler count"},
5339 {"cq handler time"}
5340};
5341
5342int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5343{
5344 switch (stringset) {
5345 case ETH_SS_STATS:
5346 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5347 default:
5348 return -EINVAL;
5349 }
5350}
5351EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5352
5353void qeth_core_get_ethtool_stats(struct net_device *dev,
5354 struct ethtool_stats *stats, u64 *data)
5355{
5356 struct qeth_card *card = dev->ml_priv;
5357 data[0] = card->stats.rx_packets -
5358 card->perf_stats.initial_rx_packets;
5359 data[1] = card->perf_stats.bufs_rec;
5360 data[2] = card->stats.tx_packets -
5361 card->perf_stats.initial_tx_packets;
5362 data[3] = card->perf_stats.bufs_sent;
5363 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5364 - card->perf_stats.skbs_sent_pack;
5365 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5366 data[6] = card->perf_stats.skbs_sent_pack;
5367 data[7] = card->perf_stats.bufs_sent_pack;
5368 data[8] = card->perf_stats.sg_skbs_sent;
5369 data[9] = card->perf_stats.sg_frags_sent;
5370 data[10] = card->perf_stats.sg_skbs_rx;
5371 data[11] = card->perf_stats.sg_frags_rx;
5372 data[12] = card->perf_stats.sg_alloc_page_rx;
5373 data[13] = (card->perf_stats.large_send_bytes >> 10);
5374 data[14] = card->perf_stats.large_send_cnt;
5375 data[15] = card->perf_stats.sc_dp_p;
5376 data[16] = card->perf_stats.sc_p_dp;
5377 data[17] = QETH_LOW_WATERMARK_PACK;
5378 data[18] = QETH_HIGH_WATERMARK_PACK;
5379 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5380 data[20] = (card->qdio.no_out_queues > 1) ?
5381 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5382 data[21] = (card->qdio.no_out_queues > 2) ?
5383 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5384 data[22] = (card->qdio.no_out_queues > 3) ?
5385 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5386 data[23] = card->perf_stats.inbound_time;
5387 data[24] = card->perf_stats.inbound_cnt;
5388 data[25] = card->perf_stats.inbound_do_qdio_time;
5389 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5390 data[27] = card->perf_stats.outbound_handler_time;
5391 data[28] = card->perf_stats.outbound_handler_cnt;
5392 data[29] = card->perf_stats.outbound_time;
5393 data[30] = card->perf_stats.outbound_cnt;
5394 data[31] = card->perf_stats.outbound_do_qdio_time;
5395 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5396 data[33] = card->perf_stats.tx_csum;
5397 data[34] = card->perf_stats.tx_lin;
5398 data[35] = card->perf_stats.cq_cnt;
5399 data[36] = card->perf_stats.cq_time;
5400}
5401EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5402
5403void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5404{
5405 switch (stringset) {
5406 case ETH_SS_STATS:
5407 memcpy(data, &qeth_ethtool_stats_keys,
5408 sizeof(qeth_ethtool_stats_keys));
5409 break;
5410 default:
5411 WARN_ON(1);
5412 break;
5413 }
5414}
5415EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5416
5417void qeth_core_get_drvinfo(struct net_device *dev,
5418 struct ethtool_drvinfo *info)
5419{
5420 struct qeth_card *card = dev->ml_priv;
5421 if (card->options.layer2)
5422 strcpy(info->driver, "qeth_l2");
5423 else
5424 strcpy(info->driver, "qeth_l3");
5425
5426 strcpy(info->version, "1.0");
5427 strcpy(info->fw_version, card->info.mcl_level);
5428 sprintf(info->bus_info, "%s/%s/%s",
5429 CARD_RDEV_ID(card),
5430 CARD_WDEV_ID(card),
5431 CARD_DDEV_ID(card));
5432}
5433EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5434
5435int qeth_core_ethtool_get_settings(struct net_device *netdev,
5436 struct ethtool_cmd *ecmd)
5437{
5438 struct qeth_card *card = netdev->ml_priv;
5439 enum qeth_link_types link_type;
5440
5441 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5442 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5443 else
5444 link_type = card->info.link_type;
5445
5446 ecmd->transceiver = XCVR_INTERNAL;
5447 ecmd->supported = SUPPORTED_Autoneg;
5448 ecmd->advertising = ADVERTISED_Autoneg;
5449 ecmd->duplex = DUPLEX_FULL;
5450 ecmd->autoneg = AUTONEG_ENABLE;
5451
5452 switch (link_type) {
5453 case QETH_LINK_TYPE_FAST_ETH:
5454 case QETH_LINK_TYPE_LANE_ETH100:
5455 ecmd->supported |= SUPPORTED_10baseT_Half |
5456 SUPPORTED_10baseT_Full |
5457 SUPPORTED_100baseT_Half |
5458 SUPPORTED_100baseT_Full |
5459 SUPPORTED_TP;
5460 ecmd->advertising |= ADVERTISED_10baseT_Half |
5461 ADVERTISED_10baseT_Full |
5462 ADVERTISED_100baseT_Half |
5463 ADVERTISED_100baseT_Full |
5464 ADVERTISED_TP;
5465 ecmd->speed = SPEED_100;
5466 ecmd->port = PORT_TP;
5467 break;
5468
5469 case QETH_LINK_TYPE_GBIT_ETH:
5470 case QETH_LINK_TYPE_LANE_ETH1000:
5471 ecmd->supported |= SUPPORTED_10baseT_Half |
5472 SUPPORTED_10baseT_Full |
5473 SUPPORTED_100baseT_Half |
5474 SUPPORTED_100baseT_Full |
5475 SUPPORTED_1000baseT_Half |
5476 SUPPORTED_1000baseT_Full |
5477 SUPPORTED_FIBRE;
5478 ecmd->advertising |= ADVERTISED_10baseT_Half |
5479 ADVERTISED_10baseT_Full |
5480 ADVERTISED_100baseT_Half |
5481 ADVERTISED_100baseT_Full |
5482 ADVERTISED_1000baseT_Half |
5483 ADVERTISED_1000baseT_Full |
5484 ADVERTISED_FIBRE;
5485 ecmd->speed = SPEED_1000;
5486 ecmd->port = PORT_FIBRE;
5487 break;
5488
5489 case QETH_LINK_TYPE_10GBIT_ETH:
5490 ecmd->supported |= SUPPORTED_10baseT_Half |
5491 SUPPORTED_10baseT_Full |
5492 SUPPORTED_100baseT_Half |
5493 SUPPORTED_100baseT_Full |
5494 SUPPORTED_1000baseT_Half |
5495 SUPPORTED_1000baseT_Full |
5496 SUPPORTED_10000baseT_Full |
5497 SUPPORTED_FIBRE;
5498 ecmd->advertising |= ADVERTISED_10baseT_Half |
5499 ADVERTISED_10baseT_Full |
5500 ADVERTISED_100baseT_Half |
5501 ADVERTISED_100baseT_Full |
5502 ADVERTISED_1000baseT_Half |
5503 ADVERTISED_1000baseT_Full |
5504 ADVERTISED_10000baseT_Full |
5505 ADVERTISED_FIBRE;
5506 ecmd->speed = SPEED_10000;
5507 ecmd->port = PORT_FIBRE;
5508 break;
5509
5510 default:
5511 ecmd->supported |= SUPPORTED_10baseT_Half |
5512 SUPPORTED_10baseT_Full |
5513 SUPPORTED_TP;
5514 ecmd->advertising |= ADVERTISED_10baseT_Half |
5515 ADVERTISED_10baseT_Full |
5516 ADVERTISED_TP;
5517 ecmd->speed = SPEED_10;
5518 ecmd->port = PORT_TP;
5519 }
5520
5521 return 0;
5522}
5523EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5524
5525static int __init qeth_core_init(void)
5526{
5527 int rc;
5528
5529 pr_info("loading core functions\n");
5530 INIT_LIST_HEAD(&qeth_core_card_list.list);
5531 rwlock_init(&qeth_core_card_list.rwlock);
5532 mutex_init(&qeth_mod_mutex);
5533
5534 rc = qeth_register_dbf_views();
5535 if (rc)
5536 goto out_err;
5537 qeth_core_root_dev = root_device_register("qeth");
5538 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5539 if (rc)
5540 goto register_err;
5541 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5542 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5543 if (!qeth_core_header_cache) {
5544 rc = -ENOMEM;
5545 goto slab_err;
5546 }
5547 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5548 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5549 if (!qeth_qdio_outbuf_cache) {
5550 rc = -ENOMEM;
5551 goto cqslab_err;
5552 }
5553 rc = ccw_driver_register(&qeth_ccw_driver);
5554 if (rc)
5555 goto ccw_err;
5556 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5557 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5558 if (rc)
5559 goto ccwgroup_err;
5560
5561 return 0;
5562
5563ccwgroup_err:
5564 ccw_driver_unregister(&qeth_ccw_driver);
5565ccw_err:
5566 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5567cqslab_err:
5568 kmem_cache_destroy(qeth_core_header_cache);
5569slab_err:
5570 root_device_unregister(qeth_core_root_dev);
5571register_err:
5572 qeth_unregister_dbf_views();
5573out_err:
5574 pr_err("Initializing the qeth device driver failed\n");
5575 return rc;
5576}
5577
5578static void __exit qeth_core_exit(void)
5579{
5580 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5581 ccw_driver_unregister(&qeth_ccw_driver);
5582 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5583 kmem_cache_destroy(qeth_core_header_cache);
5584 root_device_unregister(qeth_core_root_dev);
5585 qeth_unregister_dbf_views();
5586 pr_info("core functions removed\n");
5587}
5588
5589module_init(qeth_core_init);
5590module_exit(qeth_core_exit);
5591MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5592MODULE_DESCRIPTION("qeth core functions");
5593MODULE_LICENSE("GPL");
5594
