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10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21#include "dac.h"
22
23#define AD5764_REG_SF_NOP 0x0
24#define AD5764_REG_SF_CONFIG 0x1
25#define AD5764_REG_SF_CLEAR 0x4
26#define AD5764_REG_SF_LOAD 0x5
27#define AD5764_REG_DATA(x) ((2 << 3) | (x))
28#define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
29#define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
30#define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
31
32#define AD5764_NUM_CHANNELS 4
33
34
35
36
37
38
39
40
41struct ad5764_chip_info {
42 unsigned long int_vref;
43 const struct iio_chan_spec *channels;
44};
45
46
47
48
49
50
51
52
53
54struct ad5764_state {
55 struct spi_device *spi;
56 const struct ad5764_chip_info *chip_info;
57 struct regulator_bulk_data vref_reg[2];
58
59
60
61
62
63 union {
64 __be32 d32;
65 u8 d8[4];
66 } data[2] ____cacheline_aligned;
67};
68
69enum ad5764_type {
70 ID_AD5744,
71 ID_AD5744R,
72 ID_AD5764,
73 ID_AD5764R,
74};
75
76#define AD5764_CHANNEL(_chan, _bits) { \
77 .type = IIO_VOLTAGE, \
78 .indexed = 1, \
79 .output = 1, \
80 .channel = (_chan), \
81 .address = (_chan), \
82 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
83 IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
84 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
85 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
86 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
87 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
88}
89
90#define DECLARE_AD5764_CHANNELS(_name, _bits) \
91const struct iio_chan_spec _name##_channels[] = { \
92 AD5764_CHANNEL(0, (_bits)), \
93 AD5764_CHANNEL(1, (_bits)), \
94 AD5764_CHANNEL(2, (_bits)), \
95 AD5764_CHANNEL(3, (_bits)), \
96};
97
98static DECLARE_AD5764_CHANNELS(ad5764, 16);
99static DECLARE_AD5764_CHANNELS(ad5744, 14);
100
101static const struct ad5764_chip_info ad5764_chip_infos[] = {
102 [ID_AD5744] = {
103 .int_vref = 0,
104 .channels = ad5744_channels,
105 },
106 [ID_AD5744R] = {
107 .int_vref = 5000000,
108 .channels = ad5744_channels,
109 },
110 [ID_AD5764] = {
111 .int_vref = 0,
112 .channels = ad5764_channels,
113 },
114 [ID_AD5764R] = {
115 .int_vref = 5000000,
116 .channels = ad5764_channels,
117 },
118};
119
120static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
121 unsigned int val)
122{
123 struct ad5764_state *st = iio_priv(indio_dev);
124 int ret;
125
126 mutex_lock(&indio_dev->mlock);
127 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
128
129 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
130 mutex_unlock(&indio_dev->mlock);
131
132 return ret;
133}
134
135static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
136 unsigned int *val)
137{
138 struct ad5764_state *st = iio_priv(indio_dev);
139 struct spi_message m;
140 int ret;
141 struct spi_transfer t[] = {
142 {
143 .tx_buf = &st->data[0].d8[1],
144 .len = 3,
145 .cs_change = 1,
146 }, {
147 .rx_buf = &st->data[1].d8[1],
148 .len = 3,
149 },
150 };
151
152 spi_message_init(&m);
153 spi_message_add_tail(&t[0], &m);
154 spi_message_add_tail(&t[1], &m);
155
156 mutex_lock(&indio_dev->mlock);
157
158 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
159
160 ret = spi_sync(st->spi, &m);
161 if (ret >= 0)
162 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
163
164 mutex_unlock(&indio_dev->mlock);
165
166 return ret;
167}
168
169static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
170{
171 switch (info) {
172 case 0:
173 return AD5764_REG_DATA(chan->address);
174 case IIO_CHAN_INFO_CALIBBIAS:
175 return AD5764_REG_OFFSET(chan->address);
176 case IIO_CHAN_INFO_CALIBSCALE:
177 return AD5764_REG_FINE_GAIN(chan->address);
178 default:
179 break;
180 }
181
182 return 0;
183}
184
185static int ad5764_write_raw(struct iio_dev *indio_dev,
186 struct iio_chan_spec const *chan, int val, int val2, long info)
187{
188 const int max_val = (1 << chan->scan_type.realbits);
189 unsigned int reg;
190
191 switch (info) {
192 case IIO_CHAN_INFO_RAW:
193 if (val >= max_val || val < 0)
194 return -EINVAL;
195 val <<= chan->scan_type.shift;
196 break;
197 case IIO_CHAN_INFO_CALIBBIAS:
198 if (val >= 128 || val < -128)
199 return -EINVAL;
200 break;
201 case IIO_CHAN_INFO_CALIBSCALE:
202 if (val >= 32 || val < -32)
203 return -EINVAL;
204 break;
205 default:
206 return -EINVAL;
207 }
208
209 reg = ad5764_chan_info_to_reg(chan, info);
210 return ad5764_write(indio_dev, reg, (u16)val);
211}
212
213static int ad5764_get_channel_vref(struct ad5764_state *st,
214 unsigned int channel)
215{
216 if (st->chip_info->int_vref)
217 return st->chip_info->int_vref;
218 else
219 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
220}
221
222static int ad5764_read_raw(struct iio_dev *indio_dev,
223 struct iio_chan_spec const *chan, int *val, int *val2, long info)
224{
225 struct ad5764_state *st = iio_priv(indio_dev);
226 unsigned long scale_uv;
227 unsigned int reg;
228 int vref;
229 int ret;
230
231 switch (info) {
232 case IIO_CHAN_INFO_RAW:
233 reg = AD5764_REG_DATA(chan->address);
234 ret = ad5764_read(indio_dev, reg, val);
235 if (ret < 0)
236 return ret;
237 *val >>= chan->scan_type.shift;
238 return IIO_VAL_INT;
239 case IIO_CHAN_INFO_CALIBBIAS:
240 reg = AD5764_REG_OFFSET(chan->address);
241 ret = ad5764_read(indio_dev, reg, val);
242 if (ret < 0)
243 return ret;
244 *val = sign_extend32(*val, 7);
245 return IIO_VAL_INT;
246 case IIO_CHAN_INFO_CALIBSCALE:
247 reg = AD5764_REG_FINE_GAIN(chan->address);
248 ret = ad5764_read(indio_dev, reg, val);
249 if (ret < 0)
250 return ret;
251 *val = sign_extend32(*val, 5);
252 return IIO_VAL_INT;
253 case IIO_CHAN_INFO_SCALE:
254
255 vref = ad5764_get_channel_vref(st, chan->channel);
256 if (vref < 0)
257 return vref;
258
259 scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
260 *val = scale_uv / 100000;
261 *val2 = (scale_uv % 100000) * 10;
262 return IIO_VAL_INT_PLUS_MICRO;
263 case IIO_CHAN_INFO_OFFSET:
264 *val = -(1 << chan->scan_type.realbits) / 2;
265 return IIO_VAL_INT;
266 }
267
268 return -EINVAL;
269}
270
271static const struct iio_info ad5764_info = {
272 .read_raw = ad5764_read_raw,
273 .write_raw = ad5764_write_raw,
274 .driver_module = THIS_MODULE,
275};
276
277static int __devinit ad5764_probe(struct spi_device *spi)
278{
279 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
280 struct iio_dev *indio_dev;
281 struct ad5764_state *st;
282 int ret;
283
284 indio_dev = iio_device_alloc(sizeof(*st));
285 if (indio_dev == NULL) {
286 dev_err(&spi->dev, "Failed to allocate iio device\n");
287 return -ENOMEM;
288 }
289
290 st = iio_priv(indio_dev);
291 spi_set_drvdata(spi, indio_dev);
292
293 st->spi = spi;
294 st->chip_info = &ad5764_chip_infos[type];
295
296 indio_dev->dev.parent = &spi->dev;
297 indio_dev->name = spi_get_device_id(spi)->name;
298 indio_dev->info = &ad5764_info;
299 indio_dev->modes = INDIO_DIRECT_MODE;
300 indio_dev->num_channels = AD5764_NUM_CHANNELS;
301 indio_dev->channels = st->chip_info->channels;
302
303 if (st->chip_info->int_vref == 0) {
304 st->vref_reg[0].supply = "vrefAB";
305 st->vref_reg[1].supply = "vrefCD";
306
307 ret = regulator_bulk_get(&st->spi->dev,
308 ARRAY_SIZE(st->vref_reg), st->vref_reg);
309 if (ret) {
310 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
311 ret);
312 goto error_free;
313 }
314
315 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
316 st->vref_reg);
317 if (ret) {
318 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
319 ret);
320 goto error_free_reg;
321 }
322 }
323
324 ret = iio_device_register(indio_dev);
325 if (ret) {
326 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
327 goto error_disable_reg;
328 }
329
330 return 0;
331
332error_disable_reg:
333 if (st->chip_info->int_vref == 0)
334 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
335error_free_reg:
336 if (st->chip_info->int_vref == 0)
337 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
338error_free:
339 iio_device_free(indio_dev);
340
341 return ret;
342}
343
344static int __devexit ad5764_remove(struct spi_device *spi)
345{
346 struct iio_dev *indio_dev = spi_get_drvdata(spi);
347 struct ad5764_state *st = iio_priv(indio_dev);
348
349 iio_device_unregister(indio_dev);
350
351 if (st->chip_info->int_vref == 0) {
352 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
353 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
354 }
355
356 iio_device_free(indio_dev);
357
358 return 0;
359}
360
361static const struct spi_device_id ad5764_ids[] = {
362 { "ad5744", ID_AD5744 },
363 { "ad5744r", ID_AD5744R },
364 { "ad5764", ID_AD5764 },
365 { "ad5764r", ID_AD5764R },
366 { }
367};
368MODULE_DEVICE_TABLE(spi, ad5764_ids);
369
370static struct spi_driver ad5764_driver = {
371 .driver = {
372 .name = "ad5764",
373 .owner = THIS_MODULE,
374 },
375 .probe = ad5764_probe,
376 .remove = __devexit_p(ad5764_remove),
377 .id_table = ad5764_ids,
378};
379module_spi_driver(ad5764_driver);
380
381MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
382MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
383MODULE_LICENSE("GPL v2");
384
