1/* 2 * Header for code common to all DaVinci machines. 3 * 4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> 5 * 6 * 2007 (c) MontaVista Software, Inc. This file is licensed under 7 * the terms of the GNU General Public License version 2. This program 8 * is licensed "as is" without any warranty of any kind, whether express 9 * or implied. 10 */ 11 12#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H 13#define __ARCH_ARM_MACH_DAVINCI_COMMON_H 14 15#include <linux/compiler.h> 16#include <linux/types.h> 17 18struct sys_timer; 19 20extern struct sys_timer davinci_timer; 21 22extern void davinci_irq_init(void); 23extern void __iomem *davinci_intc_base; 24extern int davinci_intc_type; 25 26struct davinci_timer_instance { 27 u32 base; 28 u32 bottom_irq; 29 u32 top_irq; 30 unsigned long cmp_off; 31 unsigned int cmp_irq; 32}; 33 34struct davinci_timer_info { 35 struct davinci_timer_instance *timers; 36 unsigned int clockevent_id; 37 unsigned int clocksource_id; 38}; 39 40struct davinci_gpio_controller; 41 42/* 43 * SoC info passed into common davinci modules. 44 * 45 * Base addresses in this structure should be physical and not virtual. 46 * Modules that take such base addresses, should internally ioremap() them to 47 * use. 48 */ 49struct davinci_soc_info { 50 struct map_desc *io_desc; 51 unsigned long io_desc_num; 52 u32 cpu_id; 53 u32 jtag_id; 54 u32 jtag_id_reg; 55 struct davinci_id *ids; 56 unsigned long ids_num; 57 struct clk_lookup *cpu_clks; 58 u32 *psc_bases; 59 unsigned long psc_bases_num; 60 u32 pinmux_base; 61 const struct mux_config *pinmux_pins; 62 unsigned long pinmux_pins_num; 63 u32 intc_base; 64 int intc_type; 65 u8 *intc_irq_prios; 66 unsigned long intc_irq_num; 67 u32 *intc_host_map; 68 struct davinci_timer_info *timer_info; 69 int gpio_type; 70 u32 gpio_base; 71 unsigned gpio_num; 72 unsigned gpio_irq; 73 unsigned gpio_unbanked; 74 struct davinci_gpio_controller *gpio_ctlrs; 75 int gpio_ctlrs_num; 76 struct platform_device *serial_dev; 77 struct emac_platform_data *emac_pdata; 78 dma_addr_t sram_dma; 79 unsigned sram_len; 80}; 81 82extern struct davinci_soc_info davinci_soc_info; 83 84extern void davinci_common_init(struct davinci_soc_info *soc_info); 85extern void davinci_init_ide(void); 86void davinci_restart(char mode, const char *cmd); 87void davinci_init_late(void); 88 89#ifdef CONFIG_DAVINCI_RESET_CLOCKS 90int davinci_clk_disable_unused(void); 91#else 92static inline int davinci_clk_disable_unused(void) { return 0; } 93#endif 94 95#ifdef CONFIG_CPU_FREQ 96int davinci_cpufreq_init(void); 97#else 98static inline int davinci_cpufreq_init(void) { return 0; } 99#endif 100 101#ifdef CONFIG_SUSPEND 102int davinci_pm_init(void); 103#else 104static inline int davinci_pm_init(void) { return 0; } 105#endif 106 107/* standard place to map on-chip SRAMs; they *may* support DMA */ 108#define SRAM_VIRT 0xfffe0000 109#define SRAM_SIZE SZ_128K 110 111#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ 112