LXR linux/drivers/gpu/drm/radeon/radeon

   1/*
   2 * Copyright 2008 Advanced Micro Devices, Inc.
   3 * Copyright 2008 Red Hat Inc.
   4 * Copyright 2009 Jerome Glisse.
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a
   7 * copy of this software and associated documentation files (the "Software"),
   8 * to deal in the Software without restriction, including without limitation
   9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10 * and/or sell copies of the Software, and to permit persons to whom the
  11 * Software is furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22 * OTHER DEALINGS IN THE SOFTWARE.
  23 *
  24 * Authors: Dave Airlie
  25 *          Alex Deucher
  26 *          Jerome Glisse
  27 */
  28#ifndef __RADEON_OBJECT_H__
  29#define __RADEON_OBJECT_H__
  30
  31#include <drm/radeon_drm.h>
  32#include "radeon.h"
  33
  34/**
  35 * radeon_mem_type_to_domain - return domain corresponding to mem_type
  36 * @mem_type:   ttm memory type
  37 *
  38 * Returns corresponding domain of the ttm mem_type
  39 */
  40static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
  41{
  42        switch (mem_type) {
  43        case TTM_PL_VRAM:
  44                return RADEON_GEM_DOMAIN_VRAM;
  45        case TTM_PL_TT:
  46                return RADEON_GEM_DOMAIN_GTT;
  47        case TTM_PL_SYSTEM:
  48                return RADEON_GEM_DOMAIN_CPU;
  49        default:
  50                break;
  51        }
  52        return 0;
  53}
  54
  55int radeon_bo_reserve(struct radeon_bo *bo, bool no_wait);
  56
  57static inline void radeon_bo_unreserve(struct radeon_bo *bo)
  58{
  59        ttm_bo_unreserve(&bo->tbo);
  60}
  61
  62/**
  63 * radeon_bo_gpu_offset - return GPU offset of bo
  64 * @bo: radeon object for which we query the offset
  65 *
  66 * Returns current GPU offset of the object.
  67 *
  68 * Note: object should either be pinned or reserved when calling this
  69 * function, it might be useful to add check for this for debugging.
  70 */
  71static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
  72{
  73        return bo->tbo.offset;
  74}
  75
  76static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
  77{
  78        return bo->tbo.num_pages << PAGE_SHIFT;
  79}
  80
  81static inline bool radeon_bo_is_reserved(struct radeon_bo *bo)
  82{
  83        return !!atomic_read(&bo->tbo.reserved);
  84}
  85
  86static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
  87{
  88        return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
  89}
  90
  91static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
  92{
  93        return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
  94}
  95
  96/**
  97 * radeon_bo_mmap_offset - return mmap offset of bo
  98 * @bo: radeon object for which we query the offset
  99 *
 100 * Returns mmap offset of the object.
 101 *
 102 * Note: addr_space_offset is constant after ttm bo init thus isn't protected
 103 * by any lock.
 104 */
 105static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
 106{
 107        return bo->tbo.addr_space_offset;
 108}
 109
 110extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
 111                          bool no_wait);
 112
 113extern int radeon_bo_create(struct radeon_device *rdev,
 114                            unsigned long size, int byte_align,
 115                            bool kernel, u32 domain,
 116                            struct sg_table *sg,
 117                            struct radeon_bo **bo_ptr);
 118extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
 119extern void radeon_bo_kunmap(struct radeon_bo *bo);
 120extern void radeon_bo_unref(struct radeon_bo **bo);
 121extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
 122extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
 123                                    u64 max_offset, u64 *gpu_addr);
 124extern int radeon_bo_unpin(struct radeon_bo *bo);
 125extern int radeon_bo_evict_vram(struct radeon_device *rdev);
 126extern void radeon_bo_force_delete(struct radeon_device *rdev);
 127extern int radeon_bo_init(struct radeon_device *rdev);
 128extern void radeon_bo_fini(struct radeon_device *rdev);
 129extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
 130                                struct list_head *head);
 131extern int radeon_bo_list_validate(struct list_head *head);
 132extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 133                                struct vm_area_struct *vma);
 134extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
 135                                u32 tiling_flags, u32 pitch);
 136extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
 137                                u32 *tiling_flags, u32 *pitch);
 138extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 139                                bool force_drop);
 140extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
 141                                        struct ttm_mem_reg *mem);
 142extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 143extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
 144extern struct radeon_bo_va *radeon_bo_va(struct radeon_bo *rbo,
 145                                         struct radeon_vm *vm);
 146
 147/*
 148 * sub allocation
 149 */
 150
 151static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
 152{
 153        return sa_bo->manager->gpu_addr + sa_bo->soffset;
 154}
 155
 156static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
 157{
 158        return sa_bo->manager->cpu_ptr + sa_bo->soffset;
 159}
 160
 161extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
 162                                     struct radeon_sa_manager *sa_manager,
 163                                     unsigned size, u32 domain);
 164extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
 165                                      struct radeon_sa_manager *sa_manager);
 166extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
 167                                      struct radeon_sa_manager *sa_manager);
 168extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
 169                                        struct radeon_sa_manager *sa_manager);
 170extern int radeon_sa_bo_new(struct radeon_device *rdev,
 171                            struct radeon_sa_manager *sa_manager,
 172                            struct radeon_sa_bo **sa_bo,
 173                            unsigned size, unsigned align, bool block);
 174extern void radeon_sa_bo_free(struct radeon_device *rdev,
 175                              struct radeon_sa_bo **sa_bo,
 176                              struct radeon_fence *fence);
 177#if defined(CONFIG_DEBUG_FS)
 178extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
 179                                         struct seq_file *m);
 180#endif
 181
 182
 183#endif
 184