1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#include <stdarg.h>
21#include <linux/mutex.h>
22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/sched.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/poll.h>
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
35#include <linux/module.h>
36#include <linux/spinlock.h>
37#include <linux/pm.h>
38#include <linux/proc_fs.h>
39#include <linux/seq_file.h>
40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/device.h>
43#include <linux/syscore_ops.h>
44#include <linux/freezer.h>
45#include <linux/syscalls.h>
46#include <linux/suspend.h>
47#include <linux/cpu.h>
48#include <linux/compat.h>
49#include <asm/prom.h>
50#include <asm/machdep.h>
51#include <asm/io.h>
52#include <asm/pgtable.h>
53#include <asm/sections.h>
54#include <asm/irq.h>
55#include <asm/pmac_feature.h>
56#include <asm/pmac_pfunc.h>
57#include <asm/pmac_low_i2c.h>
58#include <asm/uaccess.h>
59#include <asm/mmu_context.h>
60#include <asm/cputable.h>
61#include <asm/time.h>
62#include <asm/backlight.h>
63
64#include "via-pmu-event.h"
65
66
67#undef DEBUG_SLEEP
68
69
70#define PMU_MINOR 154
71
72
73#define BATTERY_POLLING_COUNT 2
74
75static DEFINE_MUTEX(pmu_info_proc_mutex);
76static volatile unsigned char __iomem *via;
77
78
79#define RS 0x200
80#define B 0
81#define A RS
82#define DIRB (2*RS)
83#define DIRA (3*RS)
84#define T1CL (4*RS)
85#define T1CH (5*RS)
86#define T1LL (6*RS)
87#define T1LH (7*RS)
88#define T2CL (8*RS)
89#define T2CH (9*RS)
90#define SR (10*RS)
91#define ACR (11*RS)
92#define PCR (12*RS)
93#define IFR (13*RS)
94#define IER (14*RS)
95#define ANH (15*RS)
96
97
98#define TACK 0x08
99#define TREQ 0x10
100
101
102#define SR_CTRL 0x1c
103#define SR_EXT 0x0c
104#define SR_OUT 0x10
105
106
107#define IER_SET 0x80
108#define IER_CLR 0
109#define SR_INT 0x04
110#define CB2_INT 0x08
111#define CB1_INT 0x10
112
113static volatile enum pmu_state {
114 idle,
115 sending,
116 intack,
117 reading,
118 reading_intr,
119 locked,
120} pmu_state;
121
122static volatile enum int_data_state {
123 int_data_empty,
124 int_data_fill,
125 int_data_ready,
126 int_data_flush
127} int_data_state[2] = { int_data_empty, int_data_empty };
128
129static struct adb_request *current_req;
130static struct adb_request *last_req;
131static struct adb_request *req_awaiting_reply;
132static unsigned char interrupt_data[2][32];
133static int interrupt_data_len[2];
134static int int_data_last;
135static unsigned char *reply_ptr;
136static int data_index;
137static int data_len;
138static volatile int adb_int_pending;
139static volatile int disable_poll;
140static struct device_node *vias;
141static int pmu_kind = PMU_UNKNOWN;
142static int pmu_fully_inited;
143static int pmu_has_adb;
144static struct device_node *gpio_node;
145static unsigned char __iomem *gpio_reg;
146static int gpio_irq = NO_IRQ;
147static int gpio_irq_enabled = -1;
148static volatile int pmu_suspended;
149static spinlock_t pmu_lock;
150static u8 pmu_intr_mask;
151static int pmu_version;
152static int drop_interrupts;
153#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
154static int option_lid_wakeup = 1;
155#endif
156static unsigned long async_req_locks;
157static unsigned int pmu_irq_stats[11];
158
159static struct proc_dir_entry *proc_pmu_root;
160static struct proc_dir_entry *proc_pmu_info;
161static struct proc_dir_entry *proc_pmu_irqstats;
162static struct proc_dir_entry *proc_pmu_options;
163static int option_server_mode;
164
165int pmu_battery_count;
166int pmu_cur_battery;
167unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
168struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
169static int query_batt_timer = BATTERY_POLLING_COUNT;
170static struct adb_request batt_req;
171static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
172
173int __fake_sleep;
174int asleep;
175
176#ifdef CONFIG_ADB
177static int adb_dev_map;
178static int pmu_adb_flags;
179
180static int pmu_probe(void);
181static int pmu_init(void);
182static int pmu_send_request(struct adb_request *req, int sync);
183static int pmu_adb_autopoll(int devs);
184static int pmu_adb_reset_bus(void);
185#endif
186
187static int init_pmu(void);
188static void pmu_start(void);
189static irqreturn_t via_pmu_interrupt(int irq, void *arg);
190static irqreturn_t gpio1_interrupt(int irq, void *arg);
191static const struct file_operations pmu_info_proc_fops;
192static const struct file_operations pmu_irqstats_proc_fops;
193static void pmu_pass_intr(unsigned char *data, int len);
194static const struct file_operations pmu_battery_proc_fops;
195static const struct file_operations pmu_options_proc_fops;
196
197#ifdef CONFIG_ADB
198struct adb_driver via_pmu_driver = {
199 "PMU",
200 pmu_probe,
201 pmu_init,
202 pmu_send_request,
203 pmu_adb_autopoll,
204 pmu_poll_adb,
205 pmu_adb_reset_bus
206};
207#endif
208
209extern void low_sleep_handler(void);
210extern void enable_kernel_altivec(void);
211extern void enable_kernel_fp(void);
212
213#ifdef DEBUG_SLEEP
214int pmu_polled_request(struct adb_request *req);
215void pmu_blink(int n);
216#endif
217
218
219
220
221
222
223
224
225static const s8 pmu_data_len[256][2] = {
226
227 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
228 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
229 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
230 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
231 {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
232 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
233 { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
234 { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
235 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
236 { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
237 { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
238 { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
239 { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
240 { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
241 { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
242 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
243 { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
244 { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
245 { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
246 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
247 { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
248 { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
249 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
250 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
251 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
252 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
253 { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
254 { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
255 {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
256 { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
257 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
258 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
259};
260
261static char *pbook_type[] = {
262 "Unknown PowerBook",
263 "PowerBook 2400/3400/3500(G3)",
264 "PowerBook G3 Series",
265 "1999 PowerBook G3",
266 "Core99"
267};
268
269int __init find_via_pmu(void)
270{
271 u64 taddr;
272 const u32 *reg;
273
274 if (via != 0)
275 return 1;
276 vias = of_find_node_by_name(NULL, "via-pmu");
277 if (vias == NULL)
278 return 0;
279
280 reg = of_get_property(vias, "reg", NULL);
281 if (reg == NULL) {
282 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
283 goto fail;
284 }
285 taddr = of_translate_address(vias, reg);
286 if (taddr == OF_BAD_ADDR) {
287 printk(KERN_ERR "via-pmu: Can't translate address !\n");
288 goto fail;
289 }
290
291 spin_lock_init(&pmu_lock);
292
293 pmu_has_adb = 1;
294
295 pmu_intr_mask = PMU_INT_PCEJECT |
296 PMU_INT_SNDBRT |
297 PMU_INT_ADB |
298 PMU_INT_TICK;
299
300 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
301 || of_device_is_compatible(vias->parent, "ohare")))
302 pmu_kind = PMU_OHARE_BASED;
303 else if (of_device_is_compatible(vias->parent, "paddington"))
304 pmu_kind = PMU_PADDINGTON_BASED;
305 else if (of_device_is_compatible(vias->parent, "heathrow"))
306 pmu_kind = PMU_HEATHROW_BASED;
307 else if (of_device_is_compatible(vias->parent, "Keylargo")
308 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
309 struct device_node *gpiop;
310 struct device_node *adbp;
311 u64 gaddr = OF_BAD_ADDR;
312
313 pmu_kind = PMU_KEYLARGO_BASED;
314 adbp = of_find_node_by_type(NULL, "adb");
315 pmu_has_adb = (adbp != NULL);
316 of_node_put(adbp);
317 pmu_intr_mask = PMU_INT_PCEJECT |
318 PMU_INT_SNDBRT |
319 PMU_INT_ADB |
320 PMU_INT_TICK |
321 PMU_INT_ENVIRONMENT;
322
323 gpiop = of_find_node_by_name(NULL, "gpio");
324 if (gpiop) {
325 reg = of_get_property(gpiop, "reg", NULL);
326 if (reg)
327 gaddr = of_translate_address(gpiop, reg);
328 if (gaddr != OF_BAD_ADDR)
329 gpio_reg = ioremap(gaddr, 0x10);
330 }
331 if (gpio_reg == NULL) {
332 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
333 goto fail_gpio;
334 }
335 } else
336 pmu_kind = PMU_UNKNOWN;
337
338 via = ioremap(taddr, 0x2000);
339 if (via == NULL) {
340 printk(KERN_ERR "via-pmu: Can't map address !\n");
341 goto fail;
342 }
343
344 out_8(&via[IER], IER_CLR | 0x7f);
345 out_8(&via[IFR], 0x7f);
346
347 pmu_state = idle;
348
349 if (!init_pmu()) {
350 via = NULL;
351 return 0;
352 }
353
354 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
355 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
356
357 sys_ctrler = SYS_CTRLER_PMU;
358
359 return 1;
360 fail:
361 of_node_put(vias);
362 iounmap(gpio_reg);
363 gpio_reg = NULL;
364 fail_gpio:
365 vias = NULL;
366 return 0;
367}
368
369#ifdef CONFIG_ADB
370static int pmu_probe(void)
371{
372 return vias == NULL? -ENODEV: 0;
373}
374
375static int __init pmu_init(void)
376{
377 if (vias == NULL)
378 return -ENODEV;
379 return 0;
380}
381#endif
382
383
384
385
386
387
388
389
390static int __init via_pmu_start(void)
391{
392 unsigned int irq;
393
394 if (vias == NULL)
395 return -ENODEV;
396
397 batt_req.complete = 1;
398
399 irq = irq_of_parse_and_map(vias, 0);
400 if (irq == NO_IRQ) {
401 printk(KERN_ERR "via-pmu: can't map interrupt\n");
402 return -ENODEV;
403 }
404
405
406
407
408 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
409 "VIA-PMU", (void *)0)) {
410 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
411 return -ENODEV;
412 }
413
414 if (pmu_kind == PMU_KEYLARGO_BASED) {
415 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
416 if (gpio_node == NULL)
417 gpio_node = of_find_node_by_name(NULL,
418 "pmu-interrupt");
419 if (gpio_node)
420 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
421
422 if (gpio_irq != NO_IRQ) {
423 if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
424 "GPIO1 ADB", (void *)0))
425 printk(KERN_ERR "pmu: can't get irq %d"
426 " (GPIO1)\n", gpio_irq);
427 else
428 gpio_irq_enabled = 1;
429 }
430 }
431
432
433 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
434
435 pmu_fully_inited = 1;
436
437
438
439
440
441
442
443
444
445 do {
446 pmu_poll();
447 } while (pmu_state != idle);
448
449 return 0;
450}
451
452arch_initcall(via_pmu_start);
453
454
455
456
457static int __init via_pmu_dev_init(void)
458{
459 if (vias == NULL)
460 return -ENODEV;
461
462#ifdef CONFIG_PMAC_BACKLIGHT
463
464 pmu_backlight_init();
465#endif
466
467#ifdef CONFIG_PPC32
468 if (of_machine_is_compatible("AAPL,3400/2400") ||
469 of_machine_is_compatible("AAPL,3500")) {
470 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
471 NULL, PMAC_MB_INFO_MODEL, 0);
472 pmu_battery_count = 1;
473 if (mb == PMAC_TYPE_COMET)
474 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
475 else
476 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
477 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
478 of_machine_is_compatible("PowerBook1,1")) {
479 pmu_battery_count = 2;
480 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
481 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
482 } else {
483 struct device_node* prim =
484 of_find_node_by_name(NULL, "power-mgt");
485 const u32 *prim_info = NULL;
486 if (prim)
487 prim_info = of_get_property(prim, "prim-info", NULL);
488 if (prim_info) {
489
490 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
491 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
492 if (pmu_battery_count > 1)
493 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
494 }
495 of_node_put(prim);
496 }
497#endif
498
499
500 proc_pmu_root = proc_mkdir("pmu", NULL);
501 if (proc_pmu_root) {
502 long i;
503
504 for (i=0; i<pmu_battery_count; i++) {
505 char title[16];
506 sprintf(title, "battery_%ld", i);
507 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
508 &pmu_battery_proc_fops, (void *)i);
509 }
510
511 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
512 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
513 &pmu_irqstats_proc_fops);
514 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
515 &pmu_options_proc_fops);
516 }
517 return 0;
518}
519
520device_initcall(via_pmu_dev_init);
521
522static int
523init_pmu(void)
524{
525 int timeout;
526 struct adb_request req;
527
528 out_8(&via[B], via[B] | TREQ);
529 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK);
530
531 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
532 timeout = 100000;
533 while (!req.complete) {
534 if (--timeout < 0) {
535 printk(KERN_ERR "init_pmu: no response from PMU\n");
536 return 0;
537 }
538 udelay(10);
539 pmu_poll();
540 }
541
542
543 timeout = 100000;
544 interrupt_data[0][0] = 1;
545 while (interrupt_data[0][0] || pmu_state != idle) {
546 if (--timeout < 0) {
547 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
548 return 0;
549 }
550 if (pmu_state == idle)
551 adb_int_pending = 1;
552 via_pmu_interrupt(0, NULL);
553 udelay(10);
554 }
555
556
557 if (pmu_kind == PMU_KEYLARGO_BASED) {
558 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
559 while (!req.complete)
560 pmu_poll();
561 }
562
563
564 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
565 pmu_wait_complete(&req);
566 if (req.reply_len > 0)
567 pmu_version = req.reply[0];
568
569
570 if (pmu_kind == PMU_KEYLARGO_BASED) {
571 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
572 PMU_PWR_GET_POWERUP_EVENTS);
573 pmu_wait_complete(&req);
574 if (req.reply_len == 2) {
575 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
576 option_server_mode = 1;
577 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
578 option_server_mode ? "enabled" : "disabled");
579 }
580 }
581 return 1;
582}
583
584int
585pmu_get_model(void)
586{
587 return pmu_kind;
588}
589
590static void pmu_set_server_mode(int server_mode)
591{
592 struct adb_request req;
593
594 if (pmu_kind != PMU_KEYLARGO_BASED)
595 return;
596
597 option_server_mode = server_mode;
598 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
599 pmu_wait_complete(&req);
600 if (req.reply_len < 2)
601 return;
602 if (server_mode)
603 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
604 PMU_PWR_SET_POWERUP_EVENTS,
605 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
606 else
607 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
608 PMU_PWR_CLR_POWERUP_EVENTS,
609 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
610 pmu_wait_complete(&req);
611}
612
613
614
615
616static void
617done_battery_state_ohare(struct adb_request* req)
618{
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
638 long pcharge, charge, vb, vmax, lmax;
639 long vmax_charging, vmax_charged;
640 long amperage, voltage, time, max;
641 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
642 NULL, PMAC_MB_INFO_MODEL, 0);
643
644 if (req->reply[0] & 0x01)
645 pmu_power_flags |= PMU_PWR_AC_PRESENT;
646 else
647 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
648
649 if (mb == PMAC_TYPE_COMET) {
650 vmax_charged = 189;
651 vmax_charging = 213;
652 lmax = 6500;
653 } else {
654 vmax_charged = 330;
655 vmax_charging = 330;
656 lmax = 6500;
657 }
658 vmax = vmax_charged;
659
660
661 if (req->reply[0] & 0x04) {
662 bat_flags |= PMU_BATT_PRESENT;
663 if (req->reply[0] & 0x02)
664 bat_flags |= PMU_BATT_CHARGING;
665 vb = (req->reply[1] << 8) | req->reply[2];
666 voltage = (vb * 265 + 72665) / 10;
667 amperage = req->reply[5];
668 if ((req->reply[0] & 0x01) == 0) {
669 if (amperage > 200)
670 vb += ((amperage - 200) * 15)/100;
671 } else if (req->reply[0] & 0x02) {
672 vb = (vb * 97) / 100;
673 vmax = vmax_charging;
674 }
675 charge = (100 * vb) / vmax;
676 if (req->reply[0] & 0x40) {
677 pcharge = (req->reply[6] << 8) + req->reply[7];
678 if (pcharge > lmax)
679 pcharge = lmax;
680 pcharge *= 100;
681 pcharge = 100 - pcharge / lmax;
682 if (pcharge < charge)
683 charge = pcharge;
684 }
685 if (amperage > 0)
686 time = (charge * 16440) / amperage;
687 else
688 time = 0;
689 max = 100;
690 amperage = -amperage;
691 } else
692 charge = max = amperage = voltage = time = 0;
693
694 pmu_batteries[pmu_cur_battery].flags = bat_flags;
695 pmu_batteries[pmu_cur_battery].charge = charge;
696 pmu_batteries[pmu_cur_battery].max_charge = max;
697 pmu_batteries[pmu_cur_battery].amperage = amperage;
698 pmu_batteries[pmu_cur_battery].voltage = voltage;
699 pmu_batteries[pmu_cur_battery].time_remaining = time;
700
701 clear_bit(0, &async_req_locks);
702}
703
704static void
705done_battery_state_smart(struct adb_request* req)
706{
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
727 int amperage;
728 unsigned int capa, max, voltage;
729
730 if (req->reply[1] & 0x01)
731 pmu_power_flags |= PMU_PWR_AC_PRESENT;
732 else
733 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
734
735
736 capa = max = amperage = voltage = 0;
737
738 if (req->reply[1] & 0x04) {
739 bat_flags |= PMU_BATT_PRESENT;
740 switch(req->reply[0]) {
741 case 3:
742 case 4: capa = req->reply[2];
743 max = req->reply[3];
744 amperage = *((signed char *)&req->reply[4]);
745 voltage = req->reply[5];
746 break;
747 case 5: capa = (req->reply[2] << 8) | req->reply[3];
748 max = (req->reply[4] << 8) | req->reply[5];
749 amperage = *((signed short *)&req->reply[6]);
750 voltage = (req->reply[8] << 8) | req->reply[9];
751 break;
752 default:
753 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
754 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
755 break;
756 }
757 }
758
759 if ((req->reply[1] & 0x01) && (amperage > 0))
760 bat_flags |= PMU_BATT_CHARGING;
761
762 pmu_batteries[pmu_cur_battery].flags = bat_flags;
763 pmu_batteries[pmu_cur_battery].charge = capa;
764 pmu_batteries[pmu_cur_battery].max_charge = max;
765 pmu_batteries[pmu_cur_battery].amperage = amperage;
766 pmu_batteries[pmu_cur_battery].voltage = voltage;
767 if (amperage) {
768 if ((req->reply[1] & 0x01) && (amperage > 0))
769 pmu_batteries[pmu_cur_battery].time_remaining
770 = ((max-capa) * 3600) / amperage;
771 else
772 pmu_batteries[pmu_cur_battery].time_remaining
773 = (capa * 3600) / (-amperage);
774 } else
775 pmu_batteries[pmu_cur_battery].time_remaining = 0;
776
777 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
778
779 clear_bit(0, &async_req_locks);
780}
781
782static void
783query_battery_state(void)
784{
785 if (test_and_set_bit(0, &async_req_locks))
786 return;
787 if (pmu_kind == PMU_OHARE_BASED)
788 pmu_request(&batt_req, done_battery_state_ohare,
789 1, PMU_BATTERY_STATE);
790 else
791 pmu_request(&batt_req, done_battery_state_smart,
792 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
793}
794
795static int pmu_info_proc_show(struct seq_file *m, void *v)
796{
797 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
798 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
799 seq_printf(m, "AC Power : %d\n",
800 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
801 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
802
803 return 0;
804}
805
806static int pmu_info_proc_open(struct inode *inode, struct file *file)
807{
808 return single_open(file, pmu_info_proc_show, NULL);
809}
810
811static const struct file_operations pmu_info_proc_fops = {
812 .owner = THIS_MODULE,
813 .open = pmu_info_proc_open,
814 .read = seq_read,
815 .llseek = seq_lseek,
816 .release = single_release,
817};
818
819static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
820{
821 int i;
822 static const char *irq_names[] = {
823 "Total CB1 triggered events",
824 "Total GPIO1 triggered events",
825 "PC-Card eject button",
826 "Sound/Brightness button",
827 "ADB message",
828 "Battery state change",
829 "Environment interrupt",
830 "Tick timer",
831 "Ghost interrupt (zero len)",
832 "Empty interrupt (empty mask)",
833 "Max irqs in a row"
834 };
835
836 for (i=0; i<11; i++) {
837 seq_printf(m, " %2u: %10u (%s)\n",
838 i, pmu_irq_stats[i], irq_names[i]);
839 }
840 return 0;
841}
842
843static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
844{
845 return single_open(file, pmu_irqstats_proc_show, NULL);
846}
847
848static const struct file_operations pmu_irqstats_proc_fops = {
849 .owner = THIS_MODULE,
850 .open = pmu_irqstats_proc_open,
851 .read = seq_read,
852 .llseek = seq_lseek,
853 .release = single_release,
854};
855
856static int pmu_battery_proc_show(struct seq_file *m, void *v)
857{
858 long batnum = (long)m->private;
859
860 seq_putc(m, '\n');
861 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
862 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
863 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
864 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
865 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
866 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
867 return 0;
868}
869
870static int pmu_battery_proc_open(struct inode *inode, struct file *file)
871{
872 return single_open(file, pmu_battery_proc_show, PDE(inode)->data);
873}
874
875static const struct file_operations pmu_battery_proc_fops = {
876 .owner = THIS_MODULE,
877 .open = pmu_battery_proc_open,
878 .read = seq_read,
879 .llseek = seq_lseek,
880 .release = single_release,
881};
882
883static int pmu_options_proc_show(struct seq_file *m, void *v)
884{
885#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
886 if (pmu_kind == PMU_KEYLARGO_BASED &&
887 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
888 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
889#endif
890 if (pmu_kind == PMU_KEYLARGO_BASED)
891 seq_printf(m, "server_mode=%d\n", option_server_mode);
892
893 return 0;
894}
895
896static int pmu_options_proc_open(struct inode *inode, struct file *file)
897{
898 return single_open(file, pmu_options_proc_show, NULL);
899}
900
901static ssize_t pmu_options_proc_write(struct file *file,
902 const char __user *buffer, size_t count, loff_t *pos)
903{
904 char tmp[33];
905 char *label, *val;
906 size_t fcount = count;
907
908 if (!count)
909 return -EINVAL;
910 if (count > 32)
911 count = 32;
912 if (copy_from_user(tmp, buffer, count))
913 return -EFAULT;
914 tmp[count] = 0;
915
916 label = tmp;
917 while(*label == ' ')
918 label++;
919 val = label;
920 while(*val && (*val != '=')) {
921 if (*val == ' ')
922 *val = 0;
923 val++;
924 }
925 if ((*val) == 0)
926 return -EINVAL;
927 *(val++) = 0;
928 while(*val == ' ')
929 val++;
930#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
931 if (pmu_kind == PMU_KEYLARGO_BASED &&
932 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
933 if (!strcmp(label, "lid_wakeup"))
934 option_lid_wakeup = ((*val) == '1');
935#endif
936 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
937 int new_value;
938 new_value = ((*val) == '1');
939 if (new_value != option_server_mode)
940 pmu_set_server_mode(new_value);
941 }
942 return fcount;
943}
944
945static const struct file_operations pmu_options_proc_fops = {
946 .owner = THIS_MODULE,
947 .open = pmu_options_proc_open,
948 .read = seq_read,
949 .llseek = seq_lseek,
950 .release = single_release,
951 .write = pmu_options_proc_write,
952};
953
954#ifdef CONFIG_ADB
955
956static int pmu_send_request(struct adb_request *req, int sync)
957{
958 int i, ret;
959
960 if ((vias == NULL) || (!pmu_fully_inited)) {
961 req->complete = 1;
962 return -ENXIO;
963 }
964
965 ret = -EINVAL;
966
967 switch (req->data[0]) {
968 case PMU_PACKET:
969 for (i = 0; i < req->nbytes - 1; ++i)
970 req->data[i] = req->data[i+1];
971 --req->nbytes;
972 if (pmu_data_len[req->data[0]][1] != 0) {
973 req->reply[0] = ADB_RET_OK;
974 req->reply_len = 1;
975 } else
976 req->reply_len = 0;
977 ret = pmu_queue_request(req);
978 break;
979 case CUDA_PACKET:
980 switch (req->data[1]) {
981 case CUDA_GET_TIME:
982 if (req->nbytes != 2)
983 break;
984 req->data[0] = PMU_READ_RTC;
985 req->nbytes = 1;
986 req->reply_len = 3;
987 req->reply[0] = CUDA_PACKET;
988 req->reply[1] = 0;
989 req->reply[2] = CUDA_GET_TIME;
990 ret = pmu_queue_request(req);
991 break;
992 case CUDA_SET_TIME:
993 if (req->nbytes != 6)
994 break;
995 req->data[0] = PMU_SET_RTC;
996 req->nbytes = 5;
997 for (i = 1; i <= 4; ++i)
998 req->data[i] = req->data[i+1];
999 req->reply_len = 3;
1000 req->reply[0] = CUDA_PACKET;
1001 req->reply[1] = 0;
1002 req->reply[2] = CUDA_SET_TIME;
1003 ret = pmu_queue_request(req);
1004 break;
1005 }
1006 break;
1007 case ADB_PACKET:
1008 if (!pmu_has_adb)
1009 return -ENXIO;
1010 for (i = req->nbytes - 1; i > 1; --i)
1011 req->data[i+2] = req->data[i];
1012 req->data[3] = req->nbytes - 2;
1013 req->data[2] = pmu_adb_flags;
1014
1015 req->data[0] = PMU_ADB_CMD;
1016 req->nbytes += 2;
1017 req->reply_expected = 1;
1018 req->reply_len = 0;
1019 ret = pmu_queue_request(req);
1020 break;
1021 }
1022 if (ret) {
1023 req->complete = 1;
1024 return ret;
1025 }
1026
1027 if (sync)
1028 while (!req->complete)
1029 pmu_poll();
1030
1031 return 0;
1032}
1033
1034
1035static int __pmu_adb_autopoll(int devs)
1036{
1037 struct adb_request req;
1038
1039 if (devs) {
1040 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1041 adb_dev_map >> 8, adb_dev_map);
1042 pmu_adb_flags = 2;
1043 } else {
1044 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1045 pmu_adb_flags = 0;
1046 }
1047 while (!req.complete)
1048 pmu_poll();
1049 return 0;
1050}
1051
1052static int pmu_adb_autopoll(int devs)
1053{
1054 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1055 return -ENXIO;
1056
1057 adb_dev_map = devs;
1058 return __pmu_adb_autopoll(devs);
1059}
1060
1061
1062static int pmu_adb_reset_bus(void)
1063{
1064 struct adb_request req;
1065 int save_autopoll = adb_dev_map;
1066
1067 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1068 return -ENXIO;
1069
1070
1071 __pmu_adb_autopoll(0);
1072
1073 req.nbytes = 4;
1074 req.done = NULL;
1075 req.data[0] = PMU_ADB_CMD;
1076 req.data[1] = ADB_BUSRESET;
1077 req.data[2] = 0;
1078 req.data[3] = 0;
1079 req.data[4] = 0;
1080 req.reply_len = 0;
1081 req.reply_expected = 1;
1082 if (pmu_queue_request(&req) != 0) {
1083 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1084 return -EIO;
1085 }
1086 pmu_wait_complete(&req);
1087
1088 if (save_autopoll != 0)
1089 __pmu_adb_autopoll(save_autopoll);
1090
1091 return 0;
1092}
1093#endif
1094
1095
1096int
1097pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1098 int nbytes, ...)
1099{
1100 va_list list;
1101 int i;
1102
1103 if (vias == NULL)
1104 return -ENXIO;
1105
1106 if (nbytes < 0 || nbytes > 32) {
1107 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1108 req->complete = 1;
1109 return -EINVAL;
1110 }
1111 req->nbytes = nbytes;
1112 req->done = done;
1113 va_start(list, nbytes);
1114 for (i = 0; i < nbytes; ++i)
1115 req->data[i] = va_arg(list, int);
1116 va_end(list);
1117 req->reply_len = 0;
1118 req->reply_expected = 0;
1119 return pmu_queue_request(req);
1120}
1121
1122int
1123pmu_queue_request(struct adb_request *req)
1124{
1125 unsigned long flags;
1126 int nsend;
1127
1128 if (via == NULL) {
1129 req->complete = 1;
1130 return -ENXIO;
1131 }
1132 if (req->nbytes <= 0) {
1133 req->complete = 1;
1134 return 0;
1135 }
1136 nsend = pmu_data_len[req->data[0]][0];
1137 if (nsend >= 0 && req->nbytes != nsend + 1) {
1138 req->complete = 1;
1139 return -EINVAL;
1140 }
1141
1142 req->next = NULL;
1143 req->sent = 0;
1144 req->complete = 0;
1145
1146 spin_lock_irqsave(&pmu_lock, flags);
1147 if (current_req != 0) {
1148 last_req->next = req;
1149 last_req = req;
1150 } else {
1151 current_req = req;
1152 last_req = req;
1153 if (pmu_state == idle)
1154 pmu_start();
1155 }
1156 spin_unlock_irqrestore(&pmu_lock, flags);
1157
1158 return 0;
1159}
1160
1161static inline void
1162wait_for_ack(void)
1163{
1164
1165
1166
1167 int timeout = 4000;
1168 while ((in_8(&via[B]) & TACK) == 0) {
1169 if (--timeout < 0) {
1170 printk(KERN_ERR "PMU not responding (!ack)\n");
1171 return;
1172 }
1173 udelay(10);
1174 }
1175}
1176
1177
1178
1179static inline void
1180send_byte(int x)
1181{
1182 volatile unsigned char __iomem *v = via;
1183
1184 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1185 out_8(&v[SR], x);
1186 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1187 (void)in_8(&v[B]);
1188}
1189
1190static inline void
1191recv_byte(void)
1192{
1193 volatile unsigned char __iomem *v = via;
1194
1195 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1196 in_8(&v[SR]);
1197 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1198 (void)in_8(&v[B]);
1199}
1200
1201static inline void
1202pmu_done(struct adb_request *req)
1203{
1204 void (*done)(struct adb_request *) = req->done;
1205 mb();
1206 req->complete = 1;
1207
1208
1209
1210 if (done)
1211 (*done)(req);
1212}
1213
1214static void
1215pmu_start(void)
1216{
1217 struct adb_request *req;
1218
1219
1220
1221 req = current_req;
1222 if (req == 0 || pmu_state != idle
1223 || (req_awaiting_reply))
1224 return;
1225
1226 pmu_state = sending;
1227 data_index = 1;
1228 data_len = pmu_data_len[req->data[0]][0];
1229
1230
1231
1232
1233 wait_for_ack();
1234
1235 send_byte(req->data[0]);
1236}
1237
1238void
1239pmu_poll(void)
1240{
1241 if (!via)
1242 return;
1243 if (disable_poll)
1244 return;
1245 via_pmu_interrupt(0, NULL);
1246}
1247
1248void
1249pmu_poll_adb(void)
1250{
1251 if (!via)
1252 return;
1253 if (disable_poll)
1254 return;
1255
1256 adb_int_pending = 1;
1257 do {
1258 via_pmu_interrupt(0, NULL);
1259 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1260 || req_awaiting_reply));
1261}
1262
1263void
1264pmu_wait_complete(struct adb_request *req)
1265{
1266 if (!via)
1267 return;
1268 while((pmu_state != idle && pmu_state != locked) || !req->complete)
1269 via_pmu_interrupt(0, NULL);
1270}
1271
1272
1273
1274
1275
1276
1277void
1278pmu_suspend(void)
1279{
1280 unsigned long flags;
1281
1282 if (!via)
1283 return;
1284
1285 spin_lock_irqsave(&pmu_lock, flags);
1286 pmu_suspended++;
1287 if (pmu_suspended > 1) {
1288 spin_unlock_irqrestore(&pmu_lock, flags);
1289 return;
1290 }
1291
1292 do {
1293 spin_unlock_irqrestore(&pmu_lock, flags);
1294 if (req_awaiting_reply)
1295 adb_int_pending = 1;
1296 via_pmu_interrupt(0, NULL);
1297 spin_lock_irqsave(&pmu_lock, flags);
1298 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1299 if (gpio_irq >= 0)
1300 disable_irq_nosync(gpio_irq);
1301 out_8(&via[IER], CB1_INT | IER_CLR);
1302 spin_unlock_irqrestore(&pmu_lock, flags);
1303 break;
1304 }
1305 } while (1);
1306}
1307
1308void
1309pmu_resume(void)
1310{
1311 unsigned long flags;
1312
1313 if (!via || (pmu_suspended < 1))
1314 return;
1315
1316 spin_lock_irqsave(&pmu_lock, flags);
1317 pmu_suspended--;
1318 if (pmu_suspended > 0) {
1319 spin_unlock_irqrestore(&pmu_lock, flags);
1320 return;
1321 }
1322 adb_int_pending = 1;
1323 if (gpio_irq >= 0)
1324 enable_irq(gpio_irq);
1325 out_8(&via[IER], CB1_INT | IER_SET);
1326 spin_unlock_irqrestore(&pmu_lock, flags);
1327 pmu_poll();
1328}
1329
1330
1331static void
1332pmu_handle_data(unsigned char *data, int len)
1333{
1334 unsigned char ints, pirq;
1335 int i = 0;
1336
1337 asleep = 0;
1338 if (drop_interrupts || len < 1) {
1339 adb_int_pending = 0;
1340 pmu_irq_stats[8]++;
1341 return;
1342 }
1343
1344
1345 ints = data[0];
1346
1347
1348 if (ints == 0)
1349 pmu_irq_stats[9]++;
1350
1351
1352 if (ints & PMU_INT_ADB)
1353 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1354
1355next:
1356
1357 if (ints == 0) {
1358 if (i > pmu_irq_stats[10])
1359 pmu_irq_stats[10] = i;
1360 return;
1361 }
1362
1363 for (pirq = 0; pirq < 8; pirq++)
1364 if (ints & (1 << pirq))
1365 break;
1366 pmu_irq_stats[pirq]++;
1367 i++;
1368 ints &= ~(1 << pirq);
1369
1370
1371
1372
1373
1374 if ((1 << pirq) & PMU_INT_ADB) {
1375 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1376 struct adb_request *req = req_awaiting_reply;
1377 if (req == 0) {
1378 printk(KERN_ERR "PMU: extra ADB reply\n");
1379 return;
1380 }
1381 req_awaiting_reply = NULL;
1382 if (len <= 2)
1383 req->reply_len = 0;
1384 else {
1385 memcpy(req->reply, data + 1, len - 1);
1386 req->reply_len = len - 1;
1387 }
1388 pmu_done(req);
1389 } else {
1390 if (len == 4 && data[1] == 0x2c) {
1391 extern int xmon_wants_key, xmon_adb_keycode;
1392 if (xmon_wants_key) {
1393 xmon_adb_keycode = data[2];
1394 return;
1395 }
1396 }
1397#ifdef CONFIG_ADB
1398
1399
1400
1401
1402
1403
1404 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1405 && data[1] == 0x2c && data[3] == 0xff
1406 && (data[2] & ~1) == 0xf4))
1407 adb_input(data+1, len-1, 1);
1408#endif
1409 }
1410 }
1411
1412 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1413#ifdef CONFIG_PMAC_BACKLIGHT
1414 if (len == 3)
1415 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1416#endif
1417 }
1418
1419 else if ((1 << pirq) & PMU_INT_TICK) {
1420
1421 if (pmu_battery_count) {
1422 if ((--query_batt_timer) == 0) {
1423 query_battery_state();
1424 query_batt_timer = BATTERY_POLLING_COUNT;
1425 }
1426 }
1427 }
1428 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1429 if (pmu_battery_count)
1430 query_battery_state();
1431 pmu_pass_intr(data, len);
1432
1433
1434 if (len == 6) {
1435 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1436 via_pmu_event(PMU_EVT_LID, data[1]&1);
1437 }
1438 } else {
1439 pmu_pass_intr(data, len);
1440 }
1441 goto next;
1442}
1443
1444static struct adb_request*
1445pmu_sr_intr(void)
1446{
1447 struct adb_request *req;
1448 int bite = 0;
1449
1450 if (via[B] & TREQ) {
1451 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1452 out_8(&via[IFR], SR_INT);
1453 return NULL;
1454 }
1455
1456 while ((in_8(&via[B]) & TACK) != 0)
1457 ;
1458
1459
1460 if (pmu_state == reading || pmu_state == reading_intr)
1461 bite = in_8(&via[SR]);
1462
1463
1464 out_8(&via[B], in_8(&via[B]) | TREQ);
1465 wait_for_ack();
1466
1467 switch (pmu_state) {
1468 case sending:
1469 req = current_req;
1470 if (data_len < 0) {
1471 data_len = req->nbytes - 1;
1472 send_byte(data_len);
1473 break;
1474 }
1475 if (data_index <= data_len) {
1476 send_byte(req->data[data_index++]);
1477 break;
1478 }
1479 req->sent = 1;
1480 data_len = pmu_data_len[req->data[0]][1];
1481 if (data_len == 0) {
1482 pmu_state = idle;
1483 current_req = req->next;
1484 if (req->reply_expected)
1485 req_awaiting_reply = req;
1486 else
1487 return req;
1488 } else {
1489 pmu_state = reading;
1490 data_index = 0;
1491 reply_ptr = req->reply + req->reply_len;
1492 recv_byte();
1493 }
1494 break;
1495
1496 case intack:
1497 data_index = 0;
1498 data_len = -1;
1499 pmu_state = reading_intr;
1500 reply_ptr = interrupt_data[int_data_last];
1501 recv_byte();
1502 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1503 enable_irq(gpio_irq);
1504 gpio_irq_enabled = 1;
1505 }
1506 break;
1507
1508 case reading:
1509 case reading_intr:
1510 if (data_len == -1) {
1511 data_len = bite;
1512 if (bite > 32)
1513 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1514 } else if (data_index < 32) {
1515 reply_ptr[data_index++] = bite;
1516 }
1517 if (data_index < data_len) {
1518 recv_byte();
1519 break;
1520 }
1521
1522 if (pmu_state == reading_intr) {
1523 pmu_state = idle;
1524 int_data_state[int_data_last] = int_data_ready;
1525 interrupt_data_len[int_data_last] = data_len;
1526 } else {
1527 req = current_req;
1528
1529
1530
1531
1532
1533 current_req = req->next;
1534 req->reply_len += data_index;
1535 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1536 pmu_state = locked;
1537 else
1538 pmu_state = idle;
1539 return req;
1540 }
1541 break;
1542
1543 default:
1544 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1545 pmu_state);
1546 }
1547 return NULL;
1548}
1549
1550static irqreturn_t
1551via_pmu_interrupt(int irq, void *arg)
1552{
1553 unsigned long flags;
1554 int intr;
1555 int nloop = 0;
1556 int int_data = -1;
1557 struct adb_request *req = NULL;
1558 int handled = 0;
1559
1560
1561 spin_lock_irqsave(&pmu_lock, flags);
1562 ++disable_poll;
1563
1564 for (;;) {
1565 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1566 if (intr == 0)
1567 break;
1568 handled = 1;
1569 if (++nloop > 1000) {
1570 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1571 "intr=%x, ier=%x pmu_state=%d\n",
1572 intr, in_8(&via[IER]), pmu_state);
1573 break;
1574 }
1575 out_8(&via[IFR], intr);
1576 if (intr & CB1_INT) {
1577 adb_int_pending = 1;
1578 pmu_irq_stats[0]++;
1579 }
1580 if (intr & SR_INT) {
1581 req = pmu_sr_intr();
1582 if (req)
1583 break;
1584 }
1585 }
1586
1587recheck:
1588 if (pmu_state == idle) {
1589 if (adb_int_pending) {
1590 if (int_data_state[0] == int_data_empty)
1591 int_data_last = 0;
1592 else if (int_data_state[1] == int_data_empty)
1593 int_data_last = 1;
1594 else
1595 goto no_free_slot;
1596 pmu_state = intack;
1597 int_data_state[int_data_last] = int_data_fill;
1598
1599
1600
1601 wait_for_ack();
1602 send_byte(PMU_INT_ACK);
1603 adb_int_pending = 0;
1604 } else if (current_req)
1605 pmu_start();
1606 }
1607no_free_slot:
1608
1609 if (int_data_state[!int_data_last] == int_data_ready) {
1610 int_data_state[!int_data_last] = int_data_flush;
1611 int_data = !int_data_last;
1612 } else if (int_data_state[int_data_last] == int_data_ready) {
1613 int_data_state[int_data_last] = int_data_flush;
1614 int_data = int_data_last;
1615 }
1616 --disable_poll;
1617 spin_unlock_irqrestore(&pmu_lock, flags);
1618
1619
1620 if (req) {
1621 pmu_done(req);
1622 req = NULL;
1623 }
1624
1625
1626 if (int_data >= 0) {
1627 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1628 spin_lock_irqsave(&pmu_lock, flags);
1629 ++disable_poll;
1630 int_data_state[int_data] = int_data_empty;
1631 int_data = -1;
1632 goto recheck;
1633 }
1634
1635 return IRQ_RETVAL(handled);
1636}
1637
1638void
1639pmu_unlock(void)
1640{
1641 unsigned long flags;
1642
1643 spin_lock_irqsave(&pmu_lock, flags);
1644 if (pmu_state == locked)
1645 pmu_state = idle;
1646 adb_int_pending = 1;
1647 spin_unlock_irqrestore(&pmu_lock, flags);
1648}
1649
1650
1651static irqreturn_t
1652gpio1_interrupt(int irq, void *arg)
1653{
1654 unsigned long flags;
1655
1656 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1657 spin_lock_irqsave(&pmu_lock, flags);
1658 if (gpio_irq_enabled > 0) {
1659 disable_irq_nosync(gpio_irq);
1660 gpio_irq_enabled = 0;
1661 }
1662 pmu_irq_stats[1]++;
1663 adb_int_pending = 1;
1664 spin_unlock_irqrestore(&pmu_lock, flags);
1665 via_pmu_interrupt(0, NULL);
1666 return IRQ_HANDLED;
1667 }
1668 return IRQ_NONE;
1669}
1670
1671void
1672pmu_enable_irled(int on)
1673{
1674 struct adb_request req;
1675
1676 if (vias == NULL)
1677 return ;
1678 if (pmu_kind == PMU_KEYLARGO_BASED)
1679 return ;
1680
1681 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1682 (on ? PMU_POW_ON : PMU_POW_OFF));
1683 pmu_wait_complete(&req);
1684}
1685
1686void
1687pmu_restart(void)
1688{
1689 struct adb_request req;
1690
1691 if (via == NULL)
1692 return;
1693
1694 local_irq_disable();
1695
1696 drop_interrupts = 1;
1697
1698 if (pmu_kind != PMU_KEYLARGO_BASED) {
1699 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1700 PMU_INT_TICK );
1701 while(!req.complete)
1702 pmu_poll();
1703 }
1704
1705 pmu_request(&req, NULL, 1, PMU_RESET);
1706 pmu_wait_complete(&req);
1707 for (;;)
1708 ;
1709}
1710
1711void
1712pmu_shutdown(void)
1713{
1714 struct adb_request req;
1715
1716 if (via == NULL)
1717 return;
1718
1719 local_irq_disable();
1720
1721 drop_interrupts = 1;
1722
1723 if (pmu_kind != PMU_KEYLARGO_BASED) {
1724 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1725 PMU_INT_TICK );
1726 pmu_wait_complete(&req);
1727 } else {
1728
1729
1730
1731 pmu_set_server_mode(0);
1732 }
1733
1734 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1735 'M', 'A', 'T', 'T');
1736 pmu_wait_complete(&req);
1737 for (;;)
1738 ;
1739}
1740
1741int
1742pmu_present(void)
1743{
1744 return via != 0;
1745}
1746
1747#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1748
1749
1750
1751
1752static u32 save_via[8];
1753
1754static void
1755save_via_state(void)
1756{
1757 save_via[0] = in_8(&via[ANH]);
1758 save_via[1] = in_8(&via[DIRA]);
1759 save_via[2] = in_8(&via[B]);
1760 save_via[3] = in_8(&via[DIRB]);
1761 save_via[4] = in_8(&via[PCR]);
1762 save_via[5] = in_8(&via[ACR]);
1763 save_via[6] = in_8(&via[T1CL]);
1764 save_via[7] = in_8(&via[T1CH]);
1765}
1766static void
1767restore_via_state(void)
1768{
1769 out_8(&via[ANH], save_via[0]);
1770 out_8(&via[DIRA], save_via[1]);
1771 out_8(&via[B], save_via[2]);
1772 out_8(&via[DIRB], save_via[3]);
1773 out_8(&via[PCR], save_via[4]);
1774 out_8(&via[ACR], save_via[5]);
1775 out_8(&via[T1CL], save_via[6]);
1776 out_8(&via[T1CH], save_via[7]);
1777 out_8(&via[IER], IER_CLR | 0x7f);
1778 out_8(&via[IFR], 0x7f);
1779 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1780}
1781
1782#define GRACKLE_PM (1<<7)
1783#define GRACKLE_DOZE (1<<5)
1784#define GRACKLE_NAP (1<<4)
1785#define GRACKLE_SLEEP (1<<3)
1786
1787static int powerbook_sleep_grackle(void)
1788{
1789 unsigned long save_l2cr;
1790 unsigned short pmcr1;
1791 struct adb_request req;
1792 struct pci_dev *grackle;
1793
1794 grackle = pci_get_bus_and_slot(0, 0);
1795 if (!grackle)
1796 return -ENODEV;
1797
1798
1799 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1800 pmu_wait_complete(&req);
1801 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1802 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1803 pmu_wait_complete(&req);
1804
1805
1806 save_l2cr = _get_L2CR();
1807
1808 if (!__fake_sleep) {
1809
1810 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1811 pmu_wait_complete(&req);
1812 }
1813
1814
1815 save_via_state();
1816
1817 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1818
1819 pci_read_config_word(grackle, 0x70, &pmcr1);
1820
1821 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1822 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1823 pci_write_config_word(grackle, 0x70, pmcr1);
1824
1825
1826 if (__fake_sleep)
1827 mdelay(5000);
1828 else
1829 low_sleep_handler();
1830
1831
1832 pci_read_config_word(grackle, 0x70, &pmcr1);
1833 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1834 pci_write_config_word(grackle, 0x70, pmcr1);
1835
1836 pci_dev_put(grackle);
1837
1838
1839 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1840 restore_via_state();
1841
1842
1843 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1844 _set_L2CR(save_l2cr);
1845
1846
1847 switch_mmu_context(NULL, current->active_mm);
1848
1849
1850 pmu_unlock();
1851 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1852 pmu_wait_complete(&req);
1853 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1854 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1855 pmu_wait_complete(&req);
1856 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1857 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1858 pmu_wait_complete(&req);
1859
1860 return 0;
1861}
1862
1863static int
1864powerbook_sleep_Core99(void)
1865{
1866 unsigned long save_l2cr;
1867 unsigned long save_l3cr;
1868 struct adb_request req;
1869
1870 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1871 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1872 return -ENOSYS;
1873 }
1874
1875 if (num_online_cpus() > 1 || cpu_is_offline(0))
1876 return -EAGAIN;
1877
1878
1879 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1880 pmu_wait_complete(&req);
1881
1882
1883 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1884 0xff, 0xff);
1885 pmu_wait_complete(&req);
1886 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1887 0, PMU_PWR_WAKEUP_KEY |
1888 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1889 pmu_wait_complete(&req);
1890
1891
1892 save_l3cr = _get_L3CR();
1893 save_l2cr = _get_L2CR();
1894
1895 if (!__fake_sleep) {
1896
1897 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1898 pmu_wait_complete(&req);
1899 }
1900
1901
1902 save_via_state();
1903
1904
1905
1906
1907
1908 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1909
1910
1911 if (__fake_sleep)
1912 mdelay(5000);
1913 else
1914 low_sleep_handler();
1915
1916
1917 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1918
1919
1920 restore_via_state();
1921
1922
1923 loops_per_jiffy *= 2;
1924
1925
1926 pmac_call_early_video_resume();
1927
1928
1929 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1930 _set_L2CR(save_l2cr);
1931
1932 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1933 _set_L3CR(save_l3cr);
1934
1935
1936 switch_mmu_context(NULL, current->active_mm);
1937
1938
1939 pmu_unlock();
1940 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1941 pmu_wait_complete(&req);
1942 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1943 pmu_wait_complete(&req);
1944
1945
1946 loops_per_jiffy /= 2;
1947
1948 return 0;
1949}
1950
1951#define PB3400_MEM_CTRL 0xf8000000
1952#define PB3400_MEM_CTRL_SLEEP 0x70
1953
1954static void __iomem *pb3400_mem_ctrl;
1955
1956static void powerbook_sleep_init_3400(void)
1957{
1958
1959 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1960 if (pb3400_mem_ctrl == NULL)
1961 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1962}
1963
1964static int powerbook_sleep_3400(void)
1965{
1966 int i, x;
1967 unsigned int hid0;
1968 unsigned long msr;
1969 struct adb_request sleep_req;
1970 unsigned int __iomem *mem_ctrl_sleep;
1971
1972 if (pb3400_mem_ctrl == NULL)
1973 return -ENOMEM;
1974 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1975
1976
1977
1978 for (i = 0x403f; i >= 0x4000; --i) {
1979 out_be32(mem_ctrl_sleep, i);
1980 do {
1981 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1982 } while (x == 0);
1983 if (x >= 0x100)
1984 break;
1985 }
1986
1987
1988 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1989 pmu_wait_complete(&sleep_req);
1990 pmu_unlock();
1991
1992 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1993
1994 asleep = 1;
1995
1996
1997 hid0 = mfspr(SPRN_HID0);
1998 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
1999 mtspr(SPRN_HID0, hid0);
2000 local_irq_enable();
2001 msr = mfmsr() | MSR_POW;
2002 while (asleep) {
2003 mb();
2004 mtmsr(msr);
2005 isync();
2006 }
2007 local_irq_disable();
2008
2009
2010 out_be32(mem_ctrl_sleep, 0x3f);
2011 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2012
2013 return 0;
2014}
2015
2016#endif
2017
2018
2019
2020
2021#define RB_SIZE 0x10
2022struct pmu_private {
2023 struct list_head list;
2024 int rb_get;
2025 int rb_put;
2026 struct rb_entry {
2027 unsigned short len;
2028 unsigned char data[16];
2029 } rb_buf[RB_SIZE];
2030 wait_queue_head_t wait;
2031 spinlock_t lock;
2032#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2033 int backlight_locker;
2034#endif
2035};
2036
2037static LIST_HEAD(all_pmu_pvt);
2038static DEFINE_SPINLOCK(all_pvt_lock);
2039
2040static void
2041pmu_pass_intr(unsigned char *data, int len)
2042{
2043 struct pmu_private *pp;
2044 struct list_head *list;
2045 int i;
2046 unsigned long flags;
2047
2048 if (len > sizeof(pp->rb_buf[0].data))
2049 len = sizeof(pp->rb_buf[0].data);
2050 spin_lock_irqsave(&all_pvt_lock, flags);
2051 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2052 pp = list_entry(list, struct pmu_private, list);
2053 spin_lock(&pp->lock);
2054 i = pp->rb_put + 1;
2055 if (i >= RB_SIZE)
2056 i = 0;
2057 if (i != pp->rb_get) {
2058 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2059 rp->len = len;
2060 memcpy(rp->data, data, len);
2061 pp->rb_put = i;
2062 wake_up_interruptible(&pp->wait);
2063 }
2064 spin_unlock(&pp->lock);
2065 }
2066 spin_unlock_irqrestore(&all_pvt_lock, flags);
2067}
2068
2069static int
2070pmu_open(struct inode *inode, struct file *file)
2071{
2072 struct pmu_private *pp;
2073 unsigned long flags;
2074
2075 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2076 if (pp == 0)
2077 return -ENOMEM;
2078 pp->rb_get = pp->rb_put = 0;
2079 spin_lock_init(&pp->lock);
2080 init_waitqueue_head(&pp->wait);
2081 mutex_lock(&pmu_info_proc_mutex);
2082 spin_lock_irqsave(&all_pvt_lock, flags);
2083#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2084 pp->backlight_locker = 0;
2085#endif
2086 list_add(&pp->list, &all_pmu_pvt);
2087 spin_unlock_irqrestore(&all_pvt_lock, flags);
2088 file->private_data = pp;
2089 mutex_unlock(&pmu_info_proc_mutex);
2090 return 0;
2091}
2092
2093static ssize_t
2094pmu_read(struct file *file, char __user *buf,
2095 size_t count, loff_t *ppos)
2096{
2097 struct pmu_private *pp = file->private_data;
2098 DECLARE_WAITQUEUE(wait, current);
2099 unsigned long flags;
2100 int ret = 0;
2101
2102 if (count < 1 || pp == 0)
2103 return -EINVAL;
2104 if (!access_ok(VERIFY_WRITE, buf, count))
2105 return -EFAULT;
2106
2107 spin_lock_irqsave(&pp->lock, flags);
2108 add_wait_queue(&pp->wait, &wait);
2109 current->state = TASK_INTERRUPTIBLE;
2110
2111 for (;;) {
2112 ret = -EAGAIN;
2113 if (pp->rb_get != pp->rb_put) {
2114 int i = pp->rb_get;
2115 struct rb_entry *rp = &pp->rb_buf[i];
2116 ret = rp->len;
2117 spin_unlock_irqrestore(&pp->lock, flags);
2118 if (ret > count)
2119 ret = count;
2120 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2121 ret = -EFAULT;
2122 if (++i >= RB_SIZE)
2123 i = 0;
2124 spin_lock_irqsave(&pp->lock, flags);
2125 pp->rb_get = i;
2126 }
2127 if (ret >= 0)
2128 break;
2129 if (file->f_flags & O_NONBLOCK)
2130 break;
2131 ret = -ERESTARTSYS;
2132 if (signal_pending(current))
2133 break;
2134 spin_unlock_irqrestore(&pp->lock, flags);
2135 schedule();
2136 spin_lock_irqsave(&pp->lock, flags);
2137 }
2138 current->state = TASK_RUNNING;
2139 remove_wait_queue(&pp->wait, &wait);
2140 spin_unlock_irqrestore(&pp->lock, flags);
2141
2142 return ret;
2143}
2144
2145static ssize_t
2146pmu_write(struct file *file, const char __user *buf,
2147 size_t count, loff_t *ppos)
2148{
2149 return 0;
2150}
2151
2152static unsigned int
2153pmu_fpoll(struct file *filp, poll_table *wait)
2154{
2155 struct pmu_private *pp = filp->private_data;
2156 unsigned int mask = 0;
2157 unsigned long flags;
2158
2159 if (pp == 0)
2160 return 0;
2161 poll_wait(filp, &pp->wait, wait);
2162 spin_lock_irqsave(&pp->lock, flags);
2163 if (pp->rb_get != pp->rb_put)
2164 mask |= POLLIN;
2165 spin_unlock_irqrestore(&pp->lock, flags);
2166 return mask;
2167}
2168
2169static int
2170pmu_release(struct inode *inode, struct file *file)
2171{
2172 struct pmu_private *pp = file->private_data;
2173 unsigned long flags;
2174
2175 if (pp != 0) {
2176 file->private_data = NULL;
2177 spin_lock_irqsave(&all_pvt_lock, flags);
2178 list_del(&pp->list);
2179 spin_unlock_irqrestore(&all_pvt_lock, flags);
2180
2181#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2182 if (pp->backlight_locker)
2183 pmac_backlight_enable();
2184#endif
2185
2186 kfree(pp);
2187 }
2188 return 0;
2189}
2190
2191#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2192static void pmac_suspend_disable_irqs(void)
2193{
2194
2195 pmac_pfunc_i2c_suspend();
2196 pmac_pfunc_base_suspend();
2197}
2198
2199static int powerbook_sleep(suspend_state_t state)
2200{
2201 int error = 0;
2202
2203
2204 while (!batt_req.complete)
2205 pmu_poll();
2206
2207
2208
2209
2210 enable_kernel_fp();
2211
2212#ifdef CONFIG_ALTIVEC
2213 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2214 enable_kernel_altivec();
2215#endif
2216
2217 switch (pmu_kind) {
2218 case PMU_OHARE_BASED:
2219 error = powerbook_sleep_3400();
2220 break;
2221 case PMU_HEATHROW_BASED:
2222 case PMU_PADDINGTON_BASED:
2223 error = powerbook_sleep_grackle();
2224 break;
2225 case PMU_KEYLARGO_BASED:
2226 error = powerbook_sleep_Core99();
2227 break;
2228 default:
2229 return -ENOSYS;
2230 }
2231
2232 if (error)
2233 return error;
2234
2235 mdelay(100);
2236
2237 return 0;
2238}
2239
2240static void pmac_suspend_enable_irqs(void)
2241{
2242
2243 adb_int_pending = 1;
2244 via_pmu_interrupt(0, NULL);
2245
2246 mdelay(10);
2247
2248
2249 pmac_pfunc_base_resume();
2250 pmac_pfunc_i2c_resume();
2251}
2252
2253static int pmu_sleep_valid(suspend_state_t state)
2254{
2255 return state == PM_SUSPEND_MEM
2256 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2257}
2258
2259static const struct platform_suspend_ops pmu_pm_ops = {
2260 .enter = powerbook_sleep,
2261 .valid = pmu_sleep_valid,
2262};
2263
2264static int register_pmu_pm_ops(void)
2265{
2266 if (pmu_kind == PMU_OHARE_BASED)
2267 powerbook_sleep_init_3400();
2268 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2269 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
2270 suspend_set_ops(&pmu_pm_ops);
2271
2272 return 0;
2273}
2274
2275device_initcall(register_pmu_pm_ops);
2276#endif
2277
2278static int pmu_ioctl(struct file *filp,
2279 u_int cmd, u_long arg)
2280{
2281 __u32 __user *argp = (__u32 __user *)arg;
2282 int error = -EINVAL;
2283
2284 switch (cmd) {
2285 case PMU_IOC_SLEEP:
2286 if (!capable(CAP_SYS_ADMIN))
2287 return -EACCES;
2288 return pm_suspend(PM_SUSPEND_MEM);
2289 case PMU_IOC_CAN_SLEEP:
2290 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
2291 return put_user(0, argp);
2292 else
2293 return put_user(1, argp);
2294
2295#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2296
2297 case PMU_IOC_GET_BACKLIGHT:
2298 {
2299 int brightness;
2300
2301 brightness = pmac_backlight_get_legacy_brightness();
2302 if (brightness < 0)
2303 return brightness;
2304 else
2305 return put_user(brightness, argp);
2306
2307 }
2308 case PMU_IOC_SET_BACKLIGHT:
2309 {
2310 int brightness;
2311
2312 error = get_user(brightness, argp);
2313 if (error)
2314 return error;
2315
2316 return pmac_backlight_set_legacy_brightness(brightness);
2317 }
2318#ifdef CONFIG_INPUT_ADBHID
2319 case PMU_IOC_GRAB_BACKLIGHT: {
2320 struct pmu_private *pp = filp->private_data;
2321
2322 if (pp->backlight_locker)
2323 return 0;
2324
2325 pp->backlight_locker = 1;
2326 pmac_backlight_disable();
2327
2328 return 0;
2329 }
2330#endif
2331#endif
2332
2333 case PMU_IOC_GET_MODEL:
2334 return put_user(pmu_kind, argp);
2335 case PMU_IOC_HAS_ADB:
2336 return put_user(pmu_has_adb, argp);
2337 }
2338 return error;
2339}
2340
2341static long pmu_unlocked_ioctl(struct file *filp,
2342 u_int cmd, u_long arg)
2343{
2344 int ret;
2345
2346 mutex_lock(&pmu_info_proc_mutex);
2347 ret = pmu_ioctl(filp, cmd, arg);
2348 mutex_unlock(&pmu_info_proc_mutex);
2349
2350 return ret;
2351}
2352
2353#ifdef CONFIG_COMPAT
2354#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2355#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2356#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2357#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2358#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2359#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2360
2361static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2362{
2363 switch (cmd) {
2364 case PMU_IOC_SLEEP:
2365 break;
2366 case PMU_IOC_GET_BACKLIGHT32:
2367 cmd = PMU_IOC_GET_BACKLIGHT;
2368 break;
2369 case PMU_IOC_SET_BACKLIGHT32:
2370 cmd = PMU_IOC_SET_BACKLIGHT;
2371 break;
2372 case PMU_IOC_GET_MODEL32:
2373 cmd = PMU_IOC_GET_MODEL;
2374 break;
2375 case PMU_IOC_HAS_ADB32:
2376 cmd = PMU_IOC_HAS_ADB;
2377 break;
2378 case PMU_IOC_CAN_SLEEP32:
2379 cmd = PMU_IOC_CAN_SLEEP;
2380 break;
2381 case PMU_IOC_GRAB_BACKLIGHT32:
2382 cmd = PMU_IOC_GRAB_BACKLIGHT;
2383 break;
2384 default:
2385 return -ENOIOCTLCMD;
2386 }
2387 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2388}
2389#endif
2390
2391static const struct file_operations pmu_device_fops = {
2392 .read = pmu_read,
2393 .write = pmu_write,
2394 .poll = pmu_fpoll,
2395 .unlocked_ioctl = pmu_unlocked_ioctl,
2396#ifdef CONFIG_COMPAT
2397 .compat_ioctl = compat_pmu_ioctl,
2398#endif
2399 .open = pmu_open,
2400 .release = pmu_release,
2401 .llseek = noop_llseek,
2402};
2403
2404static struct miscdevice pmu_device = {
2405 PMU_MINOR, "pmu", &pmu_device_fops
2406};
2407
2408static int pmu_device_init(void)
2409{
2410 if (!via)
2411 return 0;
2412 if (misc_register(&pmu_device) < 0)
2413 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
2414 return 0;
2415}
2416device_initcall(pmu_device_init);
2417
2418
2419#ifdef DEBUG_SLEEP
2420static inline void
2421polled_handshake(volatile unsigned char __iomem *via)
2422{
2423 via[B] &= ~TREQ; eieio();
2424 while ((via[B] & TACK) != 0)
2425 ;
2426 via[B] |= TREQ; eieio();
2427 while ((via[B] & TACK) == 0)
2428 ;
2429}
2430
2431static inline void
2432polled_send_byte(volatile unsigned char __iomem *via, int x)
2433{
2434 via[ACR] |= SR_OUT | SR_EXT; eieio();
2435 via[SR] = x; eieio();
2436 polled_handshake(via);
2437}
2438
2439static inline int
2440polled_recv_byte(volatile unsigned char __iomem *via)
2441{
2442 int x;
2443
2444 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2445 x = via[SR]; eieio();
2446 polled_handshake(via);
2447 x = via[SR]; eieio();
2448 return x;
2449}
2450
2451int
2452pmu_polled_request(struct adb_request *req)
2453{
2454 unsigned long flags;
2455 int i, l, c;
2456 volatile unsigned char __iomem *v = via;
2457
2458 req->complete = 1;
2459 c = req->data[0];
2460 l = pmu_data_len[c][0];
2461 if (l >= 0 && req->nbytes != l + 1)
2462 return -EINVAL;
2463
2464 local_irq_save(flags);
2465 while (pmu_state != idle)
2466 pmu_poll();
2467
2468 while ((via[B] & TACK) == 0)
2469 ;
2470 polled_send_byte(v, c);
2471 if (l < 0) {
2472 l = req->nbytes - 1;
2473 polled_send_byte(v, l);
2474 }
2475 for (i = 1; i <= l; ++i)
2476 polled_send_byte(v, req->data[i]);
2477
2478 l = pmu_data_len[c][1];
2479 if (l < 0)
2480 l = polled_recv_byte(v);
2481 for (i = 0; i < l; ++i)
2482 req->reply[i + req->reply_len] = polled_recv_byte(v);
2483
2484 if (req->done)
2485 (*req->done)(req);
2486
2487 local_irq_restore(flags);
2488 return 0;
2489}
2490
2491
2492void pmu_blink(int n)
2493{
2494 struct adb_request req;
2495
2496 memset(&req, 0, sizeof(req));
2497
2498 for (; n > 0; --n) {
2499 req.nbytes = 4;
2500 req.done = NULL;
2501 req.data[0] = 0xee;
2502 req.data[1] = 4;
2503 req.data[2] = 0;
2504 req.data[3] = 1;
2505 req.reply[0] = ADB_RET_OK;
2506 req.reply_len = 1;
2507 req.reply_expected = 0;
2508 pmu_polled_request(&req);
2509 mdelay(50);
2510 req.nbytes = 4;
2511 req.done = NULL;
2512 req.data[0] = 0xee;
2513 req.data[1] = 4;
2514 req.data[2] = 0;
2515 req.data[3] = 0;
2516 req.reply[0] = ADB_RET_OK;
2517 req.reply_len = 1;
2518 req.reply_expected = 0;
2519 pmu_polled_request(&req);
2520 mdelay(50);
2521 }
2522 mdelay(50);
2523}
2524#endif
2525
2526#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2527int pmu_sys_suspended;
2528
2529static int pmu_syscore_suspend(void)
2530{
2531
2532 pmu_suspend();
2533 pmu_sys_suspended = 1;
2534
2535#ifdef CONFIG_PMAC_BACKLIGHT
2536
2537 pmu_backlight_set_sleep(1);
2538#endif
2539
2540 return 0;
2541}
2542
2543static void pmu_syscore_resume(void)
2544{
2545 struct adb_request req;
2546
2547 if (!pmu_sys_suspended)
2548 return;
2549
2550
2551 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2552 pmu_wait_complete(&req);
2553
2554#ifdef CONFIG_PMAC_BACKLIGHT
2555
2556 pmu_backlight_set_sleep(0);
2557#endif
2558
2559 pmu_resume();
2560 pmu_sys_suspended = 0;
2561}
2562
2563static struct syscore_ops pmu_syscore_ops = {
2564 .suspend = pmu_syscore_suspend,
2565 .resume = pmu_syscore_resume,
2566};
2567
2568static int pmu_syscore_register(void)
2569{
2570 register_syscore_ops(&pmu_syscore_ops);
2571
2572 return 0;
2573}
2574subsys_initcall(pmu_syscore_register);
2575#endif
2576
2577EXPORT_SYMBOL(pmu_request);
2578EXPORT_SYMBOL(pmu_queue_request);
2579EXPORT_SYMBOL(pmu_poll);
2580EXPORT_SYMBOL(pmu_poll_adb);
2581EXPORT_SYMBOL(pmu_wait_complete);
2582EXPORT_SYMBOL(pmu_suspend);
2583EXPORT_SYMBOL(pmu_resume);
2584EXPORT_SYMBOL(pmu_unlock);
2585#if defined(CONFIG_PPC32)
2586EXPORT_SYMBOL(pmu_enable_irled);
2587EXPORT_SYMBOL(pmu_battery_count);
2588EXPORT_SYMBOL(pmu_batteries);
2589EXPORT_SYMBOL(pmu_power_flags);
2590#endif
2591
2592
