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21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/timer.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/slab.h>
29#include <linux/videodev2.h>
30#include <linux/i2c.h>
31#include <linux/init.h>
32#include <linux/kthread.h>
33#include <linux/freezer.h>
34
35#include <media/tvaudio.h>
36#include <media/v4l2-device.h>
37#include <media/v4l2-chip-ident.h>
38
39#include <media/i2c-addr.h>
40
41
42
43
44static int debug;
45module_param(debug, int, 0644);
46
47MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
48MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
49MODULE_LICENSE("GPL");
50
51#define UNSET (-1U)
52
53
54
55
56#define MAXREGS 256
57
58struct CHIPSTATE;
59typedef int (*getvalue)(int);
60typedef int (*checkit)(struct CHIPSTATE*);
61typedef int (*initialize)(struct CHIPSTATE*);
62typedef int (*getrxsubchans)(struct CHIPSTATE *);
63typedef void (*setaudmode)(struct CHIPSTATE*, int mode);
64
65
66typedef struct AUDIOCMD {
67 int count;
68 unsigned char bytes[MAXREGS+1];
69} audiocmd;
70
71
72struct CHIPDESC {
73 char *name;
74 int addr_lo, addr_hi;
75 int registers;
76
77 int *insmodopt;
78 checkit checkit;
79 initialize initialize;
80 int flags;
81#define CHIP_HAS_VOLUME 1
82#define CHIP_HAS_BASSTREBLE 2
83#define CHIP_HAS_INPUTSEL 4
84#define CHIP_NEED_CHECKMODE 8
85
86
87 audiocmd init;
88
89
90 int leftreg,rightreg,treblereg,bassreg;
91
92
93 int leftinit,rightinit,trebleinit,bassinit;
94
95
96 getvalue volfunc,treblefunc,bassfunc;
97
98
99 getrxsubchans getrxsubchans;
100 setaudmode setaudmode;
101
102
103 int inputreg;
104 int inputmap[4];
105 int inputmute;
106 int inputmask;
107};
108
109
110struct CHIPSTATE {
111 struct v4l2_subdev sd;
112
113
114
115 struct CHIPDESC *desc;
116
117
118 audiocmd shadow;
119
120
121 __u16 left, right, treble, bass, muted;
122 int prevmode;
123 int radio;
124 int input;
125
126
127 struct task_struct *thread;
128 struct timer_list wt;
129 int audmode;
130};
131
132static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
133{
134 return container_of(sd, struct CHIPSTATE, sd);
135}
136
137
138
139
140
141static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
142{
143 struct v4l2_subdev *sd = &chip->sd;
144 struct i2c_client *c = v4l2_get_subdevdata(sd);
145 unsigned char buffer[2];
146
147 if (subaddr < 0) {
148 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
149 chip->shadow.bytes[1] = val;
150 buffer[0] = val;
151 if (1 != i2c_master_send(c, buffer, 1)) {
152 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
153 return -1;
154 }
155 } else {
156 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
157 v4l2_info(sd,
158 "Tried to access a non-existent register: %d\n",
159 subaddr);
160 return -EINVAL;
161 }
162
163 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
164 subaddr, val);
165 chip->shadow.bytes[subaddr+1] = val;
166 buffer[0] = subaddr;
167 buffer[1] = val;
168 if (2 != i2c_master_send(c, buffer, 2)) {
169 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
170 subaddr, val);
171 return -1;
172 }
173 }
174 return 0;
175}
176
177static int chip_write_masked(struct CHIPSTATE *chip,
178 int subaddr, int val, int mask)
179{
180 struct v4l2_subdev *sd = &chip->sd;
181
182 if (mask != 0) {
183 if (subaddr < 0) {
184 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
185 } else {
186 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
187 v4l2_info(sd,
188 "Tried to access a non-existent register: %d\n",
189 subaddr);
190 return -EINVAL;
191 }
192
193 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
194 }
195 }
196 return chip_write(chip, subaddr, val);
197}
198
199static int chip_read(struct CHIPSTATE *chip)
200{
201 struct v4l2_subdev *sd = &chip->sd;
202 struct i2c_client *c = v4l2_get_subdevdata(sd);
203 unsigned char buffer;
204
205 if (1 != i2c_master_recv(c, &buffer, 1)) {
206 v4l2_warn(sd, "I/O error (read)\n");
207 return -1;
208 }
209 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
210 return buffer;
211}
212
213static int chip_read2(struct CHIPSTATE *chip, int subaddr)
214{
215 struct v4l2_subdev *sd = &chip->sd;
216 struct i2c_client *c = v4l2_get_subdevdata(sd);
217 unsigned char write[1];
218 unsigned char read[1];
219 struct i2c_msg msgs[2] = {
220 { c->addr, 0, 1, write },
221 { c->addr, I2C_M_RD, 1, read }
222 };
223
224 write[0] = subaddr;
225
226 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
227 v4l2_warn(sd, "I/O error (read2)\n");
228 return -1;
229 }
230 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
231 subaddr, read[0]);
232 return read[0];
233}
234
235static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
236{
237 struct v4l2_subdev *sd = &chip->sd;
238 struct i2c_client *c = v4l2_get_subdevdata(sd);
239 int i;
240
241 if (0 == cmd->count)
242 return 0;
243
244 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
245 v4l2_info(sd,
246 "Tried to access a non-existent register range: %d to %d\n",
247 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
248 return -EINVAL;
249 }
250
251
252
253
254 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
255 name, cmd->bytes[0]);
256 for (i = 1; i < cmd->count; i++) {
257 if (debug)
258 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
259 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
260 }
261 if (debug)
262 printk(KERN_CONT "\n");
263
264
265 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
266 v4l2_warn(sd, "I/O error (%s)\n", name);
267 return -1;
268 }
269 return 0;
270}
271
272
273
274
275
276
277
278
279static void chip_thread_wake(unsigned long data)
280{
281 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
282 wake_up_process(chip->thread);
283}
284
285static int chip_thread(void *data)
286{
287 struct CHIPSTATE *chip = data;
288 struct CHIPDESC *desc = chip->desc;
289 struct v4l2_subdev *sd = &chip->sd;
290 int mode, selected;
291
292 v4l2_dbg(1, debug, sd, "thread started\n");
293 set_freezable();
294 for (;;) {
295 set_current_state(TASK_INTERRUPTIBLE);
296 if (!kthread_should_stop())
297 schedule();
298 set_current_state(TASK_RUNNING);
299 try_to_freeze();
300 if (kthread_should_stop())
301 break;
302 v4l2_dbg(1, debug, sd, "thread wakeup\n");
303
304
305 if (chip->radio)
306 continue;
307
308
309 mode = desc->getrxsubchans(chip);
310 if (mode == chip->prevmode)
311 continue;
312
313
314 v4l2_dbg(1, debug, sd, "thread checkmode\n");
315
316 chip->prevmode = mode;
317
318 selected = V4L2_TUNER_MODE_MONO;
319 switch (chip->audmode) {
320 case V4L2_TUNER_MODE_MONO:
321 if (mode & V4L2_TUNER_SUB_LANG1)
322 selected = V4L2_TUNER_MODE_LANG1;
323 break;
324 case V4L2_TUNER_MODE_STEREO:
325 case V4L2_TUNER_MODE_LANG1:
326 if (mode & V4L2_TUNER_SUB_LANG1)
327 selected = V4L2_TUNER_MODE_LANG1;
328 else if (mode & V4L2_TUNER_SUB_STEREO)
329 selected = V4L2_TUNER_MODE_STEREO;
330 break;
331 case V4L2_TUNER_MODE_LANG2:
332 if (mode & V4L2_TUNER_SUB_LANG2)
333 selected = V4L2_TUNER_MODE_LANG2;
334 else if (mode & V4L2_TUNER_SUB_STEREO)
335 selected = V4L2_TUNER_MODE_STEREO;
336 break;
337 case V4L2_TUNER_MODE_LANG1_LANG2:
338 if (mode & V4L2_TUNER_SUB_LANG2)
339 selected = V4L2_TUNER_MODE_LANG1_LANG2;
340 else if (mode & V4L2_TUNER_SUB_STEREO)
341 selected = V4L2_TUNER_MODE_STEREO;
342 }
343 desc->setaudmode(chip, selected);
344
345
346 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
347 }
348
349 v4l2_dbg(1, debug, sd, "thread exiting\n");
350 return 0;
351}
352
353
354
355
356#define TDA9840_SW 0x00
357#define TDA9840_LVADJ 0x02
358#define TDA9840_STADJ 0x03
359#define TDA9840_TEST 0x04
360
361#define TDA9840_MONO 0x10
362#define TDA9840_STEREO 0x2a
363#define TDA9840_DUALA 0x12
364#define TDA9840_DUALB 0x1e
365#define TDA9840_DUALAB 0x1a
366#define TDA9840_DUALBA 0x16
367#define TDA9840_EXTERNAL 0x7a
368
369#define TDA9840_DS_DUAL 0x20
370#define TDA9840_ST_STEREO 0x40
371#define TDA9840_PONRES 0x80
372
373#define TDA9840_TEST_INT1SN 0x1
374#define TDA9840_TEST_INTFU 0x02
375
376static int tda9840_getrxsubchans(struct CHIPSTATE *chip)
377{
378 struct v4l2_subdev *sd = &chip->sd;
379 int val, mode;
380
381 val = chip_read(chip);
382 mode = V4L2_TUNER_SUB_MONO;
383 if (val & TDA9840_DS_DUAL)
384 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
385 if (val & TDA9840_ST_STEREO)
386 mode = V4L2_TUNER_SUB_STEREO;
387
388 v4l2_dbg(1, debug, sd,
389 "tda9840_getrxsubchans(): raw chip read: %d, return: %d\n",
390 val, mode);
391 return mode;
392}
393
394static void tda9840_setaudmode(struct CHIPSTATE *chip, int mode)
395{
396 int update = 1;
397 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
398
399 switch (mode) {
400 case V4L2_TUNER_MODE_MONO:
401 t |= TDA9840_MONO;
402 break;
403 case V4L2_TUNER_MODE_STEREO:
404 t |= TDA9840_STEREO;
405 break;
406 case V4L2_TUNER_MODE_LANG1:
407 t |= TDA9840_DUALA;
408 break;
409 case V4L2_TUNER_MODE_LANG2:
410 t |= TDA9840_DUALB;
411 break;
412 case V4L2_TUNER_MODE_LANG1_LANG2:
413 t |= TDA9840_DUALAB;
414 break;
415 default:
416 update = 0;
417 }
418
419 if (update)
420 chip_write(chip, TDA9840_SW, t);
421}
422
423static int tda9840_checkit(struct CHIPSTATE *chip)
424{
425 int rc;
426 rc = chip_read(chip);
427
428 return ((rc & 0x1f) == 0) ? 1 : 0;
429}
430
431
432
433
434
435#define TDA9855_VR 0x00
436#define TDA9855_VL 0x01
437#define TDA9855_BA 0x02
438#define TDA9855_TR 0x03
439#define TDA9855_SW 0x04
440
441
442#define TDA9850_C4 0x04
443
444
445#define TDA985x_C5 0x05
446#define TDA985x_C6 0x06
447#define TDA985x_C7 0x07
448#define TDA985x_A1 0x08
449#define TDA985x_A2 0x09
450#define TDA985x_A3 0x0a
451
452
453
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460
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473
474
475
476
477
478
479
480
481#define TDA9855_MUTE 1<<7
482#define TDA9855_AVL 1<<6
483#define TDA9855_LOUD 1<<5
484#define TDA9855_SUR 1<<3
485
486
487
488#define TDA9855_EXT 1<<2
489#define TDA9855_INT 0
490
491
492
493
494
495
496
497
498#define TDA985x_SAP 3<<6
499#define TDA985x_MONOSAP 2<<6
500#define TDA985x_STEREO 1<<6
501#define TDA985x_MONO 0
502#define TDA985x_LMU 1<<3
503
504
505#define TDA9855_TZCM 1<<5
506#define TDA9855_VZCM 1<<4
507#define TDA9855_LINEAR 0
508#define TDA9855_PSEUDO 1
509#define TDA9855_SPAT_30 2
510#define TDA9855_SPAT_50 3
511#define TDA9855_E_MONO 7
512
513
514
515
516
517
518
519
520
521
522#define TDA985x_STP 1<<5
523#define TDA985x_SAPP 1<<6
524#define TDA985x_STS 1<<7
525
526
527
528
529
530#define TDA985x_ADJ 1<<7
531
532static int tda9855_volume(int val) { return val/0x2e8+0x27; }
533static int tda9855_bass(int val) { return val/0xccc+0x06; }
534static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
535
536static int tda985x_getrxsubchans(struct CHIPSTATE *chip)
537{
538 int mode, val;
539
540
541
542 mode = V4L2_TUNER_SUB_MONO;
543 val = chip_read(chip);
544 if (val & TDA985x_STP)
545 mode = V4L2_TUNER_SUB_STEREO;
546 if (val & TDA985x_SAPP)
547 mode |= V4L2_TUNER_SUB_SAP;
548 return mode;
549}
550
551static void tda985x_setaudmode(struct CHIPSTATE *chip, int mode)
552{
553 int update = 1;
554 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
555
556 switch (mode) {
557 case V4L2_TUNER_MODE_MONO:
558 c6 |= TDA985x_MONO;
559 break;
560 case V4L2_TUNER_MODE_STEREO:
561 case V4L2_TUNER_MODE_LANG1:
562 c6 |= TDA985x_STEREO;
563 break;
564 case V4L2_TUNER_MODE_SAP:
565 c6 |= TDA985x_SAP;
566 break;
567 case V4L2_TUNER_MODE_LANG1_LANG2:
568 c6 |= TDA985x_MONOSAP;
569 break;
570 default:
571 update = 0;
572 }
573 if (update)
574 chip_write(chip,TDA985x_C6,c6);
575}
576
577
578
579
580
581
582
583#define TDA9873_SW 0x00
584#define TDA9873_AD 0x01
585#define TDA9873_PT 0x02
586
587
588
589
590
591
592
593
594
595#define TDA9873_INP_MASK 3
596#define TDA9873_INTERNAL 0
597#define TDA9873_EXT_STEREO 2
598#define TDA9873_EXT_MONO 1
599
600
601
602
603
604
605
606
607
608
609
610
611#define TDA9873_TR_MASK (7 << 2)
612#define TDA9873_TR_MONO 4
613#define TDA9873_TR_STEREO 1 << 4
614#define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2))
615#define TDA9873_TR_DUALA 1 << 2
616#define TDA9873_TR_DUALB 1 << 3
617#define TDA9873_TR_DUALAB 0
618
619
620
621
622
623
624
625#define TDA9873_GAIN_NORMAL 1 << 5
626#define TDA9873_MUTE 1 << 6
627#define TDA9873_AUTOMUTE 1 << 7
628
629
630
631
632
633
634
635#define TDA9873_STEREO_ADJ 0x06
636
637
638
639
640
641
642
643
644
645
646#define TDA9873_BG 0
647#define TDA9873_M 1
648#define TDA9873_DK1 2
649#define TDA9873_DK2 3
650#define TDA9873_DK3 4
651#define TDA9873_I 5
652
653
654
655#define TDA9873_IDR_NORM 0
656#define TDA9873_IDR_FAST 1 << 7
657
658
659
660
661
662
663
664
665
666
667
668#define TDA9873_PORTS 3
669
670
671#define TDA9873_TST_PORT 1 << 2
672
673
674
675
676
677
678
679
680#define TDA9873_MOUT_MONO 0
681#define TDA9873_MOUT_FMONO 0
682#define TDA9873_MOUT_DUALA 0
683#define TDA9873_MOUT_DUALB 1 << 3
684#define TDA9873_MOUT_ST 1 << 4
685#define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3))
686#define TDA9873_MOUT_EXTL 1 << 5
687#define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3))
688#define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4))
689#define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3))
690
691
692#define TDA9873_PONR 0
693#define TDA9873_STEREO 2
694#define TDA9873_DUAL 4
695
696static int tda9873_getrxsubchans(struct CHIPSTATE *chip)
697{
698 struct v4l2_subdev *sd = &chip->sd;
699 int val,mode;
700
701 val = chip_read(chip);
702 mode = V4L2_TUNER_SUB_MONO;
703 if (val & TDA9873_STEREO)
704 mode = V4L2_TUNER_SUB_STEREO;
705 if (val & TDA9873_DUAL)
706 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
707 v4l2_dbg(1, debug, sd,
708 "tda9873_getrxsubchans(): raw chip read: %d, return: %d\n",
709 val, mode);
710 return mode;
711}
712
713static void tda9873_setaudmode(struct CHIPSTATE *chip, int mode)
714{
715 struct v4l2_subdev *sd = &chip->sd;
716 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
717
718
719 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
720 v4l2_dbg(1, debug, sd,
721 "tda9873_setaudmode(): external input\n");
722 return;
723 }
724
725 v4l2_dbg(1, debug, sd,
726 "tda9873_setaudmode(): chip->shadow.bytes[%d] = %d\n",
727 TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
728 v4l2_dbg(1, debug, sd, "tda9873_setaudmode(): sw_data = %d\n",
729 sw_data);
730
731 switch (mode) {
732 case V4L2_TUNER_MODE_MONO:
733 sw_data |= TDA9873_TR_MONO;
734 break;
735 case V4L2_TUNER_MODE_STEREO:
736 sw_data |= TDA9873_TR_STEREO;
737 break;
738 case V4L2_TUNER_MODE_LANG1:
739 sw_data |= TDA9873_TR_DUALA;
740 break;
741 case V4L2_TUNER_MODE_LANG2:
742 sw_data |= TDA9873_TR_DUALB;
743 break;
744 case V4L2_TUNER_MODE_LANG1_LANG2:
745 sw_data |= TDA9873_TR_DUALAB;
746 break;
747 default:
748 return;
749 }
750
751 chip_write(chip, TDA9873_SW, sw_data);
752 v4l2_dbg(1, debug, sd,
753 "tda9873_setaudmode(): req. mode %d; chip_write: %d\n",
754 mode, sw_data);
755}
756
757static int tda9873_checkit(struct CHIPSTATE *chip)
758{
759 int rc;
760
761 if (-1 == (rc = chip_read2(chip,254)))
762 return 0;
763 return (rc & ~0x1f) == 0x80;
764}
765
766
767
768
769
770
771
772#define TDA9874A_AGCGR 0x00
773#define TDA9874A_GCONR 0x01
774#define TDA9874A_MSR 0x02
775#define TDA9874A_C1FRA 0x03
776#define TDA9874A_C1FRB 0x04
777#define TDA9874A_C1FRC 0x05
778#define TDA9874A_C2FRA 0x06
779#define TDA9874A_C2FRB 0x07
780#define TDA9874A_C2FRC 0x08
781#define TDA9874A_DCR 0x09
782#define TDA9874A_FMER 0x0a
783#define TDA9874A_FMMR 0x0b
784#define TDA9874A_C1OLAR 0x0c
785#define TDA9874A_C2OLAR 0x0d
786#define TDA9874A_NCONR 0x0e
787#define TDA9874A_NOLAR 0x0f
788#define TDA9874A_NLELR 0x10
789#define TDA9874A_NUELR 0x11
790#define TDA9874A_AMCONR 0x12
791#define TDA9874A_SDACOSR 0x13
792#define TDA9874A_AOSR 0x14
793#define TDA9874A_DAICONR 0x15
794#define TDA9874A_I2SOSR 0x16
795#define TDA9874A_I2SOLAR 0x17
796#define TDA9874A_MDACOSR 0x18
797#define TDA9874A_ESP 0xFF
798
799
800#define TDA9874A_DSR 0x00
801#define TDA9874A_NSR 0x01
802#define TDA9874A_NECR 0x02
803#define TDA9874A_DR1 0x03
804#define TDA9874A_DR2 0x04
805#define TDA9874A_LLRA 0x05
806#define TDA9874A_LLRB 0x06
807#define TDA9874A_SIFLR 0x07
808#define TDA9874A_TR2 252
809#define TDA9874A_TR1 253
810#define TDA9874A_DIC 254
811#define TDA9874A_SIC 255
812
813
814static int tda9874a_mode = 1;
815static int tda9874a_GCONR = 0xc0;
816static int tda9874a_NCONR = 0x01;
817static int tda9874a_ESP = 0x07;
818static int tda9874a_dic = -1;
819
820
821static unsigned int tda9874a_SIF = UNSET;
822static unsigned int tda9874a_AMSEL = UNSET;
823static unsigned int tda9874a_STD = UNSET;
824module_param(tda9874a_SIF, int, 0444);
825module_param(tda9874a_AMSEL, int, 0444);
826module_param(tda9874a_STD, int, 0444);
827
828
829
830
831
832
833
834
835
836static struct tda9874a_MODES {
837 char *name;
838 audiocmd cmd;
839} tda9874a_modelist[9] = {
840 { "A2, B/G",
841 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
842 { "A2, M (Korea)",
843 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
844 { "A2, D/K (1)",
845 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
846 { "A2, D/K (2)",
847 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
848 { "A2, D/K (3)",
849 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
850 { "NICAM, I",
851 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
852 { "NICAM, B/G",
853 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
854 { "NICAM, D/K",
855 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
856 { "NICAM, L",
857 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
858};
859
860static int tda9874a_setup(struct CHIPSTATE *chip)
861{
862 struct v4l2_subdev *sd = &chip->sd;
863
864 chip_write(chip, TDA9874A_AGCGR, 0x00);
865 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
866 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
867 if(tda9874a_dic == 0x11) {
868 chip_write(chip, TDA9874A_FMMR, 0x80);
869 } else {
870 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
871 chip_write(chip, TDA9874A_FMMR, 0x00);
872 }
873 chip_write(chip, TDA9874A_C1OLAR, 0x00);
874 chip_write(chip, TDA9874A_C2OLAR, 0x00);
875 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
876 chip_write(chip, TDA9874A_NOLAR, 0x00);
877
878
879
880 chip_write(chip, TDA9874A_NLELR, 0x14);
881 chip_write(chip, TDA9874A_NUELR, 0x50);
882
883 if(tda9874a_dic == 0x11) {
884 chip_write(chip, TDA9874A_AMCONR, 0xf9);
885 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
886 chip_write(chip, TDA9874A_AOSR, 0x80);
887 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
888 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
889 } else {
890 chip_write(chip, TDA9874A_AMCONR, 0xfb);
891 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
892 chip_write(chip, TDA9874A_AOSR, 0x00);
893 }
894 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
895 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
896 return 1;
897}
898
899static int tda9874a_getrxsubchans(struct CHIPSTATE *chip)
900{
901 struct v4l2_subdev *sd = &chip->sd;
902 int dsr,nsr,mode;
903 int necr;
904
905 mode = V4L2_TUNER_SUB_MONO;
906
907 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
908 return mode;
909 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
910 return mode;
911 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
912 return mode;
913
914
915 chip->shadow.bytes[MAXREGS-2] = dsr;
916 chip->shadow.bytes[MAXREGS-1] = nsr;
917
918 if(tda9874a_mode) {
919
920
921
922
923
924
925
926
927 if(nsr & 0x02)
928 mode = V4L2_TUNER_SUB_STEREO;
929 if(nsr & 0x01)
930 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
931 } else {
932 if(dsr & 0x02)
933 mode = V4L2_TUNER_SUB_STEREO;
934 if(dsr & 0x04)
935 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
936 }
937
938 v4l2_dbg(1, debug, sd,
939 "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
940 dsr, nsr, necr, mode);
941 return mode;
942}
943
944static void tda9874a_setaudmode(struct CHIPSTATE *chip, int mode)
945{
946 struct v4l2_subdev *sd = &chip->sd;
947
948
949
950 if (tda9874a_mode) {
951 if(chip->shadow.bytes[MAXREGS-2] & 0x20)
952 tda9874a_NCONR &= 0xfe;
953 else
954 tda9874a_NCONR |= 0x01;
955 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
956 }
957
958
959
960
961
962
963
964 if(tda9874a_dic == 0x11) {
965 int aosr = 0x80;
966 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
967
968 switch(mode) {
969 case V4L2_TUNER_MODE_MONO:
970 case V4L2_TUNER_MODE_STEREO:
971 break;
972 case V4L2_TUNER_MODE_LANG1:
973 aosr = 0x80;
974 mdacosr = (tda9874a_mode) ? 0x82:0x80;
975 break;
976 case V4L2_TUNER_MODE_LANG2:
977 aosr = 0xa0;
978 mdacosr = (tda9874a_mode) ? 0x83:0x81;
979 break;
980 case V4L2_TUNER_MODE_LANG1_LANG2:
981 aosr = 0x00;
982 mdacosr = (tda9874a_mode) ? 0x82:0x80;
983 break;
984 default:
985 return;
986 }
987 chip_write(chip, TDA9874A_AOSR, aosr);
988 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
989
990 v4l2_dbg(1, debug, sd,
991 "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
992 mode, aosr, mdacosr);
993
994 } else {
995 int fmmr,aosr;
996
997 switch(mode) {
998 case V4L2_TUNER_MODE_MONO:
999 fmmr = 0x00;
1000 aosr = 0x10;
1001 break;
1002 case V4L2_TUNER_MODE_STEREO:
1003 if(tda9874a_mode) {
1004 fmmr = 0x00;
1005 aosr = 0x00;
1006 } else {
1007 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04;
1008 aosr = 0x00;
1009 }
1010 break;
1011 case V4L2_TUNER_MODE_LANG1:
1012 fmmr = 0x02;
1013 aosr = 0x10;
1014 break;
1015 case V4L2_TUNER_MODE_LANG2:
1016 fmmr = 0x02;
1017 aosr = 0x20;
1018 break;
1019 case V4L2_TUNER_MODE_LANG1_LANG2:
1020 fmmr = 0x02;
1021 aosr = 0x00;
1022 break;
1023 default:
1024 return;
1025 }
1026 chip_write(chip, TDA9874A_FMMR, fmmr);
1027 chip_write(chip, TDA9874A_AOSR, aosr);
1028
1029 v4l2_dbg(1, debug, sd,
1030 "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1031 mode, fmmr, aosr);
1032 }
1033}
1034
1035static int tda9874a_checkit(struct CHIPSTATE *chip)
1036{
1037 struct v4l2_subdev *sd = &chip->sd;
1038 int dic,sic;
1039
1040 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1041 return 0;
1042 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1043 return 0;
1044
1045 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1046
1047 if((dic == 0x11)||(dic == 0x07)) {
1048 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1049 tda9874a_dic = dic;
1050 return 1;
1051 }
1052 return 0;
1053}
1054
1055static int tda9874a_initialize(struct CHIPSTATE *chip)
1056{
1057 if (tda9874a_SIF > 2)
1058 tda9874a_SIF = 1;
1059 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1060 tda9874a_STD = 0;
1061 if(tda9874a_AMSEL > 1)
1062 tda9874a_AMSEL = 0;
1063
1064 if(tda9874a_SIF == 1)
1065 tda9874a_GCONR = 0xc0;
1066 else
1067 tda9874a_GCONR = 0xc1;
1068
1069 tda9874a_ESP = tda9874a_STD;
1070 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1071
1072 if(tda9874a_AMSEL == 0)
1073 tda9874a_NCONR = 0x01;
1074 else
1075 tda9874a_NCONR = 0x05;
1076
1077 tda9874a_setup(chip);
1078 return 0;
1079}
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090#define TDA9875_MUT 0x12
1091#define TDA9875_CFG 0x01
1092#define TDA9875_DACOS 0x13
1093#define TDA9875_LOSR 0x16
1094
1095#define TDA9875_CH1V 0x0c
1096#define TDA9875_CH2V 0x0d
1097#define TDA9875_SC1 0x14
1098#define TDA9875_SC2 0x15
1099
1100#define TDA9875_ADCIS 0x17
1101#define TDA9875_AER 0x19
1102#define TDA9875_MCS 0x18
1103#define TDA9875_MVL 0x1a
1104#define TDA9875_MVR 0x1b
1105#define TDA9875_MBA 0x1d
1106#define TDA9875_MTR 0x1e
1107#define TDA9875_ACS 0x1f
1108#define TDA9875_AVL 0x20
1109#define TDA9875_AVR 0x21
1110#define TDA9875_ABA 0x22
1111#define TDA9875_ATR 0x23
1112
1113#define TDA9875_MSR 0x02
1114#define TDA9875_C1MSB 0x03
1115#define TDA9875_C1MIB 0x04
1116#define TDA9875_C1LSB 0x05
1117#define TDA9875_C2MSB 0x06
1118#define TDA9875_C2MIB 0x07
1119#define TDA9875_C2LSB 0x08
1120#define TDA9875_DCR 0x09
1121#define TDA9875_DEEM 0x0a
1122#define TDA9875_FMAT 0x0b
1123
1124
1125#define TDA9875_MUTE_ON 0xff
1126#define TDA9875_MUTE_OFF 0xcc
1127
1128static int tda9875_initialize(struct CHIPSTATE *chip)
1129{
1130 chip_write(chip, TDA9875_CFG, 0xd0);
1131 chip_write(chip, TDA9875_MSR, 0x03);
1132 chip_write(chip, TDA9875_C1MSB, 0x00);
1133 chip_write(chip, TDA9875_C1MIB, 0x00);
1134 chip_write(chip, TDA9875_C1LSB, 0x00);
1135 chip_write(chip, TDA9875_C2MSB, 0x00);
1136 chip_write(chip, TDA9875_C2MIB, 0x00);
1137 chip_write(chip, TDA9875_C2LSB, 0x00);
1138 chip_write(chip, TDA9875_DCR, 0x00);
1139 chip_write(chip, TDA9875_DEEM, 0x44);
1140 chip_write(chip, TDA9875_FMAT, 0x00);
1141 chip_write(chip, TDA9875_SC1, 0x00);
1142 chip_write(chip, TDA9875_SC2, 0x01);
1143
1144 chip_write(chip, TDA9875_CH1V, 0x10);
1145 chip_write(chip, TDA9875_CH2V, 0x10);
1146 chip_write(chip, TDA9875_DACOS, 0x02);
1147 chip_write(chip, TDA9875_ADCIS, 0x6f);
1148 chip_write(chip, TDA9875_LOSR, 0x00);
1149 chip_write(chip, TDA9875_AER, 0x00);
1150 chip_write(chip, TDA9875_MCS, 0x44);
1151 chip_write(chip, TDA9875_MVL, 0x03);
1152 chip_write(chip, TDA9875_MVR, 0x03);
1153 chip_write(chip, TDA9875_MBA, 0x00);
1154 chip_write(chip, TDA9875_MTR, 0x00);
1155 chip_write(chip, TDA9875_ACS, 0x44);
1156 chip_write(chip, TDA9875_AVL, 0x00);
1157 chip_write(chip, TDA9875_AVR, 0x00);
1158 chip_write(chip, TDA9875_ABA, 0x00);
1159 chip_write(chip, TDA9875_ATR, 0x00);
1160
1161 chip_write(chip, TDA9875_MUT, 0xcc);
1162 return 0;
1163}
1164
1165static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1166static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1167static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1168
1169
1170
1171
1172
1173
1174
1175
1176static int tda9875_checkit(struct CHIPSTATE *chip)
1177{
1178 struct v4l2_subdev *sd = &chip->sd;
1179 int dic, rev;
1180
1181 dic = chip_read2(chip, 254);
1182 rev = chip_read2(chip, 255);
1183
1184 if (dic == 0 || dic == 2) {
1185 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1186 dic == 0 ? "" : "A", rev);
1187 return 1;
1188 }
1189 return 0;
1190}
1191
1192
1193
1194
1195#define TEA6300_VL 0x00
1196#define TEA6300_VR 0x01
1197#define TEA6300_BA 0x02
1198#define TEA6300_TR 0x03
1199#define TEA6300_FA 0x04
1200#define TEA6300_S 0x05
1201
1202#define TEA6300_S_SA 0x01
1203#define TEA6300_S_SB 0x02
1204#define TEA6300_S_SC 0x04
1205#define TEA6300_S_GMU 0x80
1206
1207#define TEA6320_V 0x00
1208#define TEA6320_FFR 0x01
1209#define TEA6320_FFL 0x02
1210#define TEA6320_FRR 0x03
1211#define TEA6320_FRL 0x04
1212#define TEA6320_BA 0x05
1213#define TEA6320_TR 0x06
1214#define TEA6320_S 0x07
1215
1216#define TEA6320_S_SA 0x07
1217#define TEA6320_S_SB 0x06
1218#define TEA6320_S_SC 0x05
1219#define TEA6320_S_SD 0x04
1220#define TEA6320_S_GMU 0x80
1221
1222#define TEA6420_S_SA 0x00
1223#define TEA6420_S_SB 0x01
1224#define TEA6420_S_SC 0x02
1225#define TEA6420_S_SD 0x03
1226#define TEA6420_S_SE 0x04
1227#define TEA6420_S_GMU 0x05
1228
1229static int tea6300_shift10(int val) { return val >> 10; }
1230static int tea6300_shift12(int val) { return val >> 12; }
1231
1232
1233
1234static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1235static int tea6320_shift11(int val) { return val >> 11; }
1236static int tea6320_initialize(struct CHIPSTATE * chip)
1237{
1238 chip_write(chip, TEA6320_FFR, 0x3f);
1239 chip_write(chip, TEA6320_FFL, 0x3f);
1240 chip_write(chip, TEA6320_FRR, 0x3f);
1241 chip_write(chip, TEA6320_FRL, 0x3f);
1242
1243 return 0;
1244}
1245
1246
1247
1248
1249
1250#define TDA8425_VL 0x00
1251#define TDA8425_VR 0x01
1252#define TDA8425_BA 0x02
1253#define TDA8425_TR 0x03
1254#define TDA8425_S1 0x08
1255
1256#define TDA8425_S1_OFF 0xEE
1257#define TDA8425_S1_CH1 0xCE
1258#define TDA8425_S1_CH2 0xCF
1259#define TDA8425_S1_MU 0x20
1260#define TDA8425_S1_STEREO 0x18
1261#define TDA8425_S1_STEREO_SPATIAL 0x18
1262#define TDA8425_S1_STEREO_LINEAR 0x08
1263#define TDA8425_S1_STEREO_PSEUDO 0x10
1264#define TDA8425_S1_STEREO_MONO 0x00
1265#define TDA8425_S1_ML 0x06
1266#define TDA8425_S1_ML_SOUND_A 0x02
1267#define TDA8425_S1_ML_SOUND_B 0x04
1268#define TDA8425_S1_ML_STEREO 0x06
1269#define TDA8425_S1_IS 0x01
1270
1271
1272static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1273static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1274
1275static void tda8425_setaudmode(struct CHIPSTATE *chip, int mode)
1276{
1277 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1278
1279 switch (mode) {
1280 case V4L2_TUNER_MODE_LANG1:
1281 s1 |= TDA8425_S1_ML_SOUND_A;
1282 s1 |= TDA8425_S1_STEREO_PSEUDO;
1283 break;
1284 case V4L2_TUNER_MODE_LANG2:
1285 s1 |= TDA8425_S1_ML_SOUND_B;
1286 s1 |= TDA8425_S1_STEREO_PSEUDO;
1287 break;
1288 case V4L2_TUNER_MODE_LANG1_LANG2:
1289 s1 |= TDA8425_S1_ML_STEREO;
1290 s1 |= TDA8425_S1_STEREO_LINEAR;
1291 break;
1292 case V4L2_TUNER_MODE_MONO:
1293 s1 |= TDA8425_S1_ML_STEREO;
1294 s1 |= TDA8425_S1_STEREO_MONO;
1295 break;
1296 case V4L2_TUNER_MODE_STEREO:
1297 s1 |= TDA8425_S1_ML_STEREO;
1298 s1 |= TDA8425_S1_STEREO_SPATIAL;
1299 break;
1300 default:
1301 return;
1302 }
1303 chip_write(chip,TDA8425_S1,s1);
1304}
1305
1306
1307
1308
1309
1310
1311#define PIC16C54_REG_KEY_CODE 0x01
1312#define PIC16C54_REG_MISC 0x02
1313
1314
1315#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01
1316
1317#define PIC16C54_MISC_MTS_MAIN 0x02
1318#define PIC16C54_MISC_MTS_SAP 0x04
1319#define PIC16C54_MISC_MTS_BOTH 0x08
1320#define PIC16C54_MISC_SND_MUTE 0x10
1321#define PIC16C54_MISC_SND_NOTMUTE 0x20
1322#define PIC16C54_MISC_SWITCH_TUNER 0x40
1323#define PIC16C54_MISC_SWITCH_LINE 0x80
1324
1325
1326
1327
1328
1329#define TA8874Z_LED_STE 0x80
1330#define TA8874Z_LED_BIL 0x40
1331#define TA8874Z_LED_EXT 0x20
1332#define TA8874Z_MONO_SET 0x10
1333#define TA8874Z_MUTE 0x08
1334#define TA8874Z_F_MONO 0x04
1335#define TA8874Z_MODE_SUB 0x02
1336#define TA8874Z_MODE_MAIN 0x01
1337
1338
1339
1340#define TA8874Z_SEPARATION 0x3f
1341#define TA8874Z_SEPARATION_DEFAULT 0x10
1342
1343
1344#define TA8874Z_B1 0x80
1345#define TA8874Z_B0 0x40
1346#define TA8874Z_CHAG_FLAG 0x20
1347
1348
1349
1350
1351
1352
1353
1354static int ta8874z_getrxsubchans(struct CHIPSTATE *chip)
1355{
1356 int val, mode;
1357
1358 val = chip_read(chip);
1359 mode = V4L2_TUNER_SUB_MONO;
1360 if (val & TA8874Z_B1){
1361 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1362 }else if (!(val & TA8874Z_B0)){
1363 mode = V4L2_TUNER_SUB_STEREO;
1364 }
1365
1366
1367
1368 return mode;
1369}
1370
1371static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1372static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1373static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1374static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1375static audiocmd ta8874z_both = {2, { TA8874Z_MODE_MAIN | TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1376
1377static void ta8874z_setaudmode(struct CHIPSTATE *chip, int mode)
1378{
1379 struct v4l2_subdev *sd = &chip->sd;
1380 int update = 1;
1381 audiocmd *t = NULL;
1382
1383 v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n", mode);
1384
1385 switch(mode){
1386 case V4L2_TUNER_MODE_MONO:
1387 t = &ta8874z_mono;
1388 break;
1389 case V4L2_TUNER_MODE_STEREO:
1390 t = &ta8874z_stereo;
1391 break;
1392 case V4L2_TUNER_MODE_LANG1:
1393 t = &ta8874z_main;
1394 break;
1395 case V4L2_TUNER_MODE_LANG2:
1396 t = &ta8874z_sub;
1397 break;
1398 case V4L2_TUNER_MODE_LANG1_LANG2:
1399 t = &ta8874z_both;
1400 break;
1401 default:
1402 update = 0;
1403 }
1404
1405 if(update)
1406 chip_cmd(chip, "TA8874Z", t);
1407}
1408
1409static int ta8874z_checkit(struct CHIPSTATE *chip)
1410{
1411 int rc;
1412 rc = chip_read(chip);
1413 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1414}
1415
1416
1417
1418
1419
1420static int tda8425 = 1;
1421static int tda9840 = 1;
1422static int tda9850 = 1;
1423static int tda9855 = 1;
1424static int tda9873 = 1;
1425static int tda9874a = 1;
1426static int tda9875 = 1;
1427static int tea6300;
1428static int tea6320;
1429static int tea6420 = 1;
1430static int pic16c54 = 1;
1431static int ta8874z;
1432
1433module_param(tda8425, int, 0444);
1434module_param(tda9840, int, 0444);
1435module_param(tda9850, int, 0444);
1436module_param(tda9855, int, 0444);
1437module_param(tda9873, int, 0444);
1438module_param(tda9874a, int, 0444);
1439module_param(tda9875, int, 0444);
1440module_param(tea6300, int, 0444);
1441module_param(tea6320, int, 0444);
1442module_param(tea6420, int, 0444);
1443module_param(pic16c54, int, 0444);
1444module_param(ta8874z, int, 0444);
1445
1446static struct CHIPDESC chiplist[] = {
1447 {
1448 .name = "tda9840",
1449 .insmodopt = &tda9840,
1450 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1451 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1452 .registers = 5,
1453 .flags = CHIP_NEED_CHECKMODE,
1454
1455
1456 .checkit = tda9840_checkit,
1457 .getrxsubchans = tda9840_getrxsubchans,
1458 .setaudmode = tda9840_setaudmode,
1459
1460 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1461 } }
1462 },
1463 {
1464 .name = "tda9873h",
1465 .insmodopt = &tda9873,
1466 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1467 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1468 .registers = 3,
1469 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1470
1471
1472 .checkit = tda9873_checkit,
1473 .getrxsubchans = tda9873_getrxsubchans,
1474 .setaudmode = tda9873_setaudmode,
1475
1476 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1477 .inputreg = TDA9873_SW,
1478 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1479 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1480 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1481
1482 },
1483 {
1484 .name = "tda9874h/a",
1485 .insmodopt = &tda9874a,
1486 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1487 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1488 .flags = CHIP_NEED_CHECKMODE,
1489
1490
1491 .initialize = tda9874a_initialize,
1492 .checkit = tda9874a_checkit,
1493 .getrxsubchans = tda9874a_getrxsubchans,
1494 .setaudmode = tda9874a_setaudmode,
1495 },
1496 {
1497 .name = "tda9875",
1498 .insmodopt = &tda9875,
1499 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1500 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1501 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1502
1503
1504 .initialize = tda9875_initialize,
1505 .checkit = tda9875_checkit,
1506 .volfunc = tda9875_volume,
1507 .bassfunc = tda9875_bass,
1508 .treblefunc = tda9875_treble,
1509 .leftreg = TDA9875_MVL,
1510 .rightreg = TDA9875_MVR,
1511 .bassreg = TDA9875_MBA,
1512 .treblereg = TDA9875_MTR,
1513 .leftinit = 58880,
1514 .rightinit = 58880,
1515 },
1516 {
1517 .name = "tda9850",
1518 .insmodopt = &tda9850,
1519 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1520 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1521 .registers = 11,
1522
1523 .getrxsubchans = tda985x_getrxsubchans,
1524 .setaudmode = tda985x_setaudmode,
1525
1526 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1527 },
1528 {
1529 .name = "tda9855",
1530 .insmodopt = &tda9855,
1531 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1532 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1533 .registers = 11,
1534 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1535
1536 .leftreg = TDA9855_VL,
1537 .rightreg = TDA9855_VR,
1538 .bassreg = TDA9855_BA,
1539 .treblereg = TDA9855_TR,
1540
1541
1542 .volfunc = tda9855_volume,
1543 .bassfunc = tda9855_bass,
1544 .treblefunc = tda9855_treble,
1545 .getrxsubchans = tda985x_getrxsubchans,
1546 .setaudmode = tda985x_setaudmode,
1547
1548 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1549 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1550 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1551 0x07, 0x10, 0x10, 0x03 }}
1552 },
1553 {
1554 .name = "tea6300",
1555 .insmodopt = &tea6300,
1556 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1557 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1558 .registers = 6,
1559 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1560
1561 .leftreg = TEA6300_VR,
1562 .rightreg = TEA6300_VL,
1563 .bassreg = TEA6300_BA,
1564 .treblereg = TEA6300_TR,
1565
1566
1567 .volfunc = tea6300_shift10,
1568 .bassfunc = tea6300_shift12,
1569 .treblefunc = tea6300_shift12,
1570
1571 .inputreg = TEA6300_S,
1572 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1573 .inputmute = TEA6300_S_GMU,
1574 },
1575 {
1576 .name = "tea6320",
1577 .insmodopt = &tea6320,
1578 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1579 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1580 .registers = 8,
1581 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1582
1583 .leftreg = TEA6320_V,
1584 .rightreg = TEA6320_V,
1585 .bassreg = TEA6320_BA,
1586 .treblereg = TEA6320_TR,
1587
1588
1589 .initialize = tea6320_initialize,
1590 .volfunc = tea6320_volume,
1591 .bassfunc = tea6320_shift11,
1592 .treblefunc = tea6320_shift11,
1593
1594 .inputreg = TEA6320_S,
1595 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1596 .inputmute = TEA6300_S_GMU,
1597 },
1598 {
1599 .name = "tea6420",
1600 .insmodopt = &tea6420,
1601 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1602 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1603 .registers = 1,
1604 .flags = CHIP_HAS_INPUTSEL,
1605
1606 .inputreg = -1,
1607 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1608 .inputmute = TEA6300_S_GMU,
1609 },
1610 {
1611 .name = "tda8425",
1612 .insmodopt = &tda8425,
1613 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1614 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1615 .registers = 9,
1616 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1617
1618 .leftreg = TDA8425_VL,
1619 .rightreg = TDA8425_VR,
1620 .bassreg = TDA8425_BA,
1621 .treblereg = TDA8425_TR,
1622
1623
1624 .volfunc = tda8425_shift10,
1625 .bassfunc = tda8425_shift12,
1626 .treblefunc = tda8425_shift12,
1627 .setaudmode = tda8425_setaudmode,
1628
1629 .inputreg = TDA8425_S1,
1630 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1631 .inputmute = TDA8425_S1_OFF,
1632
1633 },
1634 {
1635 .name = "pic16c54 (PV951)",
1636 .insmodopt = &pic16c54,
1637 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1638 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1639 .registers = 2,
1640 .flags = CHIP_HAS_INPUTSEL,
1641
1642 .inputreg = PIC16C54_REG_MISC,
1643 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1644 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1645 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1646 PIC16C54_MISC_SND_MUTE},
1647 .inputmute = PIC16C54_MISC_SND_MUTE,
1648 },
1649 {
1650 .name = "ta8874z",
1651 .checkit = ta8874z_checkit,
1652 .insmodopt = &ta8874z,
1653 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1654 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1655 .registers = 2,
1656
1657
1658 .getrxsubchans = ta8874z_getrxsubchans,
1659 .setaudmode = ta8874z_setaudmode,
1660
1661 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1662 },
1663 { .name = NULL }
1664};
1665
1666
1667
1668
1669static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1670 struct v4l2_control *ctrl)
1671{
1672 struct CHIPSTATE *chip = to_state(sd);
1673 struct CHIPDESC *desc = chip->desc;
1674
1675 switch (ctrl->id) {
1676 case V4L2_CID_AUDIO_MUTE:
1677 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1678 break;
1679 ctrl->value=chip->muted;
1680 return 0;
1681 case V4L2_CID_AUDIO_VOLUME:
1682 if (!(desc->flags & CHIP_HAS_VOLUME))
1683 break;
1684 ctrl->value = max(chip->left,chip->right);
1685 return 0;
1686 case V4L2_CID_AUDIO_BALANCE:
1687 {
1688 int volume;
1689 if (!(desc->flags & CHIP_HAS_VOLUME))
1690 break;
1691 volume = max(chip->left,chip->right);
1692 if (volume)
1693 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1694 else
1695 ctrl->value=32768;
1696 return 0;
1697 }
1698 case V4L2_CID_AUDIO_BASS:
1699 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1700 break;
1701 ctrl->value = chip->bass;
1702 return 0;
1703 case V4L2_CID_AUDIO_TREBLE:
1704 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1705 break;
1706 ctrl->value = chip->treble;
1707 return 0;
1708 }
1709 return -EINVAL;
1710}
1711
1712static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1713 struct v4l2_control *ctrl)
1714{
1715 struct CHIPSTATE *chip = to_state(sd);
1716 struct CHIPDESC *desc = chip->desc;
1717
1718 switch (ctrl->id) {
1719 case V4L2_CID_AUDIO_MUTE:
1720 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1721 break;
1722
1723 if (ctrl->value < 0 || ctrl->value >= 2)
1724 return -ERANGE;
1725 chip->muted = ctrl->value;
1726 if (chip->muted)
1727 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1728 else
1729 chip_write_masked(chip,desc->inputreg,
1730 desc->inputmap[chip->input],desc->inputmask);
1731 return 0;
1732 case V4L2_CID_AUDIO_VOLUME:
1733 {
1734 int volume,balance;
1735
1736 if (!(desc->flags & CHIP_HAS_VOLUME))
1737 break;
1738
1739 volume = max(chip->left,chip->right);
1740 if (volume)
1741 balance=(32768*min(chip->left,chip->right))/volume;
1742 else
1743 balance=32768;
1744
1745 volume=ctrl->value;
1746 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1747 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1748
1749 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1750 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1751
1752 return 0;
1753 }
1754 case V4L2_CID_AUDIO_BALANCE:
1755 {
1756 int volume, balance;
1757
1758 if (!(desc->flags & CHIP_HAS_VOLUME))
1759 break;
1760
1761 volume = max(chip->left, chip->right);
1762 balance = ctrl->value;
1763 chip->left = (min(65536 - balance, 32768) * volume) / 32768;
1764 chip->right = (min(balance, volume * (__u16)32768)) / 32768;
1765
1766 chip_write(chip, desc->leftreg, desc->volfunc(chip->left));
1767 chip_write(chip, desc->rightreg, desc->volfunc(chip->right));
1768
1769 return 0;
1770 }
1771 case V4L2_CID_AUDIO_BASS:
1772 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1773 break;
1774 chip->bass = ctrl->value;
1775 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1776
1777 return 0;
1778 case V4L2_CID_AUDIO_TREBLE:
1779 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1780 break;
1781 chip->treble = ctrl->value;
1782 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1783
1784 return 0;
1785 }
1786 return -EINVAL;
1787}
1788
1789
1790
1791
1792
1793static int tvaudio_s_radio(struct v4l2_subdev *sd)
1794{
1795 struct CHIPSTATE *chip = to_state(sd);
1796
1797 chip->radio = 1;
1798
1799 return 0;
1800}
1801
1802static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1803{
1804 struct CHIPSTATE *chip = to_state(sd);
1805 struct CHIPDESC *desc = chip->desc;
1806
1807 switch (qc->id) {
1808 case V4L2_CID_AUDIO_MUTE:
1809 if (desc->flags & CHIP_HAS_INPUTSEL)
1810 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1811 break;
1812 case V4L2_CID_AUDIO_VOLUME:
1813 if (desc->flags & CHIP_HAS_VOLUME)
1814 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1815 break;
1816 case V4L2_CID_AUDIO_BALANCE:
1817 if (desc->flags & CHIP_HAS_VOLUME)
1818 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1819 break;
1820 case V4L2_CID_AUDIO_BASS:
1821 case V4L2_CID_AUDIO_TREBLE:
1822 if (desc->flags & CHIP_HAS_BASSTREBLE)
1823 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1824 break;
1825 default:
1826 break;
1827 }
1828 return -EINVAL;
1829}
1830
1831static int tvaudio_s_routing(struct v4l2_subdev *sd,
1832 u32 input, u32 output, u32 config)
1833{
1834 struct CHIPSTATE *chip = to_state(sd);
1835 struct CHIPDESC *desc = chip->desc;
1836
1837 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1838 return 0;
1839 if (input >= 4)
1840 return -EINVAL;
1841
1842 chip->input = input;
1843 if (chip->muted)
1844 return 0;
1845 chip_write_masked(chip, desc->inputreg,
1846 desc->inputmap[chip->input], desc->inputmask);
1847 return 0;
1848}
1849
1850static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1851{
1852 struct CHIPSTATE *chip = to_state(sd);
1853 struct CHIPDESC *desc = chip->desc;
1854
1855 if (!desc->setaudmode)
1856 return 0;
1857 if (chip->radio)
1858 return 0;
1859
1860 switch (vt->audmode) {
1861 case V4L2_TUNER_MODE_MONO:
1862 case V4L2_TUNER_MODE_STEREO:
1863 case V4L2_TUNER_MODE_LANG1:
1864 case V4L2_TUNER_MODE_LANG2:
1865 case V4L2_TUNER_MODE_LANG1_LANG2:
1866 break;
1867 default:
1868 return -EINVAL;
1869 }
1870 chip->audmode = vt->audmode;
1871
1872 if (chip->thread)
1873 wake_up_process(chip->thread);
1874 else
1875 desc->setaudmode(chip, vt->audmode);
1876
1877 return 0;
1878}
1879
1880static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1881{
1882 struct CHIPSTATE *chip = to_state(sd);
1883 struct CHIPDESC *desc = chip->desc;
1884
1885 if (!desc->getrxsubchans)
1886 return 0;
1887 if (chip->radio)
1888 return 0;
1889
1890 vt->audmode = chip->audmode;
1891 vt->rxsubchans = desc->getrxsubchans(chip);
1892 vt->capability = V4L2_TUNER_CAP_STEREO |
1893 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1894
1895 return 0;
1896}
1897
1898static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1899{
1900 struct CHIPSTATE *chip = to_state(sd);
1901
1902 chip->radio = 0;
1903 return 0;
1904}
1905
1906static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1907{
1908 struct CHIPSTATE *chip = to_state(sd);
1909 struct CHIPDESC *desc = chip->desc;
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919 if (chip->thread) {
1920 desc->setaudmode(chip, V4L2_TUNER_MODE_MONO);
1921 chip->prevmode = -1;
1922 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1923 }
1924 return 0;
1925}
1926
1927static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1928{
1929 struct i2c_client *client = v4l2_get_subdevdata(sd);
1930
1931 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1932}
1933
1934
1935
1936static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1937 .g_chip_ident = tvaudio_g_chip_ident,
1938 .queryctrl = tvaudio_queryctrl,
1939 .g_ctrl = tvaudio_g_ctrl,
1940 .s_ctrl = tvaudio_s_ctrl,
1941 .s_std = tvaudio_s_std,
1942};
1943
1944static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1945 .s_radio = tvaudio_s_radio,
1946 .s_frequency = tvaudio_s_frequency,
1947 .s_tuner = tvaudio_s_tuner,
1948 .g_tuner = tvaudio_g_tuner,
1949};
1950
1951static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1952 .s_routing = tvaudio_s_routing,
1953};
1954
1955static const struct v4l2_subdev_ops tvaudio_ops = {
1956 .core = &tvaudio_core_ops,
1957 .tuner = &tvaudio_tuner_ops,
1958 .audio = &tvaudio_audio_ops,
1959};
1960
1961
1962
1963
1964
1965
1966static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1967{
1968 struct CHIPSTATE *chip;
1969 struct CHIPDESC *desc;
1970 struct v4l2_subdev *sd;
1971
1972 if (debug) {
1973 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1974 printk(KERN_INFO "tvaudio: known chips: ");
1975 for (desc = chiplist; desc->name != NULL; desc++)
1976 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1977 printk("\n");
1978 }
1979
1980 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1981 if (!chip)
1982 return -ENOMEM;
1983 sd = &chip->sd;
1984 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1985
1986
1987 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1988 for (desc = chiplist; desc->name != NULL; desc++) {
1989 if (0 == *(desc->insmodopt))
1990 continue;
1991 if (client->addr < desc->addr_lo ||
1992 client->addr > desc->addr_hi)
1993 continue;
1994 if (desc->checkit && !desc->checkit(chip))
1995 continue;
1996 break;
1997 }
1998 if (desc->name == NULL) {
1999 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
2000 kfree(chip);
2001 return -EIO;
2002 }
2003 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
2004 if (desc->flags) {
2005 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
2006 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
2007 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
2008 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
2009 }
2010
2011
2012 if (!id)
2013 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
2014 chip->desc = desc;
2015 chip->shadow.count = desc->registers+1;
2016 chip->prevmode = -1;
2017 chip->audmode = V4L2_TUNER_MODE_LANG1;
2018
2019
2020 if (desc->initialize != NULL)
2021 desc->initialize(chip);
2022 else
2023 chip_cmd(chip, "init", &desc->init);
2024
2025 if (desc->flags & CHIP_HAS_VOLUME) {
2026 if (!desc->volfunc) {
2027
2028
2029
2030 v4l2_info(sd, "volume callback undefined!\n");
2031 desc->flags &= ~CHIP_HAS_VOLUME;
2032 } else {
2033 chip->left = desc->leftinit ? desc->leftinit : 65535;
2034 chip->right = desc->rightinit ? desc->rightinit : 65535;
2035 chip_write(chip, desc->leftreg,
2036 desc->volfunc(chip->left));
2037 chip_write(chip, desc->rightreg,
2038 desc->volfunc(chip->right));
2039 }
2040 }
2041 if (desc->flags & CHIP_HAS_BASSTREBLE) {
2042 if (!desc->bassfunc || !desc->treblefunc) {
2043
2044
2045
2046 v4l2_info(sd, "bass/treble callbacks undefined!\n");
2047 desc->flags &= ~CHIP_HAS_BASSTREBLE;
2048 } else {
2049 chip->treble = desc->trebleinit ?
2050 desc->trebleinit : 32768;
2051 chip->bass = desc->bassinit ?
2052 desc->bassinit : 32768;
2053 chip_write(chip, desc->bassreg,
2054 desc->bassfunc(chip->bass));
2055 chip_write(chip, desc->treblereg,
2056 desc->treblefunc(chip->treble));
2057 }
2058 }
2059
2060 chip->thread = NULL;
2061 init_timer(&chip->wt);
2062 if (desc->flags & CHIP_NEED_CHECKMODE) {
2063 if (!desc->getrxsubchans || !desc->setaudmode) {
2064
2065
2066
2067 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2068 return 0;
2069 }
2070
2071 chip->wt.function = chip_thread_wake;
2072 chip->wt.data = (unsigned long)chip;
2073 chip->thread = kthread_run(chip_thread, chip, client->name);
2074 if (IS_ERR(chip->thread)) {
2075 v4l2_warn(sd, "failed to create kthread\n");
2076 chip->thread = NULL;
2077 }
2078 }
2079 return 0;
2080}
2081
2082static int tvaudio_remove(struct i2c_client *client)
2083{
2084 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2085 struct CHIPSTATE *chip = to_state(sd);
2086
2087 del_timer_sync(&chip->wt);
2088 if (chip->thread) {
2089
2090 kthread_stop(chip->thread);
2091 chip->thread = NULL;
2092 }
2093
2094 v4l2_device_unregister_subdev(sd);
2095 kfree(chip);
2096 return 0;
2097}
2098
2099
2100
2101
2102static const struct i2c_device_id tvaudio_id[] = {
2103 { "tvaudio", 0 },
2104 { }
2105};
2106MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2107
2108static struct i2c_driver tvaudio_driver = {
2109 .driver = {
2110 .owner = THIS_MODULE,
2111 .name = "tvaudio",
2112 },
2113 .probe = tvaudio_probe,
2114 .remove = tvaudio_remove,
2115 .id_table = tvaudio_id,
2116};
2117
2118module_i2c_driver(tvaudio_driver);
2119