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34static const char version[] =
35"atp.c:v1.09=ac 2002/10/01 Donald Becker <becker@scyld.com>\n";
36
37
38
39
40static int debug = 1;
41#define net_debug debug
42
43
44static int max_interrupt_work = 15;
45
46#define NUM_UNITS 2
47
48static int io[NUM_UNITS];
49static int irq[NUM_UNITS];
50static int xcvr[NUM_UNITS];
51
52
53
54
55#define TX_TIMEOUT (400*HZ/1000)
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125#include <linux/kernel.h>
126#include <linux/module.h>
127#include <linux/types.h>
128#include <linux/fcntl.h>
129#include <linux/interrupt.h>
130#include <linux/ioport.h>
131#include <linux/in.h>
132#include <linux/string.h>
133#include <linux/errno.h>
134#include <linux/init.h>
135#include <linux/crc32.h>
136#include <linux/netdevice.h>
137#include <linux/etherdevice.h>
138#include <linux/skbuff.h>
139#include <linux/spinlock.h>
140#include <linux/delay.h>
141#include <linux/bitops.h>
142
143#include <asm/io.h>
144#include <asm/dma.h>
145
146#include "atp.h"
147
148MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
149MODULE_DESCRIPTION("RealTek RTL8002/8012 parallel port Ethernet driver");
150MODULE_LICENSE("GPL");
151
152module_param(max_interrupt_work, int, 0);
153module_param(debug, int, 0);
154module_param_array(io, int, NULL, 0);
155module_param_array(irq, int, NULL, 0);
156module_param_array(xcvr, int, NULL, 0);
157MODULE_PARM_DESC(max_interrupt_work, "ATP maximum events handled per interrupt");
158MODULE_PARM_DESC(debug, "ATP debug level (0-7)");
159MODULE_PARM_DESC(io, "ATP I/O base address(es)");
160MODULE_PARM_DESC(irq, "ATP IRQ number(s)");
161MODULE_PARM_DESC(xcvr, "ATP transceiver(s) (0=internal, 1=external)");
162
163
164#define ETHERCARD_TOTAL_SIZE 3
165
166
167static char mux_8012[] = { 0xff, 0xf7, 0xff, 0xfb, 0xf3, 0xfb, 0xff, 0xf7,};
168
169struct net_local {
170 spinlock_t lock;
171 struct net_device *next_module;
172 struct timer_list timer;
173 long last_rx_time;
174 int saved_tx_size;
175 unsigned int tx_unit_busy:1;
176 unsigned char re_tx,
177 addr_mode,
178 pac_cnt_in_tx_buf,
179 chip_type;
180};
181
182
183
184
185#define TIMED_CHECKER (HZ/4)
186#ifdef TIMED_CHECKER
187#include <linux/timer.h>
188static void atp_timed_checker(unsigned long ignored);
189#endif
190
191
192
193static int atp_probe1(long ioaddr);
194static void get_node_ID(struct net_device *dev);
195static unsigned short eeprom_op(long ioaddr, unsigned int cmd);
196static int net_open(struct net_device *dev);
197static void hardware_init(struct net_device *dev);
198static void write_packet(long ioaddr, int length, unsigned char *packet, int pad, int mode);
199static void trigger_send(long ioaddr, int length);
200static netdev_tx_t atp_send_packet(struct sk_buff *skb,
201 struct net_device *dev);
202static irqreturn_t atp_interrupt(int irq, void *dev_id);
203static void net_rx(struct net_device *dev);
204static void read_block(long ioaddr, int length, unsigned char *buffer, int data_mode);
205static int net_close(struct net_device *dev);
206static void set_rx_mode(struct net_device *dev);
207static void tx_timeout(struct net_device *dev);
208
209
210
211static struct net_device *root_atp_dev;
212
213
214
215
216
217
218
219
220
221static int __init atp_init(void)
222{
223 int *port, ports[] = {0x378, 0x278, 0x3bc, 0};
224 int base_addr = io[0];
225
226 if (base_addr > 0x1ff)
227 return atp_probe1(base_addr);
228 else if (base_addr == 1)
229 return -ENXIO;
230
231 for (port = ports; *port; port++) {
232 long ioaddr = *port;
233 outb(0x57, ioaddr + PAR_DATA);
234 if (inb(ioaddr + PAR_DATA) != 0x57)
235 continue;
236 if (atp_probe1(ioaddr) == 0)
237 return 0;
238 }
239
240 return -ENODEV;
241}
242
243static const struct net_device_ops atp_netdev_ops = {
244 .ndo_open = net_open,
245 .ndo_stop = net_close,
246 .ndo_start_xmit = atp_send_packet,
247 .ndo_set_rx_mode = set_rx_mode,
248 .ndo_tx_timeout = tx_timeout,
249 .ndo_change_mtu = eth_change_mtu,
250 .ndo_set_mac_address = eth_mac_addr,
251 .ndo_validate_addr = eth_validate_addr,
252};
253
254static int __init atp_probe1(long ioaddr)
255{
256 struct net_device *dev = NULL;
257 struct net_local *lp;
258 int saved_ctrl_reg, status, i;
259 int res;
260
261 outb(0xff, ioaddr + PAR_DATA);
262
263
264 saved_ctrl_reg = inb(ioaddr + PAR_CONTROL);
265 if (net_debug > 3)
266 printk("atp: Control register was %#2.2x.\n", saved_ctrl_reg);
267
268 outb(0x04, ioaddr + PAR_CONTROL);
269#ifndef final_version
270 if (net_debug > 3) {
271
272 for (i = 0; i < 8; i++)
273 outb(mux_8012[i], ioaddr + PAR_DATA);
274 write_reg(ioaddr, MODSEL, 0x00);
275 printk("atp: Registers are ");
276 for (i = 0; i < 32; i++)
277 printk(" %2.2x", read_nibble(ioaddr, i));
278 printk(".\n");
279 }
280#endif
281
282 for (i = 0; i < 8; i++)
283 outb(mux_8012[i], ioaddr + PAR_DATA);
284 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
285
286 status = read_nibble(ioaddr, CMR1);
287
288 if (net_debug > 3) {
289 printk(KERN_DEBUG "atp: Status nibble was %#2.2x..", status);
290 for (i = 0; i < 32; i++)
291 printk(" %2.2x", read_nibble(ioaddr, i));
292 printk("\n");
293 }
294
295 if ((status & 0x78) != 0x08) {
296
297 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
298 return -ENODEV;
299 }
300 status = read_nibble(ioaddr, CMR2_h);
301 if ((status & 0x78) != 0x10) {
302 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
303 return -ENODEV;
304 }
305
306 dev = alloc_etherdev(sizeof(struct net_local));
307 if (!dev)
308 return -ENOMEM;
309
310
311 write_reg_byte(ioaddr, CMR2, 0x01);
312 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
313
314
315 if (irq[0])
316 dev->irq = irq[0];
317 else if (ioaddr == 0x378)
318 dev->irq = 7;
319 else
320 dev->irq = 5;
321 write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF);
322 write_reg(ioaddr, CMR2, CMR2_NULL);
323
324 dev->base_addr = ioaddr;
325
326
327 get_node_ID(dev);
328
329#ifndef MODULE
330 if (net_debug)
331 printk(KERN_INFO "%s", version);
332#endif
333
334 printk(KERN_NOTICE "%s: Pocket adapter found at %#3lx, IRQ %d, "
335 "SAPROM %pM.\n",
336 dev->name, dev->base_addr, dev->irq, dev->dev_addr);
337
338
339 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
340
341 lp = netdev_priv(dev);
342 lp->chip_type = RTL8002;
343 lp->addr_mode = CMR2h_Normal;
344 spin_lock_init(&lp->lock);
345
346
347 if (xcvr[0])
348 dev->if_port = xcvr[0];
349 else
350 dev->if_port = (dev->mem_start & 0xf) ? (dev->mem_start & 0x7) : 4;
351 if (dev->mem_end & 0xf)
352 net_debug = dev->mem_end & 7;
353
354 dev->netdev_ops = &atp_netdev_ops;
355 dev->watchdog_timeo = TX_TIMEOUT;
356
357 res = register_netdev(dev);
358 if (res) {
359 free_netdev(dev);
360 return res;
361 }
362
363 lp->next_module = root_atp_dev;
364 root_atp_dev = dev;
365
366 return 0;
367}
368
369
370static void __init get_node_ID(struct net_device *dev)
371{
372 long ioaddr = dev->base_addr;
373 int sa_offset = 0;
374 int i;
375
376 write_reg(ioaddr, CMR2, CMR2_EEPROM);
377
378
379
380 if (eeprom_op(ioaddr, EE_READ(0)) == 0xffff)
381 sa_offset = 15;
382
383 for (i = 0; i < 3; i++)
384 ((__be16 *)dev->dev_addr)[i] =
385 cpu_to_be16(eeprom_op(ioaddr, EE_READ(sa_offset + i)));
386
387 write_reg(ioaddr, CMR2, CMR2_NULL);
388}
389
390
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399
400
401
402static unsigned short __init eeprom_op(long ioaddr, u32 cmd)
403{
404 unsigned eedata_out = 0;
405 int num_bits = EE_CMD_SIZE;
406
407 while (--num_bits >= 0) {
408 char outval = (cmd & (1<<num_bits)) ? EE_DATA_WRITE : 0;
409 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_LOW);
410 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_HIGH);
411 eedata_out <<= 1;
412 if (read_nibble(ioaddr, PROM_DATA) & EE_DATA_READ)
413 eedata_out++;
414 }
415 write_reg_high(ioaddr, PROM_CMD, EE_CLK_LOW & ~EE_CS);
416 return eedata_out;
417}
418
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425
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427
428
429
430static int net_open(struct net_device *dev)
431{
432 struct net_local *lp = netdev_priv(dev);
433 int ret;
434
435
436
437
438 ret = request_irq(dev->irq, atp_interrupt, 0, dev->name, dev);
439 if (ret)
440 return ret;
441
442 hardware_init(dev);
443
444 init_timer(&lp->timer);
445 lp->timer.expires = jiffies + TIMED_CHECKER;
446 lp->timer.data = (unsigned long)dev;
447 lp->timer.function = atp_timed_checker;
448 add_timer(&lp->timer);
449
450 netif_start_queue(dev);
451 return 0;
452}
453
454
455
456static void hardware_init(struct net_device *dev)
457{
458 struct net_local *lp = netdev_priv(dev);
459 long ioaddr = dev->base_addr;
460 int i;
461
462
463 for (i = 0; i < 8; i++)
464 outb(mux_8012[i], ioaddr + PAR_DATA);
465 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
466
467 for (i = 0; i < 6; i++)
468 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
469
470 write_reg_high(ioaddr, CMR2, lp->addr_mode);
471
472 if (net_debug > 2) {
473 printk(KERN_DEBUG "%s: Reset: current Rx mode %d.\n", dev->name,
474 (read_nibble(ioaddr, CMR2_h) >> 3) & 0x0f);
475 }
476
477 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
478 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
479
480
481 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
482
483
484 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
485 write_reg_high(ioaddr, IMR, ISRh_RxErr);
486
487 lp->tx_unit_busy = 0;
488 lp->pac_cnt_in_tx_buf = 0;
489 lp->saved_tx_size = 0;
490}
491
492static void trigger_send(long ioaddr, int length)
493{
494 write_reg_byte(ioaddr, TxCNT0, length & 0xff);
495 write_reg(ioaddr, TxCNT1, length >> 8);
496 write_reg(ioaddr, CMR1, CMR1_Xmit);
497}
498
499static void write_packet(long ioaddr, int length, unsigned char *packet, int pad_len, int data_mode)
500{
501 if (length & 1)
502 {
503 length++;
504 pad_len++;
505 }
506
507 outb(EOC+MAR, ioaddr + PAR_DATA);
508 if ((data_mode & 1) == 0) {
509
510 outb(WrAddr+MAR, ioaddr + PAR_DATA);
511 do {
512 write_byte_mode0(ioaddr, *packet++);
513 } while (--length > pad_len) ;
514 do {
515 write_byte_mode0(ioaddr, 0);
516 } while (--length > 0) ;
517 } else {
518
519 unsigned char outbyte = *packet++;
520
521 outb(Ctrl_LNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
522 outb(WrAddr+MAR, ioaddr + PAR_DATA);
523
524 outb((outbyte & 0x0f)|0x40, ioaddr + PAR_DATA);
525 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
526 outbyte >>= 4;
527 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
528 outb(Ctrl_HNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
529 while (--length > pad_len)
530 write_byte_mode1(ioaddr, *packet++);
531 while (--length > 0)
532 write_byte_mode1(ioaddr, 0);
533 }
534
535 outb(0xff, ioaddr + PAR_DATA);
536 outb(Ctrl_HNibWrite | Ctrl_SelData | Ctrl_IRQEN, ioaddr + PAR_CONTROL);
537}
538
539static void tx_timeout(struct net_device *dev)
540{
541 long ioaddr = dev->base_addr;
542
543 printk(KERN_WARNING "%s: Transmit timed out, %s?\n", dev->name,
544 inb(ioaddr + PAR_CONTROL) & 0x10 ? "network cable problem"
545 : "IRQ conflict");
546 dev->stats.tx_errors++;
547
548 hardware_init(dev);
549 dev->trans_start = jiffies;
550 netif_wake_queue(dev);
551 dev->stats.tx_errors++;
552}
553
554static netdev_tx_t atp_send_packet(struct sk_buff *skb,
555 struct net_device *dev)
556{
557 struct net_local *lp = netdev_priv(dev);
558 long ioaddr = dev->base_addr;
559 int length;
560 unsigned long flags;
561
562 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
563
564 netif_stop_queue(dev);
565
566
567
568
569 spin_lock_irqsave(&lp->lock, flags);
570 write_reg(ioaddr, IMR, 0);
571 write_reg_high(ioaddr, IMR, 0);
572 spin_unlock_irqrestore(&lp->lock, flags);
573
574 write_packet(ioaddr, length, skb->data, length-skb->len, dev->if_port);
575
576 lp->pac_cnt_in_tx_buf++;
577 if (lp->tx_unit_busy == 0) {
578 trigger_send(ioaddr, length);
579 lp->saved_tx_size = 0;
580 lp->re_tx = 0;
581 lp->tx_unit_busy = 1;
582 } else
583 lp->saved_tx_size = length;
584
585 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
586 write_reg_high(ioaddr, IMR, ISRh_RxErr);
587
588 dev_kfree_skb (skb);
589 return NETDEV_TX_OK;
590}
591
592
593
594
595static irqreturn_t atp_interrupt(int irq, void *dev_instance)
596{
597 struct net_device *dev = dev_instance;
598 struct net_local *lp;
599 long ioaddr;
600 static int num_tx_since_rx;
601 int boguscount = max_interrupt_work;
602 int handled = 0;
603
604 ioaddr = dev->base_addr;
605 lp = netdev_priv(dev);
606
607 spin_lock(&lp->lock);
608
609
610 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
611
612
613 write_reg(ioaddr, CMR2, CMR2_NULL);
614 write_reg(ioaddr, IMR, 0);
615
616 if (net_debug > 5) printk(KERN_DEBUG "%s: In interrupt ", dev->name);
617 while (--boguscount > 0) {
618 int status = read_nibble(ioaddr, ISR);
619 if (net_debug > 5) printk("loop status %02x..", status);
620
621 if (status & (ISR_RxOK<<3)) {
622 handled = 1;
623 write_reg(ioaddr, ISR, ISR_RxOK);
624 do {
625 int read_status = read_nibble(ioaddr, CMR1);
626 if (net_debug > 6)
627 printk("handling Rx packet %02x..", read_status);
628
629
630 if (read_status & (CMR1_IRQ << 3)) {
631 dev->stats.rx_over_errors++;
632
633 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
634 net_rx(dev);
635
636 write_reg_high(ioaddr, ISR, ISRh_RxErr);
637 write_reg_high(ioaddr, CMR2, lp->addr_mode);
638 } else if ((read_status & (CMR1_BufEnb << 3)) == 0) {
639 net_rx(dev);
640 num_tx_since_rx = 0;
641 } else
642 break;
643 } while (--boguscount > 0);
644 } else if (status & ((ISR_TxErr + ISR_TxOK)<<3)) {
645 handled = 1;
646 if (net_debug > 6) printk("handling Tx done..");
647
648
649 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK);
650 if (status & (ISR_TxErr<<3)) {
651 dev->stats.collisions++;
652 if (++lp->re_tx > 15) {
653 dev->stats.tx_aborted_errors++;
654 hardware_init(dev);
655 break;
656 }
657
658 if (net_debug > 6) printk("attempting to ReTx");
659 write_reg(ioaddr, CMR1, CMR1_ReXmit + CMR1_Xmit);
660 } else {
661
662 dev->stats.tx_packets++;
663 lp->pac_cnt_in_tx_buf--;
664 if ( lp->saved_tx_size) {
665 trigger_send(ioaddr, lp->saved_tx_size);
666 lp->saved_tx_size = 0;
667 lp->re_tx = 0;
668 } else
669 lp->tx_unit_busy = 0;
670 netif_wake_queue(dev);
671 }
672 num_tx_since_rx++;
673 } else if (num_tx_since_rx > 8 &&
674 time_after(jiffies, dev->last_rx + HZ)) {
675 if (net_debug > 2)
676 printk(KERN_DEBUG "%s: Missed packet? No Rx after %d Tx and "
677 "%ld jiffies status %02x CMR1 %02x.\n", dev->name,
678 num_tx_since_rx, jiffies - dev->last_rx, status,
679 (read_nibble(ioaddr, CMR1) >> 3) & 15);
680 dev->stats.rx_missed_errors++;
681 hardware_init(dev);
682 num_tx_since_rx = 0;
683 break;
684 } else
685 break;
686 }
687
688
689
690 {
691 int i;
692 for (i = 0; i < 6; i++)
693 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
694#if 0 && defined(TIMED_CHECKER)
695 mod_timer(&lp->timer, jiffies + TIMED_CHECKER);
696#endif
697 }
698
699
700 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
701
702 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
703
704 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
705 write_reg_high(ioaddr, IMR, ISRh_RxErr);
706
707 spin_unlock(&lp->lock);
708
709 if (net_debug > 5) printk("exiting interrupt.\n");
710 return IRQ_RETVAL(handled);
711}
712
713#ifdef TIMED_CHECKER
714
715
716static void atp_timed_checker(unsigned long data)
717{
718 struct net_device *dev = (struct net_device *)data;
719 long ioaddr = dev->base_addr;
720 struct net_local *lp = netdev_priv(dev);
721 int tickssofar = jiffies - lp->last_rx_time;
722 int i;
723
724 spin_lock(&lp->lock);
725 if (tickssofar > 2*HZ) {
726#if 1
727 for (i = 0; i < 6; i++)
728 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
729 lp->last_rx_time = jiffies;
730#else
731 for (i = 0; i < 6; i++)
732 if (read_cmd_byte(ioaddr, PAR0 + i) != atp_timed_dev->dev_addr[i])
733 {
734 struct net_local *lp = netdev_priv(atp_timed_dev);
735 write_reg_byte(ioaddr, PAR0 + i, atp_timed_dev->dev_addr[i]);
736 if (i == 2)
737 dev->stats.tx_errors++;
738 else if (i == 3)
739 dev->stats.tx_dropped++;
740 else if (i == 4)
741 dev->stats.collisions++;
742 else
743 dev->stats.rx_errors++;
744 }
745#endif
746 }
747 spin_unlock(&lp->lock);
748 lp->timer.expires = jiffies + TIMED_CHECKER;
749 add_timer(&lp->timer);
750}
751#endif
752
753
754static void net_rx(struct net_device *dev)
755{
756 struct net_local *lp = netdev_priv(dev);
757 long ioaddr = dev->base_addr;
758 struct rx_header rx_head;
759
760
761 outb(EOC+MAR, ioaddr + PAR_DATA);
762 read_block(ioaddr, 8, (unsigned char*)&rx_head, dev->if_port);
763 if (net_debug > 5)
764 printk(KERN_DEBUG " rx_count %04x %04x %04x %04x..", rx_head.pad,
765 rx_head.rx_count, rx_head.rx_status, rx_head.cur_addr);
766 if ((rx_head.rx_status & 0x77) != 0x01) {
767 dev->stats.rx_errors++;
768 if (rx_head.rx_status & 0x0004) dev->stats.rx_frame_errors++;
769 else if (rx_head.rx_status & 0x0002) dev->stats.rx_crc_errors++;
770 if (net_debug > 3)
771 printk(KERN_DEBUG "%s: Unknown ATP Rx error %04x.\n",
772 dev->name, rx_head.rx_status);
773 if (rx_head.rx_status & 0x0020) {
774 dev->stats.rx_fifo_errors++;
775 write_reg_high(ioaddr, CMR1, CMR1h_TxENABLE);
776 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
777 } else if (rx_head.rx_status & 0x0050)
778 hardware_init(dev);
779 return;
780 } else {
781
782 int pkt_len = (rx_head.rx_count & 0x7ff) - 4;
783 struct sk_buff *skb;
784
785 skb = netdev_alloc_skb(dev, pkt_len + 2);
786 if (skb == NULL) {
787 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n",
788 dev->name);
789 dev->stats.rx_dropped++;
790 goto done;
791 }
792
793 skb_reserve(skb, 2);
794 read_block(ioaddr, pkt_len, skb_put(skb,pkt_len), dev->if_port);
795 skb->protocol = eth_type_trans(skb, dev);
796 netif_rx(skb);
797 dev->last_rx = jiffies;
798 dev->stats.rx_packets++;
799 dev->stats.rx_bytes += pkt_len;
800 }
801 done:
802 write_reg(ioaddr, CMR1, CMR1_NextPkt);
803 lp->last_rx_time = jiffies;
804}
805
806static void read_block(long ioaddr, int length, unsigned char *p, int data_mode)
807{
808 if (data_mode <= 3) {
809 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);
810 outb(length == 8 ? RdAddr | HNib | MAR : RdAddr | MAR,
811 ioaddr + PAR_DATA);
812 if (data_mode <= 1) {
813 do { *p++ = read_byte_mode0(ioaddr); } while (--length > 0);
814 } else {
815 do { *p++ = read_byte_mode2(ioaddr); } while (--length > 0);
816 }
817 } else if (data_mode <= 5) {
818 do { *p++ = read_byte_mode4(ioaddr); } while (--length > 0);
819 } else {
820 do { *p++ = read_byte_mode6(ioaddr); } while (--length > 0);
821 }
822
823 outb(EOC+HNib+MAR, ioaddr + PAR_DATA);
824 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
825}
826
827
828static int
829net_close(struct net_device *dev)
830{
831 struct net_local *lp = netdev_priv(dev);
832 long ioaddr = dev->base_addr;
833
834 netif_stop_queue(dev);
835
836 del_timer_sync(&lp->timer);
837
838
839 lp->addr_mode = CMR2h_OFF;
840 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
841
842
843 outb(0x00, ioaddr + PAR_CONTROL);
844 free_irq(dev->irq, dev);
845
846
847 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
848 return 0;
849}
850
851
852
853
854
855static void set_rx_mode_8002(struct net_device *dev)
856{
857 struct net_local *lp = netdev_priv(dev);
858 long ioaddr = dev->base_addr;
859
860 if (!netdev_mc_empty(dev) || (dev->flags & (IFF_ALLMULTI|IFF_PROMISC)))
861 lp->addr_mode = CMR2h_PROMISC;
862 else
863 lp->addr_mode = CMR2h_Normal;
864 write_reg_high(ioaddr, CMR2, lp->addr_mode);
865}
866
867static void set_rx_mode_8012(struct net_device *dev)
868{
869 struct net_local *lp = netdev_priv(dev);
870 long ioaddr = dev->base_addr;
871 unsigned char new_mode, mc_filter[8];
872 int i;
873
874 if (dev->flags & IFF_PROMISC) {
875 new_mode = CMR2h_PROMISC;
876 } else if ((netdev_mc_count(dev) > 1000) ||
877 (dev->flags & IFF_ALLMULTI)) {
878
879 memset(mc_filter, 0xff, sizeof(mc_filter));
880 new_mode = CMR2h_Normal;
881 } else {
882 struct netdev_hw_addr *ha;
883
884 memset(mc_filter, 0, sizeof(mc_filter));
885 netdev_for_each_mc_addr(ha, dev) {
886 int filterbit = ether_crc_le(ETH_ALEN, ha->addr) & 0x3f;
887 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
888 }
889 new_mode = CMR2h_Normal;
890 }
891 lp->addr_mode = new_mode;
892 write_reg(ioaddr, CMR2, CMR2_IRQOUT | 0x04);
893 for (i = 0; i < 8; i++)
894 write_reg_byte(ioaddr, i, mc_filter[i]);
895 if (net_debug > 2 || 1) {
896 lp->addr_mode = 1;
897 printk(KERN_DEBUG "%s: Mode %d, setting multicast filter to",
898 dev->name, lp->addr_mode);
899 for (i = 0; i < 8; i++)
900 printk(" %2.2x", mc_filter[i]);
901 printk(".\n");
902 }
903
904 write_reg_high(ioaddr, CMR2, lp->addr_mode);
905 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
906}
907
908static void set_rx_mode(struct net_device *dev)
909{
910 struct net_local *lp = netdev_priv(dev);
911
912 if (lp->chip_type == RTL8002)
913 return set_rx_mode_8002(dev);
914 else
915 return set_rx_mode_8012(dev);
916}
917
918
919static int __init atp_init_module(void) {
920 if (debug)
921 printk(KERN_INFO "%s", version);
922 return atp_init();
923}
924
925static void __exit atp_cleanup_module(void) {
926 struct net_device *next_dev;
927
928 while (root_atp_dev) {
929 struct net_local *atp_local = netdev_priv(root_atp_dev);
930 next_dev = atp_local->next_module;
931 unregister_netdev(root_atp_dev);
932
933 free_netdev(root_atp_dev);
934 root_atp_dev = next_dev;
935 }
936}
937
938module_init(atp_init_module);
939module_exit(atp_cleanup_module);
940