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17
18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/unistd.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
31#include <linux/mm.h>
32#include <linux/module.h>
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
36#include <linux/timer.h>
37#include <linux/workqueue.h>
38#include <linux/mdio.h>
39
40#include <linux/atomic.h>
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
45
46
47
48
49void phy_print_status(struct phy_device *phydev)
50{
51 if (phydev->link)
52 pr_info("%s - Link is Up - %d/%s\n",
53 dev_name(&phydev->dev),
54 phydev->speed,
55 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
56 else
57 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
58}
59EXPORT_SYMBOL(phy_print_status);
60
61
62
63
64
65
66
67
68
69
70static int phy_clear_interrupt(struct phy_device *phydev)
71{
72 int err = 0;
73
74 if (phydev->drv->ack_interrupt)
75 err = phydev->drv->ack_interrupt(phydev);
76
77 return err;
78}
79
80
81
82
83
84
85
86
87static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
88{
89 int err = 0;
90
91 phydev->interrupts = interrupts;
92 if (phydev->drv->config_intr)
93 err = phydev->drv->config_intr(phydev);
94
95 return err;
96}
97
98
99
100
101
102
103
104
105
106
107static inline int phy_aneg_done(struct phy_device *phydev)
108{
109 int retval;
110
111 retval = phy_read(phydev, MII_BMSR);
112
113 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
114}
115
116
117
118struct phy_setting {
119 int speed;
120 int duplex;
121 u32 setting;
122};
123
124
125static const struct phy_setting settings[] = {
126 {
127 .speed = 10000,
128 .duplex = DUPLEX_FULL,
129 .setting = SUPPORTED_10000baseT_Full,
130 },
131 {
132 .speed = SPEED_1000,
133 .duplex = DUPLEX_FULL,
134 .setting = SUPPORTED_1000baseT_Full,
135 },
136 {
137 .speed = SPEED_1000,
138 .duplex = DUPLEX_HALF,
139 .setting = SUPPORTED_1000baseT_Half,
140 },
141 {
142 .speed = SPEED_100,
143 .duplex = DUPLEX_FULL,
144 .setting = SUPPORTED_100baseT_Full,
145 },
146 {
147 .speed = SPEED_100,
148 .duplex = DUPLEX_HALF,
149 .setting = SUPPORTED_100baseT_Half,
150 },
151 {
152 .speed = SPEED_10,
153 .duplex = DUPLEX_FULL,
154 .setting = SUPPORTED_10baseT_Full,
155 },
156 {
157 .speed = SPEED_10,
158 .duplex = DUPLEX_HALF,
159 .setting = SUPPORTED_10baseT_Half,
160 },
161};
162
163#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
164
165
166
167
168
169
170
171
172
173
174
175static inline int phy_find_setting(int speed, int duplex)
176{
177 int idx = 0;
178
179 while (idx < ARRAY_SIZE(settings) &&
180 (settings[idx].speed != speed ||
181 settings[idx].duplex != duplex))
182 idx++;
183
184 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
185}
186
187
188
189
190
191
192
193
194
195
196
197static inline int phy_find_valid(int idx, u32 features)
198{
199 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
200 idx++;
201
202 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
203}
204
205
206
207
208
209
210
211
212
213static void phy_sanitize_settings(struct phy_device *phydev)
214{
215 u32 features = phydev->supported;
216 int idx;
217
218
219 if ((features & SUPPORTED_Autoneg) == 0)
220 phydev->autoneg = AUTONEG_DISABLE;
221
222 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
223 features);
224
225 phydev->speed = settings[idx].speed;
226 phydev->duplex = settings[idx].duplex;
227}
228
229
230
231
232
233
234
235
236
237
238
239
240
241int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
242{
243 u32 speed = ethtool_cmd_speed(cmd);
244
245 if (cmd->phy_address != phydev->addr)
246 return -EINVAL;
247
248
249
250 cmd->advertising &= phydev->supported;
251
252
253 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
254 return -EINVAL;
255
256 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
257 return -EINVAL;
258
259 if (cmd->autoneg == AUTONEG_DISABLE &&
260 ((speed != SPEED_1000 &&
261 speed != SPEED_100 &&
262 speed != SPEED_10) ||
263 (cmd->duplex != DUPLEX_HALF &&
264 cmd->duplex != DUPLEX_FULL)))
265 return -EINVAL;
266
267 phydev->autoneg = cmd->autoneg;
268
269 phydev->speed = speed;
270
271 phydev->advertising = cmd->advertising;
272
273 if (AUTONEG_ENABLE == cmd->autoneg)
274 phydev->advertising |= ADVERTISED_Autoneg;
275 else
276 phydev->advertising &= ~ADVERTISED_Autoneg;
277
278 phydev->duplex = cmd->duplex;
279
280
281 phy_start_aneg(phydev);
282
283 return 0;
284}
285EXPORT_SYMBOL(phy_ethtool_sset);
286
287int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
288{
289 cmd->supported = phydev->supported;
290
291 cmd->advertising = phydev->advertising;
292
293 ethtool_cmd_speed_set(cmd, phydev->speed);
294 cmd->duplex = phydev->duplex;
295 cmd->port = PORT_MII;
296 cmd->phy_address = phydev->addr;
297 cmd->transceiver = XCVR_EXTERNAL;
298 cmd->autoneg = phydev->autoneg;
299
300 return 0;
301}
302EXPORT_SYMBOL(phy_ethtool_gset);
303
304
305
306
307
308
309
310
311
312
313
314int phy_mii_ioctl(struct phy_device *phydev,
315 struct ifreq *ifr, int cmd)
316{
317 struct mii_ioctl_data *mii_data = if_mii(ifr);
318 u16 val = mii_data->val_in;
319
320 switch (cmd) {
321 case SIOCGMIIPHY:
322 mii_data->phy_id = phydev->addr;
323
324
325 case SIOCGMIIREG:
326 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
327 mii_data->reg_num);
328 break;
329
330 case SIOCSMIIREG:
331 if (mii_data->phy_id == phydev->addr) {
332 switch(mii_data->reg_num) {
333 case MII_BMCR:
334 if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
335 phydev->autoneg = AUTONEG_DISABLE;
336 else
337 phydev->autoneg = AUTONEG_ENABLE;
338 if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
339 phydev->duplex = DUPLEX_FULL;
340 else
341 phydev->duplex = DUPLEX_HALF;
342 if ((!phydev->autoneg) &&
343 (val & BMCR_SPEED1000))
344 phydev->speed = SPEED_1000;
345 else if ((!phydev->autoneg) &&
346 (val & BMCR_SPEED100))
347 phydev->speed = SPEED_100;
348 break;
349 case MII_ADVERTISE:
350 phydev->advertising = val;
351 break;
352 default:
353
354 break;
355 }
356 }
357
358 mdiobus_write(phydev->bus, mii_data->phy_id,
359 mii_data->reg_num, val);
360
361 if (mii_data->reg_num == MII_BMCR &&
362 val & BMCR_RESET &&
363 phydev->drv->config_init) {
364 phy_scan_fixups(phydev);
365 phydev->drv->config_init(phydev);
366 }
367 break;
368
369 case SIOCSHWTSTAMP:
370 if (phydev->drv->hwtstamp)
371 return phydev->drv->hwtstamp(phydev, ifr);
372
373
374 default:
375 return -EOPNOTSUPP;
376 }
377
378 return 0;
379}
380EXPORT_SYMBOL(phy_mii_ioctl);
381
382
383
384
385
386
387
388
389
390
391int phy_start_aneg(struct phy_device *phydev)
392{
393 int err;
394
395 mutex_lock(&phydev->lock);
396
397 if (AUTONEG_DISABLE == phydev->autoneg)
398 phy_sanitize_settings(phydev);
399
400 err = phydev->drv->config_aneg(phydev);
401
402 if (err < 0)
403 goto out_unlock;
404
405 if (phydev->state != PHY_HALTED) {
406 if (AUTONEG_ENABLE == phydev->autoneg) {
407 phydev->state = PHY_AN;
408 phydev->link_timeout = PHY_AN_TIMEOUT;
409 } else {
410 phydev->state = PHY_FORCING;
411 phydev->link_timeout = PHY_FORCE_TIMEOUT;
412 }
413 }
414
415out_unlock:
416 mutex_unlock(&phydev->lock);
417 return err;
418}
419EXPORT_SYMBOL(phy_start_aneg);
420
421
422static void phy_change(struct work_struct *work);
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437void phy_start_machine(struct phy_device *phydev,
438 void (*handler)(struct net_device *))
439{
440 phydev->adjust_state = handler;
441
442 schedule_delayed_work(&phydev->state_queue, HZ);
443}
444
445
446
447
448
449
450
451
452
453void phy_stop_machine(struct phy_device *phydev)
454{
455 cancel_delayed_work_sync(&phydev->state_queue);
456
457 mutex_lock(&phydev->lock);
458 if (phydev->state > PHY_UP)
459 phydev->state = PHY_UP;
460 mutex_unlock(&phydev->lock);
461
462 phydev->adjust_state = NULL;
463}
464
465
466
467
468
469
470
471
472
473
474static void phy_force_reduction(struct phy_device *phydev)
475{
476 int idx;
477
478 idx = phy_find_setting(phydev->speed, phydev->duplex);
479
480 idx++;
481
482 idx = phy_find_valid(idx, phydev->supported);
483
484 phydev->speed = settings[idx].speed;
485 phydev->duplex = settings[idx].duplex;
486
487 pr_info("Trying %d/%s\n",
488 phydev->speed, DUPLEX_FULL == phydev->duplex ? "FULL" : "HALF");
489}
490
491
492
493
494
495
496
497
498
499
500
501static void phy_error(struct phy_device *phydev)
502{
503 mutex_lock(&phydev->lock);
504 phydev->state = PHY_HALTED;
505 mutex_unlock(&phydev->lock);
506}
507
508
509
510
511
512
513
514
515
516static irqreturn_t phy_interrupt(int irq, void *phy_dat)
517{
518 struct phy_device *phydev = phy_dat;
519
520 if (PHY_HALTED == phydev->state)
521 return IRQ_NONE;
522
523
524
525
526
527 disable_irq_nosync(irq);
528 atomic_inc(&phydev->irq_disable);
529
530 schedule_work(&phydev->phy_queue);
531
532 return IRQ_HANDLED;
533}
534
535
536
537
538
539static int phy_enable_interrupts(struct phy_device *phydev)
540{
541 int err;
542
543 err = phy_clear_interrupt(phydev);
544
545 if (err < 0)
546 return err;
547
548 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
549
550 return err;
551}
552
553
554
555
556
557static int phy_disable_interrupts(struct phy_device *phydev)
558{
559 int err;
560
561
562 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
563
564 if (err)
565 goto phy_err;
566
567
568 err = phy_clear_interrupt(phydev);
569
570 if (err)
571 goto phy_err;
572
573 return 0;
574
575phy_err:
576 phy_error(phydev);
577
578 return err;
579}
580
581
582
583
584
585
586
587
588
589
590
591int phy_start_interrupts(struct phy_device *phydev)
592{
593 int err = 0;
594
595 INIT_WORK(&phydev->phy_queue, phy_change);
596
597 atomic_set(&phydev->irq_disable, 0);
598 if (request_irq(phydev->irq, phy_interrupt,
599 IRQF_SHARED,
600 "phy_interrupt",
601 phydev) < 0) {
602 pr_warn("%s: Can't get IRQ %d (PHY)\n",
603 phydev->bus->name, phydev->irq);
604 phydev->irq = PHY_POLL;
605 return 0;
606 }
607
608 err = phy_enable_interrupts(phydev);
609
610 return err;
611}
612EXPORT_SYMBOL(phy_start_interrupts);
613
614
615
616
617
618int phy_stop_interrupts(struct phy_device *phydev)
619{
620 int err;
621
622 err = phy_disable_interrupts(phydev);
623
624 if (err)
625 phy_error(phydev);
626
627 free_irq(phydev->irq, phydev);
628
629
630
631
632
633
634
635 cancel_work_sync(&phydev->phy_queue);
636
637
638
639
640
641 while (atomic_dec_return(&phydev->irq_disable) >= 0)
642 enable_irq(phydev->irq);
643
644 return err;
645}
646EXPORT_SYMBOL(phy_stop_interrupts);
647
648
649
650
651
652
653static void phy_change(struct work_struct *work)
654{
655 int err;
656 struct phy_device *phydev =
657 container_of(work, struct phy_device, phy_queue);
658
659 if (phydev->drv->did_interrupt &&
660 !phydev->drv->did_interrupt(phydev))
661 goto ignore;
662
663 err = phy_disable_interrupts(phydev);
664
665 if (err)
666 goto phy_err;
667
668 mutex_lock(&phydev->lock);
669 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
670 phydev->state = PHY_CHANGELINK;
671 mutex_unlock(&phydev->lock);
672
673 atomic_dec(&phydev->irq_disable);
674 enable_irq(phydev->irq);
675
676
677 if (PHY_HALTED != phydev->state)
678 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
679
680 if (err)
681 goto irq_enable_err;
682
683
684 cancel_delayed_work_sync(&phydev->state_queue);
685 schedule_delayed_work(&phydev->state_queue, 0);
686
687 return;
688
689ignore:
690 atomic_dec(&phydev->irq_disable);
691 enable_irq(phydev->irq);
692 return;
693
694irq_enable_err:
695 disable_irq(phydev->irq);
696 atomic_inc(&phydev->irq_disable);
697phy_err:
698 phy_error(phydev);
699}
700
701
702
703
704
705void phy_stop(struct phy_device *phydev)
706{
707 mutex_lock(&phydev->lock);
708
709 if (PHY_HALTED == phydev->state)
710 goto out_unlock;
711
712 if (phydev->irq != PHY_POLL) {
713
714 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
715
716
717 phy_clear_interrupt(phydev);
718 }
719
720 phydev->state = PHY_HALTED;
721
722out_unlock:
723 mutex_unlock(&phydev->lock);
724
725
726
727
728
729
730}
731
732
733
734
735
736
737
738
739
740
741
742
743void phy_start(struct phy_device *phydev)
744{
745 mutex_lock(&phydev->lock);
746
747 switch (phydev->state) {
748 case PHY_STARTING:
749 phydev->state = PHY_PENDING;
750 break;
751 case PHY_READY:
752 phydev->state = PHY_UP;
753 break;
754 case PHY_HALTED:
755 phydev->state = PHY_RESUMING;
756 default:
757 break;
758 }
759 mutex_unlock(&phydev->lock);
760}
761EXPORT_SYMBOL(phy_stop);
762EXPORT_SYMBOL(phy_start);
763
764
765
766
767
768void phy_state_machine(struct work_struct *work)
769{
770 struct delayed_work *dwork = to_delayed_work(work);
771 struct phy_device *phydev =
772 container_of(dwork, struct phy_device, state_queue);
773 int needs_aneg = 0;
774 int err = 0;
775
776 mutex_lock(&phydev->lock);
777
778 if (phydev->adjust_state)
779 phydev->adjust_state(phydev->attached_dev);
780
781 switch(phydev->state) {
782 case PHY_DOWN:
783 case PHY_STARTING:
784 case PHY_READY:
785 case PHY_PENDING:
786 break;
787 case PHY_UP:
788 needs_aneg = 1;
789
790 phydev->link_timeout = PHY_AN_TIMEOUT;
791
792 break;
793 case PHY_AN:
794 err = phy_read_status(phydev);
795
796 if (err < 0)
797 break;
798
799
800
801 if (!phydev->link) {
802 phydev->state = PHY_NOLINK;
803 netif_carrier_off(phydev->attached_dev);
804 phydev->adjust_link(phydev->attached_dev);
805 break;
806 }
807
808
809
810 err = phy_aneg_done(phydev);
811 if (err < 0)
812 break;
813
814
815 if (err > 0) {
816 phydev->state = PHY_RUNNING;
817 netif_carrier_on(phydev->attached_dev);
818 phydev->adjust_link(phydev->attached_dev);
819
820 } else if (0 == phydev->link_timeout--) {
821 int idx;
822
823 needs_aneg = 1;
824
825
826 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
827 break;
828
829
830
831
832
833
834 idx = phy_find_valid(0, phydev->supported);
835
836 phydev->speed = settings[idx].speed;
837 phydev->duplex = settings[idx].duplex;
838
839 phydev->autoneg = AUTONEG_DISABLE;
840
841 pr_info("Trying %d/%s\n",
842 phydev->speed,
843 DUPLEX_FULL == phydev->duplex ?
844 "FULL" : "HALF");
845 }
846 break;
847 case PHY_NOLINK:
848 err = phy_read_status(phydev);
849
850 if (err)
851 break;
852
853 if (phydev->link) {
854 phydev->state = PHY_RUNNING;
855 netif_carrier_on(phydev->attached_dev);
856 phydev->adjust_link(phydev->attached_dev);
857 }
858 break;
859 case PHY_FORCING:
860 err = genphy_update_link(phydev);
861
862 if (err)
863 break;
864
865 if (phydev->link) {
866 phydev->state = PHY_RUNNING;
867 netif_carrier_on(phydev->attached_dev);
868 } else {
869 if (0 == phydev->link_timeout--) {
870 phy_force_reduction(phydev);
871 needs_aneg = 1;
872 }
873 }
874
875 phydev->adjust_link(phydev->attached_dev);
876 break;
877 case PHY_RUNNING:
878
879
880 if (PHY_POLL == phydev->irq)
881 phydev->state = PHY_CHANGELINK;
882 break;
883 case PHY_CHANGELINK:
884 err = phy_read_status(phydev);
885
886 if (err)
887 break;
888
889 if (phydev->link) {
890 phydev->state = PHY_RUNNING;
891 netif_carrier_on(phydev->attached_dev);
892 } else {
893 phydev->state = PHY_NOLINK;
894 netif_carrier_off(phydev->attached_dev);
895 }
896
897 phydev->adjust_link(phydev->attached_dev);
898
899 if (PHY_POLL != phydev->irq)
900 err = phy_config_interrupt(phydev,
901 PHY_INTERRUPT_ENABLED);
902 break;
903 case PHY_HALTED:
904 if (phydev->link) {
905 phydev->link = 0;
906 netif_carrier_off(phydev->attached_dev);
907 phydev->adjust_link(phydev->attached_dev);
908 }
909 break;
910 case PHY_RESUMING:
911
912 err = phy_clear_interrupt(phydev);
913
914 if (err)
915 break;
916
917 err = phy_config_interrupt(phydev,
918 PHY_INTERRUPT_ENABLED);
919
920 if (err)
921 break;
922
923 if (AUTONEG_ENABLE == phydev->autoneg) {
924 err = phy_aneg_done(phydev);
925 if (err < 0)
926 break;
927
928
929
930
931 if (err > 0) {
932 err = phy_read_status(phydev);
933 if (err)
934 break;
935
936 if (phydev->link) {
937 phydev->state = PHY_RUNNING;
938 netif_carrier_on(phydev->attached_dev);
939 } else
940 phydev->state = PHY_NOLINK;
941 phydev->adjust_link(phydev->attached_dev);
942 } else {
943 phydev->state = PHY_AN;
944 phydev->link_timeout = PHY_AN_TIMEOUT;
945 }
946 } else {
947 err = phy_read_status(phydev);
948 if (err)
949 break;
950
951 if (phydev->link) {
952 phydev->state = PHY_RUNNING;
953 netif_carrier_on(phydev->attached_dev);
954 } else
955 phydev->state = PHY_NOLINK;
956 phydev->adjust_link(phydev->attached_dev);
957 }
958 break;
959 }
960
961 mutex_unlock(&phydev->lock);
962
963 if (needs_aneg)
964 err = phy_start_aneg(phydev);
965
966 if (err < 0)
967 phy_error(phydev);
968
969 schedule_delayed_work(&phydev->state_queue, PHY_STATE_TIME * HZ);
970}
971
972static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
973 int addr)
974{
975
976 bus->write(bus, addr, MII_MMD_CTRL, devad);
977
978
979 bus->write(bus, addr, MII_MMD_DATA, prtad);
980
981
982 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
983}
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
1001 int addr)
1002{
1003 u32 ret;
1004
1005 mmd_phy_indirect(bus, prtad, devad, addr);
1006
1007
1008 ret = bus->read(bus, addr, MII_MMD_DATA);
1009
1010 return ret;
1011}
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
1030 int addr, u32 data)
1031{
1032 mmd_phy_indirect(bus, prtad, devad, addr);
1033
1034
1035 bus->write(bus, addr, MII_MMD_DATA, data);
1036}
1037
1038static u32 phy_eee_to_adv(u16 eee_adv)
1039{
1040 u32 adv = 0;
1041
1042 if (eee_adv & MDIO_EEE_100TX)
1043 adv |= ADVERTISED_100baseT_Full;
1044 if (eee_adv & MDIO_EEE_1000T)
1045 adv |= ADVERTISED_1000baseT_Full;
1046 if (eee_adv & MDIO_EEE_10GT)
1047 adv |= ADVERTISED_10000baseT_Full;
1048 if (eee_adv & MDIO_EEE_1000KX)
1049 adv |= ADVERTISED_1000baseKX_Full;
1050 if (eee_adv & MDIO_EEE_10GKX4)
1051 adv |= ADVERTISED_10000baseKX4_Full;
1052 if (eee_adv & MDIO_EEE_10GKR)
1053 adv |= ADVERTISED_10000baseKR_Full;
1054
1055 return adv;
1056}
1057
1058static u32 phy_eee_to_supported(u16 eee_caported)
1059{
1060 u32 supported = 0;
1061
1062 if (eee_caported & MDIO_EEE_100TX)
1063 supported |= SUPPORTED_100baseT_Full;
1064 if (eee_caported & MDIO_EEE_1000T)
1065 supported |= SUPPORTED_1000baseT_Full;
1066 if (eee_caported & MDIO_EEE_10GT)
1067 supported |= SUPPORTED_10000baseT_Full;
1068 if (eee_caported & MDIO_EEE_1000KX)
1069 supported |= SUPPORTED_1000baseKX_Full;
1070 if (eee_caported & MDIO_EEE_10GKX4)
1071 supported |= SUPPORTED_10000baseKX4_Full;
1072 if (eee_caported & MDIO_EEE_10GKR)
1073 supported |= SUPPORTED_10000baseKR_Full;
1074
1075 return supported;
1076}
1077
1078static u16 phy_adv_to_eee(u32 adv)
1079{
1080 u16 reg = 0;
1081
1082 if (adv & ADVERTISED_100baseT_Full)
1083 reg |= MDIO_EEE_100TX;
1084 if (adv & ADVERTISED_1000baseT_Full)
1085 reg |= MDIO_EEE_1000T;
1086 if (adv & ADVERTISED_10000baseT_Full)
1087 reg |= MDIO_EEE_10GT;
1088 if (adv & ADVERTISED_1000baseKX_Full)
1089 reg |= MDIO_EEE_1000KX;
1090 if (adv & ADVERTISED_10000baseKX4_Full)
1091 reg |= MDIO_EEE_10GKX4;
1092 if (adv & ADVERTISED_10000baseKR_Full)
1093 reg |= MDIO_EEE_10GKR;
1094
1095 return reg;
1096}
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1109{
1110 int ret = -EPROTONOSUPPORT;
1111
1112
1113
1114
1115
1116 if ((phydev->duplex == DUPLEX_FULL) &&
1117 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1118 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
1119 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
1120 int eee_lp, eee_cap, eee_adv;
1121 u32 lp, cap, adv;
1122 int idx, status;
1123
1124
1125 status = phy_read_status(phydev);
1126 if (status)
1127 return status;
1128
1129
1130 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1131 MDIO_MMD_PCS, phydev->addr);
1132 if (eee_cap < 0)
1133 return eee_cap;
1134
1135 cap = phy_eee_to_supported(eee_cap);
1136 if (!cap)
1137 goto eee_exit;
1138
1139
1140
1141
1142 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1143 MDIO_MMD_AN, phydev->addr);
1144 if (eee_lp < 0)
1145 return eee_lp;
1146
1147 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1148 MDIO_MMD_AN, phydev->addr);
1149 if (eee_adv < 0)
1150 return eee_adv;
1151
1152 adv = phy_eee_to_adv(eee_adv);
1153 lp = phy_eee_to_adv(eee_lp);
1154 idx = phy_find_setting(phydev->speed, phydev->duplex);
1155 if ((lp & adv & settings[idx].setting))
1156 goto eee_exit;
1157
1158 if (clk_stop_enable) {
1159
1160
1161
1162 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1163 MDIO_MMD_PCS,
1164 phydev->addr);
1165 if (val < 0)
1166 return val;
1167
1168 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1169 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1170 MDIO_MMD_PCS, phydev->addr, val);
1171 }
1172
1173 ret = 0;
1174 }
1175
1176eee_exit:
1177 return ret;
1178}
1179EXPORT_SYMBOL(phy_init_eee);
1180
1181
1182
1183
1184
1185
1186
1187
1188int phy_get_eee_err(struct phy_device *phydev)
1189{
1190 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1191 MDIO_MMD_PCS, phydev->addr);
1192
1193}
1194EXPORT_SYMBOL(phy_get_eee_err);
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1205{
1206 int val;
1207
1208
1209 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1210 MDIO_MMD_PCS, phydev->addr);
1211 if (val < 0)
1212 return val;
1213 data->supported = phy_eee_to_supported(val);
1214
1215
1216 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1217 MDIO_MMD_AN, phydev->addr);
1218 if (val < 0)
1219 return val;
1220 data->advertised = phy_eee_to_adv(val);
1221
1222
1223 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1224 MDIO_MMD_AN, phydev->addr);
1225 if (val < 0)
1226 return val;
1227 data->lp_advertised = phy_eee_to_adv(val);
1228
1229 return 0;
1230}
1231EXPORT_SYMBOL(phy_ethtool_get_eee);
1232
1233
1234
1235
1236
1237
1238
1239
1240int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1241{
1242 int val;
1243
1244 val = phy_adv_to_eee(data->advertised);
1245 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1246 phydev->addr, val);
1247
1248 return 0;
1249}
1250EXPORT_SYMBOL(phy_ethtool_set_eee);
1251