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26#ifndef RT2X00REG_H
27#define RT2X00REG_H
28
29
30
31
32enum rx_crypto {
33 RX_CRYPTO_SUCCESS = 0,
34 RX_CRYPTO_FAIL_ICV = 1,
35 RX_CRYPTO_FAIL_MIC = 2,
36 RX_CRYPTO_FAIL_KEY = 3,
37};
38
39
40
41
42enum antenna {
43 ANTENNA_SW_DIVERSITY = 0,
44 ANTENNA_A = 1,
45 ANTENNA_B = 2,
46 ANTENNA_HW_DIVERSITY = 3,
47};
48
49
50
51
52enum led_mode {
53 LED_MODE_DEFAULT = 0,
54 LED_MODE_TXRX_ACTIVITY = 1,
55 LED_MODE_SIGNAL_STRENGTH = 2,
56 LED_MODE_ASUS = 3,
57 LED_MODE_ALPHA = 4,
58};
59
60
61
62
63enum tsf_sync {
64 TSF_SYNC_NONE = 0,
65 TSF_SYNC_INFRA = 1,
66 TSF_SYNC_ADHOC = 2,
67 TSF_SYNC_AP_NONE = 3,
68};
69
70
71
72
73enum dev_state {
74 STATE_DEEP_SLEEP = 0,
75 STATE_SLEEP = 1,
76 STATE_STANDBY = 2,
77 STATE_AWAKE = 3,
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79
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83
84 STATE_RADIO_ON,
85 STATE_RADIO_OFF,
86 STATE_RADIO_IRQ_ON,
87 STATE_RADIO_IRQ_OFF,
88};
89
90
91
92
93enum ifs {
94 IFS_BACKOFF = 0,
95 IFS_SIFS = 1,
96 IFS_NEW_BACKOFF = 2,
97 IFS_NONE = 3,
98};
99
100
101
102
103enum txop {
104 TXOP_HTTXOP = 0,
105 TXOP_PIFS = 1,
106 TXOP_SIFS = 2,
107 TXOP_BACKOFF = 3,
108};
109
110
111
112
113enum cipher {
114 CIPHER_NONE = 0,
115 CIPHER_WEP64 = 1,
116 CIPHER_WEP128 = 2,
117 CIPHER_TKIP = 3,
118 CIPHER_AES = 4,
119
120
121
122 CIPHER_CKIP64 = 5,
123 CIPHER_CKIP128 = 6,
124 CIPHER_TKIP_NO_MIC = 7,
125
126
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129
130
131 CIPHER_MAX = 4,
132};
133
134
135
136
137enum rate_modulation {
138 RATE_MODE_CCK = 0,
139 RATE_MODE_OFDM = 1,
140 RATE_MODE_HT_MIX = 2,
141 RATE_MODE_HT_GREENFIELD = 3,
142};
143
144
145
146
147enum firmware_errors {
148 FW_OK,
149 FW_BAD_CRC,
150 FW_BAD_LENGTH,
151 FW_BAD_VERSION,
152};
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158
159
160struct rt2x00_field8 {
161 u8 bit_offset;
162 u8 bit_mask;
163};
164
165struct rt2x00_field16 {
166 u16 bit_offset;
167 u16 bit_mask;
168};
169
170struct rt2x00_field32 {
171 u32 bit_offset;
172 u32 bit_mask;
173};
174
175
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177
178
179
180
181#define is_power_of_two(x) ( !((x) & ((x)-1)) )
182#define low_bit_mask(x) ( ((x)-1) & ~(x) )
183#define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x))
184
185
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188
189
190
191#define compile_ffs2(__x) \
192 __builtin_choose_expr(((__x) & 0x1), 0, 1)
193
194#define compile_ffs4(__x) \
195 __builtin_choose_expr(((__x) & 0x3), \
196 (compile_ffs2((__x))), \
197 (compile_ffs2((__x) >> 2) + 2))
198
199#define compile_ffs8(__x) \
200 __builtin_choose_expr(((__x) & 0xf), \
201 (compile_ffs4((__x))), \
202 (compile_ffs4((__x) >> 4) + 4))
203
204#define compile_ffs16(__x) \
205 __builtin_choose_expr(((__x) & 0xff), \
206 (compile_ffs8((__x))), \
207 (compile_ffs8((__x) >> 8) + 8))
208
209#define compile_ffs32(__x) \
210 __builtin_choose_expr(((__x) & 0xffff), \
211 (compile_ffs16((__x))), \
212 (compile_ffs16((__x) >> 16) + 16))
213
214
215
216
217
218
219#define FIELD_CHECK(__mask, __type) \
220 BUILD_BUG_ON(!(__mask) || \
221 !is_valid_mask(__mask) || \
222 (__mask) != (__type)(__mask)) \
223
224#define FIELD8(__mask) \
225({ \
226 FIELD_CHECK(__mask, u8); \
227 (struct rt2x00_field8) { \
228 compile_ffs8(__mask), (__mask) \
229 }; \
230})
231
232#define FIELD16(__mask) \
233({ \
234 FIELD_CHECK(__mask, u16); \
235 (struct rt2x00_field16) { \
236 compile_ffs16(__mask), (__mask) \
237 }; \
238})
239
240#define FIELD32(__mask) \
241({ \
242 FIELD_CHECK(__mask, u32); \
243 (struct rt2x00_field32) { \
244 compile_ffs32(__mask), (__mask) \
245 }; \
246})
247
248#define SET_FIELD(__reg, __type, __field, __value)\
249({ \
250 typecheck(__type, __field); \
251 *(__reg) &= ~((__field).bit_mask); \
252 *(__reg) |= ((__value) << \
253 ((__field).bit_offset)) & \
254 ((__field).bit_mask); \
255})
256
257#define GET_FIELD(__reg, __type, __field) \
258({ \
259 typecheck(__type, __field); \
260 ((__reg) & ((__field).bit_mask)) >> \
261 ((__field).bit_offset); \
262})
263
264#define rt2x00_set_field32(__reg, __field, __value) \
265 SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
266#define rt2x00_get_field32(__reg, __field) \
267 GET_FIELD(__reg, struct rt2x00_field32, __field)
268
269#define rt2x00_set_field16(__reg, __field, __value) \
270 SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
271#define rt2x00_get_field16(__reg, __field) \
272 GET_FIELD(__reg, struct rt2x00_field16, __field)
273
274#define rt2x00_set_field8(__reg, __field, __value) \
275 SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
276#define rt2x00_get_field8(__reg, __field) \
277 GET_FIELD(__reg, struct rt2x00_field8, __field)
278
279#endif
280