1/* 2 * AD7792/AD7793 SPI ADC driver 3 * 4 * Copyright 2011 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8#ifndef IIO_ADC_AD7793_H_ 9#define IIO_ADC_AD7793_H_ 10 11/* 12 * TODO: struct ad7793_platform_data needs to go into include/linux/iio 13 */ 14 15/* Registers */ 16#define AD7793_REG_COMM 0 /* Communications Register (WO, 8-bit) */ 17#define AD7793_REG_STAT 0 /* Status Register (RO, 8-bit) */ 18#define AD7793_REG_MODE 1 /* Mode Register (RW, 16-bit */ 19#define AD7793_REG_CONF 2 /* Configuration Register (RW, 16-bit) */ 20#define AD7793_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */ 21#define AD7793_REG_ID 4 /* ID Register (RO, 8-bit) */ 22#define AD7793_REG_IO 5 /* IO Register (RO, 8-bit) */ 23#define AD7793_REG_OFFSET 6 /* Offset Register (RW, 16-bit 24 * (AD7792)/24-bit (AD7793)) */ 25#define AD7793_REG_FULLSALE 7 /* Full-Scale Register 26 * (RW, 16-bit (AD7792)/24-bit (AD7793)) */ 27 28/* Communications Register Bit Designations (AD7793_REG_COMM) */ 29#define AD7793_COMM_WEN (1 << 7) /* Write Enable */ 30#define AD7793_COMM_WRITE (0 << 6) /* Write Operation */ 31#define AD7793_COMM_READ (1 << 6) /* Read Operation */ 32#define AD7793_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */ 33#define AD7793_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */ 34 35/* Status Register Bit Designations (AD7793_REG_STAT) */ 36#define AD7793_STAT_RDY (1 << 7) /* Ready */ 37#define AD7793_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */ 38#define AD7793_STAT_CH3 (1 << 2) /* Channel 3 */ 39#define AD7793_STAT_CH2 (1 << 1) /* Channel 2 */ 40#define AD7793_STAT_CH1 (1 << 0) /* Channel 1 */ 41 42/* Mode Register Bit Designations (AD7793_REG_MODE) */ 43#define AD7793_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */ 44#define AD7793_MODE_CLKSRC(x) (((x) & 0x3) << 6) /* ADC Clock Source Select */ 45#define AD7793_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */ 46 47#define AD7793_MODE_CONT 0 /* Continuous Conversion Mode */ 48#define AD7793_MODE_SINGLE 1 /* Single Conversion Mode */ 49#define AD7793_MODE_IDLE 2 /* Idle Mode */ 50#define AD7793_MODE_PWRDN 3 /* Power-Down Mode */ 51#define AD7793_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */ 52#define AD7793_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */ 53#define AD7793_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */ 54#define AD7793_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */ 55 56#define AD7793_CLK_INT 0 /* Internal 64 kHz Clock not 57 * available at the CLK pin */ 58#define AD7793_CLK_INT_CO 1 /* Internal 64 kHz Clock available 59 * at the CLK pin */ 60#define AD7793_CLK_EXT 2 /* External 64 kHz Clock */ 61#define AD7793_CLK_EXT_DIV2 3 /* External Clock divided by 2 */ 62 63/* Configuration Register Bit Designations (AD7793_REG_CONF) */ 64#define AD7793_CONF_VBIAS(x) (((x) & 0x3) << 14) /* Bias Voltage 65 * Generator Enable */ 66#define AD7793_CONF_BO_EN (1 << 13) /* Burnout Current Enable */ 67#define AD7793_CONF_UNIPOLAR (1 << 12) /* Unipolar/Bipolar Enable */ 68#define AD7793_CONF_BOOST (1 << 11) /* Boost Enable */ 69#define AD7793_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */ 70#define AD7793_CONF_REFSEL (1 << 7) /* INT/EXT Reference Select */ 71#define AD7793_CONF_BUF (1 << 4) /* Buffered Mode Enable */ 72#define AD7793_CONF_CHAN(x) ((x) & 0x7) /* Channel select */ 73 74#define AD7793_CH_AIN1P_AIN1M 0 /* AIN1(+) - AIN1(-) */ 75#define AD7793_CH_AIN2P_AIN2M 1 /* AIN2(+) - AIN2(-) */ 76#define AD7793_CH_AIN3P_AIN3M 2 /* AIN3(+) - AIN3(-) */ 77#define AD7793_CH_AIN1M_AIN1M 3 /* AIN1(-) - AIN1(-) */ 78#define AD7793_CH_TEMP 6 /* Temp Sensor */ 79#define AD7793_CH_AVDD_MONITOR 7 /* AVDD Monitor */ 80 81/* ID Register Bit Designations (AD7793_REG_ID) */ 82#define AD7792_ID 0xA 83#define AD7793_ID 0xB 84#define AD7793_ID_MASK 0xF 85 86/* IO (Excitation Current Sources) Register Bit Designations (AD7793_REG_IO) */ 87#define AD7793_IO_IEXC1_IOUT1_IEXC2_IOUT2 0 /* IEXC1 connect to IOUT1, 88 * IEXC2 connect to IOUT2 */ 89#define AD7793_IO_IEXC1_IOUT2_IEXC2_IOUT1 1 /* IEXC1 connect to IOUT2, 90 * IEXC2 connect to IOUT1 */ 91#define AD7793_IO_IEXC1_IEXC2_IOUT1 2 /* Both current sources 92 * IEXC1,2 connect to IOUT1 */ 93#define AD7793_IO_IEXC1_IEXC2_IOUT2 3 /* Both current sources 94 * IEXC1,2 connect to IOUT2 */ 95 96#define AD7793_IO_IXCEN_10uA (1 << 0) /* Excitation Current 10uA */ 97#define AD7793_IO_IXCEN_210uA (2 << 0) /* Excitation Current 210uA */ 98#define AD7793_IO_IXCEN_1mA (3 << 0) /* Excitation Current 1mA */ 99 100struct ad7793_platform_data { 101 u16 vref_mv; 102 u16 mode; 103 u16 conf; 104 u8 io; 105}; 106 107#endif /* IIO_ADC_AD7793_H_ */ 108