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11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H __FILE__
13
14#define S3C_DMA_CHANNELS (16)
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21
22enum dma_ch {
23
24 DMACH_DT_PROP = -1,
25 DMACH_UART0 = 0,
26 DMACH_UART0_SRC2,
27 DMACH_UART1,
28 DMACH_UART1_SRC2,
29 DMACH_UART2,
30 DMACH_UART2_SRC2,
31 DMACH_UART3,
32 DMACH_UART3_SRC2,
33 DMACH_PCM0_TX,
34 DMACH_PCM0_RX,
35 DMACH_I2S0_OUT,
36 DMACH_I2S0_IN,
37 DMACH_SPI0_TX,
38 DMACH_SPI0_RX,
39 DMACH_HSI_I2SV40_TX,
40 DMACH_HSI_I2SV40_RX,
41
42
43 DMACH_PCM1_TX = 16,
44 DMACH_PCM1_RX,
45 DMACH_I2S1_OUT,
46 DMACH_I2S1_IN,
47 DMACH_SPI1_TX,
48 DMACH_SPI1_RX,
49 DMACH_AC97_PCMOUT,
50 DMACH_AC97_PCMIN,
51 DMACH_AC97_MICIN,
52 DMACH_PWM,
53 DMACH_IRDA,
54 DMACH_EXTERNAL,
55 DMACH_RES1,
56 DMACH_RES2,
57 DMACH_SECURITY_RX,
58 DMACH_SECURITY_TX,
59 DMACH_MAX
60};
61
62static inline bool samsung_dma_has_circular(void)
63{
64 return true;
65}
66
67static inline bool samsung_dma_is_dmadev(void)
68{
69 return false;
70}
71#define S3C2410_DMAF_CIRCULAR (1 << 0)
72
73#include <plat/dma.h>
74
75#define DMACH_LOW_LEVEL (1<<28)
76
77struct s3c64xx_dma_buff;
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84
85struct s3c64xx_dma_buff {
86 struct s3c64xx_dma_buff *next;
87
88 void *pw;
89 struct pl080s_lli *lli;
90 dma_addr_t lli_dma;
91};
92
93struct s3c64xx_dmac;
94
95struct s3c2410_dma_chan {
96 unsigned char number;
97 unsigned char in_use;
98 unsigned char bit;
99 unsigned char hw_width;
100 unsigned char peripheral;
101
102 unsigned int flags;
103 enum dma_data_direction source;
104
105
106 dma_addr_t dev_addr;
107
108 struct s3c2410_dma_client *client;
109 struct s3c64xx_dmac *dmac;
110
111 void __iomem *regs;
112
113
114 s3c2410_dma_cbfn_t callback_fn;
115 s3c2410_dma_opfn_t op_fn;
116
117
118 struct s3c64xx_dma_buff *curr;
119 struct s3c64xx_dma_buff *next;
120 struct s3c64xx_dma_buff *end;
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127
128};
129
130#include <plat/dma-core.h>
131
132#endif
133