linux/arch/arm/mach-shmobile/pfc-r8a7740.c
<<
>>
Prefs
   1/*
   2 * R8A7740 processor support
   3 *
   4 * Copyright (C) 2011  Renesas Solutions Corp.
   5 * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; version 2 of the
  10 * License.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  20 */
  21#include <linux/init.h>
  22#include <linux/kernel.h>
  23#include <linux/sh_pfc.h>
  24#include <mach/r8a7740.h>
  25#include <mach/irqs.h>
  26
  27#define CPU_ALL_PORT(fn, pfx, sfx)                                      \
  28        PORT_10(fn, pfx, sfx),          PORT_90(fn, pfx, sfx),          \
  29        PORT_10(fn, pfx##10, sfx),      PORT_90(fn, pfx##1, sfx),       \
  30        PORT_10(fn, pfx##20, sfx),                                      \
  31        PORT_1(fn, pfx##210, sfx),      PORT_1(fn, pfx##211, sfx)
  32
  33enum {
  34        PINMUX_RESERVED = 0,
  35
  36        /* PORT0_DATA -> PORT211_DATA */
  37        PINMUX_DATA_BEGIN,
  38        PORT_ALL(DATA),
  39        PINMUX_DATA_END,
  40
  41        /* PORT0_IN -> PORT211_IN */
  42        PINMUX_INPUT_BEGIN,
  43        PORT_ALL(IN),
  44        PINMUX_INPUT_END,
  45
  46        /* PORT0_IN_PU -> PORT211_IN_PU */
  47        PINMUX_INPUT_PULLUP_BEGIN,
  48        PORT_ALL(IN_PU),
  49        PINMUX_INPUT_PULLUP_END,
  50
  51        /* PORT0_IN_PD -> PORT211_IN_PD */
  52        PINMUX_INPUT_PULLDOWN_BEGIN,
  53        PORT_ALL(IN_PD),
  54        PINMUX_INPUT_PULLDOWN_END,
  55
  56        /* PORT0_OUT -> PORT211_OUT */
  57        PINMUX_OUTPUT_BEGIN,
  58        PORT_ALL(OUT),
  59        PINMUX_OUTPUT_END,
  60
  61        PINMUX_FUNCTION_BEGIN,
  62        PORT_ALL(FN_IN),        /* PORT0_FN_IN -> PORT211_FN_IN */
  63        PORT_ALL(FN_OUT),       /* PORT0_FN_OUT -> PORT211_FN_OUT */
  64        PORT_ALL(FN0),          /* PORT0_FN0 -> PORT211_FN0 */
  65        PORT_ALL(FN1),          /* PORT0_FN1 -> PORT211_FN1 */
  66        PORT_ALL(FN2),          /* PORT0_FN2 -> PORT211_FN2 */
  67        PORT_ALL(FN3),          /* PORT0_FN3 -> PORT211_FN3 */
  68        PORT_ALL(FN4),          /* PORT0_FN4 -> PORT211_FN4 */
  69        PORT_ALL(FN5),          /* PORT0_FN5 -> PORT211_FN5 */
  70        PORT_ALL(FN6),          /* PORT0_FN6 -> PORT211_FN6 */
  71        PORT_ALL(FN7),          /* PORT0_FN7 -> PORT211_FN7 */
  72
  73        MSEL1CR_31_0,   MSEL1CR_31_1,
  74        MSEL1CR_30_0,   MSEL1CR_30_1,
  75        MSEL1CR_29_0,   MSEL1CR_29_1,
  76        MSEL1CR_28_0,   MSEL1CR_28_1,
  77        MSEL1CR_27_0,   MSEL1CR_27_1,
  78        MSEL1CR_26_0,   MSEL1CR_26_1,
  79        MSEL1CR_16_0,   MSEL1CR_16_1,
  80        MSEL1CR_15_0,   MSEL1CR_15_1,
  81        MSEL1CR_14_0,   MSEL1CR_14_1,
  82        MSEL1CR_13_0,   MSEL1CR_13_1,
  83        MSEL1CR_12_0,   MSEL1CR_12_1,
  84        MSEL1CR_9_0,    MSEL1CR_9_1,
  85        MSEL1CR_7_0,    MSEL1CR_7_1,
  86        MSEL1CR_6_0,    MSEL1CR_6_1,
  87        MSEL1CR_5_0,    MSEL1CR_5_1,
  88        MSEL1CR_4_0,    MSEL1CR_4_1,
  89        MSEL1CR_3_0,    MSEL1CR_3_1,
  90        MSEL1CR_2_0,    MSEL1CR_2_1,
  91        MSEL1CR_0_0,    MSEL1CR_0_1,
  92
  93        MSEL3CR_15_0,   MSEL3CR_15_1, /* Trace / Debug ? */
  94        MSEL3CR_6_0,    MSEL3CR_6_1,
  95
  96        MSEL4CR_19_0,   MSEL4CR_19_1,
  97        MSEL4CR_18_0,   MSEL4CR_18_1,
  98        MSEL4CR_15_0,   MSEL4CR_15_1,
  99        MSEL4CR_10_0,   MSEL4CR_10_1,
 100        MSEL4CR_6_0,    MSEL4CR_6_1,
 101        MSEL4CR_4_0,    MSEL4CR_4_1,
 102        MSEL4CR_1_0,    MSEL4CR_1_1,
 103
 104        MSEL5CR_31_0,   MSEL5CR_31_1, /* irq/fiq output */
 105        MSEL5CR_30_0,   MSEL5CR_30_1,
 106        MSEL5CR_29_0,   MSEL5CR_29_1,
 107        MSEL5CR_27_0,   MSEL5CR_27_1,
 108        MSEL5CR_25_0,   MSEL5CR_25_1,
 109        MSEL5CR_23_0,   MSEL5CR_23_1,
 110        MSEL5CR_21_0,   MSEL5CR_21_1,
 111        MSEL5CR_19_0,   MSEL5CR_19_1,
 112        MSEL5CR_17_0,   MSEL5CR_17_1,
 113        MSEL5CR_15_0,   MSEL5CR_15_1,
 114        MSEL5CR_14_0,   MSEL5CR_14_1,
 115        MSEL5CR_13_0,   MSEL5CR_13_1,
 116        MSEL5CR_12_0,   MSEL5CR_12_1,
 117        MSEL5CR_11_0,   MSEL5CR_11_1,
 118        MSEL5CR_10_0,   MSEL5CR_10_1,
 119        MSEL5CR_8_0,    MSEL5CR_8_1,
 120        MSEL5CR_7_0,    MSEL5CR_7_1,
 121        MSEL5CR_6_0,    MSEL5CR_6_1,
 122        MSEL5CR_5_0,    MSEL5CR_5_1,
 123        MSEL5CR_4_0,    MSEL5CR_4_1,
 124        MSEL5CR_3_0,    MSEL5CR_3_1,
 125        MSEL5CR_2_0,    MSEL5CR_2_1,
 126        MSEL5CR_0_0,    MSEL5CR_0_1,
 127        PINMUX_FUNCTION_END,
 128
 129        PINMUX_MARK_BEGIN,
 130
 131        /* IRQ */
 132        IRQ0_PORT2_MARK,        IRQ0_PORT13_MARK,
 133        IRQ1_MARK,
 134        IRQ2_PORT11_MARK,       IRQ2_PORT12_MARK,
 135        IRQ3_PORT10_MARK,       IRQ3_PORT14_MARK,
 136        IRQ4_PORT15_MARK,       IRQ4_PORT172_MARK,
 137        IRQ5_PORT0_MARK,        IRQ5_PORT1_MARK,
 138        IRQ6_PORT121_MARK,      IRQ6_PORT173_MARK,
 139        IRQ7_PORT120_MARK,      IRQ7_PORT209_MARK,
 140        IRQ8_MARK,
 141        IRQ9_PORT118_MARK,      IRQ9_PORT210_MARK,
 142        IRQ10_MARK,
 143        IRQ11_MARK,
 144        IRQ12_PORT42_MARK,      IRQ12_PORT97_MARK,
 145        IRQ13_PORT64_MARK,      IRQ13_PORT98_MARK,
 146        IRQ14_PORT63_MARK,      IRQ14_PORT99_MARK,
 147        IRQ15_PORT62_MARK,      IRQ15_PORT100_MARK,
 148        IRQ16_PORT68_MARK,      IRQ16_PORT211_MARK,
 149        IRQ17_MARK,
 150        IRQ18_MARK,
 151        IRQ19_MARK,
 152        IRQ20_MARK,
 153        IRQ21_MARK,
 154        IRQ22_MARK,
 155        IRQ23_MARK,
 156        IRQ24_MARK,
 157        IRQ25_MARK,
 158        IRQ26_PORT58_MARK,      IRQ26_PORT81_MARK,
 159        IRQ27_PORT57_MARK,      IRQ27_PORT168_MARK,
 160        IRQ28_PORT56_MARK,      IRQ28_PORT169_MARK,
 161        IRQ29_PORT50_MARK,      IRQ29_PORT170_MARK,
 162        IRQ30_PORT49_MARK,      IRQ30_PORT171_MARK,
 163        IRQ31_PORT41_MARK,      IRQ31_PORT167_MARK,
 164
 165        /* Function */
 166
 167        /* DBGT */
 168        DBGMDT2_MARK,   DBGMDT1_MARK,   DBGMDT0_MARK,
 169        DBGMD10_MARK,   DBGMD11_MARK,   DBGMD20_MARK,
 170        DBGMD21_MARK,
 171
 172        /* FSI-A */
 173        FSIAISLD_PORT0_MARK,    /* FSIAISLD Port 0/5 */
 174        FSIAISLD_PORT5_MARK,
 175        FSIASPDIF_PORT9_MARK,   /* FSIASPDIF Port 9/18 */
 176        FSIASPDIF_PORT18_MARK,
 177        FSIAOSLD1_MARK, FSIAOSLD2_MARK, FSIAOLR_MARK,
 178        FSIAOBT_MARK,   FSIAOSLD_MARK,  FSIAOMC_MARK,
 179        FSIACK_MARK,    FSIAILR_MARK,   FSIAIBT_MARK,
 180
 181        /* FSI-B */
 182        FSIBCK_MARK,
 183
 184        /* FMSI */
 185        FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */
 186        FMSISLD_PORT6_MARK,
 187        FMSIILR_MARK,   FMSIIBT_MARK,   FMSIOLR_MARK,   FMSIOBT_MARK,
 188        FMSICK_MARK,    FMSOILR_MARK,   FMSOIBT_MARK,   FMSOOLR_MARK,
 189        FMSOOBT_MARK,   FMSOSLD_MARK,   FMSOCK_MARK,
 190
 191        /* SCIFA0 */
 192        SCIFA0_SCK_MARK,        SCIFA0_CTS_MARK,        SCIFA0_RTS_MARK,
 193        SCIFA0_RXD_MARK,        SCIFA0_TXD_MARK,
 194
 195        /* SCIFA1 */
 196        SCIFA1_CTS_MARK,        SCIFA1_SCK_MARK,        SCIFA1_RXD_MARK,
 197        SCIFA1_TXD_MARK,        SCIFA1_RTS_MARK,
 198
 199        /* SCIFA2 */
 200        SCIFA2_SCK_PORT22_MARK, /* SCIFA2_SCK Port 22/199 */
 201        SCIFA2_SCK_PORT199_MARK,
 202        SCIFA2_RXD_MARK,        SCIFA2_TXD_MARK,
 203        SCIFA2_CTS_MARK,        SCIFA2_RTS_MARK,
 204
 205        /* SCIFA3 */
 206        SCIFA3_RTS_PORT105_MARK, /* MSEL5CR_8_0 */
 207        SCIFA3_SCK_PORT116_MARK,
 208        SCIFA3_CTS_PORT117_MARK,
 209        SCIFA3_RXD_PORT174_MARK,
 210        SCIFA3_TXD_PORT175_MARK,
 211
 212        SCIFA3_RTS_PORT161_MARK, /* MSEL5CR_8_1 */
 213        SCIFA3_SCK_PORT158_MARK,
 214        SCIFA3_CTS_PORT162_MARK,
 215        SCIFA3_RXD_PORT159_MARK,
 216        SCIFA3_TXD_PORT160_MARK,
 217
 218        /* SCIFA4 */
 219        SCIFA4_RXD_PORT12_MARK, /* MSEL5CR[12:11] = 00 */
 220        SCIFA4_TXD_PORT13_MARK,
 221
 222        SCIFA4_RXD_PORT204_MARK, /* MSEL5CR[12:11] = 01 */
 223        SCIFA4_TXD_PORT203_MARK,
 224
 225        SCIFA4_RXD_PORT94_MARK, /* MSEL5CR[12:11] = 10 */
 226        SCIFA4_TXD_PORT93_MARK,
 227
 228        SCIFA4_SCK_PORT21_MARK, /* SCIFA4_SCK Port 21/205 */
 229        SCIFA4_SCK_PORT205_MARK,
 230
 231        /* SCIFA5 */
 232        SCIFA5_TXD_PORT20_MARK, /* MSEL5CR[15:14] = 00 */
 233        SCIFA5_RXD_PORT10_MARK,
 234
 235        SCIFA5_RXD_PORT207_MARK, /* MSEL5CR[15:14] = 01 */
 236        SCIFA5_TXD_PORT208_MARK,
 237
 238        SCIFA5_TXD_PORT91_MARK, /* MSEL5CR[15:14] = 10 */
 239        SCIFA5_RXD_PORT92_MARK,
 240
 241        SCIFA5_SCK_PORT23_MARK, /* SCIFA5_SCK Port 23/206 */
 242        SCIFA5_SCK_PORT206_MARK,
 243
 244        /* SCIFA6 */
 245        SCIFA6_SCK_MARK,        SCIFA6_RXD_MARK,        SCIFA6_TXD_MARK,
 246
 247        /* SCIFA7 */
 248        SCIFA7_TXD_MARK,        SCIFA7_RXD_MARK,
 249
 250        /* SCIFAB */
 251        SCIFB_SCK_PORT190_MARK, /* MSEL5CR_17_0 */
 252        SCIFB_RXD_PORT191_MARK,
 253        SCIFB_TXD_PORT192_MARK,
 254        SCIFB_RTS_PORT186_MARK,
 255        SCIFB_CTS_PORT187_MARK,
 256
 257        SCIFB_SCK_PORT2_MARK, /* MSEL5CR_17_1 */
 258        SCIFB_RXD_PORT3_MARK,
 259        SCIFB_TXD_PORT4_MARK,
 260        SCIFB_RTS_PORT172_MARK,
 261        SCIFB_CTS_PORT173_MARK,
 262
 263        /* LCD0 */
 264        LCDC0_SELECT_MARK,
 265
 266        LCD0_D0_MARK,   LCD0_D1_MARK,   LCD0_D2_MARK,   LCD0_D3_MARK,
 267        LCD0_D4_MARK,   LCD0_D5_MARK,   LCD0_D6_MARK,   LCD0_D7_MARK,
 268        LCD0_D8_MARK,   LCD0_D9_MARK,   LCD0_D10_MARK,  LCD0_D11_MARK,
 269        LCD0_D12_MARK,  LCD0_D13_MARK,  LCD0_D14_MARK,  LCD0_D15_MARK,
 270        LCD0_D16_MARK,  LCD0_D17_MARK,
 271        LCD0_DON_MARK,  LCD0_VCPWC_MARK,        LCD0_VEPWC_MARK,
 272        LCD0_DCK_MARK,  LCD0_VSYN_MARK, /* for RGB */
 273        LCD0_HSYN_MARK, LCD0_DISP_MARK, /* for RGB */
 274        LCD0_WR_MARK,   LCD0_RD_MARK,   /* for SYS */
 275        LCD0_CS_MARK,   LCD0_RS_MARK,   /* for SYS */
 276
 277        LCD0_D21_PORT158_MARK,  LCD0_D23_PORT159_MARK, /* MSEL5CR_6_1 */
 278        LCD0_D22_PORT160_MARK,  LCD0_D20_PORT161_MARK,
 279        LCD0_D19_PORT162_MARK,  LCD0_D18_PORT163_MARK,
 280        LCD0_LCLK_PORT165_MARK,
 281
 282        LCD0_D18_PORT40_MARK,   LCD0_D22_PORT0_MARK, /* MSEL5CR_6_0 */
 283        LCD0_D23_PORT1_MARK,    LCD0_D21_PORT2_MARK,
 284        LCD0_D20_PORT3_MARK,    LCD0_D19_PORT4_MARK,
 285        LCD0_LCLK_PORT102_MARK,
 286
 287        /* LCD1 */
 288        LCDC1_SELECT_MARK,
 289
 290        LCD1_D0_MARK,   LCD1_D1_MARK,   LCD1_D2_MARK,   LCD1_D3_MARK,
 291        LCD1_D4_MARK,   LCD1_D5_MARK,   LCD1_D6_MARK,   LCD1_D7_MARK,
 292        LCD1_D8_MARK,   LCD1_D9_MARK,   LCD1_D10_MARK,  LCD1_D11_MARK,
 293        LCD1_D12_MARK,  LCD1_D13_MARK,  LCD1_D14_MARK,  LCD1_D15_MARK,
 294        LCD1_D16_MARK,  LCD1_D17_MARK,  LCD1_D18_MARK,  LCD1_D19_MARK,
 295        LCD1_D20_MARK,  LCD1_D21_MARK,  LCD1_D22_MARK,  LCD1_D23_MARK,
 296        LCD1_DON_MARK,  LCD1_VCPWC_MARK,
 297        LCD1_LCLK_MARK, LCD1_VEPWC_MARK,
 298
 299        LCD1_DCK_MARK,  LCD1_VSYN_MARK, /* for RGB */
 300        LCD1_HSYN_MARK, LCD1_DISP_MARK, /* for RGB */
 301        LCD1_RS_MARK,   LCD1_CS_MARK,   /* for SYS */
 302        LCD1_RD_MARK,   LCD1_WR_MARK,   /* for SYS */
 303
 304        /* RSPI */
 305        RSPI_SSL0_A_MARK,       RSPI_SSL1_A_MARK,       RSPI_SSL2_A_MARK,
 306        RSPI_SSL3_A_MARK,       RSPI_CK_A_MARK,         RSPI_MOSI_A_MARK,
 307        RSPI_MISO_A_MARK,
 308
 309        /* VIO CKO */
 310        VIO_CKO1_MARK, /* needs fixup */
 311        VIO_CKO2_MARK,
 312        VIO_CKO_1_MARK,
 313        VIO_CKO_MARK,
 314
 315        /* VIO0 */
 316        VIO0_D0_MARK,   VIO0_D1_MARK,   VIO0_D2_MARK,   VIO0_D3_MARK,
 317        VIO0_D4_MARK,   VIO0_D5_MARK,   VIO0_D6_MARK,   VIO0_D7_MARK,
 318        VIO0_D8_MARK,   VIO0_D9_MARK,   VIO0_D10_MARK,  VIO0_D11_MARK,
 319        VIO0_D12_MARK,  VIO0_VD_MARK,   VIO0_HD_MARK,   VIO0_CLK_MARK,
 320        VIO0_FIELD_MARK,
 321
 322        VIO0_D13_PORT26_MARK, /* MSEL5CR_27_0 */
 323        VIO0_D14_PORT25_MARK,
 324        VIO0_D15_PORT24_MARK,
 325
 326        VIO0_D13_PORT22_MARK, /* MSEL5CR_27_1 */
 327        VIO0_D14_PORT95_MARK,
 328        VIO0_D15_PORT96_MARK,
 329
 330        /* VIO1 */
 331        VIO1_D0_MARK,   VIO1_D1_MARK,   VIO1_D2_MARK,   VIO1_D3_MARK,
 332        VIO1_D4_MARK,   VIO1_D5_MARK,   VIO1_D6_MARK,   VIO1_D7_MARK,
 333        VIO1_VD_MARK,   VIO1_HD_MARK,   VIO1_CLK_MARK,  VIO1_FIELD_MARK,
 334
 335        /* TPU0 */
 336        TPU0TO0_MARK,   TPU0TO1_MARK,   TPU0TO3_MARK,
 337        TPU0TO2_PORT66_MARK, /* TPU0TO2 Port 66/202 */
 338        TPU0TO2_PORT202_MARK,
 339
 340        /* SSP1 0 */
 341        STP0_IPD0_MARK, STP0_IPD1_MARK, STP0_IPD2_MARK, STP0_IPD3_MARK,
 342        STP0_IPD4_MARK, STP0_IPD5_MARK, STP0_IPD6_MARK, STP0_IPD7_MARK,
 343        STP0_IPEN_MARK, STP0_IPCLK_MARK,        STP0_IPSYNC_MARK,
 344
 345        /* SSP1 1 */
 346        STP1_IPD1_MARK, STP1_IPD2_MARK, STP1_IPD3_MARK, STP1_IPD4_MARK,
 347        STP1_IPD5_MARK, STP1_IPD6_MARK, STP1_IPD7_MARK, STP1_IPCLK_MARK,
 348        STP1_IPSYNC_MARK,
 349
 350        STP1_IPD0_PORT186_MARK, /* MSEL5CR_23_0 */
 351        STP1_IPEN_PORT187_MARK,
 352
 353        STP1_IPD0_PORT194_MARK, /* MSEL5CR_23_1 */
 354        STP1_IPEN_PORT193_MARK,
 355
 356        /* SIM */
 357        SIM_RST_MARK,   SIM_CLK_MARK,
 358        SIM_D_PORT22_MARK, /* SIM_D  Port 22/199 */
 359        SIM_D_PORT199_MARK,
 360
 361        /* SDHI0 */
 362        SDHI0_D0_MARK,  SDHI0_D1_MARK,  SDHI0_D2_MARK,  SDHI0_D3_MARK,
 363        SDHI0_CD_MARK,  SDHI0_WP_MARK,  SDHI0_CMD_MARK, SDHI0_CLK_MARK,
 364
 365        /* SDHI1 */
 366        SDHI1_D0_MARK,  SDHI1_D1_MARK,  SDHI1_D2_MARK,  SDHI1_D3_MARK,
 367        SDHI1_CD_MARK,  SDHI1_WP_MARK,  SDHI1_CMD_MARK, SDHI1_CLK_MARK,
 368
 369        /* SDHI2 */
 370        SDHI2_D0_MARK,  SDHI2_D1_MARK,  SDHI2_D2_MARK,  SDHI2_D3_MARK,
 371        SDHI2_CLK_MARK, SDHI2_CMD_MARK,
 372
 373        SDHI2_CD_PORT24_MARK, /* MSEL5CR_19_0 */
 374        SDHI2_WP_PORT25_MARK,
 375
 376        SDHI2_WP_PORT177_MARK, /* MSEL5CR_19_1 */
 377        SDHI2_CD_PORT202_MARK,
 378
 379        /* MSIOF2 */
 380        MSIOF2_TXD_MARK,        MSIOF2_RXD_MARK,        MSIOF2_TSCK_MARK,
 381        MSIOF2_SS2_MARK,        MSIOF2_TSYNC_MARK,      MSIOF2_SS1_MARK,
 382        MSIOF2_MCK1_MARK,       MSIOF2_MCK0_MARK,       MSIOF2_RSYNC_MARK,
 383        MSIOF2_RSCK_MARK,
 384
 385        /* KEYSC */
 386        KEYIN4_MARK,    KEYIN5_MARK,    KEYIN6_MARK,    KEYIN7_MARK,
 387        KEYOUT0_MARK,   KEYOUT1_MARK,   KEYOUT2_MARK,   KEYOUT3_MARK,
 388        KEYOUT4_MARK,   KEYOUT5_MARK,   KEYOUT6_MARK,   KEYOUT7_MARK,
 389
 390        KEYIN0_PORT43_MARK, /* MSEL4CR_18_0 */
 391        KEYIN1_PORT44_MARK,
 392        KEYIN2_PORT45_MARK,
 393        KEYIN3_PORT46_MARK,
 394
 395        KEYIN0_PORT58_MARK, /* MSEL4CR_18_1 */
 396        KEYIN1_PORT57_MARK,
 397        KEYIN2_PORT56_MARK,
 398        KEYIN3_PORT55_MARK,
 399
 400        /* VOU */
 401        DV_D0_MARK,     DV_D1_MARK,     DV_D2_MARK,     DV_D3_MARK,
 402        DV_D4_MARK,     DV_D5_MARK,     DV_D6_MARK,     DV_D7_MARK,
 403        DV_D8_MARK,     DV_D9_MARK,     DV_D10_MARK,    DV_D11_MARK,
 404        DV_D12_MARK,    DV_D13_MARK,    DV_D14_MARK,    DV_D15_MARK,
 405        DV_CLK_MARK,    DV_VSYNC_MARK,  DV_HSYNC_MARK,
 406
 407        /* MEMC */
 408        MEMC_AD0_MARK,  MEMC_AD1_MARK,  MEMC_AD2_MARK,  MEMC_AD3_MARK,
 409        MEMC_AD4_MARK,  MEMC_AD5_MARK,  MEMC_AD6_MARK,  MEMC_AD7_MARK,
 410        MEMC_AD8_MARK,  MEMC_AD9_MARK,  MEMC_AD10_MARK, MEMC_AD11_MARK,
 411        MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK, MEMC_AD15_MARK,
 412        MEMC_CS0_MARK,  MEMC_INT_MARK,  MEMC_NWE_MARK,  MEMC_NOE_MARK,
 413
 414        MEMC_CS1_MARK, /* MSEL4CR_6_0 */
 415        MEMC_ADV_MARK,
 416        MEMC_WAIT_MARK,
 417        MEMC_BUSCLK_MARK,
 418
 419        MEMC_A1_MARK, /* MSEL4CR_6_1 */
 420        MEMC_DREQ0_MARK,
 421        MEMC_DREQ1_MARK,
 422        MEMC_A0_MARK,
 423
 424        /* MMC */
 425        MMC0_D0_PORT68_MARK,    MMC0_D1_PORT69_MARK,    MMC0_D2_PORT70_MARK,
 426        MMC0_D3_PORT71_MARK,    MMC0_D4_PORT72_MARK,    MMC0_D5_PORT73_MARK,
 427        MMC0_D6_PORT74_MARK,    MMC0_D7_PORT75_MARK,    MMC0_CLK_PORT66_MARK,
 428        MMC0_CMD_PORT67_MARK,   /* MSEL4CR_15_0 */
 429
 430        MMC1_D0_PORT149_MARK,   MMC1_D1_PORT148_MARK,   MMC1_D2_PORT147_MARK,
 431        MMC1_D3_PORT146_MARK,   MMC1_D4_PORT145_MARK,   MMC1_D5_PORT144_MARK,
 432        MMC1_D6_PORT143_MARK,   MMC1_D7_PORT142_MARK,   MMC1_CLK_PORT103_MARK,
 433        MMC1_CMD_PORT104_MARK,  /* MSEL4CR_15_1 */
 434
 435        /* MSIOF0 */
 436        MSIOF0_SS1_MARK,        MSIOF0_SS2_MARK,        MSIOF0_RXD_MARK,
 437        MSIOF0_TXD_MARK,        MSIOF0_MCK0_MARK,       MSIOF0_MCK1_MARK,
 438        MSIOF0_RSYNC_MARK,      MSIOF0_RSCK_MARK,       MSIOF0_TSCK_MARK,
 439        MSIOF0_TSYNC_MARK,
 440
 441        /* MSIOF1 */
 442        MSIOF1_RSCK_MARK,       MSIOF1_RSYNC_MARK,
 443        MSIOF1_MCK0_MARK,       MSIOF1_MCK1_MARK,
 444
 445        MSIOF1_SS2_PORT116_MARK,        MSIOF1_SS1_PORT117_MARK,
 446        MSIOF1_RXD_PORT118_MARK,        MSIOF1_TXD_PORT119_MARK,
 447        MSIOF1_TSYNC_PORT120_MARK,
 448        MSIOF1_TSCK_PORT121_MARK,       /* MSEL4CR_10_0 */
 449
 450        MSIOF1_SS1_PORT67_MARK,         MSIOF1_TSCK_PORT72_MARK,
 451        MSIOF1_TSYNC_PORT73_MARK,       MSIOF1_TXD_PORT74_MARK,
 452        MSIOF1_RXD_PORT75_MARK,
 453        MSIOF1_SS2_PORT202_MARK,        /* MSEL4CR_10_1 */
 454
 455        /* GPIO */
 456        GPO0_MARK,      GPI0_MARK,      GPO1_MARK,      GPI1_MARK,
 457
 458        /* USB0 */
 459        USB0_OCI_MARK,  USB0_PPON_MARK, VBUS_MARK,
 460
 461        /* USB1 */
 462        USB1_OCI_MARK,  USB1_PPON_MARK,
 463
 464        /* BBIF1 */
 465        BBIF1_RXD_MARK,         BBIF1_TXD_MARK,         BBIF1_TSYNC_MARK,
 466        BBIF1_TSCK_MARK,        BBIF1_RSCK_MARK,        BBIF1_RSYNC_MARK,
 467        BBIF1_FLOW_MARK,        BBIF1_RX_FLOW_N_MARK,
 468
 469        /* BBIF2 */
 470        BBIF2_TXD2_PORT5_MARK, /* MSEL5CR_0_0 */
 471        BBIF2_RXD2_PORT60_MARK,
 472        BBIF2_TSYNC2_PORT6_MARK,
 473        BBIF2_TSCK2_PORT59_MARK,
 474
 475        BBIF2_RXD2_PORT90_MARK, /* MSEL5CR_0_1 */
 476        BBIF2_TXD2_PORT183_MARK,
 477        BBIF2_TSCK2_PORT89_MARK,
 478        BBIF2_TSYNC2_PORT184_MARK,
 479
 480        /* BSC / FLCTL / PCMCIA */
 481        CS0_MARK,       CS2_MARK,       CS4_MARK,
 482        CS5B_MARK,      CS6A_MARK,
 483        CS5A_PORT105_MARK, /* CS5A PORT 19/105 */
 484        CS5A_PORT19_MARK,
 485        IOIS16_MARK, /* ? */
 486
 487        A0_MARK,        A1_MARK,        A2_MARK,        A3_MARK,
 488        A4_FOE_MARK,    /* share with FLCTL */
 489        A5_FCDE_MARK,   /* share with FLCTL */
 490        A6_MARK,        A7_MARK,        A8_MARK,        A9_MARK,
 491        A10_MARK,       A11_MARK,       A12_MARK,       A13_MARK,
 492        A14_MARK,       A15_MARK,       A16_MARK,       A17_MARK,
 493        A18_MARK,       A19_MARK,       A20_MARK,       A21_MARK,
 494        A22_MARK,       A23_MARK,       A24_MARK,       A25_MARK,
 495        A26_MARK,
 496
 497        D0_NAF0_MARK,   D1_NAF1_MARK,   D2_NAF2_MARK,   /* share with FLCTL */
 498        D3_NAF3_MARK,   D4_NAF4_MARK,   D5_NAF5_MARK,   /* share with FLCTL */
 499        D6_NAF6_MARK,   D7_NAF7_MARK,   D8_NAF8_MARK,   /* share with FLCTL */
 500        D9_NAF9_MARK,   D10_NAF10_MARK, D11_NAF11_MARK, /* share with FLCTL */
 501        D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, /* share with FLCTL */
 502        D15_NAF15_MARK,                                 /* share with FLCTL */
 503        D16_MARK,       D17_MARK,       D18_MARK,       D19_MARK,
 504        D20_MARK,       D21_MARK,       D22_MARK,       D23_MARK,
 505        D24_MARK,       D25_MARK,       D26_MARK,       D27_MARK,
 506        D28_MARK,       D29_MARK,       D30_MARK,       D31_MARK,
 507
 508        WE0_FWE_MARK,   /* share with FLCTL */
 509        WE1_MARK,
 510        WE2_ICIORD_MARK,        /* share with PCMCIA */
 511        WE3_ICIOWR_MARK,        /* share with PCMCIA */
 512        CKO_MARK,       BS_MARK,        RDWR_MARK,
 513        RD_FSC_MARK,    /* share with FLCTL */
 514        WAIT_PORT177_MARK, /* WAIT Port 90/177 */
 515        WAIT_PORT90_MARK,
 516
 517        FCE0_MARK,      FCE1_MARK,      FRB_MARK, /* FLCTL */
 518
 519        /* IRDA */
 520        IRDA_FIRSEL_MARK,       IRDA_IN_MARK,   IRDA_OUT_MARK,
 521
 522        /* ATAPI */
 523        IDE_D0_MARK,    IDE_D1_MARK,    IDE_D2_MARK,    IDE_D3_MARK,
 524        IDE_D4_MARK,    IDE_D5_MARK,    IDE_D6_MARK,    IDE_D7_MARK,
 525        IDE_D8_MARK,    IDE_D9_MARK,    IDE_D10_MARK,   IDE_D11_MARK,
 526        IDE_D12_MARK,   IDE_D13_MARK,   IDE_D14_MARK,   IDE_D15_MARK,
 527        IDE_A0_MARK,    IDE_A1_MARK,    IDE_A2_MARK,    IDE_CS0_MARK,
 528        IDE_CS1_MARK,   IDE_IOWR_MARK,  IDE_IORD_MARK,  IDE_IORDY_MARK,
 529        IDE_INT_MARK,           IDE_RST_MARK,           IDE_DIRECTION_MARK,
 530        IDE_EXBUF_ENB_MARK,     IDE_IODACK_MARK,        IDE_IODREQ_MARK,
 531
 532        /* RMII */
 533        RMII_CRS_DV_MARK,       RMII_RX_ER_MARK,        RMII_RXD0_MARK,
 534        RMII_RXD1_MARK,         RMII_TX_EN_MARK,        RMII_TXD0_MARK,
 535        RMII_MDC_MARK,          RMII_TXD1_MARK,         RMII_MDIO_MARK,
 536        RMII_REF50CK_MARK,      /* for RMII */
 537        RMII_REF125CK_MARK,     /* for GMII */
 538
 539        /* GEther */
 540        ET_TX_CLK_MARK, ET_TX_EN_MARK,  ET_ETXD0_MARK,  ET_ETXD1_MARK,
 541        ET_ETXD2_MARK,  ET_ETXD3_MARK,
 542        ET_ETXD4_MARK,  ET_ETXD5_MARK, /* for GEther */
 543        ET_ETXD6_MARK,  ET_ETXD7_MARK, /* for GEther */
 544        ET_COL_MARK,    ET_TX_ER_MARK,  ET_RX_CLK_MARK, ET_RX_DV_MARK,
 545        ET_ERXD0_MARK,  ET_ERXD1_MARK,  ET_ERXD2_MARK,  ET_ERXD3_MARK,
 546        ET_ERXD4_MARK,  ET_ERXD5_MARK, /* for GEther */
 547        ET_ERXD6_MARK,  ET_ERXD7_MARK, /* for GEther */
 548        ET_RX_ER_MARK,  ET_CRS_MARK,            ET_MDC_MARK,    ET_MDIO_MARK,
 549        ET_LINK_MARK,   ET_PHY_INT_MARK,        ET_WOL_MARK,    ET_GTX_CLK_MARK,
 550
 551        /* DMA0 */
 552        DREQ0_MARK,     DACK0_MARK,
 553
 554        /* DMA1 */
 555        DREQ1_MARK,     DACK1_MARK,
 556
 557        /* SYSC */
 558        RESETOUTS_MARK,         RESETP_PULLUP_MARK,     RESETP_PLAIN_MARK,
 559
 560        /* IRREM */
 561        IROUT_MARK,
 562
 563        /* SDENC */
 564        SDENC_CPG_MARK,         SDENC_DV_CLKI_MARK,
 565
 566        /* HDMI */
 567        HDMI_HPD_MARK, HDMI_CEC_MARK,
 568
 569        /* DEBUG */
 570        EDEBGREQ_PULLUP_MARK,   /* for JTAG */
 571        EDEBGREQ_PULLDOWN_MARK,
 572
 573        TRACEAUD_FROM_VIO_MARK, /* for TRACE/AUD */
 574        TRACEAUD_FROM_LCDC0_MARK,
 575        TRACEAUD_FROM_MEMC_MARK,
 576
 577        PINMUX_MARK_END,
 578};
 579
 580static pinmux_enum_t pinmux_data[] = {
 581        /* specify valid pin states for each pin in GPIO mode */
 582
 583        /* I/O and Pull U/D */
 584        PORT_DATA_IO_PD(0),             PORT_DATA_IO_PD(1),
 585        PORT_DATA_IO_PD(2),             PORT_DATA_IO_PD(3),
 586        PORT_DATA_IO_PD(4),             PORT_DATA_IO_PD(5),
 587        PORT_DATA_IO_PD(6),             PORT_DATA_IO(7),
 588        PORT_DATA_IO(8),                PORT_DATA_IO(9),
 589
 590        PORT_DATA_IO_PD(10),            PORT_DATA_IO_PD(11),
 591        PORT_DATA_IO_PD(12),            PORT_DATA_IO_PU_PD(13),
 592        PORT_DATA_IO_PD(14),            PORT_DATA_IO_PD(15),
 593        PORT_DATA_IO_PD(16),            PORT_DATA_IO_PD(17),
 594        PORT_DATA_IO(18),               PORT_DATA_IO_PU(19),
 595
 596        PORT_DATA_IO_PU_PD(20),         PORT_DATA_IO_PD(21),
 597        PORT_DATA_IO_PU_PD(22),         PORT_DATA_IO(23),
 598        PORT_DATA_IO_PU(24),            PORT_DATA_IO_PU(25),
 599        PORT_DATA_IO_PU(26),            PORT_DATA_IO_PU(27),
 600        PORT_DATA_IO_PU(28),            PORT_DATA_IO_PU(29),
 601
 602        PORT_DATA_IO_PU(30),            PORT_DATA_IO_PD(31),
 603        PORT_DATA_IO_PD(32),            PORT_DATA_IO_PD(33),
 604        PORT_DATA_IO_PD(34),            PORT_DATA_IO_PU(35),
 605        PORT_DATA_IO_PU(36),            PORT_DATA_IO_PD(37),
 606        PORT_DATA_IO_PU(38),            PORT_DATA_IO_PD(39),
 607
 608        PORT_DATA_IO_PU_PD(40),         PORT_DATA_IO_PD(41),
 609        PORT_DATA_IO_PD(42),            PORT_DATA_IO_PU_PD(43),
 610        PORT_DATA_IO_PU_PD(44),         PORT_DATA_IO_PU_PD(45),
 611        PORT_DATA_IO_PU_PD(46),         PORT_DATA_IO_PU_PD(47),
 612        PORT_DATA_IO_PU_PD(48),         PORT_DATA_IO_PU_PD(49),
 613
 614        PORT_DATA_IO_PU_PD(50),         PORT_DATA_IO_PD(51),
 615        PORT_DATA_IO_PD(52),            PORT_DATA_IO_PD(53),
 616        PORT_DATA_IO_PD(54),            PORT_DATA_IO_PU_PD(55),
 617        PORT_DATA_IO_PU_PD(56),         PORT_DATA_IO_PU_PD(57),
 618        PORT_DATA_IO_PU_PD(58),         PORT_DATA_IO_PU_PD(59),
 619
 620        PORT_DATA_IO_PU_PD(60),         PORT_DATA_IO_PD(61),
 621        PORT_DATA_IO_PD(62),            PORT_DATA_IO_PD(63),
 622        PORT_DATA_IO_PD(64),            PORT_DATA_IO_PD(65),
 623        PORT_DATA_IO_PU_PD(66),         PORT_DATA_IO_PU_PD(67),
 624        PORT_DATA_IO_PU_PD(68),         PORT_DATA_IO_PU_PD(69),
 625
 626        PORT_DATA_IO_PU_PD(70),         PORT_DATA_IO_PU_PD(71),
 627        PORT_DATA_IO_PU_PD(72),         PORT_DATA_IO_PU_PD(73),
 628        PORT_DATA_IO_PU_PD(74),         PORT_DATA_IO_PU_PD(75),
 629        PORT_DATA_IO_PU_PD(76),         PORT_DATA_IO_PU_PD(77),
 630        PORT_DATA_IO_PU_PD(78),         PORT_DATA_IO_PU_PD(79),
 631
 632        PORT_DATA_IO_PU_PD(80),         PORT_DATA_IO_PU_PD(81),
 633        PORT_DATA_IO(82),               PORT_DATA_IO_PU_PD(83),
 634        PORT_DATA_IO(84),               PORT_DATA_IO_PD(85),
 635        PORT_DATA_IO_PD(86),            PORT_DATA_IO_PD(87),
 636        PORT_DATA_IO_PD(88),            PORT_DATA_IO_PD(89),
 637
 638        PORT_DATA_IO_PD(90),            PORT_DATA_IO_PU_PD(91),
 639        PORT_DATA_IO_PU_PD(92),         PORT_DATA_IO_PU_PD(93),
 640        PORT_DATA_IO_PU_PD(94),         PORT_DATA_IO_PU_PD(95),
 641        PORT_DATA_IO_PU_PD(96),         PORT_DATA_IO_PU_PD(97),
 642        PORT_DATA_IO_PU_PD(98),         PORT_DATA_IO_PU_PD(99),
 643
 644        PORT_DATA_IO_PU_PD(100),        PORT_DATA_IO(101),
 645        PORT_DATA_IO_PU(102),           PORT_DATA_IO_PU_PD(103),
 646        PORT_DATA_IO_PU(104),           PORT_DATA_IO_PU(105),
 647        PORT_DATA_IO_PU_PD(106),        PORT_DATA_IO(107),
 648        PORT_DATA_IO(108),              PORT_DATA_IO(109),
 649
 650        PORT_DATA_IO(110),              PORT_DATA_IO(111),
 651        PORT_DATA_IO(112),              PORT_DATA_IO(113),
 652        PORT_DATA_IO_PU_PD(114),        PORT_DATA_IO(115),
 653        PORT_DATA_IO_PD(116),           PORT_DATA_IO_PD(117),
 654        PORT_DATA_IO_PD(118),           PORT_DATA_IO_PD(119),
 655
 656        PORT_DATA_IO_PD(120),           PORT_DATA_IO_PD(121),
 657        PORT_DATA_IO_PD(122),           PORT_DATA_IO_PD(123),
 658        PORT_DATA_IO_PD(124),           PORT_DATA_IO(125),
 659        PORT_DATA_IO(126),              PORT_DATA_IO(127),
 660        PORT_DATA_IO(128),              PORT_DATA_IO(129),
 661
 662        PORT_DATA_IO(130),              PORT_DATA_IO(131),
 663        PORT_DATA_IO(132),              PORT_DATA_IO(133),
 664        PORT_DATA_IO(134),              PORT_DATA_IO(135),
 665        PORT_DATA_IO(136),              PORT_DATA_IO(137),
 666        PORT_DATA_IO(138),              PORT_DATA_IO(139),
 667
 668        PORT_DATA_IO(140),              PORT_DATA_IO(141),
 669        PORT_DATA_IO_PU(142),           PORT_DATA_IO_PU(143),
 670        PORT_DATA_IO_PU(144),           PORT_DATA_IO_PU(145),
 671        PORT_DATA_IO_PU(146),           PORT_DATA_IO_PU(147),
 672        PORT_DATA_IO_PU(148),           PORT_DATA_IO_PU(149),
 673
 674        PORT_DATA_IO_PU(150),           PORT_DATA_IO_PU(151),
 675        PORT_DATA_IO_PU(152),           PORT_DATA_IO_PU(153),
 676        PORT_DATA_IO_PU(154),           PORT_DATA_IO_PU(155),
 677        PORT_DATA_IO_PU(156),           PORT_DATA_IO_PU(157),
 678        PORT_DATA_IO_PD(158),           PORT_DATA_IO_PD(159),
 679
 680        PORT_DATA_IO_PU_PD(160),        PORT_DATA_IO_PD(161),
 681        PORT_DATA_IO_PD(162),           PORT_DATA_IO_PD(163),
 682        PORT_DATA_IO_PD(164),           PORT_DATA_IO_PD(165),
 683        PORT_DATA_IO_PU(166),           PORT_DATA_IO_PU(167),
 684        PORT_DATA_IO_PU(168),           PORT_DATA_IO_PU(169),
 685
 686        PORT_DATA_IO_PU(170),           PORT_DATA_IO_PU(171),
 687        PORT_DATA_IO_PD(172),           PORT_DATA_IO_PD(173),
 688        PORT_DATA_IO_PD(174),           PORT_DATA_IO_PD(175),
 689        PORT_DATA_IO_PU(176),           PORT_DATA_IO_PU_PD(177),
 690        PORT_DATA_IO_PU(178),           PORT_DATA_IO_PD(179),
 691
 692        PORT_DATA_IO_PD(180),           PORT_DATA_IO_PU(181),
 693        PORT_DATA_IO_PU(182),           PORT_DATA_IO(183),
 694        PORT_DATA_IO_PD(184),           PORT_DATA_IO_PD(185),
 695        PORT_DATA_IO_PD(186),           PORT_DATA_IO_PD(187),
 696        PORT_DATA_IO_PD(188),           PORT_DATA_IO_PD(189),
 697
 698        PORT_DATA_IO_PD(190),           PORT_DATA_IO_PD(191),
 699        PORT_DATA_IO_PD(192),           PORT_DATA_IO_PU_PD(193),
 700        PORT_DATA_IO_PU_PD(194),        PORT_DATA_IO_PD(195),
 701        PORT_DATA_IO_PU_PD(196),        PORT_DATA_IO_PD(197),
 702        PORT_DATA_IO_PU_PD(198),        PORT_DATA_IO_PU_PD(199),
 703
 704        PORT_DATA_IO_PU_PD(200),        PORT_DATA_IO_PU(201),
 705        PORT_DATA_IO_PU_PD(202),        PORT_DATA_IO(203),
 706        PORT_DATA_IO_PU_PD(204),        PORT_DATA_IO_PU_PD(205),
 707        PORT_DATA_IO_PU_PD(206),        PORT_DATA_IO_PU_PD(207),
 708        PORT_DATA_IO_PU_PD(208),        PORT_DATA_IO_PD(209),
 709
 710        PORT_DATA_IO_PD(210),           PORT_DATA_IO_PD(211),
 711
 712        /* Port0 */
 713        PINMUX_DATA(DBGMDT2_MARK,               PORT0_FN1),
 714        PINMUX_DATA(FSIAISLD_PORT0_MARK,        PORT0_FN2,      MSEL5CR_3_0),
 715        PINMUX_DATA(FSIAOSLD1_MARK,             PORT0_FN3),
 716        PINMUX_DATA(LCD0_D22_PORT0_MARK,        PORT0_FN4,      MSEL5CR_6_0),
 717        PINMUX_DATA(SCIFA7_RXD_MARK,            PORT0_FN6),
 718        PINMUX_DATA(LCD1_D4_MARK,               PORT0_FN7),
 719        PINMUX_DATA(IRQ5_PORT0_MARK,            PORT0_FN0,      MSEL1CR_5_0),
 720
 721        /* Port1 */
 722        PINMUX_DATA(DBGMDT1_MARK,               PORT1_FN1),
 723        PINMUX_DATA(FMSISLD_PORT1_MARK,         PORT1_FN2,      MSEL5CR_5_0),
 724        PINMUX_DATA(FSIAOSLD2_MARK,             PORT1_FN3),
 725        PINMUX_DATA(LCD0_D23_PORT1_MARK,        PORT1_FN4,      MSEL5CR_6_0),
 726        PINMUX_DATA(SCIFA7_TXD_MARK,            PORT1_FN6),
 727        PINMUX_DATA(LCD1_D3_MARK,               PORT1_FN7),
 728        PINMUX_DATA(IRQ5_PORT1_MARK,            PORT1_FN0,      MSEL1CR_5_1),
 729
 730        /* Port2 */
 731        PINMUX_DATA(DBGMDT0_MARK,               PORT2_FN1),
 732        PINMUX_DATA(SCIFB_SCK_PORT2_MARK,       PORT2_FN2,      MSEL5CR_17_1),
 733        PINMUX_DATA(LCD0_D21_PORT2_MARK,        PORT2_FN4,      MSEL5CR_6_0),
 734        PINMUX_DATA(LCD1_D2_MARK,               PORT2_FN7),
 735        PINMUX_DATA(IRQ0_PORT2_MARK,            PORT2_FN0,      MSEL1CR_0_1),
 736
 737        /* Port3 */
 738        PINMUX_DATA(DBGMD21_MARK,               PORT3_FN1),
 739        PINMUX_DATA(SCIFB_RXD_PORT3_MARK,       PORT3_FN2,      MSEL5CR_17_1),
 740        PINMUX_DATA(LCD0_D20_PORT3_MARK,        PORT3_FN4,      MSEL5CR_6_0),
 741        PINMUX_DATA(LCD1_D1_MARK,               PORT3_FN7),
 742
 743        /* Port4 */
 744        PINMUX_DATA(DBGMD20_MARK,               PORT4_FN1),
 745        PINMUX_DATA(SCIFB_TXD_PORT4_MARK,       PORT4_FN2,      MSEL5CR_17_1),
 746        PINMUX_DATA(LCD0_D19_PORT4_MARK,        PORT4_FN4,      MSEL5CR_6_0),
 747        PINMUX_DATA(LCD1_D0_MARK,               PORT4_FN7),
 748
 749        /* Port5 */
 750        PINMUX_DATA(DBGMD11_MARK,               PORT5_FN1),
 751        PINMUX_DATA(BBIF2_TXD2_PORT5_MARK,      PORT5_FN2,      MSEL5CR_0_0),
 752        PINMUX_DATA(FSIAISLD_PORT5_MARK,        PORT5_FN4,      MSEL5CR_3_1),
 753        PINMUX_DATA(RSPI_SSL0_A_MARK,           PORT5_FN6),
 754        PINMUX_DATA(LCD1_VCPWC_MARK,            PORT5_FN7),
 755
 756        /* Port6 */
 757        PINMUX_DATA(DBGMD10_MARK,               PORT6_FN1),
 758        PINMUX_DATA(BBIF2_TSYNC2_PORT6_MARK,    PORT6_FN2,      MSEL5CR_0_0),
 759        PINMUX_DATA(FMSISLD_PORT6_MARK,         PORT6_FN4,      MSEL5CR_5_1),
 760        PINMUX_DATA(RSPI_SSL1_A_MARK,           PORT6_FN6),
 761        PINMUX_DATA(LCD1_VEPWC_MARK,            PORT6_FN7),
 762
 763        /* Port7 */
 764        PINMUX_DATA(FSIAOLR_MARK,               PORT7_FN1),
 765
 766        /* Port8 */
 767        PINMUX_DATA(FSIAOBT_MARK,               PORT8_FN1),
 768
 769        /* Port9 */
 770        PINMUX_DATA(FSIAOSLD_MARK,              PORT9_FN1),
 771        PINMUX_DATA(FSIASPDIF_PORT9_MARK,       PORT9_FN2,      MSEL5CR_4_0),
 772
 773        /* Port10 */
 774        PINMUX_DATA(FSIAOMC_MARK,               PORT10_FN1),
 775        PINMUX_DATA(SCIFA5_RXD_PORT10_MARK,     PORT10_FN3,     MSEL5CR_14_0,   MSEL5CR_15_0),
 776        PINMUX_DATA(IRQ3_PORT10_MARK,           PORT10_FN0,     MSEL1CR_3_0),
 777
 778        /* Port11 */
 779        PINMUX_DATA(FSIACK_MARK,                PORT11_FN1),
 780        PINMUX_DATA(FSIBCK_MARK,                PORT11_FN2),
 781        PINMUX_DATA(IRQ2_PORT11_MARK,           PORT11_FN0,     MSEL1CR_2_0),
 782
 783        /* Port12 */
 784        PINMUX_DATA(FSIAILR_MARK,               PORT12_FN1),
 785        PINMUX_DATA(SCIFA4_RXD_PORT12_MARK,     PORT12_FN2,     MSEL5CR_12_0,   MSEL5CR_11_0),
 786        PINMUX_DATA(LCD1_RS_MARK,               PORT12_FN6),
 787        PINMUX_DATA(LCD1_DISP_MARK,             PORT12_FN7),
 788        PINMUX_DATA(IRQ2_PORT12_MARK,           PORT12_FN0,     MSEL1CR_2_1),
 789
 790        /* Port13 */
 791        PINMUX_DATA(FSIAIBT_MARK,               PORT13_FN1),
 792        PINMUX_DATA(SCIFA4_TXD_PORT13_MARK,     PORT13_FN2,     MSEL5CR_12_0,   MSEL5CR_11_0),
 793        PINMUX_DATA(LCD1_RD_MARK,               PORT13_FN7),
 794        PINMUX_DATA(IRQ0_PORT13_MARK,           PORT13_FN0,     MSEL1CR_0_0),
 795
 796        /* Port14 */
 797        PINMUX_DATA(FMSOILR_MARK,               PORT14_FN1),
 798        PINMUX_DATA(FMSIILR_MARK,               PORT14_FN2),
 799        PINMUX_DATA(VIO_CKO1_MARK,              PORT14_FN3),
 800        PINMUX_DATA(LCD1_D23_MARK,              PORT14_FN7),
 801        PINMUX_DATA(IRQ3_PORT14_MARK,           PORT14_FN0,     MSEL1CR_3_1),
 802
 803        /* Port15 */
 804        PINMUX_DATA(FMSOIBT_MARK,               PORT15_FN1),
 805        PINMUX_DATA(FMSIIBT_MARK,               PORT15_FN2),
 806        PINMUX_DATA(VIO_CKO2_MARK,              PORT15_FN3),
 807        PINMUX_DATA(LCD1_D22_MARK,              PORT15_FN7),
 808        PINMUX_DATA(IRQ4_PORT15_MARK,           PORT15_FN0,     MSEL1CR_4_0),
 809
 810        /* Port16 */
 811        PINMUX_DATA(FMSOOLR_MARK,               PORT16_FN1),
 812        PINMUX_DATA(FMSIOLR_MARK,               PORT16_FN2),
 813
 814        /* Port17 */
 815        PINMUX_DATA(FMSOOBT_MARK,               PORT17_FN1),
 816        PINMUX_DATA(FMSIOBT_MARK,               PORT17_FN2),
 817
 818        /* Port18 */
 819        PINMUX_DATA(FMSOSLD_MARK,               PORT18_FN1),
 820        PINMUX_DATA(FSIASPDIF_PORT18_MARK,      PORT18_FN2,     MSEL5CR_4_1),
 821
 822        /* Port19 */
 823        PINMUX_DATA(FMSICK_MARK,                PORT19_FN1),
 824        PINMUX_DATA(CS5A_PORT19_MARK,           PORT19_FN7,     MSEL5CR_2_1),
 825        PINMUX_DATA(IRQ10_MARK,                 PORT19_FN0),
 826
 827        /* Port20 */
 828        PINMUX_DATA(FMSOCK_MARK,                PORT20_FN1),
 829        PINMUX_DATA(SCIFA5_TXD_PORT20_MARK,     PORT20_FN3,     MSEL5CR_15_0,   MSEL5CR_14_0),
 830        PINMUX_DATA(IRQ1_MARK,                  PORT20_FN0),
 831
 832        /* Port21 */
 833        PINMUX_DATA(SCIFA1_CTS_MARK,            PORT21_FN1),
 834        PINMUX_DATA(SCIFA4_SCK_PORT21_MARK,     PORT21_FN2,     MSEL5CR_10_0),
 835        PINMUX_DATA(TPU0TO1_MARK,               PORT21_FN4),
 836        PINMUX_DATA(VIO1_FIELD_MARK,            PORT21_FN5),
 837        PINMUX_DATA(STP0_IPD5_MARK,             PORT21_FN6),
 838        PINMUX_DATA(LCD1_D10_MARK,              PORT21_FN7),
 839
 840        /* Port22 */
 841        PINMUX_DATA(SCIFA2_SCK_PORT22_MARK,     PORT22_FN1,     MSEL5CR_7_0),
 842        PINMUX_DATA(SIM_D_PORT22_MARK,          PORT22_FN4,     MSEL5CR_21_0),
 843        PINMUX_DATA(VIO0_D13_PORT22_MARK,       PORT22_FN7,     MSEL5CR_27_1),
 844
 845        /* Port23 */
 846        PINMUX_DATA(SCIFA1_RTS_MARK,            PORT23_FN1),
 847        PINMUX_DATA(SCIFA5_SCK_PORT23_MARK,     PORT23_FN3,     MSEL5CR_13_0),
 848        PINMUX_DATA(TPU0TO0_MARK,               PORT23_FN4),
 849        PINMUX_DATA(VIO_CKO_1_MARK,             PORT23_FN5),
 850        PINMUX_DATA(STP0_IPD2_MARK,             PORT23_FN6),
 851        PINMUX_DATA(LCD1_D7_MARK,               PORT23_FN7),
 852
 853        /* Port24 */
 854        PINMUX_DATA(VIO0_D15_PORT24_MARK,       PORT24_FN1,     MSEL5CR_27_0),
 855        PINMUX_DATA(VIO1_D7_MARK,               PORT24_FN5),
 856        PINMUX_DATA(SCIFA6_SCK_MARK,            PORT24_FN6),
 857        PINMUX_DATA(SDHI2_CD_PORT24_MARK,       PORT24_FN7,     MSEL5CR_19_0),
 858
 859        /* Port25 */
 860        PINMUX_DATA(VIO0_D14_PORT25_MARK,       PORT25_FN1,     MSEL5CR_27_0),
 861        PINMUX_DATA(VIO1_D6_MARK,               PORT25_FN5),
 862        PINMUX_DATA(SCIFA6_RXD_MARK,            PORT25_FN6),
 863        PINMUX_DATA(SDHI2_WP_PORT25_MARK,       PORT25_FN7,     MSEL5CR_19_0),
 864
 865        /* Port26 */
 866        PINMUX_DATA(VIO0_D13_PORT26_MARK,       PORT26_FN1,     MSEL5CR_27_0),
 867        PINMUX_DATA(VIO1_D5_MARK,               PORT26_FN5),
 868        PINMUX_DATA(SCIFA6_TXD_MARK,            PORT26_FN6),
 869
 870        /* Port27 - Port39 Function */
 871        PINMUX_DATA(VIO0_D7_MARK,               PORT27_FN1),
 872        PINMUX_DATA(VIO0_D6_MARK,               PORT28_FN1),
 873        PINMUX_DATA(VIO0_D5_MARK,               PORT29_FN1),
 874        PINMUX_DATA(VIO0_D4_MARK,               PORT30_FN1),
 875        PINMUX_DATA(VIO0_D3_MARK,               PORT31_FN1),
 876        PINMUX_DATA(VIO0_D2_MARK,               PORT32_FN1),
 877        PINMUX_DATA(VIO0_D1_MARK,               PORT33_FN1),
 878        PINMUX_DATA(VIO0_D0_MARK,               PORT34_FN1),
 879        PINMUX_DATA(VIO0_CLK_MARK,              PORT35_FN1),
 880        PINMUX_DATA(VIO_CKO_MARK,               PORT36_FN1),
 881        PINMUX_DATA(VIO0_HD_MARK,               PORT37_FN1),
 882        PINMUX_DATA(VIO0_FIELD_MARK,            PORT38_FN1),
 883        PINMUX_DATA(VIO0_VD_MARK,               PORT39_FN1),
 884
 885        /* Port38 IRQ */
 886        PINMUX_DATA(IRQ25_MARK,                 PORT38_FN0),
 887
 888        /* Port40 */
 889        PINMUX_DATA(LCD0_D18_PORT40_MARK,       PORT40_FN4,     MSEL5CR_6_0),
 890        PINMUX_DATA(RSPI_CK_A_MARK,             PORT40_FN6),
 891        PINMUX_DATA(LCD1_LCLK_MARK,             PORT40_FN7),
 892
 893        /* Port41 */
 894        PINMUX_DATA(LCD0_D17_MARK,              PORT41_FN1),
 895        PINMUX_DATA(MSIOF2_SS1_MARK,            PORT41_FN2),
 896        PINMUX_DATA(IRQ31_PORT41_MARK,          PORT41_FN0,     MSEL1CR_31_1),
 897
 898        /* Port42 */
 899        PINMUX_DATA(LCD0_D16_MARK,              PORT42_FN1),
 900        PINMUX_DATA(MSIOF2_MCK1_MARK,           PORT42_FN2),
 901        PINMUX_DATA(IRQ12_PORT42_MARK,          PORT42_FN0,     MSEL1CR_12_1),
 902
 903        /* Port43 */
 904        PINMUX_DATA(LCD0_D15_MARK,              PORT43_FN1),
 905        PINMUX_DATA(MSIOF2_MCK0_MARK,           PORT43_FN2),
 906        PINMUX_DATA(KEYIN0_PORT43_MARK,         PORT43_FN3,     MSEL4CR_18_0),
 907        PINMUX_DATA(DV_D15_MARK,                PORT43_FN6),
 908
 909        /* Port44 */
 910        PINMUX_DATA(LCD0_D14_MARK,              PORT44_FN1),
 911        PINMUX_DATA(MSIOF2_RSYNC_MARK,          PORT44_FN2),
 912        PINMUX_DATA(KEYIN1_PORT44_MARK,         PORT44_FN3,     MSEL4CR_18_0),
 913        PINMUX_DATA(DV_D14_MARK,                PORT44_FN6),
 914
 915        /* Port45 */
 916        PINMUX_DATA(LCD0_D13_MARK,              PORT45_FN1),
 917        PINMUX_DATA(MSIOF2_RSCK_MARK,           PORT45_FN2),
 918        PINMUX_DATA(KEYIN2_PORT45_MARK,         PORT45_FN3,     MSEL4CR_18_0),
 919        PINMUX_DATA(DV_D13_MARK,                PORT45_FN6),
 920
 921        /* Port46 */
 922        PINMUX_DATA(LCD0_D12_MARK,              PORT46_FN1),
 923        PINMUX_DATA(KEYIN3_PORT46_MARK,         PORT46_FN3,     MSEL4CR_18_0),
 924        PINMUX_DATA(DV_D12_MARK,                PORT46_FN6),
 925
 926        /* Port47 */
 927        PINMUX_DATA(LCD0_D11_MARK,              PORT47_FN1),
 928        PINMUX_DATA(KEYIN4_MARK,                PORT47_FN3),
 929        PINMUX_DATA(DV_D11_MARK,                PORT47_FN6),
 930
 931        /* Port48 */
 932        PINMUX_DATA(LCD0_D10_MARK,              PORT48_FN1),
 933        PINMUX_DATA(KEYIN5_MARK,                PORT48_FN3),
 934        PINMUX_DATA(DV_D10_MARK,                PORT48_FN6),
 935
 936        /* Port49 */
 937        PINMUX_DATA(LCD0_D9_MARK,               PORT49_FN1),
 938        PINMUX_DATA(KEYIN6_MARK,                PORT49_FN3),
 939        PINMUX_DATA(DV_D9_MARK,                 PORT49_FN6),
 940        PINMUX_DATA(IRQ30_PORT49_MARK,          PORT49_FN0,     MSEL1CR_30_1),
 941
 942        /* Port50 */
 943        PINMUX_DATA(LCD0_D8_MARK,               PORT50_FN1),
 944        PINMUX_DATA(KEYIN7_MARK,                PORT50_FN3),
 945        PINMUX_DATA(DV_D8_MARK,                 PORT50_FN6),
 946        PINMUX_DATA(IRQ29_PORT50_MARK,          PORT50_FN0,     MSEL1CR_29_1),
 947
 948        /* Port51 */
 949        PINMUX_DATA(LCD0_D7_MARK,               PORT51_FN1),
 950        PINMUX_DATA(KEYOUT0_MARK,               PORT51_FN3),
 951        PINMUX_DATA(DV_D7_MARK,                 PORT51_FN6),
 952
 953        /* Port52 */
 954        PINMUX_DATA(LCD0_D6_MARK,               PORT52_FN1),
 955        PINMUX_DATA(KEYOUT1_MARK,               PORT52_FN3),
 956        PINMUX_DATA(DV_D6_MARK,                 PORT52_FN6),
 957
 958        /* Port53 */
 959        PINMUX_DATA(LCD0_D5_MARK,               PORT53_FN1),
 960        PINMUX_DATA(KEYOUT2_MARK,               PORT53_FN3),
 961        PINMUX_DATA(DV_D5_MARK,                 PORT53_FN6),
 962
 963        /* Port54 */
 964        PINMUX_DATA(LCD0_D4_MARK,               PORT54_FN1),
 965        PINMUX_DATA(KEYOUT3_MARK,               PORT54_FN3),
 966        PINMUX_DATA(DV_D4_MARK,                 PORT54_FN6),
 967
 968        /* Port55 */
 969        PINMUX_DATA(LCD0_D3_MARK,               PORT55_FN1),
 970        PINMUX_DATA(KEYOUT4_MARK,               PORT55_FN3),
 971        PINMUX_DATA(KEYIN3_PORT55_MARK,         PORT55_FN4,     MSEL4CR_18_1),
 972        PINMUX_DATA(DV_D3_MARK,                 PORT55_FN6),
 973
 974        /* Port56 */
 975        PINMUX_DATA(LCD0_D2_MARK,               PORT56_FN1),
 976        PINMUX_DATA(KEYOUT5_MARK,               PORT56_FN3),
 977        PINMUX_DATA(KEYIN2_PORT56_MARK,         PORT56_FN4,     MSEL4CR_18_1),
 978        PINMUX_DATA(DV_D2_MARK,                 PORT56_FN6),
 979        PINMUX_DATA(IRQ28_PORT56_MARK,          PORT56_FN0,     MSEL1CR_28_1),
 980
 981        /* Port57 */
 982        PINMUX_DATA(LCD0_D1_MARK,               PORT57_FN1),
 983        PINMUX_DATA(KEYOUT6_MARK,               PORT57_FN3),
 984        PINMUX_DATA(KEYIN1_PORT57_MARK,         PORT57_FN4,     MSEL4CR_18_1),
 985        PINMUX_DATA(DV_D1_MARK,                 PORT57_FN6),
 986        PINMUX_DATA(IRQ27_PORT57_MARK,          PORT57_FN0,     MSEL1CR_27_1),
 987
 988        /* Port58 */
 989        PINMUX_DATA(LCD0_D0_MARK,               PORT58_FN1),
 990        PINMUX_DATA(KEYOUT7_MARK,               PORT58_FN3),
 991        PINMUX_DATA(KEYIN0_PORT58_MARK,         PORT58_FN4,     MSEL4CR_18_1),
 992        PINMUX_DATA(DV_D0_MARK,                 PORT58_FN6),
 993        PINMUX_DATA(IRQ26_PORT58_MARK,          PORT58_FN0,     MSEL1CR_26_1),
 994
 995        /* Port59 */
 996        PINMUX_DATA(LCD0_VCPWC_MARK,            PORT59_FN1),
 997        PINMUX_DATA(BBIF2_TSCK2_PORT59_MARK,    PORT59_FN2,     MSEL5CR_0_0),
 998        PINMUX_DATA(RSPI_MOSI_A_MARK,           PORT59_FN6),
 999
1000        /* Port60 */
1001        PINMUX_DATA(LCD0_VEPWC_MARK,            PORT60_FN1),
1002        PINMUX_DATA(BBIF2_RXD2_PORT60_MARK,     PORT60_FN2,     MSEL5CR_0_0),
1003        PINMUX_DATA(RSPI_MISO_A_MARK,           PORT60_FN6),
1004
1005        /* Port61 */
1006        PINMUX_DATA(LCD0_DON_MARK,              PORT61_FN1),
1007        PINMUX_DATA(MSIOF2_TXD_MARK,            PORT61_FN2),
1008
1009        /* Port62 */
1010        PINMUX_DATA(LCD0_DCK_MARK,              PORT62_FN1),
1011        PINMUX_DATA(LCD0_WR_MARK,               PORT62_FN4),
1012        PINMUX_DATA(DV_CLK_MARK,                PORT62_FN6),
1013        PINMUX_DATA(IRQ15_PORT62_MARK,          PORT62_FN0,     MSEL1CR_15_1),
1014
1015        /* Port63 */
1016        PINMUX_DATA(LCD0_VSYN_MARK,             PORT63_FN1),
1017        PINMUX_DATA(DV_VSYNC_MARK,              PORT63_FN6),
1018        PINMUX_DATA(IRQ14_PORT63_MARK,          PORT63_FN0,     MSEL1CR_14_1),
1019
1020        /* Port64 */
1021        PINMUX_DATA(LCD0_HSYN_MARK,             PORT64_FN1),
1022        PINMUX_DATA(LCD0_CS_MARK,               PORT64_FN4),
1023        PINMUX_DATA(DV_HSYNC_MARK,              PORT64_FN6),
1024        PINMUX_DATA(IRQ13_PORT64_MARK,          PORT64_FN0,     MSEL1CR_13_1),
1025
1026        /* Port65 */
1027        PINMUX_DATA(LCD0_DISP_MARK,             PORT65_FN1),
1028        PINMUX_DATA(MSIOF2_TSCK_MARK,           PORT65_FN2),
1029        PINMUX_DATA(LCD0_RS_MARK,               PORT65_FN4),
1030
1031        /* Port66 */
1032        PINMUX_DATA(MEMC_INT_MARK,              PORT66_FN1),
1033        PINMUX_DATA(TPU0TO2_PORT66_MARK,        PORT66_FN3,     MSEL5CR_25_0),
1034        PINMUX_DATA(MMC0_CLK_PORT66_MARK,       PORT66_FN4,     MSEL4CR_15_0),
1035        PINMUX_DATA(SDHI1_CLK_MARK,             PORT66_FN6),
1036
1037        /* Port67 - Port73 Function1 */
1038        PINMUX_DATA(MEMC_CS0_MARK,              PORT67_FN1),
1039        PINMUX_DATA(MEMC_AD8_MARK,              PORT68_FN1),
1040        PINMUX_DATA(MEMC_AD9_MARK,              PORT69_FN1),
1041        PINMUX_DATA(MEMC_AD10_MARK,             PORT70_FN1),
1042        PINMUX_DATA(MEMC_AD11_MARK,             PORT71_FN1),
1043        PINMUX_DATA(MEMC_AD12_MARK,             PORT72_FN1),
1044        PINMUX_DATA(MEMC_AD13_MARK,             PORT73_FN1),
1045
1046        /* Port67 - Port73 Function2 */
1047        PINMUX_DATA(MSIOF1_SS1_PORT67_MARK,     PORT67_FN2,     MSEL4CR_10_1),
1048        PINMUX_DATA(MSIOF1_RSCK_MARK,           PORT68_FN2),
1049        PINMUX_DATA(MSIOF1_RSYNC_MARK,          PORT69_FN2),
1050        PINMUX_DATA(MSIOF1_MCK0_MARK,           PORT70_FN2),
1051        PINMUX_DATA(MSIOF1_MCK1_MARK,           PORT71_FN2),
1052        PINMUX_DATA(MSIOF1_TSCK_PORT72_MARK,    PORT72_FN2,     MSEL4CR_10_1),
1053        PINMUX_DATA(MSIOF1_TSYNC_PORT73_MARK,   PORT73_FN2,     MSEL4CR_10_1),
1054
1055        /* Port67 - Port73 Function4 */
1056        PINMUX_DATA(MMC0_CMD_PORT67_MARK,       PORT67_FN4,     MSEL4CR_15_0),
1057        PINMUX_DATA(MMC0_D0_PORT68_MARK,        PORT68_FN4,     MSEL4CR_15_0),
1058        PINMUX_DATA(MMC0_D1_PORT69_MARK,        PORT69_FN4,     MSEL4CR_15_0),
1059        PINMUX_DATA(MMC0_D2_PORT70_MARK,        PORT70_FN4,     MSEL4CR_15_0),
1060        PINMUX_DATA(MMC0_D3_PORT71_MARK,        PORT71_FN4,     MSEL4CR_15_0),
1061        PINMUX_DATA(MMC0_D4_PORT72_MARK,        PORT72_FN4,     MSEL4CR_15_0),
1062        PINMUX_DATA(MMC0_D5_PORT73_MARK,        PORT73_FN4,     MSEL4CR_15_0),
1063
1064        /* Port67 - Port73 Function6 */
1065        PINMUX_DATA(SDHI1_CMD_MARK,             PORT67_FN6),
1066        PINMUX_DATA(SDHI1_D0_MARK,              PORT68_FN6),
1067        PINMUX_DATA(SDHI1_D1_MARK,              PORT69_FN6),
1068        PINMUX_DATA(SDHI1_D2_MARK,              PORT70_FN6),
1069        PINMUX_DATA(SDHI1_D3_MARK,              PORT71_FN6),
1070        PINMUX_DATA(SDHI1_CD_MARK,              PORT72_FN6),
1071        PINMUX_DATA(SDHI1_WP_MARK,              PORT73_FN6),
1072
1073        /* Port67 - Port71 IRQ */
1074        PINMUX_DATA(IRQ20_MARK,                 PORT67_FN0),
1075        PINMUX_DATA(IRQ16_PORT68_MARK,          PORT68_FN0,     MSEL1CR_16_0),
1076        PINMUX_DATA(IRQ17_MARK,                 PORT69_FN0),
1077        PINMUX_DATA(IRQ18_MARK,                 PORT70_FN0),
1078        PINMUX_DATA(IRQ19_MARK,                 PORT71_FN0),
1079
1080        /* Port74 */
1081        PINMUX_DATA(MEMC_AD14_MARK,             PORT74_FN1),
1082        PINMUX_DATA(MSIOF1_TXD_PORT74_MARK,     PORT74_FN2,     MSEL4CR_10_1),
1083        PINMUX_DATA(MMC0_D6_PORT74_MARK,        PORT74_FN4,     MSEL4CR_15_0),
1084        PINMUX_DATA(STP1_IPD7_MARK,             PORT74_FN6),
1085        PINMUX_DATA(LCD1_D21_MARK,              PORT74_FN7),
1086
1087        /* Port75 */
1088        PINMUX_DATA(MEMC_AD15_MARK,             PORT75_FN1),
1089        PINMUX_DATA(MSIOF1_RXD_PORT75_MARK,     PORT75_FN2,     MSEL4CR_10_1),
1090        PINMUX_DATA(MMC0_D7_PORT75_MARK,        PORT75_FN4,     MSEL4CR_15_0),
1091        PINMUX_DATA(STP1_IPD6_MARK,             PORT75_FN6),
1092        PINMUX_DATA(LCD1_D20_MARK,              PORT75_FN7),
1093
1094        /* Port76 - Port80 Function */
1095        PINMUX_DATA(SDHI0_CMD_MARK,             PORT76_FN1),
1096        PINMUX_DATA(SDHI0_D0_MARK,              PORT77_FN1),
1097        PINMUX_DATA(SDHI0_D1_MARK,              PORT78_FN1),
1098        PINMUX_DATA(SDHI0_D2_MARK,              PORT79_FN1),
1099        PINMUX_DATA(SDHI0_D3_MARK,              PORT80_FN1),
1100
1101        /* Port81 */
1102        PINMUX_DATA(SDHI0_CD_MARK,              PORT81_FN1),
1103        PINMUX_DATA(IRQ26_PORT81_MARK,          PORT81_FN0,     MSEL1CR_26_0),
1104
1105        /* Port82 - Port88 Function */
1106        PINMUX_DATA(SDHI0_CLK_MARK,             PORT82_FN1),
1107        PINMUX_DATA(SDHI0_WP_MARK,              PORT83_FN1),
1108        PINMUX_DATA(RESETOUTS_MARK,             PORT84_FN1),
1109        PINMUX_DATA(USB0_PPON_MARK,             PORT85_FN1),
1110        PINMUX_DATA(USB0_OCI_MARK,              PORT86_FN1),
1111        PINMUX_DATA(USB1_PPON_MARK,             PORT87_FN1),
1112        PINMUX_DATA(USB1_OCI_MARK,              PORT88_FN1),
1113
1114        /* Port89 */
1115        PINMUX_DATA(DREQ0_MARK,                 PORT89_FN1),
1116        PINMUX_DATA(BBIF2_TSCK2_PORT89_MARK,    PORT89_FN2,     MSEL5CR_0_1),
1117        PINMUX_DATA(RSPI_SSL3_A_MARK,           PORT89_FN6),
1118
1119        /* Port90 */
1120        PINMUX_DATA(DACK0_MARK,                 PORT90_FN1),
1121        PINMUX_DATA(BBIF2_RXD2_PORT90_MARK,     PORT90_FN2,     MSEL5CR_0_1),
1122        PINMUX_DATA(RSPI_SSL2_A_MARK,           PORT90_FN6),
1123        PINMUX_DATA(WAIT_PORT90_MARK,           PORT90_FN7,     MSEL5CR_2_1),
1124
1125        /* Port91 */
1126        PINMUX_DATA(MEMC_AD0_MARK,              PORT91_FN1),
1127        PINMUX_DATA(BBIF1_RXD_MARK,             PORT91_FN2),
1128        PINMUX_DATA(SCIFA5_TXD_PORT91_MARK,     PORT91_FN3,     MSEL5CR_15_1,   MSEL5CR_14_0),
1129        PINMUX_DATA(LCD1_D5_MARK,               PORT91_FN7),
1130
1131        /* Port92 */
1132        PINMUX_DATA(MEMC_AD1_MARK,              PORT92_FN1),
1133        PINMUX_DATA(BBIF1_TSYNC_MARK,           PORT92_FN2),
1134        PINMUX_DATA(SCIFA5_RXD_PORT92_MARK,     PORT92_FN3,     MSEL5CR_15_1,   MSEL5CR_14_0),
1135        PINMUX_DATA(STP0_IPD1_MARK,             PORT92_FN6),
1136        PINMUX_DATA(LCD1_D6_MARK,               PORT92_FN7),
1137
1138        /* Port93 */
1139        PINMUX_DATA(MEMC_AD2_MARK,              PORT93_FN1),
1140        PINMUX_DATA(BBIF1_TSCK_MARK,            PORT93_FN2),
1141        PINMUX_DATA(SCIFA4_TXD_PORT93_MARK,     PORT93_FN3,     MSEL5CR_12_1,   MSEL5CR_11_0),
1142        PINMUX_DATA(STP0_IPD3_MARK,             PORT93_FN6),
1143        PINMUX_DATA(LCD1_D8_MARK,               PORT93_FN7),
1144
1145        /* Port94 */
1146        PINMUX_DATA(MEMC_AD3_MARK,              PORT94_FN1),
1147        PINMUX_DATA(BBIF1_TXD_MARK,             PORT94_FN2),
1148        PINMUX_DATA(SCIFA4_RXD_PORT94_MARK,     PORT94_FN3,     MSEL5CR_12_1,   MSEL5CR_11_0),
1149        PINMUX_DATA(STP0_IPD4_MARK,             PORT94_FN6),
1150        PINMUX_DATA(LCD1_D9_MARK,               PORT94_FN7),
1151
1152        /* Port95 */
1153        PINMUX_DATA(MEMC_CS1_MARK,              PORT95_FN1,     MSEL4CR_6_0),
1154        PINMUX_DATA(MEMC_A1_MARK,               PORT95_FN1,     MSEL4CR_6_1),
1155
1156        PINMUX_DATA(SCIFA2_CTS_MARK,            PORT95_FN2),
1157        PINMUX_DATA(SIM_RST_MARK,               PORT95_FN4),
1158        PINMUX_DATA(VIO0_D14_PORT95_MARK,       PORT95_FN7,     MSEL5CR_27_1),
1159        PINMUX_DATA(IRQ22_MARK,                 PORT95_FN0),
1160
1161        /* Port96 */
1162        PINMUX_DATA(MEMC_ADV_MARK,              PORT96_FN1,     MSEL4CR_6_0),
1163        PINMUX_DATA(MEMC_DREQ0_MARK,            PORT96_FN1,     MSEL4CR_6_1),
1164
1165        PINMUX_DATA(SCIFA2_RTS_MARK,            PORT96_FN2),
1166        PINMUX_DATA(SIM_CLK_MARK,               PORT96_FN4),
1167        PINMUX_DATA(VIO0_D15_PORT96_MARK,       PORT96_FN7,     MSEL5CR_27_1),
1168        PINMUX_DATA(IRQ23_MARK,                 PORT96_FN0),
1169
1170        /* Port97 */
1171        PINMUX_DATA(MEMC_AD4_MARK,              PORT97_FN1),
1172        PINMUX_DATA(BBIF1_RSCK_MARK,            PORT97_FN2),
1173        PINMUX_DATA(LCD1_CS_MARK,               PORT97_FN6),
1174        PINMUX_DATA(LCD1_HSYN_MARK,             PORT97_FN7),
1175        PINMUX_DATA(IRQ12_PORT97_MARK,          PORT97_FN0,     MSEL1CR_12_0),
1176
1177        /* Port98 */
1178        PINMUX_DATA(MEMC_AD5_MARK,              PORT98_FN1),
1179        PINMUX_DATA(BBIF1_RSYNC_MARK,           PORT98_FN2),
1180        PINMUX_DATA(LCD1_VSYN_MARK,             PORT98_FN7),
1181        PINMUX_DATA(IRQ13_PORT98_MARK,          PORT98_FN0,     MSEL1CR_13_0),
1182
1183        /* Port99 */
1184        PINMUX_DATA(MEMC_AD6_MARK,              PORT99_FN1),
1185        PINMUX_DATA(BBIF1_FLOW_MARK,            PORT99_FN2),
1186        PINMUX_DATA(LCD1_WR_MARK,               PORT99_FN6),
1187        PINMUX_DATA(LCD1_DCK_MARK,              PORT99_FN7),
1188        PINMUX_DATA(IRQ14_PORT99_MARK,          PORT99_FN0,     MSEL1CR_14_0),
1189
1190        /* Port100 */
1191        PINMUX_DATA(MEMC_AD7_MARK,              PORT100_FN1),
1192        PINMUX_DATA(BBIF1_RX_FLOW_N_MARK,       PORT100_FN2),
1193        PINMUX_DATA(LCD1_DON_MARK,              PORT100_FN7),
1194        PINMUX_DATA(IRQ15_PORT100_MARK,         PORT100_FN0,    MSEL1CR_15_0),
1195
1196        /* Port101 */
1197        PINMUX_DATA(FCE0_MARK,                  PORT101_FN1),
1198
1199        /* Port102 */
1200        PINMUX_DATA(FRB_MARK,                   PORT102_FN1),
1201        PINMUX_DATA(LCD0_LCLK_PORT102_MARK,     PORT102_FN4,    MSEL5CR_6_0),
1202
1203        /* Port103 */
1204        PINMUX_DATA(CS5B_MARK,                  PORT103_FN1),
1205        PINMUX_DATA(FCE1_MARK,                  PORT103_FN2),
1206        PINMUX_DATA(MMC1_CLK_PORT103_MARK,      PORT103_FN3,    MSEL4CR_15_1),
1207
1208        /* Port104 */
1209        PINMUX_DATA(CS6A_MARK,                  PORT104_FN1),
1210        PINMUX_DATA(MMC1_CMD_PORT104_MARK,      PORT104_FN3,    MSEL4CR_15_1),
1211        PINMUX_DATA(IRQ11_MARK,                 PORT104_FN0),
1212
1213        /* Port105 */
1214        PINMUX_DATA(CS5A_PORT105_MARK,          PORT105_FN1,    MSEL5CR_2_0),
1215        PINMUX_DATA(SCIFA3_RTS_PORT105_MARK,    PORT105_FN4,    MSEL5CR_8_0),
1216
1217        /* Port106 */
1218        PINMUX_DATA(IOIS16_MARK,                PORT106_FN1),
1219        PINMUX_DATA(IDE_EXBUF_ENB_MARK,         PORT106_FN6),
1220
1221        /* Port107 - Port115 Function */
1222        PINMUX_DATA(WE3_ICIOWR_MARK,            PORT107_FN1),
1223        PINMUX_DATA(WE2_ICIORD_MARK,            PORT108_FN1),
1224        PINMUX_DATA(CS0_MARK,                   PORT109_FN1),
1225        PINMUX_DATA(CS2_MARK,                   PORT110_FN1),
1226        PINMUX_DATA(CS4_MARK,                   PORT111_FN1),
1227        PINMUX_DATA(WE1_MARK,                   PORT112_FN1),
1228        PINMUX_DATA(WE0_FWE_MARK,               PORT113_FN1),
1229        PINMUX_DATA(RDWR_MARK,                  PORT114_FN1),
1230        PINMUX_DATA(RD_FSC_MARK,                PORT115_FN1),
1231
1232        /* Port116 */
1233        PINMUX_DATA(A25_MARK,                   PORT116_FN1),
1234        PINMUX_DATA(MSIOF0_SS2_MARK,            PORT116_FN2),
1235        PINMUX_DATA(MSIOF1_SS2_PORT116_MARK,    PORT116_FN3,    MSEL4CR_10_0),
1236        PINMUX_DATA(SCIFA3_SCK_PORT116_MARK,    PORT116_FN4,    MSEL5CR_8_0),
1237        PINMUX_DATA(GPO1_MARK,                  PORT116_FN5),
1238
1239        /* Port117 */
1240        PINMUX_DATA(A24_MARK,                   PORT117_FN1),
1241        PINMUX_DATA(MSIOF0_SS1_MARK,            PORT117_FN2),
1242        PINMUX_DATA(MSIOF1_SS1_PORT117_MARK,    PORT117_FN3,    MSEL4CR_10_0),
1243        PINMUX_DATA(SCIFA3_CTS_PORT117_MARK,    PORT117_FN4,    MSEL5CR_8_0),
1244        PINMUX_DATA(GPO0_MARK,                  PORT117_FN5),
1245
1246        /* Port118 */
1247        PINMUX_DATA(A23_MARK,                   PORT118_FN1),
1248        PINMUX_DATA(MSIOF0_MCK1_MARK,           PORT118_FN2),
1249        PINMUX_DATA(MSIOF1_RXD_PORT118_MARK,    PORT118_FN3,    MSEL4CR_10_0),
1250        PINMUX_DATA(GPI1_MARK,                  PORT118_FN5),
1251        PINMUX_DATA(IRQ9_PORT118_MARK,          PORT118_FN0,    MSEL1CR_9_0),
1252
1253        /* Port119 */
1254        PINMUX_DATA(A22_MARK,                   PORT119_FN1),
1255        PINMUX_DATA(MSIOF0_MCK0_MARK,           PORT119_FN2),
1256        PINMUX_DATA(MSIOF1_TXD_PORT119_MARK,    PORT119_FN3,    MSEL4CR_10_0),
1257        PINMUX_DATA(GPI0_MARK,                  PORT119_FN5),
1258        PINMUX_DATA(IRQ8_MARK,                  PORT119_FN0),
1259
1260        /* Port120 */
1261        PINMUX_DATA(A21_MARK,                   PORT120_FN1),
1262        PINMUX_DATA(MSIOF0_RSYNC_MARK,          PORT120_FN2),
1263        PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK,  PORT120_FN3,    MSEL4CR_10_0),
1264        PINMUX_DATA(IRQ7_PORT120_MARK,          PORT120_FN0,    MSEL1CR_7_1),
1265
1266        /* Port121 */
1267        PINMUX_DATA(A20_MARK,                   PORT121_FN1),
1268        PINMUX_DATA(MSIOF0_RSCK_MARK,           PORT121_FN2),
1269        PINMUX_DATA(MSIOF1_TSCK_PORT121_MARK,   PORT121_FN3,    MSEL4CR_10_0),
1270        PINMUX_DATA(IRQ6_PORT121_MARK,          PORT121_FN0,    MSEL1CR_6_0),
1271
1272        /* Port122 */
1273        PINMUX_DATA(A19_MARK,                   PORT122_FN1),
1274        PINMUX_DATA(MSIOF0_RXD_MARK,            PORT122_FN2),
1275
1276        /* Port123 */
1277        PINMUX_DATA(A18_MARK,                   PORT123_FN1),
1278        PINMUX_DATA(MSIOF0_TSCK_MARK,           PORT123_FN2),
1279
1280        /* Port124 */
1281        PINMUX_DATA(A17_MARK,                   PORT124_FN1),
1282        PINMUX_DATA(MSIOF0_TSYNC_MARK,          PORT124_FN2),
1283
1284        /* Port125 - Port141 Function */
1285        PINMUX_DATA(A16_MARK,                   PORT125_FN1),
1286        PINMUX_DATA(A15_MARK,                   PORT126_FN1),
1287        PINMUX_DATA(A14_MARK,                   PORT127_FN1),
1288        PINMUX_DATA(A13_MARK,                   PORT128_FN1),
1289        PINMUX_DATA(A12_MARK,                   PORT129_FN1),
1290        PINMUX_DATA(A11_MARK,                   PORT130_FN1),
1291        PINMUX_DATA(A10_MARK,                   PORT131_FN1),
1292        PINMUX_DATA(A9_MARK,                    PORT132_FN1),
1293        PINMUX_DATA(A8_MARK,                    PORT133_FN1),
1294        PINMUX_DATA(A7_MARK,                    PORT134_FN1),
1295        PINMUX_DATA(A6_MARK,                    PORT135_FN1),
1296        PINMUX_DATA(A5_FCDE_MARK,               PORT136_FN1),
1297        PINMUX_DATA(A4_FOE_MARK,                PORT137_FN1),
1298        PINMUX_DATA(A3_MARK,                    PORT138_FN1),
1299        PINMUX_DATA(A2_MARK,                    PORT139_FN1),
1300        PINMUX_DATA(A1_MARK,                    PORT140_FN1),
1301        PINMUX_DATA(CKO_MARK,                   PORT141_FN1),
1302
1303        /* Port142 - Port157 Function1 */
1304        PINMUX_DATA(D15_NAF15_MARK,             PORT142_FN1),
1305        PINMUX_DATA(D14_NAF14_MARK,             PORT143_FN1),
1306        PINMUX_DATA(D13_NAF13_MARK,             PORT144_FN1),
1307        PINMUX_DATA(D12_NAF12_MARK,             PORT145_FN1),
1308        PINMUX_DATA(D11_NAF11_MARK,             PORT146_FN1),
1309        PINMUX_DATA(D10_NAF10_MARK,             PORT147_FN1),
1310        PINMUX_DATA(D9_NAF9_MARK,               PORT148_FN1),
1311        PINMUX_DATA(D8_NAF8_MARK,               PORT149_FN1),
1312        PINMUX_DATA(D7_NAF7_MARK,               PORT150_FN1),
1313        PINMUX_DATA(D6_NAF6_MARK,               PORT151_FN1),
1314        PINMUX_DATA(D5_NAF5_MARK,               PORT152_FN1),
1315        PINMUX_DATA(D4_NAF4_MARK,               PORT153_FN1),
1316        PINMUX_DATA(D3_NAF3_MARK,               PORT154_FN1),
1317        PINMUX_DATA(D2_NAF2_MARK,               PORT155_FN1),
1318        PINMUX_DATA(D1_NAF1_MARK,               PORT156_FN1),
1319        PINMUX_DATA(D0_NAF0_MARK,               PORT157_FN1),
1320
1321        /* Port142 - Port149 Function3 */
1322        PINMUX_DATA(MMC1_D7_PORT142_MARK,       PORT142_FN3,    MSEL4CR_15_1),
1323        PINMUX_DATA(MMC1_D6_PORT143_MARK,       PORT143_FN3,    MSEL4CR_15_1),
1324        PINMUX_DATA(MMC1_D5_PORT144_MARK,       PORT144_FN3,    MSEL4CR_15_1),
1325        PINMUX_DATA(MMC1_D4_PORT145_MARK,       PORT145_FN3,    MSEL4CR_15_1),
1326        PINMUX_DATA(MMC1_D3_PORT146_MARK,       PORT146_FN3,    MSEL4CR_15_1),
1327        PINMUX_DATA(MMC1_D2_PORT147_MARK,       PORT147_FN3,    MSEL4CR_15_1),
1328        PINMUX_DATA(MMC1_D1_PORT148_MARK,       PORT148_FN3,    MSEL4CR_15_1),
1329        PINMUX_DATA(MMC1_D0_PORT149_MARK,       PORT149_FN3,    MSEL4CR_15_1),
1330
1331        /* Port158 */
1332        PINMUX_DATA(D31_MARK,                   PORT158_FN1),
1333        PINMUX_DATA(SCIFA3_SCK_PORT158_MARK,    PORT158_FN2,    MSEL5CR_8_1),
1334        PINMUX_DATA(RMII_REF125CK_MARK,         PORT158_FN3),
1335        PINMUX_DATA(LCD0_D21_PORT158_MARK,      PORT158_FN4,    MSEL5CR_6_1),
1336        PINMUX_DATA(IRDA_FIRSEL_MARK,           PORT158_FN5),
1337        PINMUX_DATA(IDE_D15_MARK,               PORT158_FN6),
1338
1339        /* Port159 */
1340        PINMUX_DATA(D30_MARK,                   PORT159_FN1),
1341        PINMUX_DATA(SCIFA3_RXD_PORT159_MARK,    PORT159_FN2,    MSEL5CR_8_1),
1342        PINMUX_DATA(RMII_REF50CK_MARK,          PORT159_FN3),
1343        PINMUX_DATA(LCD0_D23_PORT159_MARK,      PORT159_FN4,    MSEL5CR_6_1),
1344        PINMUX_DATA(IDE_D14_MARK,               PORT159_FN6),
1345
1346        /* Port160 */
1347        PINMUX_DATA(D29_MARK,                   PORT160_FN1),
1348        PINMUX_DATA(SCIFA3_TXD_PORT160_MARK,    PORT160_FN2,    MSEL5CR_8_1),
1349        PINMUX_DATA(LCD0_D22_PORT160_MARK,      PORT160_FN4,    MSEL5CR_6_1),
1350        PINMUX_DATA(VIO1_HD_MARK,               PORT160_FN5),
1351        PINMUX_DATA(IDE_D13_MARK,               PORT160_FN6),
1352
1353        /* Port161 */
1354        PINMUX_DATA(D28_MARK,                   PORT161_FN1),
1355        PINMUX_DATA(SCIFA3_RTS_PORT161_MARK,    PORT161_FN2,    MSEL5CR_8_1),
1356        PINMUX_DATA(ET_RX_DV_MARK,              PORT161_FN3),
1357        PINMUX_DATA(LCD0_D20_PORT161_MARK,      PORT161_FN4,    MSEL5CR_6_1),
1358        PINMUX_DATA(IRDA_IN_MARK,               PORT161_FN5),
1359        PINMUX_DATA(IDE_D12_MARK,               PORT161_FN6),
1360
1361        /* Port162 */
1362        PINMUX_DATA(D27_MARK,                   PORT162_FN1),
1363        PINMUX_DATA(SCIFA3_CTS_PORT162_MARK,    PORT162_FN2,    MSEL5CR_8_1),
1364        PINMUX_DATA(LCD0_D19_PORT162_MARK,      PORT162_FN4,    MSEL5CR_6_1),
1365        PINMUX_DATA(IRDA_OUT_MARK,              PORT162_FN5),
1366        PINMUX_DATA(IDE_D11_MARK,               PORT162_FN6),
1367
1368        /* Port163 */
1369        PINMUX_DATA(D26_MARK,                   PORT163_FN1),
1370        PINMUX_DATA(MSIOF2_SS2_MARK,            PORT163_FN2),
1371        PINMUX_DATA(ET_COL_MARK,                PORT163_FN3),
1372        PINMUX_DATA(LCD0_D18_PORT163_MARK,      PORT163_FN4,    MSEL5CR_6_1),
1373        PINMUX_DATA(IROUT_MARK,                 PORT163_FN5),
1374        PINMUX_DATA(IDE_D10_MARK,               PORT163_FN6),
1375
1376        /* Port164 */
1377        PINMUX_DATA(D25_MARK,                   PORT164_FN1),
1378        PINMUX_DATA(MSIOF2_TSYNC_MARK,          PORT164_FN2),
1379        PINMUX_DATA(ET_PHY_INT_MARK,            PORT164_FN3),
1380        PINMUX_DATA(LCD0_RD_MARK,               PORT164_FN4),
1381        PINMUX_DATA(IDE_D9_MARK,                PORT164_FN6),
1382
1383        /* Port165 */
1384        PINMUX_DATA(D24_MARK,                   PORT165_FN1),
1385        PINMUX_DATA(MSIOF2_RXD_MARK,            PORT165_FN2),
1386        PINMUX_DATA(LCD0_LCLK_PORT165_MARK,     PORT165_FN4,    MSEL5CR_6_1),
1387        PINMUX_DATA(IDE_D8_MARK,                PORT165_FN6),
1388
1389        /* Port166 - Port171 Function1 */
1390        PINMUX_DATA(D21_MARK,                   PORT166_FN1),
1391        PINMUX_DATA(D20_MARK,                   PORT167_FN1),
1392        PINMUX_DATA(D19_MARK,                   PORT168_FN1),
1393        PINMUX_DATA(D18_MARK,                   PORT169_FN1),
1394        PINMUX_DATA(D17_MARK,                   PORT170_FN1),
1395        PINMUX_DATA(D16_MARK,                   PORT171_FN1),
1396
1397        /* Port166 - Port171 Function3 */
1398        PINMUX_DATA(ET_ETXD5_MARK,              PORT166_FN3),
1399        PINMUX_DATA(ET_ETXD4_MARK,              PORT167_FN3),
1400        PINMUX_DATA(ET_ETXD3_MARK,              PORT168_FN3),
1401        PINMUX_DATA(ET_ETXD2_MARK,              PORT169_FN3),
1402        PINMUX_DATA(ET_ETXD1_MARK,              PORT170_FN3),
1403        PINMUX_DATA(ET_ETXD0_MARK,              PORT171_FN3),
1404
1405        /* Port166 - Port171 Function6 */
1406        PINMUX_DATA(IDE_D5_MARK,                PORT166_FN6),
1407        PINMUX_DATA(IDE_D4_MARK,                PORT167_FN6),
1408        PINMUX_DATA(IDE_D3_MARK,                PORT168_FN6),
1409        PINMUX_DATA(IDE_D2_MARK,                PORT169_FN6),
1410        PINMUX_DATA(IDE_D1_MARK,                PORT170_FN6),
1411        PINMUX_DATA(IDE_D0_MARK,                PORT171_FN6),
1412
1413        /* Port167 - Port171 IRQ */
1414        PINMUX_DATA(IRQ31_PORT167_MARK,         PORT167_FN0,    MSEL1CR_31_0),
1415        PINMUX_DATA(IRQ27_PORT168_MARK,         PORT168_FN0,    MSEL1CR_27_0),
1416        PINMUX_DATA(IRQ28_PORT169_MARK,         PORT169_FN0,    MSEL1CR_28_0),
1417        PINMUX_DATA(IRQ29_PORT170_MARK,         PORT170_FN0,    MSEL1CR_29_0),
1418        PINMUX_DATA(IRQ30_PORT171_MARK,         PORT171_FN0,    MSEL1CR_30_0),
1419
1420        /* Port172 */
1421        PINMUX_DATA(D23_MARK,                   PORT172_FN1),
1422        PINMUX_DATA(SCIFB_RTS_PORT172_MARK,     PORT172_FN2,    MSEL5CR_17_1),
1423        PINMUX_DATA(ET_ETXD7_MARK,              PORT172_FN3),
1424        PINMUX_DATA(IDE_D7_MARK,                PORT172_FN6),
1425        PINMUX_DATA(IRQ4_PORT172_MARK,          PORT172_FN0,    MSEL1CR_4_1),
1426
1427        /* Port173 */
1428        PINMUX_DATA(D22_MARK,                   PORT173_FN1),
1429        PINMUX_DATA(SCIFB_CTS_PORT173_MARK,     PORT173_FN2,    MSEL5CR_17_1),
1430        PINMUX_DATA(ET_ETXD6_MARK,              PORT173_FN3),
1431        PINMUX_DATA(IDE_D6_MARK,                PORT173_FN6),
1432        PINMUX_DATA(IRQ6_PORT173_MARK,          PORT173_FN0,    MSEL1CR_6_1),
1433
1434        /* Port174 */
1435        PINMUX_DATA(A26_MARK,                   PORT174_FN1),
1436        PINMUX_DATA(MSIOF0_TXD_MARK,            PORT174_FN2),
1437        PINMUX_DATA(ET_RX_CLK_MARK,             PORT174_FN3),
1438        PINMUX_DATA(SCIFA3_RXD_PORT174_MARK,    PORT174_FN4,    MSEL5CR_8_0),
1439
1440        /* Port175 */
1441        PINMUX_DATA(A0_MARK,                    PORT175_FN1),
1442        PINMUX_DATA(BS_MARK,                    PORT175_FN2),
1443        PINMUX_DATA(ET_WOL_MARK,                PORT175_FN3),
1444        PINMUX_DATA(SCIFA3_TXD_PORT175_MARK,    PORT175_FN4,    MSEL5CR_8_0),
1445
1446        /* Port176 */
1447        PINMUX_DATA(ET_GTX_CLK_MARK,            PORT176_FN3),
1448
1449        /* Port177 */
1450        PINMUX_DATA(WAIT_PORT177_MARK,          PORT177_FN1,    MSEL5CR_2_0),
1451        PINMUX_DATA(ET_LINK_MARK,               PORT177_FN3),
1452        PINMUX_DATA(IDE_IOWR_MARK,              PORT177_FN6),
1453        PINMUX_DATA(SDHI2_WP_PORT177_MARK,      PORT177_FN7,    MSEL5CR_19_1),
1454
1455        /* Port178 */
1456        PINMUX_DATA(VIO0_D12_MARK,              PORT178_FN1),
1457        PINMUX_DATA(VIO1_D4_MARK,               PORT178_FN5),
1458        PINMUX_DATA(IDE_IORD_MARK,              PORT178_FN6),
1459
1460        /* Port179 */
1461        PINMUX_DATA(VIO0_D11_MARK,              PORT179_FN1),
1462        PINMUX_DATA(VIO1_D3_MARK,               PORT179_FN5),
1463        PINMUX_DATA(IDE_IORDY_MARK,             PORT179_FN6),
1464
1465        /* Port180 */
1466        PINMUX_DATA(VIO0_D10_MARK,              PORT180_FN1),
1467        PINMUX_DATA(TPU0TO3_MARK,               PORT180_FN4),
1468        PINMUX_DATA(VIO1_D2_MARK,               PORT180_FN5),
1469        PINMUX_DATA(IDE_INT_MARK,               PORT180_FN6),
1470        PINMUX_DATA(IRQ24_MARK,                 PORT180_FN0),
1471
1472        /* Port181 */
1473        PINMUX_DATA(VIO0_D9_MARK,               PORT181_FN1),
1474        PINMUX_DATA(VIO1_D1_MARK,               PORT181_FN5),
1475        PINMUX_DATA(IDE_RST_MARK,               PORT181_FN6),
1476
1477        /* Port182 */
1478        PINMUX_DATA(VIO0_D8_MARK,               PORT182_FN1),
1479        PINMUX_DATA(VIO1_D0_MARK,               PORT182_FN5),
1480        PINMUX_DATA(IDE_DIRECTION_MARK,         PORT182_FN6),
1481
1482        /* Port183 */
1483        PINMUX_DATA(DREQ1_MARK,                 PORT183_FN1),
1484        PINMUX_DATA(BBIF2_TXD2_PORT183_MARK,    PORT183_FN2,    MSEL5CR_0_1),
1485        PINMUX_DATA(ET_TX_EN_MARK,              PORT183_FN3),
1486
1487        /* Port184 */
1488        PINMUX_DATA(DACK1_MARK,                 PORT184_FN1),
1489        PINMUX_DATA(BBIF2_TSYNC2_PORT184_MARK,  PORT184_FN2,    MSEL5CR_0_1),
1490        PINMUX_DATA(ET_TX_CLK_MARK,             PORT184_FN3),
1491
1492        /* Port185 - Port192 Function1 */
1493        PINMUX_DATA(SCIFA1_SCK_MARK,            PORT185_FN1),
1494        PINMUX_DATA(SCIFB_RTS_PORT186_MARK,     PORT186_FN1,    MSEL5CR_17_0),
1495        PINMUX_DATA(SCIFB_CTS_PORT187_MARK,     PORT187_FN1,    MSEL5CR_17_0),
1496        PINMUX_DATA(SCIFA0_SCK_MARK,            PORT188_FN1),
1497        PINMUX_DATA(SCIFB_SCK_PORT190_MARK,     PORT190_FN1,    MSEL5CR_17_0),
1498        PINMUX_DATA(SCIFB_RXD_PORT191_MARK,     PORT191_FN1,    MSEL5CR_17_0),
1499        PINMUX_DATA(SCIFB_TXD_PORT192_MARK,     PORT192_FN1,    MSEL5CR_17_0),
1500
1501        /* Port185 - Port192 Function3 */
1502        PINMUX_DATA(ET_ERXD0_MARK,              PORT185_FN3),
1503        PINMUX_DATA(ET_ERXD1_MARK,              PORT186_FN3),
1504        PINMUX_DATA(ET_ERXD2_MARK,              PORT187_FN3),
1505        PINMUX_DATA(ET_ERXD3_MARK,              PORT188_FN3),
1506        PINMUX_DATA(ET_ERXD4_MARK,              PORT189_FN3),
1507        PINMUX_DATA(ET_ERXD5_MARK,              PORT190_FN3),
1508        PINMUX_DATA(ET_ERXD6_MARK,              PORT191_FN3),
1509        PINMUX_DATA(ET_ERXD7_MARK,              PORT192_FN3),
1510
1511        /* Port185 - Port192 Function6 */
1512        PINMUX_DATA(STP1_IPCLK_MARK,            PORT185_FN6),
1513        PINMUX_DATA(STP1_IPD0_PORT186_MARK,     PORT186_FN6,    MSEL5CR_23_0),
1514        PINMUX_DATA(STP1_IPEN_PORT187_MARK,     PORT187_FN6,    MSEL5CR_23_0),
1515        PINMUX_DATA(STP1_IPSYNC_MARK,           PORT188_FN6),
1516        PINMUX_DATA(STP0_IPCLK_MARK,            PORT189_FN6),
1517        PINMUX_DATA(STP0_IPD0_MARK,             PORT190_FN6),
1518        PINMUX_DATA(STP0_IPEN_MARK,             PORT191_FN6),
1519        PINMUX_DATA(STP0_IPSYNC_MARK,           PORT192_FN6),
1520
1521        /* Port193 */
1522        PINMUX_DATA(SCIFA0_CTS_MARK,            PORT193_FN1),
1523        PINMUX_DATA(RMII_CRS_DV_MARK,           PORT193_FN3),
1524        PINMUX_DATA(STP1_IPEN_PORT193_MARK,     PORT193_FN6,    MSEL5CR_23_1), /* ? */
1525        PINMUX_DATA(LCD1_D17_MARK,              PORT193_FN7),
1526
1527        /* Port194 */
1528        PINMUX_DATA(SCIFA0_RTS_MARK,            PORT194_FN1),
1529        PINMUX_DATA(RMII_RX_ER_MARK,            PORT194_FN3),
1530        PINMUX_DATA(STP1_IPD0_PORT194_MARK,     PORT194_FN6,    MSEL5CR_23_1), /* ? */
1531        PINMUX_DATA(LCD1_D16_MARK,              PORT194_FN7),
1532
1533        /* Port195 */
1534        PINMUX_DATA(SCIFA1_RXD_MARK,            PORT195_FN1),
1535        PINMUX_DATA(RMII_RXD0_MARK,             PORT195_FN3),
1536        PINMUX_DATA(STP1_IPD3_MARK,             PORT195_FN6),
1537        PINMUX_DATA(LCD1_D15_MARK,              PORT195_FN7),
1538
1539        /* Port196 */
1540        PINMUX_DATA(SCIFA1_TXD_MARK,            PORT196_FN1),
1541        PINMUX_DATA(RMII_RXD1_MARK,             PORT196_FN3),
1542        PINMUX_DATA(STP1_IPD2_MARK,             PORT196_FN6),
1543        PINMUX_DATA(LCD1_D14_MARK,              PORT196_FN7),
1544
1545        /* Port197 */
1546        PINMUX_DATA(SCIFA0_RXD_MARK,            PORT197_FN1),
1547        PINMUX_DATA(VIO1_CLK_MARK,              PORT197_FN5),
1548        PINMUX_DATA(STP1_IPD5_MARK,             PORT197_FN6),
1549        PINMUX_DATA(LCD1_D19_MARK,              PORT197_FN7),
1550
1551        /* Port198 */
1552        PINMUX_DATA(SCIFA0_TXD_MARK,            PORT198_FN1),
1553        PINMUX_DATA(VIO1_VD_MARK,               PORT198_FN5),
1554        PINMUX_DATA(STP1_IPD4_MARK,             PORT198_FN6),
1555        PINMUX_DATA(LCD1_D18_MARK,              PORT198_FN7),
1556
1557        /* Port199 */
1558        PINMUX_DATA(MEMC_NWE_MARK,              PORT199_FN1),
1559        PINMUX_DATA(SCIFA2_SCK_PORT199_MARK,    PORT199_FN2,    MSEL5CR_7_1),
1560        PINMUX_DATA(RMII_TX_EN_MARK,            PORT199_FN3),
1561        PINMUX_DATA(SIM_D_PORT199_MARK,         PORT199_FN4,    MSEL5CR_21_1),
1562        PINMUX_DATA(STP1_IPD1_MARK,             PORT199_FN6),
1563        PINMUX_DATA(LCD1_D13_MARK,              PORT199_FN7),
1564
1565        /* Port200 */
1566        PINMUX_DATA(MEMC_NOE_MARK,              PORT200_FN1),
1567        PINMUX_DATA(SCIFA2_RXD_MARK,            PORT200_FN2),
1568        PINMUX_DATA(RMII_TXD0_MARK,             PORT200_FN3),
1569        PINMUX_DATA(STP0_IPD7_MARK,             PORT200_FN6),
1570        PINMUX_DATA(LCD1_D12_MARK,              PORT200_FN7),
1571
1572        /* Port201 */
1573        PINMUX_DATA(MEMC_WAIT_MARK,             PORT201_FN1,    MSEL4CR_6_0),
1574        PINMUX_DATA(MEMC_DREQ1_MARK,            PORT201_FN1,    MSEL4CR_6_1),
1575
1576        PINMUX_DATA(SCIFA2_TXD_MARK,            PORT201_FN2),
1577        PINMUX_DATA(RMII_TXD1_MARK,             PORT201_FN3),
1578        PINMUX_DATA(STP0_IPD6_MARK,             PORT201_FN6),
1579        PINMUX_DATA(LCD1_D11_MARK,              PORT201_FN7),
1580
1581        /* Port202 */
1582        PINMUX_DATA(MEMC_BUSCLK_MARK,           PORT202_FN1,    MSEL4CR_6_0),
1583        PINMUX_DATA(MEMC_A0_MARK,               PORT202_FN1,    MSEL4CR_6_1),
1584
1585        PINMUX_DATA(MSIOF1_SS2_PORT202_MARK,    PORT202_FN2,    MSEL4CR_10_1),
1586        PINMUX_DATA(RMII_MDC_MARK,              PORT202_FN3),
1587        PINMUX_DATA(TPU0TO2_PORT202_MARK,       PORT202_FN4,    MSEL5CR_25_1),
1588        PINMUX_DATA(IDE_CS0_MARK,               PORT202_FN6),
1589        PINMUX_DATA(SDHI2_CD_PORT202_MARK,      PORT202_FN7,    MSEL5CR_19_1),
1590        PINMUX_DATA(IRQ21_MARK,                 PORT202_FN0),
1591
1592        /* Port203 - Port208 Function1 */
1593        PINMUX_DATA(SDHI2_CLK_MARK,             PORT203_FN1),
1594        PINMUX_DATA(SDHI2_CMD_MARK,             PORT204_FN1),
1595        PINMUX_DATA(SDHI2_D0_MARK,              PORT205_FN1),
1596        PINMUX_DATA(SDHI2_D1_MARK,              PORT206_FN1),
1597        PINMUX_DATA(SDHI2_D2_MARK,              PORT207_FN1),
1598        PINMUX_DATA(SDHI2_D3_MARK,              PORT208_FN1),
1599
1600        /* Port203 - Port208 Function3 */
1601        PINMUX_DATA(ET_TX_ER_MARK,              PORT203_FN3),
1602        PINMUX_DATA(ET_RX_ER_MARK,              PORT204_FN3),
1603        PINMUX_DATA(ET_CRS_MARK,                PORT205_FN3),
1604        PINMUX_DATA(ET_MDC_MARK,                PORT206_FN3),
1605        PINMUX_DATA(ET_MDIO_MARK,               PORT207_FN3),
1606        PINMUX_DATA(RMII_MDIO_MARK,             PORT208_FN3),
1607
1608        /* Port203 - Port208 Function6 */
1609        PINMUX_DATA(IDE_A2_MARK,                PORT203_FN6),
1610        PINMUX_DATA(IDE_A1_MARK,                PORT204_FN6),
1611        PINMUX_DATA(IDE_A0_MARK,                PORT205_FN6),
1612        PINMUX_DATA(IDE_IODACK_MARK,            PORT206_FN6),
1613        PINMUX_DATA(IDE_IODREQ_MARK,            PORT207_FN6),
1614        PINMUX_DATA(IDE_CS1_MARK,               PORT208_FN6),
1615
1616        /* Port203 - Port208 Function7 */
1617        PINMUX_DATA(SCIFA4_TXD_PORT203_MARK,    PORT203_FN7,    MSEL5CR_12_0,   MSEL5CR_11_1),
1618        PINMUX_DATA(SCIFA4_RXD_PORT204_MARK,    PORT204_FN7,    MSEL5CR_12_0,   MSEL5CR_11_1),
1619        PINMUX_DATA(SCIFA4_SCK_PORT205_MARK,    PORT205_FN7,    MSEL5CR_10_1),
1620        PINMUX_DATA(SCIFA5_SCK_PORT206_MARK,    PORT206_FN7,    MSEL5CR_13_1),
1621        PINMUX_DATA(SCIFA5_RXD_PORT207_MARK,    PORT207_FN7,    MSEL5CR_15_0,   MSEL5CR_14_1),
1622        PINMUX_DATA(SCIFA5_TXD_PORT208_MARK,    PORT208_FN7,    MSEL5CR_15_0,   MSEL5CR_14_1),
1623
1624        /* Port209 */
1625        PINMUX_DATA(VBUS_MARK,                  PORT209_FN1),
1626        PINMUX_DATA(IRQ7_PORT209_MARK,          PORT209_FN0,    MSEL1CR_7_0),
1627
1628        /* Port210 */
1629        PINMUX_DATA(IRQ9_PORT210_MARK,          PORT210_FN0,    MSEL1CR_9_1),
1630        PINMUX_DATA(HDMI_HPD_MARK,              PORT210_FN1),
1631
1632        /* Port211 */
1633        PINMUX_DATA(IRQ16_PORT211_MARK,         PORT211_FN0,    MSEL1CR_16_1),
1634        PINMUX_DATA(HDMI_CEC_MARK,              PORT211_FN1),
1635
1636        /* LCDC select */
1637        PINMUX_DATA(LCDC0_SELECT_MARK,                          MSEL3CR_6_0),
1638        PINMUX_DATA(LCDC1_SELECT_MARK,                          MSEL3CR_6_1),
1639
1640        /* SDENC */
1641        PINMUX_DATA(SDENC_CPG_MARK,                             MSEL4CR_19_0),
1642        PINMUX_DATA(SDENC_DV_CLKI_MARK,                         MSEL4CR_19_1),
1643
1644        /* SYSC */
1645        PINMUX_DATA(RESETP_PULLUP_MARK,                         MSEL4CR_4_0),
1646        PINMUX_DATA(RESETP_PLAIN_MARK,                          MSEL4CR_4_1),
1647
1648        /* DEBUG */
1649        PINMUX_DATA(EDEBGREQ_PULLDOWN_MARK,                     MSEL4CR_1_0),
1650        PINMUX_DATA(EDEBGREQ_PULLUP_MARK,                       MSEL4CR_1_1),
1651
1652        PINMUX_DATA(TRACEAUD_FROM_VIO_MARK,                     MSEL5CR_30_0,   MSEL5CR_29_0),
1653        PINMUX_DATA(TRACEAUD_FROM_LCDC0_MARK,                   MSEL5CR_30_0,   MSEL5CR_29_1),
1654        PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK,                    MSEL5CR_30_1,   MSEL5CR_29_0),
1655};
1656
1657static struct pinmux_gpio pinmux_gpios[] = {
1658
1659        /* PORT */
1660        GPIO_PORT_ALL(),
1661
1662        /* IRQ */
1663        GPIO_FN(IRQ0_PORT2),    GPIO_FN(IRQ0_PORT13),
1664        GPIO_FN(IRQ1),
1665        GPIO_FN(IRQ2_PORT11),   GPIO_FN(IRQ2_PORT12),
1666        GPIO_FN(IRQ3_PORT10),   GPIO_FN(IRQ3_PORT14),
1667        GPIO_FN(IRQ4_PORT15),   GPIO_FN(IRQ4_PORT172),
1668        GPIO_FN(IRQ5_PORT0),    GPIO_FN(IRQ5_PORT1),
1669        GPIO_FN(IRQ6_PORT121),  GPIO_FN(IRQ6_PORT173),
1670        GPIO_FN(IRQ7_PORT120),  GPIO_FN(IRQ7_PORT209),
1671        GPIO_FN(IRQ8),
1672        GPIO_FN(IRQ9_PORT118),  GPIO_FN(IRQ9_PORT210),
1673        GPIO_FN(IRQ10),
1674        GPIO_FN(IRQ11),
1675        GPIO_FN(IRQ12_PORT42),  GPIO_FN(IRQ12_PORT97),
1676        GPIO_FN(IRQ13_PORT64),  GPIO_FN(IRQ13_PORT98),
1677        GPIO_FN(IRQ14_PORT63),  GPIO_FN(IRQ14_PORT99),
1678        GPIO_FN(IRQ15_PORT62),  GPIO_FN(IRQ15_PORT100),
1679        GPIO_FN(IRQ16_PORT68),  GPIO_FN(IRQ16_PORT211),
1680        GPIO_FN(IRQ17),
1681        GPIO_FN(IRQ18),
1682        GPIO_FN(IRQ19),
1683        GPIO_FN(IRQ20),
1684        GPIO_FN(IRQ21),
1685        GPIO_FN(IRQ22),
1686        GPIO_FN(IRQ23),
1687        GPIO_FN(IRQ24),
1688        GPIO_FN(IRQ25),
1689        GPIO_FN(IRQ26_PORT58),  GPIO_FN(IRQ26_PORT81),
1690        GPIO_FN(IRQ27_PORT57),  GPIO_FN(IRQ27_PORT168),
1691        GPIO_FN(IRQ28_PORT56),  GPIO_FN(IRQ28_PORT169),
1692        GPIO_FN(IRQ29_PORT50),  GPIO_FN(IRQ29_PORT170),
1693        GPIO_FN(IRQ30_PORT49),  GPIO_FN(IRQ30_PORT171),
1694        GPIO_FN(IRQ31_PORT41),  GPIO_FN(IRQ31_PORT167),
1695
1696        /* Function */
1697
1698        /* DBGT */
1699        GPIO_FN(DBGMDT2),       GPIO_FN(DBGMDT1),       GPIO_FN(DBGMDT0),
1700        GPIO_FN(DBGMD10),       GPIO_FN(DBGMD11),       GPIO_FN(DBGMD20),
1701        GPIO_FN(DBGMD21),
1702
1703        /* FSI-A */
1704        GPIO_FN(FSIAISLD_PORT0),        /* FSIAISLD Port 0/5 */
1705        GPIO_FN(FSIAISLD_PORT5),
1706        GPIO_FN(FSIASPDIF_PORT9),       /* FSIASPDIF Port 9/18 */
1707        GPIO_FN(FSIASPDIF_PORT18),
1708        GPIO_FN(FSIAOSLD1),     GPIO_FN(FSIAOSLD2),     GPIO_FN(FSIAOLR),
1709        GPIO_FN(FSIAOBT),       GPIO_FN(FSIAOSLD),      GPIO_FN(FSIAOMC),
1710        GPIO_FN(FSIACK),        GPIO_FN(FSIAILR),       GPIO_FN(FSIAIBT),
1711
1712        /* FSI-B */
1713        GPIO_FN(FSIBCK),
1714
1715        /* FMSI */
1716        GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */
1717        GPIO_FN(FMSISLD_PORT6),
1718        GPIO_FN(FMSIILR),       GPIO_FN(FMSIIBT),       GPIO_FN(FMSIOLR),
1719        GPIO_FN(FMSIOBT),       GPIO_FN(FMSICK),        GPIO_FN(FMSOILR),
1720        GPIO_FN(FMSOIBT),       GPIO_FN(FMSOOLR),       GPIO_FN(FMSOOBT),
1721        GPIO_FN(FMSOSLD),       GPIO_FN(FMSOCK),
1722
1723        /* SCIFA0 */
1724        GPIO_FN(SCIFA0_SCK),    GPIO_FN(SCIFA0_CTS),    GPIO_FN(SCIFA0_RTS),
1725        GPIO_FN(SCIFA0_RXD),    GPIO_FN(SCIFA0_TXD),
1726
1727        /* SCIFA1 */
1728        GPIO_FN(SCIFA1_CTS),    GPIO_FN(SCIFA1_SCK),
1729        GPIO_FN(SCIFA1_RXD),    GPIO_FN(SCIFA1_TXD),    GPIO_FN(SCIFA1_RTS),
1730
1731        /* SCIFA2 */
1732        GPIO_FN(SCIFA2_SCK_PORT22), /* SCIFA2_SCK Port 22/199 */
1733        GPIO_FN(SCIFA2_SCK_PORT199),
1734        GPIO_FN(SCIFA2_RXD),    GPIO_FN(SCIFA2_TXD),
1735        GPIO_FN(SCIFA2_CTS),    GPIO_FN(SCIFA2_RTS),
1736
1737        /* SCIFA3 */
1738        GPIO_FN(SCIFA3_RTS_PORT105), /* MSEL5CR_8_0 */
1739        GPIO_FN(SCIFA3_SCK_PORT116),
1740        GPIO_FN(SCIFA3_CTS_PORT117),
1741        GPIO_FN(SCIFA3_RXD_PORT174),
1742        GPIO_FN(SCIFA3_TXD_PORT175),
1743
1744        GPIO_FN(SCIFA3_RTS_PORT161), /* MSEL5CR_8_1 */
1745        GPIO_FN(SCIFA3_SCK_PORT158),
1746        GPIO_FN(SCIFA3_CTS_PORT162),
1747        GPIO_FN(SCIFA3_RXD_PORT159),
1748        GPIO_FN(SCIFA3_TXD_PORT160),
1749
1750        /* SCIFA4 */
1751        GPIO_FN(SCIFA4_RXD_PORT12), /* MSEL5CR[12:11] = 00 */
1752        GPIO_FN(SCIFA4_TXD_PORT13),
1753
1754        GPIO_FN(SCIFA4_RXD_PORT204), /* MSEL5CR[12:11] = 01 */
1755        GPIO_FN(SCIFA4_TXD_PORT203),
1756
1757        GPIO_FN(SCIFA4_RXD_PORT94), /* MSEL5CR[12:11] = 10 */
1758        GPIO_FN(SCIFA4_TXD_PORT93),
1759
1760        GPIO_FN(SCIFA4_SCK_PORT21), /* SCIFA4_SCK Port 21/205 */
1761        GPIO_FN(SCIFA4_SCK_PORT205),
1762
1763        /* SCIFA5 */
1764        GPIO_FN(SCIFA5_TXD_PORT20), /* MSEL5CR[15:14] = 00 */
1765        GPIO_FN(SCIFA5_RXD_PORT10),
1766
1767        GPIO_FN(SCIFA5_RXD_PORT207), /* MSEL5CR[15:14] = 01 */
1768        GPIO_FN(SCIFA5_TXD_PORT208),
1769
1770        GPIO_FN(SCIFA5_TXD_PORT91), /* MSEL5CR[15:14] = 10 */
1771        GPIO_FN(SCIFA5_RXD_PORT92),
1772
1773        GPIO_FN(SCIFA5_SCK_PORT23), /* SCIFA5_SCK Port 23/206 */
1774        GPIO_FN(SCIFA5_SCK_PORT206),
1775
1776        /* SCIFA6 */
1777        GPIO_FN(SCIFA6_SCK),    GPIO_FN(SCIFA6_RXD),    GPIO_FN(SCIFA6_TXD),
1778
1779        /* SCIFA7 */
1780        GPIO_FN(SCIFA7_TXD),    GPIO_FN(SCIFA7_RXD),
1781
1782        /* SCIFAB */
1783        GPIO_FN(SCIFB_SCK_PORT190), /* MSEL5CR_17_0 */
1784        GPIO_FN(SCIFB_RXD_PORT191),
1785        GPIO_FN(SCIFB_TXD_PORT192),
1786        GPIO_FN(SCIFB_RTS_PORT186),
1787        GPIO_FN(SCIFB_CTS_PORT187),
1788
1789        GPIO_FN(SCIFB_SCK_PORT2), /* MSEL5CR_17_1 */
1790        GPIO_FN(SCIFB_RXD_PORT3),
1791        GPIO_FN(SCIFB_TXD_PORT4),
1792        GPIO_FN(SCIFB_RTS_PORT172),
1793        GPIO_FN(SCIFB_CTS_PORT173),
1794
1795        /* LCD0 */
1796        GPIO_FN(LCD0_D0),       GPIO_FN(LCD0_D1),       GPIO_FN(LCD0_D2),
1797        GPIO_FN(LCD0_D3),       GPIO_FN(LCD0_D4),       GPIO_FN(LCD0_D5),
1798        GPIO_FN(LCD0_D6),       GPIO_FN(LCD0_D7),       GPIO_FN(LCD0_D8),
1799        GPIO_FN(LCD0_D9),       GPIO_FN(LCD0_D10),      GPIO_FN(LCD0_D11),
1800        GPIO_FN(LCD0_D12),      GPIO_FN(LCD0_D13),      GPIO_FN(LCD0_D14),
1801        GPIO_FN(LCD0_D15),      GPIO_FN(LCD0_D16),      GPIO_FN(LCD0_D17),
1802        GPIO_FN(LCD0_DON),      GPIO_FN(LCD0_VCPWC),    GPIO_FN(LCD0_VEPWC),
1803        GPIO_FN(LCD0_DCK),      GPIO_FN(LCD0_VSYN),
1804        GPIO_FN(LCD0_HSYN),     GPIO_FN(LCD0_DISP),
1805        GPIO_FN(LCD0_WR),       GPIO_FN(LCD0_RD),
1806        GPIO_FN(LCD0_CS),       GPIO_FN(LCD0_RS),
1807
1808        GPIO_FN(LCD0_D18_PORT163),      GPIO_FN(LCD0_D19_PORT162),
1809        GPIO_FN(LCD0_D20_PORT161),      GPIO_FN(LCD0_D21_PORT158),
1810        GPIO_FN(LCD0_D22_PORT160),      GPIO_FN(LCD0_D23_PORT159),
1811        GPIO_FN(LCD0_LCLK_PORT165),     /* MSEL5CR_6_1 */
1812
1813        GPIO_FN(LCD0_D18_PORT40),       GPIO_FN(LCD0_D19_PORT4),
1814        GPIO_FN(LCD0_D20_PORT3),        GPIO_FN(LCD0_D21_PORT2),
1815        GPIO_FN(LCD0_D22_PORT0),        GPIO_FN(LCD0_D23_PORT1),
1816        GPIO_FN(LCD0_LCLK_PORT102),     /* MSEL5CR_6_0 */
1817
1818        /* LCD1 */
1819        GPIO_FN(LCD1_D0),       GPIO_FN(LCD1_D1),       GPIO_FN(LCD1_D2),
1820        GPIO_FN(LCD1_D3),       GPIO_FN(LCD1_D4),       GPIO_FN(LCD1_D5),
1821        GPIO_FN(LCD1_D6),       GPIO_FN(LCD1_D7),       GPIO_FN(LCD1_D8),
1822        GPIO_FN(LCD1_D9),       GPIO_FN(LCD1_D10),      GPIO_FN(LCD1_D11),
1823        GPIO_FN(LCD1_D12),      GPIO_FN(LCD1_D13),      GPIO_FN(LCD1_D14),
1824        GPIO_FN(LCD1_D15),      GPIO_FN(LCD1_D16),      GPIO_FN(LCD1_D17),
1825        GPIO_FN(LCD1_D18),      GPIO_FN(LCD1_D19),      GPIO_FN(LCD1_D20),
1826        GPIO_FN(LCD1_D21),      GPIO_FN(LCD1_D22),      GPIO_FN(LCD1_D23),
1827        GPIO_FN(LCD1_RS),       GPIO_FN(LCD1_RD),       GPIO_FN(LCD1_CS),
1828        GPIO_FN(LCD1_WR),       GPIO_FN(LCD1_DCK),      GPIO_FN(LCD1_DON),
1829        GPIO_FN(LCD1_VCPWC),    GPIO_FN(LCD1_LCLK),     GPIO_FN(LCD1_HSYN),
1830        GPIO_FN(LCD1_VSYN),     GPIO_FN(LCD1_VEPWC),    GPIO_FN(LCD1_DISP),
1831
1832        /* RSPI */
1833        GPIO_FN(RSPI_SSL0_A),   GPIO_FN(RSPI_SSL1_A),   GPIO_FN(RSPI_SSL2_A),
1834        GPIO_FN(RSPI_SSL3_A),   GPIO_FN(RSPI_CK_A),     GPIO_FN(RSPI_MOSI_A),
1835        GPIO_FN(RSPI_MISO_A),
1836
1837        /* VIO CKO */
1838        GPIO_FN(VIO_CKO1),
1839        GPIO_FN(VIO_CKO2),
1840        GPIO_FN(VIO_CKO_1),
1841        GPIO_FN(VIO_CKO),
1842
1843        /* VIO0 */
1844        GPIO_FN(VIO0_D0),       GPIO_FN(VIO0_D1),       GPIO_FN(VIO0_D2),
1845        GPIO_FN(VIO0_D3),       GPIO_FN(VIO0_D4),       GPIO_FN(VIO0_D5),
1846        GPIO_FN(VIO0_D6),       GPIO_FN(VIO0_D7),       GPIO_FN(VIO0_D8),
1847        GPIO_FN(VIO0_D9),       GPIO_FN(VIO0_D10),      GPIO_FN(VIO0_D11),
1848        GPIO_FN(VIO0_D12),      GPIO_FN(VIO0_VD),       GPIO_FN(VIO0_HD),
1849        GPIO_FN(VIO0_CLK),      GPIO_FN(VIO0_FIELD),
1850
1851        GPIO_FN(VIO0_D13_PORT26), /* MSEL5CR_27_0 */
1852        GPIO_FN(VIO0_D14_PORT25),
1853        GPIO_FN(VIO0_D15_PORT24),
1854
1855        GPIO_FN(VIO0_D13_PORT22), /* MSEL5CR_27_1 */
1856        GPIO_FN(VIO0_D14_PORT95),
1857        GPIO_FN(VIO0_D15_PORT96),
1858
1859        /* VIO1 */
1860        GPIO_FN(VIO1_D0),       GPIO_FN(VIO1_D1),       GPIO_FN(VIO1_D2),
1861        GPIO_FN(VIO1_D3),       GPIO_FN(VIO1_D4),       GPIO_FN(VIO1_D5),
1862        GPIO_FN(VIO1_D6),       GPIO_FN(VIO1_D7),       GPIO_FN(VIO1_VD),
1863        GPIO_FN(VIO1_HD),       GPIO_FN(VIO1_CLK),      GPIO_FN(VIO1_FIELD),
1864
1865        /* TPU0 */
1866        GPIO_FN(TPU0TO0),       GPIO_FN(TPU0TO1),       GPIO_FN(TPU0TO3),
1867        GPIO_FN(TPU0TO2_PORT66), /* TPU0TO2 Port 66/202 */
1868        GPIO_FN(TPU0TO2_PORT202),
1869
1870        /* SSP1 0 */
1871        GPIO_FN(STP0_IPD0),     GPIO_FN(STP0_IPD1),     GPIO_FN(STP0_IPD2),
1872        GPIO_FN(STP0_IPD3),     GPIO_FN(STP0_IPD4),     GPIO_FN(STP0_IPD5),
1873        GPIO_FN(STP0_IPD6),     GPIO_FN(STP0_IPD7),     GPIO_FN(STP0_IPEN),
1874        GPIO_FN(STP0_IPCLK),    GPIO_FN(STP0_IPSYNC),
1875
1876        /* SSP1 1 */
1877        GPIO_FN(STP1_IPD1),     GPIO_FN(STP1_IPD2),     GPIO_FN(STP1_IPD3),
1878        GPIO_FN(STP1_IPD4),     GPIO_FN(STP1_IPD5),     GPIO_FN(STP1_IPD6),
1879        GPIO_FN(STP1_IPD7),     GPIO_FN(STP1_IPCLK),    GPIO_FN(STP1_IPSYNC),
1880
1881        GPIO_FN(STP1_IPD0_PORT186), /* MSEL5CR_23_0 */
1882        GPIO_FN(STP1_IPEN_PORT187),
1883
1884        GPIO_FN(STP1_IPD0_PORT194), /* MSEL5CR_23_1 */
1885        GPIO_FN(STP1_IPEN_PORT193),
1886
1887        /* SIM */
1888        GPIO_FN(SIM_RST),       GPIO_FN(SIM_CLK),
1889        GPIO_FN(SIM_D_PORT22), /* SIM_D  Port 22/199 */
1890        GPIO_FN(SIM_D_PORT199),
1891
1892        /* SDHI0 */
1893        GPIO_FN(SDHI0_D0),      GPIO_FN(SDHI0_D1),      GPIO_FN(SDHI0_D2),
1894        GPIO_FN(SDHI0_D3),      GPIO_FN(SDHI0_CD),      GPIO_FN(SDHI0_WP),
1895        GPIO_FN(SDHI0_CMD),     GPIO_FN(SDHI0_CLK),
1896
1897        /* SDHI1 */
1898        GPIO_FN(SDHI1_D0),      GPIO_FN(SDHI1_D1),      GPIO_FN(SDHI1_D2),
1899        GPIO_FN(SDHI1_D3),      GPIO_FN(SDHI1_CD),      GPIO_FN(SDHI1_WP),
1900        GPIO_FN(SDHI1_CMD),     GPIO_FN(SDHI1_CLK),
1901
1902        /* SDHI2 */
1903        GPIO_FN(SDHI2_D0),      GPIO_FN(SDHI2_D1),      GPIO_FN(SDHI2_D2),
1904        GPIO_FN(SDHI2_D3),      GPIO_FN(SDHI2_CLK),     GPIO_FN(SDHI2_CMD),
1905
1906        GPIO_FN(SDHI2_CD_PORT24), /* MSEL5CR_19_0 */
1907        GPIO_FN(SDHI2_WP_PORT25),
1908
1909        GPIO_FN(SDHI2_WP_PORT177), /* MSEL5CR_19_1 */
1910        GPIO_FN(SDHI2_CD_PORT202),
1911
1912        /* MSIOF2 */
1913        GPIO_FN(MSIOF2_TXD),    GPIO_FN(MSIOF2_RXD),    GPIO_FN(MSIOF2_TSCK),
1914        GPIO_FN(MSIOF2_SS2),    GPIO_FN(MSIOF2_TSYNC),  GPIO_FN(MSIOF2_SS1),
1915        GPIO_FN(MSIOF2_MCK1),   GPIO_FN(MSIOF2_MCK0),   GPIO_FN(MSIOF2_RSYNC),
1916        GPIO_FN(MSIOF2_RSCK),
1917
1918        /* KEYSC */
1919        GPIO_FN(KEYIN4),        GPIO_FN(KEYIN5),
1920        GPIO_FN(KEYIN6),        GPIO_FN(KEYIN7),
1921        GPIO_FN(KEYOUT0),       GPIO_FN(KEYOUT1),       GPIO_FN(KEYOUT2),
1922        GPIO_FN(KEYOUT3),       GPIO_FN(KEYOUT4),       GPIO_FN(KEYOUT5),
1923        GPIO_FN(KEYOUT6),       GPIO_FN(KEYOUT7),
1924
1925        GPIO_FN(KEYIN0_PORT43), /* MSEL4CR_18_0 */
1926        GPIO_FN(KEYIN1_PORT44),
1927        GPIO_FN(KEYIN2_PORT45),
1928        GPIO_FN(KEYIN3_PORT46),
1929
1930        GPIO_FN(KEYIN0_PORT58), /* MSEL4CR_18_1 */
1931        GPIO_FN(KEYIN1_PORT57),
1932        GPIO_FN(KEYIN2_PORT56),
1933        GPIO_FN(KEYIN3_PORT55),
1934
1935        /* VOU */
1936        GPIO_FN(DV_D0),         GPIO_FN(DV_D1),         GPIO_FN(DV_D2),
1937        GPIO_FN(DV_D3),         GPIO_FN(DV_D4),         GPIO_FN(DV_D5),
1938        GPIO_FN(DV_D6),         GPIO_FN(DV_D7),         GPIO_FN(DV_D8),
1939        GPIO_FN(DV_D9),         GPIO_FN(DV_D10),        GPIO_FN(DV_D11),
1940        GPIO_FN(DV_D12),        GPIO_FN(DV_D13),        GPIO_FN(DV_D14),
1941        GPIO_FN(DV_D15),        GPIO_FN(DV_CLK),
1942        GPIO_FN(DV_VSYNC),      GPIO_FN(DV_HSYNC),
1943
1944        /* MEMC */
1945        GPIO_FN(MEMC_AD0),      GPIO_FN(MEMC_AD1),      GPIO_FN(MEMC_AD2),
1946        GPIO_FN(MEMC_AD3),      GPIO_FN(MEMC_AD4),      GPIO_FN(MEMC_AD5),
1947        GPIO_FN(MEMC_AD6),      GPIO_FN(MEMC_AD7),      GPIO_FN(MEMC_AD8),
1948        GPIO_FN(MEMC_AD9),      GPIO_FN(MEMC_AD10),     GPIO_FN(MEMC_AD11),
1949        GPIO_FN(MEMC_AD12),     GPIO_FN(MEMC_AD13),     GPIO_FN(MEMC_AD14),
1950        GPIO_FN(MEMC_AD15),     GPIO_FN(MEMC_CS0),      GPIO_FN(MEMC_INT),
1951        GPIO_FN(MEMC_NWE),      GPIO_FN(MEMC_NOE),      GPIO_FN(MEMC_CS1),
1952        GPIO_FN(MEMC_A1),       GPIO_FN(MEMC_ADV),      GPIO_FN(MEMC_DREQ0),
1953        GPIO_FN(MEMC_WAIT),     GPIO_FN(MEMC_DREQ1),    GPIO_FN(MEMC_BUSCLK),
1954        GPIO_FN(MEMC_A0),
1955
1956        /* MMC */
1957        GPIO_FN(MMC0_D0_PORT68),        GPIO_FN(MMC0_D1_PORT69),
1958        GPIO_FN(MMC0_D2_PORT70),        GPIO_FN(MMC0_D3_PORT71),
1959        GPIO_FN(MMC0_D4_PORT72),        GPIO_FN(MMC0_D5_PORT73),
1960        GPIO_FN(MMC0_D6_PORT74),        GPIO_FN(MMC0_D7_PORT75),
1961        GPIO_FN(MMC0_CLK_PORT66),
1962        GPIO_FN(MMC0_CMD_PORT67),       /* MSEL4CR_15_0 */
1963
1964        GPIO_FN(MMC1_D0_PORT149),       GPIO_FN(MMC1_D1_PORT148),
1965        GPIO_FN(MMC1_D2_PORT147),       GPIO_FN(MMC1_D3_PORT146),
1966        GPIO_FN(MMC1_D4_PORT145),       GPIO_FN(MMC1_D5_PORT144),
1967        GPIO_FN(MMC1_D6_PORT143),       GPIO_FN(MMC1_D7_PORT142),
1968        GPIO_FN(MMC1_CLK_PORT103),
1969        GPIO_FN(MMC1_CMD_PORT104),      /* MSEL4CR_15_1 */
1970
1971        /* MSIOF0 */
1972        GPIO_FN(MSIOF0_SS1),    GPIO_FN(MSIOF0_SS2),    GPIO_FN(MSIOF0_RXD),
1973        GPIO_FN(MSIOF0_TXD),    GPIO_FN(MSIOF0_MCK0),   GPIO_FN(MSIOF0_MCK1),
1974        GPIO_FN(MSIOF0_RSYNC),  GPIO_FN(MSIOF0_RSCK),   GPIO_FN(MSIOF0_TSCK),
1975        GPIO_FN(MSIOF0_TSYNC),
1976
1977        /* MSIOF1 */
1978        GPIO_FN(MSIOF1_RSCK),   GPIO_FN(MSIOF1_RSYNC),
1979        GPIO_FN(MSIOF1_MCK0),   GPIO_FN(MSIOF1_MCK1),
1980
1981        GPIO_FN(MSIOF1_SS2_PORT116),    GPIO_FN(MSIOF1_SS1_PORT117),
1982        GPIO_FN(MSIOF1_RXD_PORT118),    GPIO_FN(MSIOF1_TXD_PORT119),
1983        GPIO_FN(MSIOF1_TSYNC_PORT120),
1984        GPIO_FN(MSIOF1_TSCK_PORT121),   /* MSEL4CR_10_0 */
1985
1986        GPIO_FN(MSIOF1_SS1_PORT67),     GPIO_FN(MSIOF1_TSCK_PORT72),
1987        GPIO_FN(MSIOF1_TSYNC_PORT73),   GPIO_FN(MSIOF1_TXD_PORT74),
1988        GPIO_FN(MSIOF1_RXD_PORT75),
1989        GPIO_FN(MSIOF1_SS2_PORT202),    /* MSEL4CR_10_1 */
1990
1991        /* GPIO */
1992        GPIO_FN(GPO0),  GPIO_FN(GPI0),
1993        GPIO_FN(GPO1),  GPIO_FN(GPI1),
1994
1995        /* USB0 */
1996        GPIO_FN(USB0_OCI),      GPIO_FN(USB0_PPON),     GPIO_FN(VBUS),
1997
1998        /* USB1 */
1999        GPIO_FN(USB1_OCI),      GPIO_FN(USB1_PPON),
2000
2001        /* BBIF1 */
2002        GPIO_FN(BBIF1_RXD),     GPIO_FN(BBIF1_TXD),     GPIO_FN(BBIF1_TSYNC),
2003        GPIO_FN(BBIF1_TSCK),    GPIO_FN(BBIF1_RSCK),    GPIO_FN(BBIF1_RSYNC),
2004        GPIO_FN(BBIF1_FLOW),    GPIO_FN(BBIF1_RX_FLOW_N),
2005
2006        /* BBIF2 */
2007        GPIO_FN(BBIF2_TXD2_PORT5), /* MSEL5CR_0_0 */
2008        GPIO_FN(BBIF2_RXD2_PORT60),
2009        GPIO_FN(BBIF2_TSYNC2_PORT6),
2010        GPIO_FN(BBIF2_TSCK2_PORT59),
2011
2012        GPIO_FN(BBIF2_RXD2_PORT90), /* MSEL5CR_0_1 */
2013        GPIO_FN(BBIF2_TXD2_PORT183),
2014        GPIO_FN(BBIF2_TSCK2_PORT89),
2015        GPIO_FN(BBIF2_TSYNC2_PORT184),
2016
2017        /* BSC / FLCTL / PCMCIA */
2018        GPIO_FN(CS0),   GPIO_FN(CS2),   GPIO_FN(CS4),
2019        GPIO_FN(CS5B),  GPIO_FN(CS6A),
2020        GPIO_FN(CS5A_PORT105), /* CS5A PORT 19/105 */
2021        GPIO_FN(CS5A_PORT19),
2022        GPIO_FN(IOIS16), /* ? */
2023
2024        GPIO_FN(A0),    GPIO_FN(A1),    GPIO_FN(A2),    GPIO_FN(A3),
2025        GPIO_FN(A4_FOE),        GPIO_FN(A5_FCDE),       /* share with FLCTL */
2026        GPIO_FN(A6),    GPIO_FN(A7),    GPIO_FN(A8),    GPIO_FN(A9),
2027        GPIO_FN(A10),   GPIO_FN(A11),   GPIO_FN(A12),   GPIO_FN(A13),
2028        GPIO_FN(A14),   GPIO_FN(A15),   GPIO_FN(A16),   GPIO_FN(A17),
2029        GPIO_FN(A18),   GPIO_FN(A19),   GPIO_FN(A20),   GPIO_FN(A21),
2030        GPIO_FN(A22),   GPIO_FN(A23),   GPIO_FN(A24),   GPIO_FN(A25),
2031        GPIO_FN(A26),
2032
2033        GPIO_FN(D0_NAF0),       GPIO_FN(D1_NAF1),       /* share with FLCTL */
2034        GPIO_FN(D2_NAF2),       GPIO_FN(D3_NAF3),       /* share with FLCTL */
2035        GPIO_FN(D4_NAF4),       GPIO_FN(D5_NAF5),       /* share with FLCTL */
2036        GPIO_FN(D6_NAF6),       GPIO_FN(D7_NAF7),       /* share with FLCTL */
2037        GPIO_FN(D8_NAF8),       GPIO_FN(D9_NAF9),       /* share with FLCTL */
2038        GPIO_FN(D10_NAF10),     GPIO_FN(D11_NAF11),     /* share with FLCTL */
2039        GPIO_FN(D12_NAF12),     GPIO_FN(D13_NAF13),     /* share with FLCTL */
2040        GPIO_FN(D14_NAF14),     GPIO_FN(D15_NAF15),     /* share with FLCTL */
2041        GPIO_FN(D16),   GPIO_FN(D17),   GPIO_FN(D18),   GPIO_FN(D19),
2042        GPIO_FN(D20),   GPIO_FN(D21),   GPIO_FN(D22),   GPIO_FN(D23),
2043        GPIO_FN(D24),   GPIO_FN(D25),   GPIO_FN(D26),   GPIO_FN(D27),
2044        GPIO_FN(D28),   GPIO_FN(D29),   GPIO_FN(D30),   GPIO_FN(D31),
2045
2046        GPIO_FN(WE0_FWE),       /* share with FLCTL */
2047        GPIO_FN(WE1),
2048        GPIO_FN(WE2_ICIORD),    /* share with PCMCIA */
2049        GPIO_FN(WE3_ICIOWR),    /* share with PCMCIA */
2050        GPIO_FN(CKO),   GPIO_FN(BS),    GPIO_FN(RDWR),
2051        GPIO_FN(RD_FSC),        /* share with FLCTL */
2052        GPIO_FN(WAIT_PORT177), /* WAIT Port 90/177 */
2053        GPIO_FN(WAIT_PORT90),
2054
2055        GPIO_FN(FCE0),  GPIO_FN(FCE1),  GPIO_FN(FRB), /* FLCTL */
2056
2057        /* IRDA */
2058        GPIO_FN(IRDA_FIRSEL),   GPIO_FN(IRDA_IN),       GPIO_FN(IRDA_OUT),
2059
2060        /* ATAPI */
2061        GPIO_FN(IDE_D0),        GPIO_FN(IDE_D1),        GPIO_FN(IDE_D2),
2062        GPIO_FN(IDE_D3),        GPIO_FN(IDE_D4),        GPIO_FN(IDE_D5),
2063        GPIO_FN(IDE_D6),        GPIO_FN(IDE_D7),        GPIO_FN(IDE_D8),
2064        GPIO_FN(IDE_D9),        GPIO_FN(IDE_D10),       GPIO_FN(IDE_D11),
2065        GPIO_FN(IDE_D12),       GPIO_FN(IDE_D13),       GPIO_FN(IDE_D14),
2066        GPIO_FN(IDE_D15),       GPIO_FN(IDE_A0),        GPIO_FN(IDE_A1),
2067        GPIO_FN(IDE_A2),        GPIO_FN(IDE_CS0),       GPIO_FN(IDE_CS1),
2068        GPIO_FN(IDE_IOWR),      GPIO_FN(IDE_IORD),      GPIO_FN(IDE_IORDY),
2069        GPIO_FN(IDE_INT),       GPIO_FN(IDE_RST),       GPIO_FN(IDE_DIRECTION),
2070        GPIO_FN(IDE_EXBUF_ENB), GPIO_FN(IDE_IODACK),    GPIO_FN(IDE_IODREQ),
2071
2072        /* RMII */
2073        GPIO_FN(RMII_CRS_DV),   GPIO_FN(RMII_RX_ER),    GPIO_FN(RMII_RXD0),
2074        GPIO_FN(RMII_RXD1),     GPIO_FN(RMII_TX_EN),    GPIO_FN(RMII_TXD0),
2075        GPIO_FN(RMII_MDC),      GPIO_FN(RMII_TXD1),     GPIO_FN(RMII_MDIO),
2076        GPIO_FN(RMII_REF50CK),  GPIO_FN(RMII_REF125CK), /* for GMII */
2077
2078        /* GEther */
2079        GPIO_FN(ET_TX_CLK),     GPIO_FN(ET_TX_EN),      GPIO_FN(ET_ETXD0),
2080        GPIO_FN(ET_ETXD1),      GPIO_FN(ET_ETXD2),      GPIO_FN(ET_ETXD3),
2081        GPIO_FN(ET_ETXD4),      GPIO_FN(ET_ETXD5), /* for GEther */
2082        GPIO_FN(ET_ETXD6),      GPIO_FN(ET_ETXD7), /* for GEther */
2083        GPIO_FN(ET_COL),        GPIO_FN(ET_TX_ER),      GPIO_FN(ET_RX_CLK),
2084        GPIO_FN(ET_RX_DV),      GPIO_FN(ET_ERXD0),      GPIO_FN(ET_ERXD1),
2085        GPIO_FN(ET_ERXD2),      GPIO_FN(ET_ERXD3),
2086        GPIO_FN(ET_ERXD4),      GPIO_FN(ET_ERXD5), /* for GEther */
2087        GPIO_FN(ET_ERXD6),      GPIO_FN(ET_ERXD7), /* for GEther */
2088        GPIO_FN(ET_RX_ER),      GPIO_FN(ET_CRS),        GPIO_FN(ET_MDC),
2089        GPIO_FN(ET_MDIO),       GPIO_FN(ET_LINK),       GPIO_FN(ET_PHY_INT),
2090        GPIO_FN(ET_WOL),        GPIO_FN(ET_GTX_CLK),
2091
2092        /* DMA0 */
2093        GPIO_FN(DREQ0), GPIO_FN(DACK0),
2094
2095        /* DMA1 */
2096        GPIO_FN(DREQ1), GPIO_FN(DACK1),
2097
2098        /* SYSC */
2099        GPIO_FN(RESETOUTS),
2100
2101        /* IRREM */
2102        GPIO_FN(IROUT),
2103
2104        /* LCDC */
2105        GPIO_FN(LCDC0_SELECT),
2106        GPIO_FN(LCDC1_SELECT),
2107
2108        /* SDENC */
2109        GPIO_FN(SDENC_CPG),
2110        GPIO_FN(SDENC_DV_CLKI),
2111
2112        /* HDMI */
2113        GPIO_FN(HDMI_HPD),
2114        GPIO_FN(HDMI_CEC),
2115
2116        /* SYSC */
2117        GPIO_FN(RESETP_PULLUP),
2118        GPIO_FN(RESETP_PLAIN),
2119
2120        /* DEBUG */
2121        GPIO_FN(EDEBGREQ_PULLDOWN),
2122        GPIO_FN(EDEBGREQ_PULLUP),
2123
2124        GPIO_FN(TRACEAUD_FROM_VIO),
2125        GPIO_FN(TRACEAUD_FROM_LCDC0),
2126        GPIO_FN(TRACEAUD_FROM_MEMC),
2127};
2128
2129static struct pinmux_cfg_reg pinmux_config_regs[] = {
2130        PORTCR(0,       0xe6050000), /* PORT0CR */
2131        PORTCR(1,       0xe6050001), /* PORT1CR */
2132        PORTCR(2,       0xe6050002), /* PORT2CR */
2133        PORTCR(3,       0xe6050003), /* PORT3CR */
2134        PORTCR(4,       0xe6050004), /* PORT4CR */
2135        PORTCR(5,       0xe6050005), /* PORT5CR */
2136        PORTCR(6,       0xe6050006), /* PORT6CR */
2137        PORTCR(7,       0xe6050007), /* PORT7CR */
2138        PORTCR(8,       0xe6050008), /* PORT8CR */
2139        PORTCR(9,       0xe6050009), /* PORT9CR */
2140        PORTCR(10,      0xe605000a), /* PORT10CR */
2141        PORTCR(11,      0xe605000b), /* PORT11CR */
2142        PORTCR(12,      0xe605000c), /* PORT12CR */
2143        PORTCR(13,      0xe605000d), /* PORT13CR */
2144        PORTCR(14,      0xe605000e), /* PORT14CR */
2145        PORTCR(15,      0xe605000f), /* PORT15CR */
2146        PORTCR(16,      0xe6050010), /* PORT16CR */
2147        PORTCR(17,      0xe6050011), /* PORT17CR */
2148        PORTCR(18,      0xe6050012), /* PORT18CR */
2149        PORTCR(19,      0xe6050013), /* PORT19CR */
2150        PORTCR(20,      0xe6050014), /* PORT20CR */
2151        PORTCR(21,      0xe6050015), /* PORT21CR */
2152        PORTCR(22,      0xe6050016), /* PORT22CR */
2153        PORTCR(23,      0xe6050017), /* PORT23CR */
2154        PORTCR(24,      0xe6050018), /* PORT24CR */
2155        PORTCR(25,      0xe6050019), /* PORT25CR */
2156        PORTCR(26,      0xe605001a), /* PORT26CR */
2157        PORTCR(27,      0xe605001b), /* PORT27CR */
2158        PORTCR(28,      0xe605001c), /* PORT28CR */
2159        PORTCR(29,      0xe605001d), /* PORT29CR */
2160        PORTCR(30,      0xe605001e), /* PORT30CR */
2161        PORTCR(31,      0xe605001f), /* PORT31CR */
2162        PORTCR(32,      0xe6050020), /* PORT32CR */
2163        PORTCR(33,      0xe6050021), /* PORT33CR */
2164        PORTCR(34,      0xe6050022), /* PORT34CR */
2165        PORTCR(35,      0xe6050023), /* PORT35CR */
2166        PORTCR(36,      0xe6050024), /* PORT36CR */
2167        PORTCR(37,      0xe6050025), /* PORT37CR */
2168        PORTCR(38,      0xe6050026), /* PORT38CR */
2169        PORTCR(39,      0xe6050027), /* PORT39CR */
2170        PORTCR(40,      0xe6050028), /* PORT40CR */
2171        PORTCR(41,      0xe6050029), /* PORT41CR */
2172        PORTCR(42,      0xe605002a), /* PORT42CR */
2173        PORTCR(43,      0xe605002b), /* PORT43CR */
2174        PORTCR(44,      0xe605002c), /* PORT44CR */
2175        PORTCR(45,      0xe605002d), /* PORT45CR */
2176        PORTCR(46,      0xe605002e), /* PORT46CR */
2177        PORTCR(47,      0xe605002f), /* PORT47CR */
2178        PORTCR(48,      0xe6050030), /* PORT48CR */
2179        PORTCR(49,      0xe6050031), /* PORT49CR */
2180        PORTCR(50,      0xe6050032), /* PORT50CR */
2181        PORTCR(51,      0xe6050033), /* PORT51CR */
2182        PORTCR(52,      0xe6050034), /* PORT52CR */
2183        PORTCR(53,      0xe6050035), /* PORT53CR */
2184        PORTCR(54,      0xe6050036), /* PORT54CR */
2185        PORTCR(55,      0xe6050037), /* PORT55CR */
2186        PORTCR(56,      0xe6050038), /* PORT56CR */
2187        PORTCR(57,      0xe6050039), /* PORT57CR */
2188        PORTCR(58,      0xe605003a), /* PORT58CR */
2189        PORTCR(59,      0xe605003b), /* PORT59CR */
2190        PORTCR(60,      0xe605003c), /* PORT60CR */
2191        PORTCR(61,      0xe605003d), /* PORT61CR */
2192        PORTCR(62,      0xe605003e), /* PORT62CR */
2193        PORTCR(63,      0xe605003f), /* PORT63CR */
2194        PORTCR(64,      0xe6050040), /* PORT64CR */
2195        PORTCR(65,      0xe6050041), /* PORT65CR */
2196        PORTCR(66,      0xe6050042), /* PORT66CR */
2197        PORTCR(67,      0xe6050043), /* PORT67CR */
2198        PORTCR(68,      0xe6050044), /* PORT68CR */
2199        PORTCR(69,      0xe6050045), /* PORT69CR */
2200        PORTCR(70,      0xe6050046), /* PORT70CR */
2201        PORTCR(71,      0xe6050047), /* PORT71CR */
2202        PORTCR(72,      0xe6050048), /* PORT72CR */
2203        PORTCR(73,      0xe6050049), /* PORT73CR */
2204        PORTCR(74,      0xe605004a), /* PORT74CR */
2205        PORTCR(75,      0xe605004b), /* PORT75CR */
2206        PORTCR(76,      0xe605004c), /* PORT76CR */
2207        PORTCR(77,      0xe605004d), /* PORT77CR */
2208        PORTCR(78,      0xe605004e), /* PORT78CR */
2209        PORTCR(79,      0xe605004f), /* PORT79CR */
2210        PORTCR(80,      0xe6050050), /* PORT80CR */
2211        PORTCR(81,      0xe6050051), /* PORT81CR */
2212        PORTCR(82,      0xe6050052), /* PORT82CR */
2213        PORTCR(83,      0xe6050053), /* PORT83CR */
2214
2215        PORTCR(84,      0xe6051054), /* PORT84CR */
2216        PORTCR(85,      0xe6051055), /* PORT85CR */
2217        PORTCR(86,      0xe6051056), /* PORT86CR */
2218        PORTCR(87,      0xe6051057), /* PORT87CR */
2219        PORTCR(88,      0xe6051058), /* PORT88CR */
2220        PORTCR(89,      0xe6051059), /* PORT89CR */
2221        PORTCR(90,      0xe605105a), /* PORT90CR */
2222        PORTCR(91,      0xe605105b), /* PORT91CR */
2223        PORTCR(92,      0xe605105c), /* PORT92CR */
2224        PORTCR(93,      0xe605105d), /* PORT93CR */
2225        PORTCR(94,      0xe605105e), /* PORT94CR */
2226        PORTCR(95,      0xe605105f), /* PORT95CR */
2227        PORTCR(96,      0xe6051060), /* PORT96CR */
2228        PORTCR(97,      0xe6051061), /* PORT97CR */
2229        PORTCR(98,      0xe6051062), /* PORT98CR */
2230        PORTCR(99,      0xe6051063), /* PORT99CR */
2231        PORTCR(100,     0xe6051064), /* PORT100CR */
2232        PORTCR(101,     0xe6051065), /* PORT101CR */
2233        PORTCR(102,     0xe6051066), /* PORT102CR */
2234        PORTCR(103,     0xe6051067), /* PORT103CR */
2235        PORTCR(104,     0xe6051068), /* PORT104CR */
2236        PORTCR(105,     0xe6051069), /* PORT105CR */
2237        PORTCR(106,     0xe605106a), /* PORT106CR */
2238        PORTCR(107,     0xe605106b), /* PORT107CR */
2239        PORTCR(108,     0xe605106c), /* PORT108CR */
2240        PORTCR(109,     0xe605106d), /* PORT109CR */
2241        PORTCR(110,     0xe605106e), /* PORT110CR */
2242        PORTCR(111,     0xe605106f), /* PORT111CR */
2243        PORTCR(112,     0xe6051070), /* PORT112CR */
2244        PORTCR(113,     0xe6051071), /* PORT113CR */
2245        PORTCR(114,     0xe6051072), /* PORT114CR */
2246
2247        PORTCR(115,     0xe6052073), /* PORT115CR */
2248        PORTCR(116,     0xe6052074), /* PORT116CR */
2249        PORTCR(117,     0xe6052075), /* PORT117CR */
2250        PORTCR(118,     0xe6052076), /* PORT118CR */
2251        PORTCR(119,     0xe6052077), /* PORT119CR */
2252        PORTCR(120,     0xe6052078), /* PORT120CR */
2253        PORTCR(121,     0xe6052079), /* PORT121CR */
2254        PORTCR(122,     0xe605207a), /* PORT122CR */
2255        PORTCR(123,     0xe605207b), /* PORT123CR */
2256        PORTCR(124,     0xe605207c), /* PORT124CR */
2257        PORTCR(125,     0xe605207d), /* PORT125CR */
2258        PORTCR(126,     0xe605207e), /* PORT126CR */
2259        PORTCR(127,     0xe605207f), /* PORT127CR */
2260        PORTCR(128,     0xe6052080), /* PORT128CR */
2261        PORTCR(129,     0xe6052081), /* PORT129CR */
2262        PORTCR(130,     0xe6052082), /* PORT130CR */
2263        PORTCR(131,     0xe6052083), /* PORT131CR */
2264        PORTCR(132,     0xe6052084), /* PORT132CR */
2265        PORTCR(133,     0xe6052085), /* PORT133CR */
2266        PORTCR(134,     0xe6052086), /* PORT134CR */
2267        PORTCR(135,     0xe6052087), /* PORT135CR */
2268        PORTCR(136,     0xe6052088), /* PORT136CR */
2269        PORTCR(137,     0xe6052089), /* PORT137CR */
2270        PORTCR(138,     0xe605208a), /* PORT138CR */
2271        PORTCR(139,     0xe605208b), /* PORT139CR */
2272        PORTCR(140,     0xe605208c), /* PORT140CR */
2273        PORTCR(141,     0xe605208d), /* PORT141CR */
2274        PORTCR(142,     0xe605208e), /* PORT142CR */
2275        PORTCR(143,     0xe605208f), /* PORT143CR */
2276        PORTCR(144,     0xe6052090), /* PORT144CR */
2277        PORTCR(145,     0xe6052091), /* PORT145CR */
2278        PORTCR(146,     0xe6052092), /* PORT146CR */
2279        PORTCR(147,     0xe6052093), /* PORT147CR */
2280        PORTCR(148,     0xe6052094), /* PORT148CR */
2281        PORTCR(149,     0xe6052095), /* PORT149CR */
2282        PORTCR(150,     0xe6052096), /* PORT150CR */
2283        PORTCR(151,     0xe6052097), /* PORT151CR */
2284        PORTCR(152,     0xe6052098), /* PORT152CR */
2285        PORTCR(153,     0xe6052099), /* PORT153CR */
2286        PORTCR(154,     0xe605209a), /* PORT154CR */
2287        PORTCR(155,     0xe605209b), /* PORT155CR */
2288        PORTCR(156,     0xe605209c), /* PORT156CR */
2289        PORTCR(157,     0xe605209d), /* PORT157CR */
2290        PORTCR(158,     0xe605209e), /* PORT158CR */
2291        PORTCR(159,     0xe605209f), /* PORT159CR */
2292        PORTCR(160,     0xe60520a0), /* PORT160CR */
2293        PORTCR(161,     0xe60520a1), /* PORT161CR */
2294        PORTCR(162,     0xe60520a2), /* PORT162CR */
2295        PORTCR(163,     0xe60520a3), /* PORT163CR */
2296        PORTCR(164,     0xe60520a4), /* PORT164CR */
2297        PORTCR(165,     0xe60520a5), /* PORT165CR */
2298        PORTCR(166,     0xe60520a6), /* PORT166CR */
2299        PORTCR(167,     0xe60520a7), /* PORT167CR */
2300        PORTCR(168,     0xe60520a8), /* PORT168CR */
2301        PORTCR(169,     0xe60520a9), /* PORT169CR */
2302        PORTCR(170,     0xe60520aa), /* PORT170CR */
2303        PORTCR(171,     0xe60520ab), /* PORT171CR */
2304        PORTCR(172,     0xe60520ac), /* PORT172CR */
2305        PORTCR(173,     0xe60520ad), /* PORT173CR */
2306        PORTCR(174,     0xe60520ae), /* PORT174CR */
2307        PORTCR(175,     0xe60520af), /* PORT175CR */
2308        PORTCR(176,     0xe60520b0), /* PORT176CR */
2309        PORTCR(177,     0xe60520b1), /* PORT177CR */
2310        PORTCR(178,     0xe60520b2), /* PORT178CR */
2311        PORTCR(179,     0xe60520b3), /* PORT179CR */
2312        PORTCR(180,     0xe60520b4), /* PORT180CR */
2313        PORTCR(181,     0xe60520b5), /* PORT181CR */
2314        PORTCR(182,     0xe60520b6), /* PORT182CR */
2315        PORTCR(183,     0xe60520b7), /* PORT183CR */
2316        PORTCR(184,     0xe60520b8), /* PORT184CR */
2317        PORTCR(185,     0xe60520b9), /* PORT185CR */
2318        PORTCR(186,     0xe60520ba), /* PORT186CR */
2319        PORTCR(187,     0xe60520bb), /* PORT187CR */
2320        PORTCR(188,     0xe60520bc), /* PORT188CR */
2321        PORTCR(189,     0xe60520bd), /* PORT189CR */
2322        PORTCR(190,     0xe60520be), /* PORT190CR */
2323        PORTCR(191,     0xe60520bf), /* PORT191CR */
2324        PORTCR(192,     0xe60520c0), /* PORT192CR */
2325        PORTCR(193,     0xe60520c1), /* PORT193CR */
2326        PORTCR(194,     0xe60520c2), /* PORT194CR */
2327        PORTCR(195,     0xe60520c3), /* PORT195CR */
2328        PORTCR(196,     0xe60520c4), /* PORT196CR */
2329        PORTCR(197,     0xe60520c5), /* PORT197CR */
2330        PORTCR(198,     0xe60520c6), /* PORT198CR */
2331        PORTCR(199,     0xe60520c7), /* PORT199CR */
2332        PORTCR(200,     0xe60520c8), /* PORT200CR */
2333        PORTCR(201,     0xe60520c9), /* PORT201CR */
2334        PORTCR(202,     0xe60520ca), /* PORT202CR */
2335        PORTCR(203,     0xe60520cb), /* PORT203CR */
2336        PORTCR(204,     0xe60520cc), /* PORT204CR */
2337        PORTCR(205,     0xe60520cd), /* PORT205CR */
2338        PORTCR(206,     0xe60520ce), /* PORT206CR */
2339        PORTCR(207,     0xe60520cf), /* PORT207CR */
2340        PORTCR(208,     0xe60520d0), /* PORT208CR */
2341        PORTCR(209,     0xe60520d1), /* PORT209CR */
2342
2343        PORTCR(210,     0xe60530d2), /* PORT210CR */
2344        PORTCR(211,     0xe60530d3), /* PORT211CR */
2345
2346        { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1) {
2347                        MSEL1CR_31_0,   MSEL1CR_31_1,
2348                        MSEL1CR_30_0,   MSEL1CR_30_1,
2349                        MSEL1CR_29_0,   MSEL1CR_29_1,
2350                        MSEL1CR_28_0,   MSEL1CR_28_1,
2351                        MSEL1CR_27_0,   MSEL1CR_27_1,
2352                        MSEL1CR_26_0,   MSEL1CR_26_1,
2353                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2354                        0, 0, 0, 0, 0, 0, 0, 0,
2355                        MSEL1CR_16_0,   MSEL1CR_16_1,
2356                        MSEL1CR_15_0,   MSEL1CR_15_1,
2357                        MSEL1CR_14_0,   MSEL1CR_14_1,
2358                        MSEL1CR_13_0,   MSEL1CR_13_1,
2359                        MSEL1CR_12_0,   MSEL1CR_12_1,
2360                        0, 0, 0, 0,
2361                        MSEL1CR_9_0,    MSEL1CR_9_1,
2362                        0, 0,
2363                        MSEL1CR_7_0,    MSEL1CR_7_1,
2364                        MSEL1CR_6_0,    MSEL1CR_6_1,
2365                        MSEL1CR_5_0,    MSEL1CR_5_1,
2366                        MSEL1CR_4_0,    MSEL1CR_4_1,
2367                        MSEL1CR_3_0,    MSEL1CR_3_1,
2368                        MSEL1CR_2_0,    MSEL1CR_2_1,
2369                        0, 0,
2370                        MSEL1CR_0_0,    MSEL1CR_0_1,
2371                }
2372        },
2373        { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
2374                        0, 0, 0, 0, 0, 0, 0, 0,
2375                        0, 0, 0, 0, 0, 0, 0, 0,
2376                        0, 0, 0, 0, 0, 0, 0, 0,
2377                        0, 0, 0, 0, 0, 0, 0, 0,
2378                        MSEL3CR_15_0,   MSEL3CR_15_1,
2379                        0, 0, 0, 0, 0, 0, 0, 0,
2380                        0, 0, 0, 0, 0, 0, 0, 0,
2381                        MSEL3CR_6_0,    MSEL3CR_6_1,
2382                        0, 0, 0, 0, 0, 0, 0, 0,
2383                        0, 0, 0, 0,
2384                        }
2385        },
2386        { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
2387                        0, 0, 0, 0, 0, 0, 0, 0,
2388                        0, 0, 0, 0, 0, 0, 0, 0,
2389                        0, 0, 0, 0, 0, 0, 0, 0,
2390                        MSEL4CR_19_0,   MSEL4CR_19_1,
2391                        MSEL4CR_18_0,   MSEL4CR_18_1,
2392                        0, 0, 0, 0,
2393                        MSEL4CR_15_0,   MSEL4CR_15_1,
2394                        0, 0, 0, 0, 0, 0, 0, 0,
2395                        MSEL4CR_10_0,   MSEL4CR_10_1,
2396                        0, 0, 0, 0, 0, 0,
2397                        MSEL4CR_6_0,    MSEL4CR_6_1,
2398                        0, 0,
2399                        MSEL4CR_4_0,    MSEL4CR_4_1,
2400                        0, 0, 0, 0,
2401                        MSEL4CR_1_0,    MSEL4CR_1_1,
2402                        0, 0,
2403                }
2404        },
2405        { PINMUX_CFG_REG("MSEL5CR", 0xE6058028, 32, 1) {
2406                        MSEL5CR_31_0,   MSEL5CR_31_1,
2407                        MSEL5CR_30_0,   MSEL5CR_30_1,
2408                        MSEL5CR_29_0,   MSEL5CR_29_1,
2409                        0, 0,
2410                        MSEL5CR_27_0,   MSEL5CR_27_1,
2411                        0, 0,
2412                        MSEL5CR_25_0,   MSEL5CR_25_1,
2413                        0, 0,
2414                        MSEL5CR_23_0,   MSEL5CR_23_1,
2415                        0, 0,
2416                        MSEL5CR_21_0,   MSEL5CR_21_1,
2417                        0, 0,
2418                        MSEL5CR_19_0,   MSEL5CR_19_1,
2419                        0, 0,
2420                        MSEL5CR_17_0,   MSEL5CR_17_1,
2421                        0, 0,
2422                        MSEL5CR_15_0,   MSEL5CR_15_1,
2423                        MSEL5CR_14_0,   MSEL5CR_14_1,
2424                        MSEL5CR_13_0,   MSEL5CR_13_1,
2425                        MSEL5CR_12_0,   MSEL5CR_12_1,
2426                        MSEL5CR_11_0,   MSEL5CR_11_1,
2427                        MSEL5CR_10_0,   MSEL5CR_10_1,
2428                        0, 0,
2429                        MSEL5CR_8_0,    MSEL5CR_8_1,
2430                        MSEL5CR_7_0,    MSEL5CR_7_1,
2431                        MSEL5CR_6_0,    MSEL5CR_6_1,
2432                        MSEL5CR_5_0,    MSEL5CR_5_1,
2433                        MSEL5CR_4_0,    MSEL5CR_4_1,
2434                        MSEL5CR_3_0,    MSEL5CR_3_1,
2435                        MSEL5CR_2_0,    MSEL5CR_2_1,
2436                        0, 0,
2437                        MSEL5CR_0_0,    MSEL5CR_0_1,
2438                }
2439        },
2440        { },
2441};
2442
2443static struct pinmux_data_reg pinmux_data_regs[] = {
2444        { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) {
2445                PORT31_DATA,    PORT30_DATA,    PORT29_DATA,    PORT28_DATA,
2446                PORT27_DATA,    PORT26_DATA,    PORT25_DATA,    PORT24_DATA,
2447                PORT23_DATA,    PORT22_DATA,    PORT21_DATA,    PORT20_DATA,
2448                PORT19_DATA,    PORT18_DATA,    PORT17_DATA,    PORT16_DATA,
2449                PORT15_DATA,    PORT14_DATA,    PORT13_DATA,    PORT12_DATA,
2450                PORT11_DATA,    PORT10_DATA,    PORT9_DATA,     PORT8_DATA,
2451                PORT7_DATA,     PORT6_DATA,     PORT5_DATA,     PORT4_DATA,
2452                PORT3_DATA,     PORT2_DATA,     PORT1_DATA,     PORT0_DATA }
2453        },
2454        { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054804, 32) {
2455                PORT63_DATA,    PORT62_DATA,    PORT61_DATA,    PORT60_DATA,
2456                PORT59_DATA,    PORT58_DATA,    PORT57_DATA,    PORT56_DATA,
2457                PORT55_DATA,    PORT54_DATA,    PORT53_DATA,    PORT52_DATA,
2458                PORT51_DATA,    PORT50_DATA,    PORT49_DATA,    PORT48_DATA,
2459                PORT47_DATA,    PORT46_DATA,    PORT45_DATA,    PORT44_DATA,
2460                PORT43_DATA,    PORT42_DATA,    PORT41_DATA,    PORT40_DATA,
2461                PORT39_DATA,    PORT38_DATA,    PORT37_DATA,    PORT36_DATA,
2462                PORT35_DATA,    PORT34_DATA,    PORT33_DATA,    PORT32_DATA }
2463        },
2464        { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054808, 32) {
2465                0, 0, 0, 0,
2466                0, 0, 0, 0,
2467                0, 0, 0, 0,
2468                PORT83_DATA,    PORT82_DATA,    PORT81_DATA,    PORT80_DATA,
2469                PORT79_DATA,    PORT78_DATA,    PORT77_DATA,    PORT76_DATA,
2470                PORT75_DATA,    PORT74_DATA,    PORT73_DATA,    PORT72_DATA,
2471                PORT71_DATA,    PORT70_DATA,    PORT69_DATA,    PORT68_DATA,
2472                PORT67_DATA,    PORT66_DATA,    PORT65_DATA,    PORT64_DATA }
2473        },
2474        { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055808, 32) {
2475                PORT95_DATA,    PORT94_DATA,    PORT93_DATA,    PORT92_DATA,
2476                PORT91_DATA,    PORT90_DATA,    PORT89_DATA,    PORT88_DATA,
2477                PORT87_DATA,    PORT86_DATA,    PORT85_DATA,    PORT84_DATA,
2478                0, 0, 0, 0,
2479                0, 0, 0, 0,
2480                0, 0, 0, 0,
2481                0, 0, 0, 0,
2482                0, 0, 0, 0 }
2483        },
2484        { PINMUX_DATA_REG("PORTD127_096DR", 0xe605580c, 32) {
2485                0, 0, 0, 0,
2486                0, 0, 0, 0,
2487                0, 0, 0, 0,
2488                0,              PORT114_DATA,   PORT113_DATA,   PORT112_DATA,
2489                PORT111_DATA,   PORT110_DATA,   PORT109_DATA,   PORT108_DATA,
2490                PORT107_DATA,   PORT106_DATA,   PORT105_DATA,   PORT104_DATA,
2491                PORT103_DATA,   PORT102_DATA,   PORT101_DATA,   PORT100_DATA,
2492                PORT99_DATA,    PORT98_DATA,    PORT97_DATA,    PORT96_DATA }
2493        },
2494        { PINMUX_DATA_REG("PORTR127_096DR", 0xe605680C, 32) {
2495                PORT127_DATA,   PORT126_DATA,   PORT125_DATA,   PORT124_DATA,
2496                PORT123_DATA,   PORT122_DATA,   PORT121_DATA,   PORT120_DATA,
2497                PORT119_DATA,   PORT118_DATA,   PORT117_DATA,   PORT116_DATA,
2498                PORT115_DATA,   0, 0, 0,
2499                0, 0, 0, 0,
2500                0, 0, 0, 0,
2501                0, 0, 0, 0,
2502                0, 0, 0, 0 }
2503        },
2504        { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056810, 32) {
2505                PORT159_DATA,   PORT158_DATA,   PORT157_DATA,   PORT156_DATA,
2506                PORT155_DATA,   PORT154_DATA,   PORT153_DATA,   PORT152_DATA,
2507                PORT151_DATA,   PORT150_DATA,   PORT149_DATA,   PORT148_DATA,
2508                PORT147_DATA,   PORT146_DATA,   PORT145_DATA,   PORT144_DATA,
2509                PORT143_DATA,   PORT142_DATA,   PORT141_DATA,   PORT140_DATA,
2510                PORT139_DATA,   PORT138_DATA,   PORT137_DATA,   PORT136_DATA,
2511                PORT135_DATA,   PORT134_DATA,   PORT133_DATA,   PORT132_DATA,
2512                PORT131_DATA,   PORT130_DATA,   PORT129_DATA,   PORT128_DATA }
2513        },
2514        { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056814, 32) {
2515                PORT191_DATA,   PORT190_DATA,   PORT189_DATA,   PORT188_DATA,
2516                PORT187_DATA,   PORT186_DATA,   PORT185_DATA,   PORT184_DATA,
2517                PORT183_DATA,   PORT182_DATA,   PORT181_DATA,   PORT180_DATA,
2518                PORT179_DATA,   PORT178_DATA,   PORT177_DATA,   PORT176_DATA,
2519                PORT175_DATA,   PORT174_DATA,   PORT173_DATA,   PORT172_DATA,
2520                PORT171_DATA,   PORT170_DATA,   PORT169_DATA,   PORT168_DATA,
2521                PORT167_DATA,   PORT166_DATA,   PORT165_DATA,   PORT164_DATA,
2522                PORT163_DATA,   PORT162_DATA,   PORT161_DATA,   PORT160_DATA }
2523        },
2524        { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056818, 32) {
2525                0, 0, 0, 0,
2526                0, 0, 0, 0,
2527                0, 0, 0, 0,
2528                0, 0,                           PORT209_DATA,   PORT208_DATA,
2529                PORT207_DATA,   PORT206_DATA,   PORT205_DATA,   PORT204_DATA,
2530                PORT203_DATA,   PORT202_DATA,   PORT201_DATA,   PORT200_DATA,
2531                PORT199_DATA,   PORT198_DATA,   PORT197_DATA,   PORT196_DATA,
2532                PORT195_DATA,   PORT194_DATA,   PORT193_DATA,   PORT192_DATA }
2533        },
2534        { PINMUX_DATA_REG("PORTU223_192DR", 0xe6057818, 32) {
2535                0, 0, 0, 0,
2536                0, 0, 0, 0,
2537                0, 0, 0, 0,
2538                PORT211_DATA,   PORT210_DATA, 0, 0,
2539                0, 0, 0, 0,
2540                0, 0, 0, 0,
2541                0, 0, 0, 0,
2542                0, 0, 0, 0 }
2543        },
2544        { },
2545};
2546
2547static struct pinmux_irq pinmux_irqs[] = {
2548        PINMUX_IRQ(evt2irq(0x0200), PORT2_FN0,   PORT13_FN0),   /* IRQ0A */
2549        PINMUX_IRQ(evt2irq(0x0220), PORT20_FN0),                /* IRQ1A */
2550        PINMUX_IRQ(evt2irq(0x0240), PORT11_FN0,  PORT12_FN0),   /* IRQ2A */
2551        PINMUX_IRQ(evt2irq(0x0260), PORT10_FN0,  PORT14_FN0),   /* IRQ3A */
2552        PINMUX_IRQ(evt2irq(0x0280), PORT15_FN0,  PORT172_FN0),  /* IRQ4A */
2553        PINMUX_IRQ(evt2irq(0x02A0), PORT0_FN0,   PORT1_FN0),    /* IRQ5A */
2554        PINMUX_IRQ(evt2irq(0x02C0), PORT121_FN0, PORT173_FN0),  /* IRQ6A */
2555        PINMUX_IRQ(evt2irq(0x02E0), PORT120_FN0, PORT209_FN0),  /* IRQ7A */
2556        PINMUX_IRQ(evt2irq(0x0300), PORT119_FN0),               /* IRQ8A */
2557        PINMUX_IRQ(evt2irq(0x0320), PORT118_FN0, PORT210_FN0),  /* IRQ9A */
2558        PINMUX_IRQ(evt2irq(0x0340), PORT19_FN0),                /* IRQ10A */
2559        PINMUX_IRQ(evt2irq(0x0360), PORT104_FN0),               /* IRQ11A */
2560        PINMUX_IRQ(evt2irq(0x0380), PORT42_FN0,  PORT97_FN0),   /* IRQ12A */
2561        PINMUX_IRQ(evt2irq(0x03A0), PORT64_FN0,  PORT98_FN0),   /* IRQ13A */
2562        PINMUX_IRQ(evt2irq(0x03C0), PORT63_FN0,  PORT99_FN0),   /* IRQ14A */
2563        PINMUX_IRQ(evt2irq(0x03E0), PORT62_FN0,  PORT100_FN0),  /* IRQ15A */
2564        PINMUX_IRQ(evt2irq(0x3200), PORT68_FN0,  PORT211_FN0),  /* IRQ16A */
2565        PINMUX_IRQ(evt2irq(0x3220), PORT69_FN0),                /* IRQ17A */
2566        PINMUX_IRQ(evt2irq(0x3240), PORT70_FN0),                /* IRQ18A */
2567        PINMUX_IRQ(evt2irq(0x3260), PORT71_FN0),                /* IRQ19A */
2568        PINMUX_IRQ(evt2irq(0x3280), PORT67_FN0),                /* IRQ20A */
2569        PINMUX_IRQ(evt2irq(0x32A0), PORT202_FN0),               /* IRQ21A */
2570        PINMUX_IRQ(evt2irq(0x32C0), PORT95_FN0),                /* IRQ22A */
2571        PINMUX_IRQ(evt2irq(0x32E0), PORT96_FN0),                /* IRQ23A */
2572        PINMUX_IRQ(evt2irq(0x3300), PORT180_FN0),               /* IRQ24A */
2573        PINMUX_IRQ(evt2irq(0x3320), PORT38_FN0),                /* IRQ25A */
2574        PINMUX_IRQ(evt2irq(0x3340), PORT58_FN0,  PORT81_FN0),   /* IRQ26A */
2575        PINMUX_IRQ(evt2irq(0x3360), PORT57_FN0,  PORT168_FN0),  /* IRQ27A */
2576        PINMUX_IRQ(evt2irq(0x3380), PORT56_FN0,  PORT169_FN0),  /* IRQ28A */
2577        PINMUX_IRQ(evt2irq(0x33A0), PORT50_FN0,  PORT170_FN0),  /* IRQ29A */
2578        PINMUX_IRQ(evt2irq(0x33C0), PORT49_FN0,  PORT171_FN0),  /* IRQ30A */
2579        PINMUX_IRQ(evt2irq(0x33E0), PORT41_FN0,  PORT167_FN0),  /* IRQ31A */
2580};
2581
2582static struct pinmux_info r8a7740_pinmux_info = {
2583        .name           = "r8a7740_pfc",
2584        .reserved_id    = PINMUX_RESERVED,
2585        .data           = { PINMUX_DATA_BEGIN,
2586                            PINMUX_DATA_END },
2587        .input          = { PINMUX_INPUT_BEGIN,
2588                            PINMUX_INPUT_END },
2589        .input_pu       = { PINMUX_INPUT_PULLUP_BEGIN,
2590                            PINMUX_INPUT_PULLUP_END },
2591        .input_pd       = { PINMUX_INPUT_PULLDOWN_BEGIN,
2592                            PINMUX_INPUT_PULLDOWN_END },
2593        .output         = { PINMUX_OUTPUT_BEGIN,
2594                            PINMUX_OUTPUT_END },
2595        .mark           = { PINMUX_MARK_BEGIN,
2596                            PINMUX_MARK_END },
2597        .function       = { PINMUX_FUNCTION_BEGIN,
2598                            PINMUX_FUNCTION_END },
2599
2600        .first_gpio     = GPIO_PORT0,
2601        .last_gpio      = GPIO_FN_TRACEAUD_FROM_MEMC,
2602
2603        .gpios          = pinmux_gpios,
2604        .cfg_regs       = pinmux_config_regs,
2605        .data_regs      = pinmux_data_regs,
2606
2607        .gpio_data      = pinmux_data,
2608        .gpio_data_size = ARRAY_SIZE(pinmux_data),
2609
2610        .gpio_irq       = pinmux_irqs,
2611        .gpio_irq_size  = ARRAY_SIZE(pinmux_irqs),
2612};
2613
2614void r8a7740_pinmux_init(void)
2615{
2616        register_pinmux(&r8a7740_pinmux_info);
2617}
2618