LXR linux/arch/tile/include/asm/processor.h

   1/*
   2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
   3 *
   4 *   This program is free software; you can redistribute it and/or
   5 *   modify it under the terms of the GNU General Public License
   6 *   as published by the Free Software Foundation, version 2.
   7 *
   8 *   This program is distributed in the hope that it will be useful, but
   9 *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11 *   NON INFRINGEMENT.  See the GNU General Public License for
  12 *   more details.
  13 */
  14
  15#ifndef _ASM_TILE_PROCESSOR_H
  16#define _ASM_TILE_PROCESSOR_H
  17
  18#ifndef __ASSEMBLY__
  19
  20/*
  21 * NOTE: we don't include <linux/ptrace.h> or <linux/percpu.h> as one
  22 * normally would, due to #include dependencies.
  23 */
  24#include <linux/types.h>
  25#include <asm/ptrace.h>
  26#include <asm/percpu.h>
  27
  28#include <arch/chip.h>
  29#include <arch/spr_def.h>
  30
  31struct task_struct;
  32struct thread_struct;
  33
  34typedef struct {
  35        unsigned long seg;
  36} mm_segment_t;
  37
  38/*
  39 * Default implementation of macro that returns current
  40 * instruction pointer ("program counter").
  41 */
  42void *current_text_addr(void);
  43
  44#if CHIP_HAS_TILE_DMA()
  45/* Capture the state of a suspended DMA. */
  46struct tile_dma_state {
  47        int enabled;
  48        unsigned long src;
  49        unsigned long dest;
  50        unsigned long strides;
  51        unsigned long chunk_size;
  52        unsigned long src_chunk;
  53        unsigned long dest_chunk;
  54        unsigned long byte;
  55        unsigned long status;
  56};
  57
  58/*
  59 * A mask of the DMA status register for selecting only the 'running'
  60 * and 'done' bits.
  61 */
  62#define DMA_STATUS_MASK \
  63  (SPR_DMA_STATUS__RUNNING_MASK | SPR_DMA_STATUS__DONE_MASK)
  64#endif
  65
  66/*
  67 * Track asynchronous TLB events (faults and access violations)
  68 * that occur while we are in kernel mode from DMA or the SN processor.
  69 */
  70struct async_tlb {
  71        short fault_num;         /* original fault number; 0 if none */
  72        char is_fault;           /* was it a fault (vs an access violation) */
  73        char is_write;           /* for fault: was it caused by a write? */
  74        unsigned long address;   /* what address faulted? */
  75};
  76
  77#ifdef CONFIG_HARDWALL
  78struct hardwall_info;
  79struct hardwall_task {
  80        /* Which hardwall is this task tied to? (or NULL if none) */
  81        struct hardwall_info *info;
  82        /* Chains this task into the list at info->task_head. */
  83        struct list_head list;
  84};
  85#ifdef __tilepro__
  86#define HARDWALL_TYPES 1   /* udn */
  87#else
  88#define HARDWALL_TYPES 3   /* udn, idn, and ipi */
  89#endif
  90#endif
  91
  92struct thread_struct {
  93        /* kernel stack pointer */
  94        unsigned long  ksp;
  95        /* kernel PC */
  96        unsigned long  pc;
  97        /* starting user stack pointer (for page migration) */
  98        unsigned long  usp0;
  99        /* pid of process that created this one */
 100        pid_t creator_pid;
 101#if CHIP_HAS_TILE_DMA()
 102        /* DMA info for suspended threads (byte == 0 means no DMA state) */
 103        struct tile_dma_state tile_dma_state;
 104#endif
 105        /* User EX_CONTEXT registers */
 106        unsigned long ex_context[2];
 107        /* User SYSTEM_SAVE registers */
 108        unsigned long system_save[4];
 109        /* User interrupt mask */
 110        unsigned long long interrupt_mask;
 111        /* User interrupt-control 0 state */
 112        unsigned long intctrl_0;
 113#if CHIP_HAS_PROC_STATUS_SPR()
 114        /* Any other miscellaneous processor state bits */
 115        unsigned long proc_status;
 116#endif
 117#if !CHIP_HAS_FIXED_INTVEC_BASE()
 118        /* Interrupt base for PL0 interrupts */
 119        unsigned long interrupt_vector_base;
 120#endif
 121#if CHIP_HAS_TILE_RTF_HWM()
 122        /* Tile cache retry fifo high-water mark */
 123        unsigned long tile_rtf_hwm;
 124#endif
 125#if CHIP_HAS_DSTREAM_PF()
 126        /* Data stream prefetch control */
 127        unsigned long dstream_pf;
 128#endif
 129#ifdef CONFIG_HARDWALL
 130        /* Hardwall information for various resources. */
 131        struct hardwall_task hardwall[HARDWALL_TYPES];
 132#endif
 133#if CHIP_HAS_TILE_DMA()
 134        /* Async DMA TLB fault information */
 135        struct async_tlb dma_async_tlb;
 136#endif
 137#if CHIP_HAS_SN_PROC()
 138        /* Was static network processor when we were switched out? */
 139        int sn_proc_running;
 140        /* Async SNI TLB fault information */
 141        struct async_tlb sn_async_tlb;
 142#endif
 143};
 144
 145#endif /* !__ASSEMBLY__ */
 146
 147/*
 148 * Start with "sp" this many bytes below the top of the kernel stack.
 149 * This preserves the invariant that a called function may write to *sp.
 150 */
 151#define STACK_TOP_DELTA 8
 152
 153/*
 154 * When entering the kernel via a fault, start with the top of the
 155 * pt_regs structure this many bytes below the top of the page.
 156 * This aligns the pt_regs structure optimally for cache-line access.
 157 */
 158#ifdef __tilegx__
 159#define KSTK_PTREGS_GAP  48
 160#else
 161#define KSTK_PTREGS_GAP  56
 162#endif
 163
 164#ifndef __ASSEMBLY__
 165
 166#ifdef __tilegx__
 167#define TASK_SIZE_MAX           (MEM_LOW_END + 1)
 168#else
 169#define TASK_SIZE_MAX           PAGE_OFFSET
 170#endif
 171
 172/* TASK_SIZE and related variables are always checked in "current" context. */
 173#ifdef CONFIG_COMPAT
 174#define COMPAT_TASK_SIZE        (1UL << 31)
 175#define TASK_SIZE               ((current_thread_info()->status & TS_COMPAT) ?\
 176                                 COMPAT_TASK_SIZE : TASK_SIZE_MAX)
 177#else
 178#define TASK_SIZE               TASK_SIZE_MAX
 179#endif
 180
 181/* We provide a minimal "vdso" a la x86; just the sigreturn code for now. */
 182#define VDSO_BASE               (TASK_SIZE - PAGE_SIZE)
 183
 184#define STACK_TOP               VDSO_BASE
 185
 186/* STACK_TOP_MAX is used temporarily in execve and should not check COMPAT. */
 187#define STACK_TOP_MAX           TASK_SIZE_MAX
 188
 189/*
 190 * This decides where the kernel will search for a free chunk of vm
 191 * space during mmap's, if it is using bottom-up mapping.
 192 */
 193#define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))
 194
 195#define HAVE_ARCH_PICK_MMAP_LAYOUT
 196
 197#define INIT_THREAD {                                                   \
 198        .ksp = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA, \
 199        .interrupt_mask = -1ULL                                         \
 200}
 201
 202/* Kernel stack top for the task that first boots on this cpu. */
 203DECLARE_PER_CPU(unsigned long, boot_sp);
 204
 205/* PC to boot from on this cpu. */
 206DECLARE_PER_CPU(unsigned long, boot_pc);
 207
 208/* Do necessary setup to start up a newly executed thread. */
 209static inline void start_thread(struct pt_regs *regs,
 210                                unsigned long pc, unsigned long usp)
 211{
 212        regs->pc = pc;
 213        regs->sp = usp;
 214}
 215
 216/* Free all resources held by a thread. */
 217static inline void release_thread(struct task_struct *dead_task)
 218{
 219        /* Nothing for now */
 220}
 221
 222extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
 223
 224extern int do_work_pending(struct pt_regs *regs, u32 flags);
 225
 226
 227/*
 228 * Return saved (kernel) PC of a blocked thread.
 229 * Only used in a printk() in kernel/sched.c, so don't work too hard.
 230 */
 231#define thread_saved_pc(t)   ((t)->thread.pc)
 232
 233unsigned long get_wchan(struct task_struct *p);
 234
 235/* Return initial ksp value for given task. */
 236#define task_ksp0(task) ((unsigned long)(task)->stack + THREAD_SIZE)
 237
 238/* Return some info about the user process TASK. */
 239#define KSTK_TOP(task)  (task_ksp0(task) - STACK_TOP_DELTA)
 240#define task_pt_regs(task) \
 241  ((struct pt_regs *)(task_ksp0(task) - KSTK_PTREGS_GAP) - 1)
 242#define task_sp(task)   (task_pt_regs(task)->sp)
 243#define task_pc(task)   (task_pt_regs(task)->pc)
 244/* Aliases for pc and sp (used in fs/proc/array.c) */
 245#define KSTK_EIP(task)  task_pc(task)
 246#define KSTK_ESP(task)  task_sp(task)
 247
 248/* Standard format for printing registers and other word-size data. */
 249#ifdef __tilegx__
 250# define REGFMT "0x%016lx"
 251#else
 252# define REGFMT "0x%08lx"
 253#endif
 254
 255/*
 256 * Do some slow action (e.g. read a slow SPR).
 257 * Note that this must also have compiler-barrier semantics since
 258 * it may be used in a busy loop reading memory.
 259 */
 260static inline void cpu_relax(void)
 261{
 262        __insn_mfspr(SPR_PASS);
 263        barrier();
 264}
 265
 266/* Info on this processor (see fs/proc/cpuinfo.c) */
 267struct seq_operations;
 268extern const struct seq_operations cpuinfo_op;
 269
 270/* Provide information about the chip model. */
 271extern char chip_model[64];
 272
 273/* Data on which physical memory controller corresponds to which NUMA node. */
 274extern int node_controller[];
 275
 276#if CHIP_HAS_CBOX_HOME_MAP()
 277/* Does the heap allocator return hash-for-home pages by default? */
 278extern int hash_default;
 279
 280/* Should kernel stack pages be hash-for-home? */
 281extern int kstack_hash;
 282
 283/* Does MAP_ANONYMOUS return hash-for-home pages by default? */
 284#define uheap_hash hash_default
 285
 286#else
 287#define hash_default 0
 288#define kstack_hash 0
 289#define uheap_hash 0
 290#endif
 291
 292/* Are we using huge pages in the TLB for kernel data? */
 293extern int kdata_huge;
 294
 295/* Support standard Linux prefetching. */
 296#define ARCH_HAS_PREFETCH
 297#define prefetch(x) __builtin_prefetch(x)
 298#define PREFETCH_STRIDE CHIP_L2_LINE_SIZE()
 299
 300/* Bring a value into the L1D, faulting the TLB if necessary. */
 301#ifdef __tilegx__
 302#define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x))
 303#else
 304#define prefetch_L1(x) __insn_prefetch_L1((void *)(x))
 305#endif
 306
 307#else /* __ASSEMBLY__ */
 308
 309/* Do some slow action (e.g. read a slow SPR). */
 310#define CPU_RELAX       mfspr zero, SPR_PASS
 311
 312#endif /* !__ASSEMBLY__ */
 313
 314/* Assembly code assumes that the PL is in the low bits. */
 315#if SPR_EX_CONTEXT_1_1__PL_SHIFT != 0
 316# error Fix assembly assumptions about PL
 317#endif
 318
 319/* We sometimes use these macros for EX_CONTEXT_0_1 as well. */
 320#if SPR_EX_CONTEXT_1_1__PL_SHIFT != SPR_EX_CONTEXT_0_1__PL_SHIFT || \
 321    SPR_EX_CONTEXT_1_1__PL_RMASK != SPR_EX_CONTEXT_0_1__PL_RMASK || \
 322    SPR_EX_CONTEXT_1_1__ICS_SHIFT != SPR_EX_CONTEXT_0_1__ICS_SHIFT || \
 323    SPR_EX_CONTEXT_1_1__ICS_RMASK != SPR_EX_CONTEXT_0_1__ICS_RMASK
 324# error Fix assumptions that EX1 macros work for both PL0 and PL1
 325#endif
 326
 327/* Allow pulling apart and recombining the PL and ICS bits in EX_CONTEXT. */
 328#define EX1_PL(ex1) \
 329  (((ex1) >> SPR_EX_CONTEXT_1_1__PL_SHIFT) & SPR_EX_CONTEXT_1_1__PL_RMASK)
 330#define EX1_ICS(ex1) \
 331  (((ex1) >> SPR_EX_CONTEXT_1_1__ICS_SHIFT) & SPR_EX_CONTEXT_1_1__ICS_RMASK)
 332#define PL_ICS_EX1(pl, ics) \
 333  (((pl) << SPR_EX_CONTEXT_1_1__PL_SHIFT) | \
 334   ((ics) << SPR_EX_CONTEXT_1_1__ICS_SHIFT))
 335
 336/*
 337 * Provide symbolic constants for PLs.
 338 * Note that assembly code assumes that USER_PL is zero.
 339 */
 340#define USER_PL 0
 341#if CONFIG_KERNEL_PL == 2
 342#define GUEST_PL 1
 343#endif
 344#define KERNEL_PL CONFIG_KERNEL_PL
 345
 346/* SYSTEM_SAVE_K_0 holds the current cpu number ORed with ksp0. */
 347#define CPU_LOG_MASK_VALUE 12
 348#define CPU_MASK_VALUE ((1 << CPU_LOG_MASK_VALUE) - 1)
 349#if CONFIG_NR_CPUS > CPU_MASK_VALUE
 350# error Too many cpus!
 351#endif
 352#define raw_smp_processor_id() \
 353        ((int)__insn_mfspr(SPR_SYSTEM_SAVE_K_0) & CPU_MASK_VALUE)
 354#define get_current_ksp0() \
 355        (__insn_mfspr(SPR_SYSTEM_SAVE_K_0) & ~CPU_MASK_VALUE)
 356#define next_current_ksp0(task) ({ \
 357        unsigned long __ksp0 = task_ksp0(task); \
 358        int __cpu = raw_smp_processor_id(); \
 359        BUG_ON(__ksp0 & CPU_MASK_VALUE); \
 360        __ksp0 | __cpu; \
 361})
 362
 363#endif /* _ASM_TILE_PROCESSOR_H */
 364