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20#include <linux/err.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/clk.h>
24#include <linux/module.h>
25#include <linux/io.h>
26#include <linux/gpio.h>
27#include <linux/mmc/card.h>
28#include <linux/mmc/host.h>
29#include <linux/platform_data/pxa_sdhci.h>
30#include <linux/slab.h>
31#include <linux/of.h>
32#include <linux/of_device.h>
33
34#include "sdhci.h"
35#include "sdhci-pltfm.h"
36
37#define SD_FIFO_PARAM 0xe0
38#define DIS_PAD_SD_CLK_GATE 0x0400
39#define CLK_GATE_ON 0x0200
40#define CLK_GATE_CTL 0x0100
41#define CLK_GATE_SETTING_BITS (DIS_PAD_SD_CLK_GATE | \
42 CLK_GATE_ON | CLK_GATE_CTL)
43
44#define SD_CLOCK_BURST_SIZE_SETUP 0xe6
45#define SDCLK_SEL_SHIFT 8
46#define SDCLK_SEL_MASK 0x3
47#define SDCLK_DELAY_SHIFT 10
48#define SDCLK_DELAY_MASK 0x3c
49
50#define SD_CE_ATA_2 0xea
51#define MMC_CARD 0x1000
52#define MMC_WIDTH 0x0100
53
54static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask)
55{
56 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
57 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
58
59 if (mask == SDHCI_RESET_ALL) {
60 u16 tmp = 0;
61
62
63
64
65
66 if (pdata && pdata->clk_delay_sel == 1) {
67 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP);
68
69 tmp &= ~(SDCLK_DELAY_MASK << SDCLK_DELAY_SHIFT);
70 tmp |= (pdata->clk_delay_cycles & SDCLK_DELAY_MASK)
71 << SDCLK_DELAY_SHIFT;
72 tmp &= ~(SDCLK_SEL_MASK << SDCLK_SEL_SHIFT);
73 tmp |= (1 & SDCLK_SEL_MASK) << SDCLK_SEL_SHIFT;
74
75 writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP);
76 }
77
78 if (pdata && (pdata->flags & PXA_FLAG_ENABLE_CLOCK_GATING)) {
79 tmp = readw(host->ioaddr + SD_FIFO_PARAM);
80 tmp &= ~CLK_GATE_SETTING_BITS;
81 writew(tmp, host->ioaddr + SD_FIFO_PARAM);
82 } else {
83 tmp = readw(host->ioaddr + SD_FIFO_PARAM);
84 tmp &= ~CLK_GATE_SETTING_BITS;
85 tmp |= CLK_GATE_SETTING_BITS;
86 writew(tmp, host->ioaddr + SD_FIFO_PARAM);
87 }
88 }
89}
90
91static int pxav2_mmc_set_width(struct sdhci_host *host, int width)
92{
93 u8 ctrl;
94 u16 tmp;
95
96 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
97 tmp = readw(host->ioaddr + SD_CE_ATA_2);
98 if (width == MMC_BUS_WIDTH_8) {
99 ctrl &= ~SDHCI_CTRL_4BITBUS;
100 tmp |= MMC_CARD | MMC_WIDTH;
101 } else {
102 tmp &= ~(MMC_CARD | MMC_WIDTH);
103 if (width == MMC_BUS_WIDTH_4)
104 ctrl |= SDHCI_CTRL_4BITBUS;
105 else
106 ctrl &= ~SDHCI_CTRL_4BITBUS;
107 }
108 writew(tmp, host->ioaddr + SD_CE_ATA_2);
109 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
110
111 return 0;
112}
113
114static u32 pxav2_get_max_clock(struct sdhci_host *host)
115{
116 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
117
118 return clk_get_rate(pltfm_host->clk);
119}
120
121static struct sdhci_ops pxav2_sdhci_ops = {
122 .get_max_clock = pxav2_get_max_clock,
123 .platform_reset_exit = pxav2_set_private_registers,
124 .platform_8bit_width = pxav2_mmc_set_width,
125};
126
127#ifdef CONFIG_OF
128static const struct of_device_id sdhci_pxav2_of_match[] = {
129 {
130 .compatible = "mrvl,pxav2-mmc",
131 },
132 {},
133};
134MODULE_DEVICE_TABLE(of, sdhci_pxav2_of_match);
135
136static struct sdhci_pxa_platdata *pxav2_get_mmc_pdata(struct device *dev)
137{
138 struct sdhci_pxa_platdata *pdata;
139 struct device_node *np = dev->of_node;
140 u32 bus_width;
141 u32 clk_delay_cycles;
142
143 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
144 if (!pdata)
145 return NULL;
146
147 if (of_find_property(np, "non-removable", NULL))
148 pdata->flags |= PXA_FLAG_CARD_PERMANENT;
149
150 of_property_read_u32(np, "bus-width", &bus_width);
151 if (bus_width == 8)
152 pdata->flags |= PXA_FLAG_SD_8_BIT_CAPABLE_SLOT;
153
154 of_property_read_u32(np, "mrvl,clk-delay-cycles", &clk_delay_cycles);
155 if (clk_delay_cycles > 0) {
156 pdata->clk_delay_sel = 1;
157 pdata->clk_delay_cycles = clk_delay_cycles;
158 }
159
160 return pdata;
161}
162#else
163static inline struct sdhci_pxa_platdata *pxav2_get_mmc_pdata(struct device *dev)
164{
165 return NULL;
166}
167#endif
168
169static int __devinit sdhci_pxav2_probe(struct platform_device *pdev)
170{
171 struct sdhci_pltfm_host *pltfm_host;
172 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
173 struct device *dev = &pdev->dev;
174 struct sdhci_host *host = NULL;
175 struct sdhci_pxa *pxa = NULL;
176 const struct of_device_id *match;
177
178 int ret;
179 struct clk *clk;
180
181 pxa = kzalloc(sizeof(struct sdhci_pxa), GFP_KERNEL);
182 if (!pxa)
183 return -ENOMEM;
184
185 host = sdhci_pltfm_init(pdev, NULL);
186 if (IS_ERR(host)) {
187 kfree(pxa);
188 return PTR_ERR(host);
189 }
190 pltfm_host = sdhci_priv(host);
191 pltfm_host->priv = pxa;
192
193 clk = clk_get(dev, "PXA-SDHCLK");
194 if (IS_ERR(clk)) {
195 dev_err(dev, "failed to get io clock\n");
196 ret = PTR_ERR(clk);
197 goto err_clk_get;
198 }
199 pltfm_host->clk = clk;
200 clk_prepare_enable(clk);
201
202 host->quirks = SDHCI_QUIRK_BROKEN_ADMA
203 | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
204 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
205
206 match = of_match_device(of_match_ptr(sdhci_pxav2_of_match), &pdev->dev);
207 if (match) {
208 pdata = pxav2_get_mmc_pdata(dev);
209 }
210 if (pdata) {
211 if (pdata->flags & PXA_FLAG_CARD_PERMANENT) {
212
213 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
214 host->mmc->caps |= MMC_CAP_NONREMOVABLE;
215 }
216
217
218 if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT)
219 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
220
221 if (pdata->quirks)
222 host->quirks |= pdata->quirks;
223 if (pdata->host_caps)
224 host->mmc->caps |= pdata->host_caps;
225 if (pdata->pm_caps)
226 host->mmc->pm_caps |= pdata->pm_caps;
227 }
228
229 host->ops = &pxav2_sdhci_ops;
230
231 ret = sdhci_add_host(host);
232 if (ret) {
233 dev_err(&pdev->dev, "failed to add host\n");
234 goto err_add_host;
235 }
236
237 platform_set_drvdata(pdev, host);
238
239 return 0;
240
241err_add_host:
242 clk_disable_unprepare(clk);
243 clk_put(clk);
244err_clk_get:
245 sdhci_pltfm_free(pdev);
246 kfree(pxa);
247 return ret;
248}
249
250static int __devexit sdhci_pxav2_remove(struct platform_device *pdev)
251{
252 struct sdhci_host *host = platform_get_drvdata(pdev);
253 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
254 struct sdhci_pxa *pxa = pltfm_host->priv;
255
256 sdhci_remove_host(host, 1);
257
258 clk_disable_unprepare(pltfm_host->clk);
259 clk_put(pltfm_host->clk);
260 sdhci_pltfm_free(pdev);
261 kfree(pxa);
262
263 platform_set_drvdata(pdev, NULL);
264
265 return 0;
266}
267
268static struct platform_driver sdhci_pxav2_driver = {
269 .driver = {
270 .name = "sdhci-pxav2",
271 .owner = THIS_MODULE,
272#ifdef CONFIG_OF
273 .of_match_table = sdhci_pxav2_of_match,
274#endif
275 .pm = SDHCI_PLTFM_PMOPS,
276 },
277 .probe = sdhci_pxav2_probe,
278 .remove = __devexit_p(sdhci_pxav2_remove),
279};
280
281module_platform_driver(sdhci_pxav2_driver);
282
283MODULE_DESCRIPTION("SDHCI driver for pxav2");
284MODULE_AUTHOR("Marvell International Ltd.");
285MODULE_LICENSE("GPL v2");
286
287
