linux/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
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   1/*
   2 * Freescale GPMI NAND Flash Driver
   3 *
   4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
   5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 */
  17#ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H
  18#define __DRIVERS_MTD_NAND_GPMI_NAND_H
  19
  20#include <linux/mtd/nand.h>
  21#include <linux/platform_device.h>
  22#include <linux/dma-mapping.h>
  23#include <linux/fsl/mxs-dma.h>
  24
  25#define GPMI_CLK_MAX 5 /* MX6Q needs five clocks */
  26struct resources {
  27        void __iomem  *gpmi_regs;
  28        void __iomem  *bch_regs;
  29        unsigned int  bch_low_interrupt;
  30        unsigned int  bch_high_interrupt;
  31        unsigned int  dma_low_channel;
  32        unsigned int  dma_high_channel;
  33        struct clk    *clock[GPMI_CLK_MAX];
  34};
  35
  36/**
  37 * struct bch_geometry - BCH geometry description.
  38 * @gf_len:                   The length of Galois Field. (e.g., 13 or 14)
  39 * @ecc_strength:             A number that describes the strength of the ECC
  40 *                            algorithm.
  41 * @page_size:                The size, in bytes, of a physical page, including
  42 *                            both data and OOB.
  43 * @metadata_size:            The size, in bytes, of the metadata.
  44 * @ecc_chunk_size:           The size, in bytes, of a single ECC chunk. Note
  45 *                            the first chunk in the page includes both data and
  46 *                            metadata, so it's a bit larger than this value.
  47 * @ecc_chunk_count:          The number of ECC chunks in the page,
  48 * @payload_size:             The size, in bytes, of the payload buffer.
  49 * @auxiliary_size:           The size, in bytes, of the auxiliary buffer.
  50 * @auxiliary_status_offset:  The offset into the auxiliary buffer at which
  51 *                            the ECC status appears.
  52 * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
  53 *                            which the underlying physical block mark appears.
  54 * @block_mark_bit_offset:    The bit offset into the ECC-based page view at
  55 *                            which the underlying physical block mark appears.
  56 */
  57struct bch_geometry {
  58        unsigned int  gf_len;
  59        unsigned int  ecc_strength;
  60        unsigned int  page_size;
  61        unsigned int  metadata_size;
  62        unsigned int  ecc_chunk_size;
  63        unsigned int  ecc_chunk_count;
  64        unsigned int  payload_size;
  65        unsigned int  auxiliary_size;
  66        unsigned int  auxiliary_status_offset;
  67        unsigned int  block_mark_byte_offset;
  68        unsigned int  block_mark_bit_offset;
  69};
  70
  71/**
  72 * struct boot_rom_geometry - Boot ROM geometry description.
  73 * @stride_size_in_pages:        The size of a boot block stride, in pages.
  74 * @search_area_stride_exponent: The logarithm to base 2 of the size of a
  75 *                               search area in boot block strides.
  76 */
  77struct boot_rom_geometry {
  78        unsigned int  stride_size_in_pages;
  79        unsigned int  search_area_stride_exponent;
  80};
  81
  82/* DMA operations types */
  83enum dma_ops_type {
  84        DMA_FOR_COMMAND = 1,
  85        DMA_FOR_READ_DATA,
  86        DMA_FOR_WRITE_DATA,
  87        DMA_FOR_READ_ECC_PAGE,
  88        DMA_FOR_WRITE_ECC_PAGE
  89};
  90
  91/**
  92 * struct nand_timing - Fundamental timing attributes for NAND.
  93 * @data_setup_in_ns:         The data setup time, in nanoseconds. Usually the
  94 *                            maximum of tDS and tWP. A negative value
  95 *                            indicates this characteristic isn't known.
  96 * @data_hold_in_ns:          The data hold time, in nanoseconds. Usually the
  97 *                            maximum of tDH, tWH and tREH. A negative value
  98 *                            indicates this characteristic isn't known.
  99 * @address_setup_in_ns:      The address setup time, in nanoseconds. Usually
 100 *                            the maximum of tCLS, tCS and tALS. A negative
 101 *                            value indicates this characteristic isn't known.
 102 * @gpmi_sample_delay_in_ns:  A GPMI-specific timing parameter. A negative value
 103 *                            indicates this characteristic isn't known.
 104 * @tREA_in_ns:               tREA, in nanoseconds, from the data sheet. A
 105 *                            negative value indicates this characteristic isn't
 106 *                            known.
 107 * @tRLOH_in_ns:              tRLOH, in nanoseconds, from the data sheet. A
 108 *                            negative value indicates this characteristic isn't
 109 *                            known.
 110 * @tRHOH_in_ns:              tRHOH, in nanoseconds, from the data sheet. A
 111 *                            negative value indicates this characteristic isn't
 112 *                            known.
 113 */
 114struct nand_timing {
 115        int8_t  data_setup_in_ns;
 116        int8_t  data_hold_in_ns;
 117        int8_t  address_setup_in_ns;
 118        int8_t  gpmi_sample_delay_in_ns;
 119        int8_t  tREA_in_ns;
 120        int8_t  tRLOH_in_ns;
 121        int8_t  tRHOH_in_ns;
 122};
 123
 124struct gpmi_nand_data {
 125        /* flags */
 126#define GPMI_ASYNC_EDO_ENABLED  (1 << 0)
 127#define GPMI_TIMING_INIT_OK     (1 << 1)
 128        int                     flags;
 129
 130        /* System Interface */
 131        struct device           *dev;
 132        struct platform_device  *pdev;
 133        struct gpmi_nand_platform_data  *pdata;
 134
 135        /* Resources */
 136        struct resources        resources;
 137
 138        /* Flash Hardware */
 139        struct nand_timing      timing;
 140        int                     timing_mode;
 141
 142        /* BCH */
 143        struct bch_geometry     bch_geometry;
 144        struct completion       bch_done;
 145
 146        /* NAND Boot issue */
 147        bool                    swap_block_mark;
 148        struct boot_rom_geometry rom_geometry;
 149
 150        /* MTD / NAND */
 151        struct nand_chip        nand;
 152        struct mtd_info         mtd;
 153
 154        /* General-use Variables */
 155        int                     current_chip;
 156        unsigned int            command_length;
 157
 158        /* passed from upper layer */
 159        uint8_t                 *upper_buf;
 160        int                     upper_len;
 161
 162        /* for DMA operations */
 163        bool                    direct_dma_map_ok;
 164
 165        struct scatterlist      cmd_sgl;
 166        char                    *cmd_buffer;
 167
 168        struct scatterlist      data_sgl;
 169        char                    *data_buffer_dma;
 170
 171        void                    *page_buffer_virt;
 172        dma_addr_t              page_buffer_phys;
 173        unsigned int            page_buffer_size;
 174
 175        void                    *payload_virt;
 176        dma_addr_t              payload_phys;
 177
 178        void                    *auxiliary_virt;
 179        dma_addr_t              auxiliary_phys;
 180
 181        /* DMA channels */
 182#define DMA_CHANS               8
 183        struct dma_chan         *dma_chans[DMA_CHANS];
 184        struct mxs_dma_data     dma_data;
 185        enum dma_ops_type       last_dma_type;
 186        enum dma_ops_type       dma_type;
 187        struct completion       dma_done;
 188
 189        /* private */
 190        void                    *private;
 191};
 192
 193/**
 194 * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters.
 195 * @data_setup_in_cycles:      The data setup time, in cycles.
 196 * @data_hold_in_cycles:       The data hold time, in cycles.
 197 * @address_setup_in_cycles:   The address setup time, in cycles.
 198 * @device_busy_timeout:       The timeout waiting for NAND Ready/Busy,
 199 *                             this value is the number of cycles multiplied
 200 *                             by 4096.
 201 * @use_half_periods:          Indicates the clock is running slowly, so the
 202 *                             NFC DLL should use half-periods.
 203 * @sample_delay_factor:       The sample delay factor.
 204 * @wrn_dly_sel:               The delay on the GPMI write strobe.
 205 */
 206struct gpmi_nfc_hardware_timing {
 207        /* for HW_GPMI_TIMING0 */
 208        uint8_t  data_setup_in_cycles;
 209        uint8_t  data_hold_in_cycles;
 210        uint8_t  address_setup_in_cycles;
 211
 212        /* for HW_GPMI_TIMING1 */
 213        uint16_t device_busy_timeout;
 214#define GPMI_DEFAULT_BUSY_TIMEOUT       0x500 /* default busy timeout value.*/
 215
 216        /* for HW_GPMI_CTRL1 */
 217        bool     use_half_periods;
 218        uint8_t  sample_delay_factor;
 219        uint8_t  wrn_dly_sel;
 220};
 221
 222/**
 223 * struct timing_threshod - Timing threshold
 224 * @max_data_setup_cycles:       The maximum number of data setup cycles that
 225 *                               can be expressed in the hardware.
 226 * @internal_data_setup_in_ns:   The time, in ns, that the NFC hardware requires
 227 *                               for data read internal setup. In the Reference
 228 *                               Manual, see the chapter "High-Speed NAND
 229 *                               Timing" for more details.
 230 * @max_sample_delay_factor:     The maximum sample delay factor that can be
 231 *                               expressed in the hardware.
 232 * @max_dll_clock_period_in_ns:  The maximum period of the GPMI clock that the
 233 *                               sample delay DLL hardware can possibly work
 234 *                               with (the DLL is unusable with longer periods).
 235 *                               If the full-cycle period is greater than HALF
 236 *                               this value, the DLL must be configured to use
 237 *                               half-periods.
 238 * @max_dll_delay_in_ns:         The maximum amount of delay, in ns, that the
 239 *                               DLL can implement.
 240 * @clock_frequency_in_hz:       The clock frequency, in Hz, during the current
 241 *                               I/O transaction. If no I/O transaction is in
 242 *                               progress, this is the clock frequency during
 243 *                               the most recent I/O transaction.
 244 */
 245struct timing_threshod {
 246        const unsigned int      max_chip_count;
 247        const unsigned int      max_data_setup_cycles;
 248        const unsigned int      internal_data_setup_in_ns;
 249        const unsigned int      max_sample_delay_factor;
 250        const unsigned int      max_dll_clock_period_in_ns;
 251        const unsigned int      max_dll_delay_in_ns;
 252        unsigned long           clock_frequency_in_hz;
 253
 254};
 255
 256/* Common Services */
 257extern int common_nfc_set_geometry(struct gpmi_nand_data *);
 258extern struct dma_chan *get_dma_chan(struct gpmi_nand_data *);
 259extern void prepare_data_dma(struct gpmi_nand_data *,
 260                                enum dma_data_direction dr);
 261extern int start_dma_without_bch_irq(struct gpmi_nand_data *,
 262                                struct dma_async_tx_descriptor *);
 263extern int start_dma_with_bch_irq(struct gpmi_nand_data *,
 264                                struct dma_async_tx_descriptor *);
 265
 266/* GPMI-NAND helper function library */
 267extern int gpmi_init(struct gpmi_nand_data *);
 268extern int gpmi_extra_init(struct gpmi_nand_data *);
 269extern void gpmi_clear_bch(struct gpmi_nand_data *);
 270extern void gpmi_dump_info(struct gpmi_nand_data *);
 271extern int bch_set_geometry(struct gpmi_nand_data *);
 272extern int gpmi_is_ready(struct gpmi_nand_data *, unsigned chip);
 273extern int gpmi_send_command(struct gpmi_nand_data *);
 274extern void gpmi_begin(struct gpmi_nand_data *);
 275extern void gpmi_end(struct gpmi_nand_data *);
 276extern int gpmi_read_data(struct gpmi_nand_data *);
 277extern int gpmi_send_data(struct gpmi_nand_data *);
 278extern int gpmi_send_page(struct gpmi_nand_data *,
 279                        dma_addr_t payload, dma_addr_t auxiliary);
 280extern int gpmi_read_page(struct gpmi_nand_data *,
 281                        dma_addr_t payload, dma_addr_t auxiliary);
 282
 283/* BCH : Status Block Completion Codes */
 284#define STATUS_GOOD             0x00
 285#define STATUS_ERASED           0xff
 286#define STATUS_UNCORRECTABLE    0xfe
 287
 288/* Use the platform_id to distinguish different Archs. */
 289#define IS_MX23                 0x0
 290#define IS_MX28                 0x1
 291#define IS_MX6Q                 0x2
 292#define GPMI_IS_MX23(x)         ((x)->pdev->id_entry->driver_data == IS_MX23)
 293#define GPMI_IS_MX28(x)         ((x)->pdev->id_entry->driver_data == IS_MX28)
 294#define GPMI_IS_MX6Q(x)         ((x)->pdev->id_entry->driver_data == IS_MX6Q)
 295#endif
 296
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