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58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
60#define DBG 1
61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
65
66#include <linux/kernel.h>
67#include <linux/string.h>
68#include <linux/errno.h>
69#include <linux/ioport.h>
70#include <linux/slab.h>
71#include <linux/interrupt.h>
72#include <linux/timer.h>
73#include <linux/pci.h>
74#include <linux/spinlock.h>
75#include <linux/init.h>
76#include <linux/bitops.h>
77#include <linux/io.h>
78#include <linux/netdevice.h>
79#include <linux/etherdevice.h>
80#include <linux/skbuff.h>
81#include <linux/delay.h>
82#include <linux/debugfs.h>
83#include <linux/seq_file.h>
84#include <linux/kthread.h>
85#include <linux/module.h>
86#include <linux/moduleparam.h>
87
88#include <linux/firmware.h>
89#include <linux/types.h>
90#include <linux/dma-mapping.h>
91#include <linux/mii.h>
92#include <linux/if_vlan.h>
93#include <asm/unaligned.h>
94
95#include <linux/ethtool.h>
96#include <linux/uaccess.h>
97#include "slichw.h"
98#include "slic.h"
99
100static uint slic_first_init = 1;
101static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
102 "and Storage Accelerator (Non-Accelerated)";
103
104static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
105static char *slic_product_name = "SLIC Technology(tm) Server "\
106 "and Storage Accelerator (Non-Accelerated)";
107static char *slic_vendor = "Alacritech, Inc.";
108
109static int slic_debug = 1;
110static int debug = -1;
111static struct net_device *head_netdevice;
112
113static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
114static int intagg_delay = 100;
115static u32 dynamic_intagg;
116static unsigned int rcv_count;
117static struct dentry *slic_debugfs;
118
119#define DRV_NAME "slicoss"
120#define DRV_VERSION "2.0.1"
121#define DRV_AUTHOR "Alacritech, Inc. Engineering"
122#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
123 "Non-Accelerated Driver"
124#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
125 "All rights reserved."
126#define PFX DRV_NAME " "
127
128MODULE_AUTHOR(DRV_AUTHOR);
129MODULE_DESCRIPTION(DRV_DESCRIPTION);
130MODULE_LICENSE("Dual BSD/GPL");
131
132module_param(dynamic_intagg, int, 0);
133MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
134module_param(intagg_delay, int, 0);
135MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
136
137static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = {
138 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
139 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
140 { 0 }
141};
142
143MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
144
145#ifdef ASSERT
146#undef ASSERT
147#endif
148
149static void slic_assert_fail(void)
150{
151 u32 cpuid;
152 u32 curr_pid;
153 cpuid = smp_processor_id();
154 curr_pid = current->pid;
155
156 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
157 __func__, cpuid, curr_pid);
158}
159
160#ifndef ASSERT
161#define ASSERT(a) do { \
162 if (!(a)) { \
163 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
164 "line %d\n", __func__, __LINE__); \
165 slic_assert_fail(); \
166 } \
167} while (0)
168#endif
169
170
171#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
172{ \
173 spin_lock_irqsave(&_adapter->handle_lock.lock, \
174 _adapter->handle_lock.flags); \
175 _pslic_handle = _adapter->pfree_slic_handles; \
176 if (_pslic_handle) { \
177 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
178 _adapter->pfree_slic_handles = _pslic_handle->next; \
179 } \
180 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
181 _adapter->handle_lock.flags); \
182}
183
184#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
185{ \
186 _pslic_handle->type = SLIC_HANDLE_FREE; \
187 spin_lock_irqsave(&_adapter->handle_lock.lock, \
188 _adapter->handle_lock.flags); \
189 _pslic_handle->next = _adapter->pfree_slic_handles; \
190 _adapter->pfree_slic_handles = _pslic_handle; \
191 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
192 _adapter->handle_lock.flags); \
193}
194
195static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
196{
197 writel(value, reg);
198 if (flush)
199 mb();
200}
201
202static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
203 u32 value, void __iomem *regh, u32 paddrh,
204 bool flush)
205{
206 spin_lock_irqsave(&adapter->bit64reglock.lock,
207 adapter->bit64reglock.flags);
208 if (paddrh != adapter->curaddrupper) {
209 adapter->curaddrupper = paddrh;
210 writel(paddrh, regh);
211 }
212 writel(value, reg);
213 if (flush)
214 mb();
215 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
216 adapter->bit64reglock.flags);
217}
218
219
220
221
222
223
224
225
226
227
228
229
230
231static u32 slic_crc_table[256];
232static u32 slic_crc_init;
233
234
235
236
237static void slic_mcast_init_crc32(void)
238{
239 u32 c;
240 u32 e = 0;
241 int i;
242 int k;
243
244 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
245
246 for (i = 0; i < ARRAY_SIZE(p); i++)
247 e |= 1L << (31 - p[i]);
248
249 for (i = 1; i < 256; i++) {
250 c = i;
251 for (k = 8; k; k--)
252 c = c & 1 ? (c >> 1) ^ e : c >> 1;
253 slic_crc_table[i] = c;
254 }
255}
256
257
258
259
260static unsigned char slic_mcast_get_mac_hash(char *macaddr)
261{
262 u32 crc;
263 char *p;
264 int i;
265 unsigned char machash = 0;
266
267 if (!slic_crc_init) {
268 slic_mcast_init_crc32();
269 slic_crc_init = 1;
270 }
271
272 crc = 0xFFFFFFFF;
273 for (i = 0, p = macaddr; i < 6; ++p, ++i)
274 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
275
276
277 for (i = 1; i < 9; i++)
278 machash |= (((crc >> i) & 1) << (8 - i));
279
280 return machash;
281}
282
283static void slic_mcast_set_bit(struct adapter *adapter, char *address)
284{
285 unsigned char crcpoly;
286
287
288 crcpoly = slic_mcast_get_mac_hash(address);
289
290
291
292
293 crcpoly &= 0x3F;
294
295
296 adapter->mcastmask |= (u64) 1 << crcpoly;
297}
298
299static void slic_mcast_set_mask(struct adapter *adapter)
300{
301 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
302
303 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
304
305
306
307
308
309 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
310 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
311 FLUSH);
312 } else {
313
314
315
316 slic_reg32_write(&slic_regs->slic_mcastlow,
317 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
318 slic_reg32_write(&slic_regs->slic_mcasthigh,
319 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
320 }
321}
322
323static void slic_timer_ping(ulong dev)
324{
325 struct adapter *adapter;
326 struct sliccard *card;
327
328 ASSERT(dev);
329 adapter = netdev_priv((struct net_device *)dev);
330 ASSERT(adapter);
331 card = adapter->card;
332 ASSERT(card);
333
334 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
335 add_timer(&adapter->pingtimer);
336}
337
338static void slic_unmap_mmio_space(struct adapter *adapter)
339{
340 if (adapter->slic_regs)
341 iounmap(adapter->slic_regs);
342 adapter->slic_regs = NULL;
343}
344
345
346
347
348
349
350
351static void slic_link_config(struct adapter *adapter,
352 u32 linkspeed, u32 linkduplex)
353{
354 u32 __iomem *wphy;
355 u32 speed;
356 u32 duplex;
357 u32 phy_config;
358 u32 phy_advreg;
359 u32 phy_gctlreg;
360
361 if (adapter->state != ADAPT_UP)
362 return;
363
364 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
365 || (adapter->devid == SLIC_2GB_DEVICE_ID));
366
367 if (linkspeed > LINK_1000MB)
368 linkspeed = LINK_AUTOSPEED;
369 if (linkduplex > LINK_AUTOD)
370 linkduplex = LINK_AUTOD;
371
372 wphy = &adapter->slic_regs->slic_wphy;
373
374 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
375 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
376
377
378
379
380
381 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
382
383 phy_advreg |= PAR_ASYMPAUSE_FIBER;
384 slic_reg32_write(wphy, phy_advreg, FLUSH);
385
386 if (linkspeed == LINK_AUTOSPEED) {
387
388 phy_config =
389 (MIICR_REG_PCR |
390 (PCR_RESET | PCR_AUTONEG |
391 PCR_AUTONEG_RST));
392 slic_reg32_write(wphy, phy_config, FLUSH);
393 } else {
394
395
396 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
397 slic_reg32_write(wphy, phy_config, FLUSH);
398
399
400 mdelay(10);
401
402
403
404 phy_config =
405 (MIICR_REG_PCR |
406 (PCR_RESET | PCR_SPEED_1000 |
407 PCR_DUPLEX_FULL));
408 slic_reg32_write(wphy, phy_config, FLUSH);
409 }
410 } else {
411
412
413
414
415
416
417 if (linkspeed == LINK_AUTOSPEED) {
418
419 phy_advreg =
420 (MIICR_REG_4 |
421 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
422 | PAR_ADV10HD));
423 } else {
424
425
426 phy_advreg = MIICR_REG_4;
427 }
428
429 phy_advreg |= PAR_ASYMPAUSE;
430
431 phy_advreg |= PAR_802_3;
432 slic_reg32_write(wphy, phy_advreg, FLUSH);
433
434 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
435 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
436
437 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
438
439
440 phy_config =
441 (MIICR_REG_16 | (MRV_REG16_XOVERON));
442 slic_reg32_write(wphy, phy_config, FLUSH);
443
444
445 phy_config =
446 (MIICR_REG_PCR |
447 (PCR_RESET | PCR_AUTONEG |
448 PCR_AUTONEG_RST));
449 slic_reg32_write(wphy, phy_config, FLUSH);
450 } else {
451
452 phy_config =
453 (MIICR_REG_PCR |
454 (PCR_AUTONEG | PCR_AUTONEG_RST));
455 slic_reg32_write(wphy, phy_config, FLUSH);
456 }
457 }
458 } else {
459
460 if (linkspeed == LINK_10MB)
461 speed = 0;
462 else
463 speed = PCR_SPEED_100;
464 if (linkduplex == LINK_HALFD)
465 duplex = 0;
466 else
467 duplex = PCR_DUPLEX_FULL;
468
469 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
470
471
472 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
473 slic_reg32_write(wphy, phy_config, FLUSH);
474 }
475
476
477 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
478 slic_reg32_write(wphy, phy_config, FLUSH);
479
480
481 mdelay(10);
482
483 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
484
485
486
487 phy_config =
488 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
489 slic_reg32_write(wphy, phy_config, FLUSH);
490 } else {
491
492 phy_config = (MIICR_REG_PCR | (speed | duplex));
493 slic_reg32_write(wphy, phy_config, FLUSH);
494 }
495 }
496}
497
498static int slic_card_download_gbrcv(struct adapter *adapter)
499{
500 const struct firmware *fw;
501 const char *file = "";
502 int ret;
503 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
504 u32 codeaddr;
505 u32 instruction;
506 int index = 0;
507 u32 rcvucodelen = 0;
508
509 switch (adapter->devid) {
510 case SLIC_2GB_DEVICE_ID:
511 file = "slicoss/oasisrcvucode.sys";
512 break;
513 case SLIC_1GB_DEVICE_ID:
514 file = "slicoss/gbrcvucode.sys";
515 break;
516 default:
517 return -ENOENT;
518 }
519
520 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
521 if (ret) {
522 dev_err(&adapter->pcidev->dev,
523 "SLICOSS: Failed to load firmware %s\n", file);
524 return ret;
525 }
526
527 rcvucodelen = *(u32 *)(fw->data + index);
528 index += 4;
529 switch (adapter->devid) {
530 case SLIC_2GB_DEVICE_ID:
531 if (rcvucodelen != OasisRcvUCodeLen) {
532 release_firmware(fw);
533 return -EINVAL;
534 }
535 break;
536 case SLIC_1GB_DEVICE_ID:
537 if (rcvucodelen != GBRcvUCodeLen) {
538 release_firmware(fw);
539 return -EINVAL;
540 }
541 break;
542 }
543
544 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
545
546 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
547
548 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
549
550 instruction = *(u32 *)(fw->data + index);
551 index += 4;
552
553 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
554
555 instruction = *(u8 *)(fw->data + index);
556 index++;
557
558 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
559 FLUSH);
560 }
561
562
563 release_firmware(fw);
564 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
565 return 0;
566}
567
568MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
569MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
570
571static int slic_card_download(struct adapter *adapter)
572{
573 const struct firmware *fw;
574 const char *file = "";
575 int ret;
576 u32 section;
577 int thissectionsize;
578 int codeaddr;
579 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
580 u32 instruction;
581 u32 baseaddress;
582 u32 i;
583 u32 numsects = 0;
584 u32 sectsize[3];
585 u32 sectstart[3];
586 int ucode_start, index = 0;
587
588 switch (adapter->devid) {
589 case SLIC_2GB_DEVICE_ID:
590 file = "slicoss/oasisdownload.sys";
591 break;
592 case SLIC_1GB_DEVICE_ID:
593 file = "slicoss/gbdownload.sys";
594 break;
595 default:
596 ASSERT(0);
597 break;
598 }
599 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
600 if (ret) {
601 dev_err(&adapter->pcidev->dev,
602 "SLICOSS: Failed to load firmware %s\n", file);
603 return ret;
604 }
605 numsects = *(u32 *)(fw->data + index);
606 index += 4;
607 ASSERT(numsects <= 3);
608 for (i = 0; i < numsects; i++) {
609 sectsize[i] = *(u32 *)(fw->data + index);
610 index += 4;
611 }
612 for (i = 0; i < numsects; i++) {
613 sectstart[i] = *(u32 *)(fw->data + index);
614 index += 4;
615 }
616 ucode_start = index;
617 instruction = *(u32 *)(fw->data + index);
618 index += 4;
619 for (section = 0; section < numsects; section++) {
620 baseaddress = sectstart[section];
621 thissectionsize = sectsize[section] >> 3;
622
623 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
624
625 slic_reg32_write(&slic_regs->slic_wcs,
626 baseaddress + codeaddr, FLUSH);
627
628 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
629 instruction = *(u32 *)(fw->data + index);
630 index += 4;
631
632
633 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
634 instruction = *(u32 *)(fw->data + index);
635 index += 4;
636 }
637 }
638 index = ucode_start;
639 for (section = 0; section < numsects; section++) {
640 instruction = *(u32 *)(fw->data + index);
641 baseaddress = sectstart[section];
642 if (baseaddress < 0x8000)
643 continue;
644 thissectionsize = sectsize[section] >> 3;
645
646 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
647
648 slic_reg32_write(&slic_regs->slic_wcs,
649 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
650 FLUSH);
651
652 slic_reg32_write(&slic_regs->slic_wcs, instruction,
653 FLUSH);
654 instruction = *(u32 *)(fw->data + index);
655 index += 4;
656
657 slic_reg32_write(&slic_regs->slic_wcs, instruction,
658 FLUSH);
659 instruction = *(u32 *)(fw->data + index);
660 index += 4;
661
662
663
664
665
666
667
668 }
669 }
670 release_firmware(fw);
671
672 mdelay(10);
673 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
674
675
676
677 mdelay(20);
678
679 return 0;
680}
681
682MODULE_FIRMWARE("slicoss/oasisdownload.sys");
683MODULE_FIRMWARE("slicoss/gbdownload.sys");
684
685static void slic_adapter_set_hwaddr(struct adapter *adapter)
686{
687 struct sliccard *card = adapter->card;
688
689 if ((adapter->card) && (card->config_set)) {
690 memcpy(adapter->macaddr,
691 card->config.MacInfo[adapter->functionnumber].macaddrA,
692 sizeof(struct slic_config_mac));
693 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
694 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
695 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
696 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
697 }
698 if (adapter->netdev) {
699 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
700 6);
701 }
702 }
703}
704
705static void slic_intagg_set(struct adapter *adapter, u32 value)
706{
707 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
708 adapter->card->loadlevel_current = value;
709}
710
711static void slic_soft_reset(struct adapter *adapter)
712{
713 if (adapter->card->state == CARD_UP) {
714 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
715 mdelay(1);
716 }
717
718 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
719 FLUSH);
720 mdelay(1);
721}
722
723static void slic_mac_address_config(struct adapter *adapter)
724{
725 u32 value;
726 u32 value2;
727 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
728
729 value = *(u32 *) &adapter->currmacaddr[2];
730 value = ntohl(value);
731 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
732 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
733
734 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
735 adapter->currmacaddr[1]) & 0xFFFF);
736
737 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
738 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
739
740
741
742
743 slic_mcast_set_mask(adapter);
744}
745
746static void slic_mac_config(struct adapter *adapter)
747{
748 u32 value;
749 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
750
751
752 if (adapter->linkspeed == LINK_1000MB) {
753 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
754 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
755 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
756 } else {
757 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
758 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
759 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
760 }
761
762
763 if (adapter->linkspeed == LINK_1000MB)
764 value |= GMCR_GBIT;
765
766
767 if ((adapter->linkduplex == LINK_FULLD)
768 || (adapter->macopts & MAC_LOOPBACK)) {
769 value |= GMCR_FULLD;
770 }
771
772
773 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
774
775
776 slic_mac_address_config(adapter);
777}
778
779static void slic_config_set(struct adapter *adapter, bool linkchange)
780{
781 u32 value;
782 u32 RcrReset;
783 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
784
785 if (linkchange) {
786
787 slic_mac_config(adapter);
788 RcrReset = GRCR_RESET;
789 } else {
790 slic_mac_address_config(adapter);
791 RcrReset = 0;
792 }
793
794 if (adapter->linkduplex == LINK_FULLD) {
795
796 value = (GXCR_RESET |
797 GXCR_XMTEN |
798 GXCR_PAUSEEN);
799
800 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
801
802
803 value = (RcrReset |
804 GRCR_CTLEN |
805 GRCR_ADDRAEN |
806 GRCR_RCVBAD |
807 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
808 } else {
809
810 value = (GXCR_RESET |
811 GXCR_XMTEN);
812
813 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
814
815
816 value = (RcrReset |
817 GRCR_ADDRAEN |
818 GRCR_RCVBAD |
819 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
820 }
821
822 if (adapter->state != ADAPT_DOWN) {
823
824 value |= GRCR_RCVEN;
825 }
826
827 if (adapter->macopts & MAC_PROMISC)
828 value |= GRCR_RCVALL;
829
830 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
831}
832
833
834
835
836static void slic_config_clear(struct adapter *adapter)
837{
838 u32 value;
839 u32 phy_config;
840 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
841
842
843 value = (GXCR_RESET |
844 GXCR_PAUSEEN);
845
846 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
847
848 value = (GRCR_RESET |
849 GRCR_CTLEN |
850 GRCR_ADDRAEN |
851 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
852
853 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
854
855
856 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
857 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
858}
859
860static bool slic_mac_filter(struct adapter *adapter,
861 struct ether_header *ether_frame)
862{
863 struct net_device *netdev = adapter->netdev;
864 u32 opts = adapter->macopts;
865 u32 *dhost4 = (u32 *)ðer_frame->ether_dhost[0];
866 u16 *dhost2 = (u16 *)ðer_frame->ether_dhost[4];
867
868 if (opts & MAC_PROMISC)
869 return true;
870
871 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
872 if (opts & MAC_BCAST) {
873 adapter->rcv_broadcasts++;
874 return true;
875 } else {
876 return false;
877 }
878 }
879
880 if (ether_frame->ether_dhost[0] & 0x01) {
881 if (opts & MAC_ALLMCAST) {
882 adapter->rcv_multicasts++;
883 netdev->stats.multicast++;
884 return true;
885 }
886 if (opts & MAC_MCAST) {
887 struct mcast_address *mcaddr = adapter->mcastaddrs;
888
889 while (mcaddr) {
890 if (!compare_ether_addr(mcaddr->address,
891 ether_frame->ether_dhost)) {
892 adapter->rcv_multicasts++;
893 netdev->stats.multicast++;
894 return true;
895 }
896 mcaddr = mcaddr->next;
897 }
898 return false;
899 } else {
900 return false;
901 }
902 }
903 if (opts & MAC_DIRECTED) {
904 adapter->rcv_unicasts++;
905 return true;
906 }
907 return false;
908
909}
910
911static int slic_mac_set_address(struct net_device *dev, void *ptr)
912{
913 struct adapter *adapter = netdev_priv(dev);
914 struct sockaddr *addr = ptr;
915
916 if (netif_running(dev))
917 return -EBUSY;
918 if (!adapter)
919 return -EBUSY;
920
921 if (!is_valid_ether_addr(addr->sa_data))
922 return -EINVAL;
923
924 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
925 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
926
927 slic_config_set(adapter, true);
928 return 0;
929}
930
931static void slic_timer_load_check(ulong cardaddr)
932{
933 struct sliccard *card = (struct sliccard *)cardaddr;
934 struct adapter *adapter = card->master;
935 u32 __iomem *intagg;
936 u32 load = card->events;
937 u32 level = 0;
938
939 intagg = &adapter->slic_regs->slic_intagg;
940
941 if ((adapter) && (adapter->state == ADAPT_UP) &&
942 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
943 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
944 if (adapter->linkspeed == LINK_1000MB)
945 level = 100;
946 else {
947 if (load > SLIC_LOAD_5)
948 level = SLIC_INTAGG_5;
949 else if (load > SLIC_LOAD_4)
950 level = SLIC_INTAGG_4;
951 else if (load > SLIC_LOAD_3)
952 level = SLIC_INTAGG_3;
953 else if (load > SLIC_LOAD_2)
954 level = SLIC_INTAGG_2;
955 else if (load > SLIC_LOAD_1)
956 level = SLIC_INTAGG_1;
957 else
958 level = SLIC_INTAGG_0;
959 }
960 if (card->loadlevel_current != level) {
961 card->loadlevel_current = level;
962 slic_reg32_write(intagg, level, FLUSH);
963 }
964 } else {
965 if (load > SLIC_LOAD_5)
966 level = SLIC_INTAGG_5;
967 else if (load > SLIC_LOAD_4)
968 level = SLIC_INTAGG_4;
969 else if (load > SLIC_LOAD_3)
970 level = SLIC_INTAGG_3;
971 else if (load > SLIC_LOAD_2)
972 level = SLIC_INTAGG_2;
973 else if (load > SLIC_LOAD_1)
974 level = SLIC_INTAGG_1;
975 else
976 level = SLIC_INTAGG_0;
977 if (card->loadlevel_current != level) {
978 card->loadlevel_current = level;
979 slic_reg32_write(intagg, level, FLUSH);
980 }
981 }
982 }
983 card->events = 0;
984 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
985 add_timer(&card->loadtimer);
986}
987
988static int slic_upr_queue_request(struct adapter *adapter,
989 u32 upr_request,
990 u32 upr_data,
991 u32 upr_data_h,
992 u32 upr_buffer, u32 upr_buffer_h)
993{
994 struct slic_upr *upr;
995 struct slic_upr *uprqueue;
996
997 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
998 if (!upr)
999 return -ENOMEM;
1000
1001 upr->adapter = adapter->port;
1002 upr->upr_request = upr_request;
1003 upr->upr_data = upr_data;
1004 upr->upr_buffer = upr_buffer;
1005 upr->upr_data_h = upr_data_h;
1006 upr->upr_buffer_h = upr_buffer_h;
1007 upr->next = NULL;
1008 if (adapter->upr_list) {
1009 uprqueue = adapter->upr_list;
1010
1011 while (uprqueue->next)
1012 uprqueue = uprqueue->next;
1013 uprqueue->next = upr;
1014 } else {
1015 adapter->upr_list = upr;
1016 }
1017 return 0;
1018}
1019
1020static void slic_upr_start(struct adapter *adapter)
1021{
1022 struct slic_upr *upr;
1023 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1024
1025
1026
1027
1028
1029 upr = adapter->upr_list;
1030 if (!upr)
1031 return;
1032 if (adapter->upr_busy)
1033 return;
1034 adapter->upr_busy = 1;
1035
1036 switch (upr->upr_request) {
1037 case SLIC_UPR_STATS:
1038 if (upr->upr_data_h == 0) {
1039 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
1040 FLUSH);
1041 } else {
1042 slic_reg64_write(adapter, &slic_regs->slic_stats64,
1043 upr->upr_data,
1044 &slic_regs->slic_addr_upper,
1045 upr->upr_data_h, FLUSH);
1046 }
1047 break;
1048
1049 case SLIC_UPR_RLSR:
1050 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
1051 &slic_regs->slic_addr_upper, upr->upr_data_h,
1052 FLUSH);
1053 break;
1054
1055 case SLIC_UPR_RCONFIG:
1056 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
1057 upr->upr_data, &slic_regs->slic_addr_upper,
1058 upr->upr_data_h, FLUSH);
1059 break;
1060 case SLIC_UPR_PING:
1061 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
1062 break;
1063 default:
1064 ASSERT(0);
1065 }
1066}
1067
1068static int slic_upr_request(struct adapter *adapter,
1069 u32 upr_request,
1070 u32 upr_data,
1071 u32 upr_data_h,
1072 u32 upr_buffer, u32 upr_buffer_h)
1073{
1074 int rc;
1075
1076 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1077 rc = slic_upr_queue_request(adapter,
1078 upr_request,
1079 upr_data,
1080 upr_data_h, upr_buffer, upr_buffer_h);
1081 if (rc)
1082 goto err_unlock_irq;
1083
1084 slic_upr_start(adapter);
1085err_unlock_irq:
1086 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1087 adapter->upr_lock.flags);
1088 return rc;
1089}
1090
1091static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
1092{
1093 u32 linkstatus = adapter->pshmem->linkstatus;
1094 uint linkup;
1095 unsigned char linkspeed;
1096 unsigned char linkduplex;
1097
1098 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1099 struct slic_shmem *pshmem;
1100
1101 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1102#if BITS_PER_LONG == 64
1103 slic_upr_queue_request(adapter,
1104 SLIC_UPR_RLSR,
1105 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1106 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1107 0, 0);
1108#else
1109 slic_upr_queue_request(adapter,
1110 SLIC_UPR_RLSR,
1111 (u32) &pshmem->linkstatus,
1112 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
1113#endif
1114 return;
1115 }
1116 if (adapter->state != ADAPT_UP)
1117 return;
1118
1119 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1120 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1121
1122 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1123 if (linkstatus & GIG_SPEED_1000)
1124 linkspeed = LINK_1000MB;
1125 else if (linkstatus & GIG_SPEED_100)
1126 linkspeed = LINK_100MB;
1127 else
1128 linkspeed = LINK_10MB;
1129
1130 if (linkstatus & GIG_FULLDUPLEX)
1131 linkduplex = LINK_FULLD;
1132 else
1133 linkduplex = LINK_HALFD;
1134
1135 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1136 return;
1137
1138
1139 if ((adapter->linkstate == LINK_UP) &&
1140 (linkup == LINK_UP) &&
1141 (adapter->linkspeed == linkspeed) &&
1142 (adapter->linkduplex == linkduplex))
1143 return;
1144
1145
1146
1147
1148 if (linkup == LINK_DOWN) {
1149 adapter->linkstate = LINK_DOWN;
1150 return;
1151 }
1152
1153
1154 adapter->linkspeed = linkspeed;
1155 adapter->linkduplex = linkduplex;
1156
1157 if (adapter->linkstate != LINK_UP) {
1158
1159 slic_config_set(adapter, true);
1160 adapter->linkstate = LINK_UP;
1161 netif_start_queue(adapter->netdev);
1162 }
1163}
1164
1165static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1166{
1167 struct sliccard *card = adapter->card;
1168 struct slic_upr *upr;
1169
1170 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1171 upr = adapter->upr_list;
1172 if (!upr) {
1173 ASSERT(0);
1174 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1175 adapter->upr_lock.flags);
1176 return;
1177 }
1178 adapter->upr_list = upr->next;
1179 upr->next = NULL;
1180 adapter->upr_busy = 0;
1181 ASSERT(adapter->port == upr->adapter);
1182 switch (upr->upr_request) {
1183 case SLIC_UPR_STATS:
1184 {
1185 struct slic_stats *slicstats =
1186 (struct slic_stats *) &adapter->pshmem->inicstats;
1187 struct slic_stats *newstats = slicstats;
1188 struct slic_stats *old = &adapter->inicstats_prev;
1189 struct slicnet_stats *stst = &adapter->slic_stats;
1190
1191 if (isr & ISR_UPCERR) {
1192 dev_err(&adapter->netdev->dev,
1193 "SLIC_UPR_STATS command failed isr[%x]\n",
1194 isr);
1195
1196 break;
1197 }
1198 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1199 newstats->xmit_tcp_segs_gb,
1200 old->xmit_tcp_segs_gb);
1201
1202 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1203 newstats->xmit_tcp_bytes_gb,
1204 old->xmit_tcp_bytes_gb);
1205
1206 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1207 newstats->rcv_tcp_segs_gb,
1208 old->rcv_tcp_segs_gb);
1209
1210 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1211 newstats->rcv_tcp_bytes_gb,
1212 old->rcv_tcp_bytes_gb);
1213
1214 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1215 newstats->xmit_bytes_gb,
1216 old->xmit_bytes_gb);
1217
1218 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1219 newstats->xmit_unicasts_gb,
1220 old->xmit_unicasts_gb);
1221
1222 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1223 newstats->rcv_bytes_gb,
1224 old->rcv_bytes_gb);
1225
1226 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1227 newstats->rcv_unicasts_gb,
1228 old->rcv_unicasts_gb);
1229
1230 UPDATE_STATS_GB(stst->iface.xmt_errors,
1231 newstats->xmit_collisions_gb,
1232 old->xmit_collisions_gb);
1233
1234 UPDATE_STATS_GB(stst->iface.xmt_errors,
1235 newstats->xmit_excess_collisions_gb,
1236 old->xmit_excess_collisions_gb);
1237
1238 UPDATE_STATS_GB(stst->iface.xmt_errors,
1239 newstats->xmit_other_error_gb,
1240 old->xmit_other_error_gb);
1241
1242 UPDATE_STATS_GB(stst->iface.rcv_errors,
1243 newstats->rcv_other_error_gb,
1244 old->rcv_other_error_gb);
1245
1246 UPDATE_STATS_GB(stst->iface.rcv_discards,
1247 newstats->rcv_drops_gb,
1248 old->rcv_drops_gb);
1249
1250 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1251 adapter->rcv_drops +=
1252 (newstats->rcv_drops_gb -
1253 old->rcv_drops_gb);
1254 }
1255 memcpy(old, newstats, sizeof(struct slic_stats));
1256 break;
1257 }
1258 case SLIC_UPR_RLSR:
1259 slic_link_upr_complete(adapter, isr);
1260 break;
1261 case SLIC_UPR_RCONFIG:
1262 break;
1263 case SLIC_UPR_RPHY:
1264 ASSERT(0);
1265 break;
1266 case SLIC_UPR_ENLB:
1267 ASSERT(0);
1268 break;
1269 case SLIC_UPR_ENCT:
1270 ASSERT(0);
1271 break;
1272 case SLIC_UPR_PDWN:
1273 ASSERT(0);
1274 break;
1275 case SLIC_UPR_PING:
1276 card->pingstatus |= (isr & ISR_PINGDSMASK);
1277 break;
1278 default:
1279 ASSERT(0);
1280 }
1281 kfree(upr);
1282 slic_upr_start(adapter);
1283 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1284 adapter->upr_lock.flags);
1285}
1286
1287static void slic_config_get(struct adapter *adapter, u32 config,
1288 u32 config_h)
1289{
1290 int status;
1291
1292 status = slic_upr_request(adapter,
1293 SLIC_UPR_RCONFIG,
1294 (u32) config, (u32) config_h, 0, 0);
1295 ASSERT(status == 0);
1296}
1297
1298
1299
1300
1301
1302
1303static ushort slic_eeprom_cksum(char *m, int len)
1304{
1305#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
1306#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
1307 }
1308
1309 u16 *w;
1310 u32 sum = 0;
1311 u32 byte_swapped = 0;
1312 u32 w_int;
1313
1314 union {
1315 char c[2];
1316 ushort s;
1317 } s_util;
1318
1319 union {
1320 ushort s[2];
1321 int l;
1322 } l_util;
1323
1324 l_util.l = 0;
1325 s_util.s = 0;
1326
1327 w = (u16 *)m;
1328#if BITS_PER_LONG == 64
1329 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
1330#else
1331 w_int = (u32) (w);
1332#endif
1333 if ((1 & w_int) && (len > 0)) {
1334 REDUCE;
1335 sum <<= 8;
1336 s_util.c[0] = *(unsigned char *)w;
1337 w = (u16 *)((char *)w + 1);
1338 len--;
1339 byte_swapped = 1;
1340 }
1341
1342
1343 while ((len -= 32) >= 0) {
1344 sum += w[0];
1345 sum += w[1];
1346 sum += w[2];
1347 sum += w[3];
1348 sum += w[4];
1349 sum += w[5];
1350 sum += w[6];
1351 sum += w[7];
1352 sum += w[8];
1353 sum += w[9];
1354 sum += w[10];
1355 sum += w[11];
1356 sum += w[12];
1357 sum += w[13];
1358 sum += w[14];
1359 sum += w[15];
1360 w = (u16 *)((ulong) w + 16);
1361 }
1362 len += 32;
1363 while ((len -= 8) >= 0) {
1364 sum += w[0];
1365 sum += w[1];
1366 sum += w[2];
1367 sum += w[3];
1368 w = (u16 *)((ulong) w + 4);
1369 }
1370 len += 8;
1371 if (len != 0 || byte_swapped != 0) {
1372 REDUCE;
1373 while ((len -= 2) >= 0)
1374 sum += *w++;
1375 if (byte_swapped) {
1376 REDUCE;
1377 sum <<= 8;
1378 byte_swapped = 0;
1379 if (len == -1) {
1380 s_util.c[1] = *(char *) w;
1381 sum += s_util.s;
1382 len = 0;
1383 } else {
1384 len = -1;
1385 }
1386
1387 } else if (len == -1) {
1388 s_util.c[0] = *(char *) w;
1389 }
1390
1391 if (len == -1) {
1392 s_util.c[1] = 0;
1393 sum += s_util.s;
1394 }
1395 }
1396 REDUCE;
1397 return (ushort) sum;
1398}
1399
1400static void slic_rspqueue_free(struct adapter *adapter)
1401{
1402 int i;
1403 struct slic_rspqueue *rspq = &adapter->rspqueue;
1404
1405 for (i = 0; i < rspq->num_pages; i++) {
1406 if (rspq->vaddr[i]) {
1407 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1408 rspq->vaddr[i], rspq->paddr[i]);
1409 }
1410 rspq->vaddr[i] = NULL;
1411 rspq->paddr[i] = 0;
1412 }
1413 rspq->offset = 0;
1414 rspq->pageindex = 0;
1415 rspq->rspbuf = NULL;
1416}
1417
1418static int slic_rspqueue_init(struct adapter *adapter)
1419{
1420 int i;
1421 struct slic_rspqueue *rspq = &adapter->rspqueue;
1422 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1423 u32 paddrh = 0;
1424
1425 ASSERT(adapter->state == ADAPT_DOWN);
1426 memset(rspq, 0, sizeof(struct slic_rspqueue));
1427
1428 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1429
1430 for (i = 0; i < rspq->num_pages; i++) {
1431 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
1432 PAGE_SIZE,
1433 &rspq->paddr[i]);
1434 if (!rspq->vaddr[i]) {
1435 dev_err(&adapter->pcidev->dev,
1436 "pci_alloc_consistent failed\n");
1437 slic_rspqueue_free(adapter);
1438 return -ENOMEM;
1439 }
1440
1441
1442#if 0
1443#ifndef CONFIG_X86_64
1444 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
1445 (u32) rspq->vaddr[i]);
1446 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
1447 (u32) rspq->paddr[i]);
1448#endif
1449#endif
1450 memset(rspq->vaddr[i], 0, PAGE_SIZE);
1451
1452 if (paddrh == 0) {
1453 slic_reg32_write(&slic_regs->slic_rbar,
1454 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1455 DONT_FLUSH);
1456 } else {
1457 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1458 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1459 &slic_regs->slic_addr_upper,
1460 paddrh, DONT_FLUSH);
1461 }
1462 }
1463 rspq->offset = 0;
1464 rspq->pageindex = 0;
1465 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1466 return 0;
1467}
1468
1469static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1470{
1471 struct slic_rspqueue *rspq = &adapter->rspqueue;
1472 struct slic_rspbuf *buf;
1473
1474 if (!(rspq->rspbuf->status))
1475 return NULL;
1476
1477 buf = rspq->rspbuf;
1478#if BITS_PER_LONG == 32
1479 ASSERT((buf->status & 0xFFFFFFE0) == 0);
1480#endif
1481 ASSERT(buf->hosthandle);
1482 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1483 rspq->rspbuf++;
1484#if BITS_PER_LONG == 32
1485 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
1486 (u32) rspq->rspbuf);
1487#endif
1488 } else {
1489 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
1490 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1491 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1492 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1493 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
1494 rspq->offset = 0;
1495 rspq->rspbuf = (struct slic_rspbuf *)
1496 rspq->vaddr[rspq->pageindex];
1497#if BITS_PER_LONG == 32
1498 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
1499 (u32) rspq->rspbuf);
1500#endif
1501 }
1502#if BITS_PER_LONG == 32
1503 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
1504#endif
1505 return buf;
1506}
1507
1508static void slic_cmdqmem_init(struct adapter *adapter)
1509{
1510 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1511
1512 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1513}
1514
1515static void slic_cmdqmem_free(struct adapter *adapter)
1516{
1517 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1518 int i;
1519
1520 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1521 if (cmdqmem->pages[i]) {
1522 pci_free_consistent(adapter->pcidev,
1523 PAGE_SIZE,
1524 (void *) cmdqmem->pages[i],
1525 cmdqmem->dma_pages[i]);
1526 }
1527 }
1528 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1529}
1530
1531static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1532{
1533 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1534 u32 *pageaddr;
1535
1536 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1537 return NULL;
1538 pageaddr = pci_alloc_consistent(adapter->pcidev,
1539 PAGE_SIZE,
1540 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1541 if (!pageaddr)
1542 return NULL;
1543#if BITS_PER_LONG == 32
1544 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
1545#endif
1546 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1547 cmdqmem->pagecnt++;
1548 return pageaddr;
1549}
1550
1551static void slic_cmdq_free(struct adapter *adapter)
1552{
1553 struct slic_hostcmd *cmd;
1554
1555 cmd = adapter->cmdq_all.head;
1556 while (cmd) {
1557 if (cmd->busy) {
1558 struct sk_buff *tempskb;
1559
1560 tempskb = cmd->skb;
1561 if (tempskb) {
1562 cmd->skb = NULL;
1563 dev_kfree_skb_irq(tempskb);
1564 }
1565 }
1566 cmd = cmd->next_all;
1567 }
1568 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1569 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1570 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1571 slic_cmdqmem_free(adapter);
1572}
1573
1574static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1575{
1576 struct slic_hostcmd *cmd;
1577 struct slic_hostcmd *prev;
1578 struct slic_hostcmd *tail;
1579 struct slic_cmdqueue *cmdq;
1580 int cmdcnt;
1581 void *cmdaddr;
1582 ulong phys_addr;
1583 u32 phys_addrl;
1584 u32 phys_addrh;
1585 struct slic_handle *pslic_handle;
1586
1587 cmdaddr = page;
1588 cmd = (struct slic_hostcmd *)cmdaddr;
1589 cmdcnt = 0;
1590
1591 phys_addr = virt_to_bus((void *)page);
1592 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1593 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1594
1595 prev = NULL;
1596 tail = cmd;
1597 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1598 (adapter->slic_handle_ix < 256)) {
1599
1600 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
1601 if (pslic_handle == NULL)
1602 ASSERT(0);
1603 ASSERT(pslic_handle ==
1604 &adapter->slic_handles[pslic_handle->token.
1605 handle_index]);
1606 pslic_handle->type = SLIC_HANDLE_CMD;
1607 pslic_handle->address = (void *) cmd;
1608 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1609 pslic_handle->other_handle = NULL;
1610 pslic_handle->next = NULL;
1611
1612 cmd->pslic_handle = pslic_handle;
1613 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1614 cmd->busy = false;
1615 cmd->paddrl = phys_addrl;
1616 cmd->paddrh = phys_addrh;
1617 cmd->next_all = prev;
1618 cmd->next = prev;
1619 prev = cmd;
1620 phys_addrl += SLIC_HOSTCMD_SIZE;
1621 cmdaddr += SLIC_HOSTCMD_SIZE;
1622
1623 cmd = (struct slic_hostcmd *)cmdaddr;
1624 cmdcnt++;
1625 }
1626
1627 cmdq = &adapter->cmdq_all;
1628 cmdq->count += cmdcnt;
1629 tail->next_all = cmdq->head;
1630 cmdq->head = prev;
1631 cmdq = &adapter->cmdq_free;
1632 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1633 cmdq->count += cmdcnt;
1634 tail->next = cmdq->head;
1635 cmdq->head = prev;
1636 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1637}
1638
1639static int slic_cmdq_init(struct adapter *adapter)
1640{
1641 int i;
1642 u32 *pageaddr;
1643
1644 ASSERT(adapter->state == ADAPT_DOWN);
1645 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1646 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1647 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1648 spin_lock_init(&adapter->cmdq_all.lock.lock);
1649 spin_lock_init(&adapter->cmdq_free.lock.lock);
1650 spin_lock_init(&adapter->cmdq_done.lock.lock);
1651 slic_cmdqmem_init(adapter);
1652 adapter->slic_handle_ix = 1;
1653 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1654 pageaddr = slic_cmdqmem_addpage(adapter);
1655#if BITS_PER_LONG == 32
1656 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
1657#endif
1658 if (!pageaddr) {
1659 slic_cmdq_free(adapter);
1660 return -ENOMEM;
1661 }
1662 slic_cmdq_addcmdpage(adapter, pageaddr);
1663 }
1664 adapter->slic_handle_ix = 1;
1665
1666 return 0;
1667}
1668
1669static void slic_cmdq_reset(struct adapter *adapter)
1670{
1671 struct slic_hostcmd *hcmd;
1672 struct sk_buff *skb;
1673 u32 outstanding;
1674
1675 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1676 adapter->cmdq_free.lock.flags);
1677 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1678 adapter->cmdq_done.lock.flags);
1679 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1680 outstanding -= adapter->cmdq_free.count;
1681 hcmd = adapter->cmdq_all.head;
1682 while (hcmd) {
1683 if (hcmd->busy) {
1684 skb = hcmd->skb;
1685 ASSERT(skb);
1686 hcmd->busy = 0;
1687 hcmd->skb = NULL;
1688 dev_kfree_skb_irq(skb);
1689 }
1690 hcmd = hcmd->next_all;
1691 }
1692 adapter->cmdq_free.count = 0;
1693 adapter->cmdq_free.head = NULL;
1694 adapter->cmdq_free.tail = NULL;
1695 adapter->cmdq_done.count = 0;
1696 adapter->cmdq_done.head = NULL;
1697 adapter->cmdq_done.tail = NULL;
1698 adapter->cmdq_free.head = adapter->cmdq_all.head;
1699 hcmd = adapter->cmdq_all.head;
1700 while (hcmd) {
1701 adapter->cmdq_free.count++;
1702 hcmd->next = hcmd->next_all;
1703 hcmd = hcmd->next_all;
1704 }
1705 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1706 dev_err(&adapter->netdev->dev,
1707 "free_count %d != all count %d\n",
1708 adapter->cmdq_free.count, adapter->cmdq_all.count);
1709 }
1710 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1711 adapter->cmdq_done.lock.flags);
1712 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1713 adapter->cmdq_free.lock.flags);
1714}
1715
1716static void slic_cmdq_getdone(struct adapter *adapter)
1717{
1718 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1719 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1720
1721 ASSERT(free_cmdq->head == NULL);
1722 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1723
1724 free_cmdq->head = done_cmdq->head;
1725 free_cmdq->count = done_cmdq->count;
1726 done_cmdq->head = NULL;
1727 done_cmdq->tail = NULL;
1728 done_cmdq->count = 0;
1729 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1730}
1731
1732static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1733{
1734 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1735 struct slic_hostcmd *cmd = NULL;
1736
1737lock_and_retry:
1738 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1739retry:
1740 cmd = cmdq->head;
1741 if (cmd) {
1742 cmdq->head = cmd->next;
1743 cmdq->count--;
1744 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1745 } else {
1746 slic_cmdq_getdone(adapter);
1747 cmd = cmdq->head;
1748 if (cmd) {
1749 goto retry;
1750 } else {
1751 u32 *pageaddr;
1752
1753 spin_unlock_irqrestore(&cmdq->lock.lock,
1754 cmdq->lock.flags);
1755 pageaddr = slic_cmdqmem_addpage(adapter);
1756 if (pageaddr) {
1757 slic_cmdq_addcmdpage(adapter, pageaddr);
1758 goto lock_and_retry;
1759 }
1760 }
1761 }
1762 return cmd;
1763}
1764
1765static void slic_cmdq_putdone_irq(struct adapter *adapter,
1766 struct slic_hostcmd *cmd)
1767{
1768 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1769
1770 spin_lock(&cmdq->lock.lock);
1771 cmd->busy = 0;
1772 cmd->next = cmdq->head;
1773 cmdq->head = cmd;
1774 cmdq->count++;
1775 if ((adapter->xmitq_full) && (cmdq->count > 10))
1776 netif_wake_queue(adapter->netdev);
1777 spin_unlock(&cmdq->lock.lock);
1778}
1779
1780static int slic_rcvqueue_fill(struct adapter *adapter)
1781{
1782 void *paddr;
1783 u32 paddrl;
1784 u32 paddrh;
1785 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1786 int i = 0;
1787 struct device *dev = &adapter->netdev->dev;
1788
1789 while (i < SLIC_RCVQ_FILLENTRIES) {
1790 struct slic_rcvbuf *rcvbuf;
1791 struct sk_buff *skb;
1792#ifdef KLUDGE_FOR_4GB_BOUNDARY
1793retry_rcvqfill:
1794#endif
1795 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1796 if (skb) {
1797 paddr = (void *)pci_map_single(adapter->pcidev,
1798 skb->data,
1799 SLIC_RCVQ_RCVBUFSIZE,
1800 PCI_DMA_FROMDEVICE);
1801 paddrl = SLIC_GET_ADDR_LOW(paddr);
1802 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1803
1804 skb->len = SLIC_RCVBUF_HEADSIZE;
1805 rcvbuf = (struct slic_rcvbuf *)skb->head;
1806 rcvbuf->status = 0;
1807 skb->next = NULL;
1808#ifdef KLUDGE_FOR_4GB_BOUNDARY
1809 if (paddrl == 0) {
1810 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1811 __func__);
1812 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1813 dev_err(dev, " skbdata[%p]\n", skb->data);
1814 dev_err(dev, " skblen[%x]\n", skb->len);
1815 dev_err(dev, " paddr[%p]\n", paddr);
1816 dev_err(dev, " paddrl[%x]\n", paddrl);
1817 dev_err(dev, " paddrh[%x]\n", paddrh);
1818 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1819 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1820 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1821 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1822 goto retry_rcvqfill;
1823 }
1824#else
1825 if (paddrl == 0) {
1826 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1827 __func__);
1828 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1829 dev_err(dev, " skbdata[%p]\n", skb->data);
1830 dev_err(dev, " skblen[%x]\n", skb->len);
1831 dev_err(dev, " paddr[%p]\n", paddr);
1832 dev_err(dev, " paddrl[%x]\n", paddrl);
1833 dev_err(dev, " paddrh[%x]\n", paddrh);
1834 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1835 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1836 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1837 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1838 }
1839#endif
1840 if (paddrh == 0) {
1841 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1842 (u32)paddrl, DONT_FLUSH);
1843 } else {
1844 slic_reg64_write(adapter,
1845 &adapter->slic_regs->slic_hbar64,
1846 paddrl,
1847 &adapter->slic_regs->slic_addr_upper,
1848 paddrh, DONT_FLUSH);
1849 }
1850 if (rcvq->head)
1851 rcvq->tail->next = skb;
1852 else
1853 rcvq->head = skb;
1854 rcvq->tail = skb;
1855 rcvq->count++;
1856 i++;
1857 } else {
1858 dev_err(&adapter->netdev->dev,
1859 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1860 i);
1861 break;
1862 }
1863 }
1864 return i;
1865}
1866
1867static void slic_rcvqueue_free(struct adapter *adapter)
1868{
1869 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1870 struct sk_buff *skb;
1871
1872 while (rcvq->head) {
1873 skb = rcvq->head;
1874 rcvq->head = rcvq->head->next;
1875 dev_kfree_skb(skb);
1876 }
1877 rcvq->tail = NULL;
1878 rcvq->head = NULL;
1879 rcvq->count = 0;
1880}
1881
1882static int slic_rcvqueue_init(struct adapter *adapter)
1883{
1884 int i, count;
1885 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1886
1887 ASSERT(adapter->state == ADAPT_DOWN);
1888 rcvq->tail = NULL;
1889 rcvq->head = NULL;
1890 rcvq->size = SLIC_RCVQ_ENTRIES;
1891 rcvq->errors = 0;
1892 rcvq->count = 0;
1893 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
1894 count = 0;
1895 while (i) {
1896 count += slic_rcvqueue_fill(adapter);
1897 i--;
1898 }
1899 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1900 slic_rcvqueue_free(adapter);
1901 return -ENOMEM;
1902 }
1903 return 0;
1904}
1905
1906static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1907{
1908 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1909 struct sk_buff *skb;
1910 struct slic_rcvbuf *rcvbuf;
1911 int count;
1912
1913 if (rcvq->count) {
1914 skb = rcvq->head;
1915 rcvbuf = (struct slic_rcvbuf *)skb->head;
1916 ASSERT(rcvbuf);
1917
1918 if (rcvbuf->status & IRHDDR_SVALID) {
1919 rcvq->head = rcvq->head->next;
1920 skb->next = NULL;
1921 rcvq->count--;
1922 } else {
1923 skb = NULL;
1924 }
1925 } else {
1926 dev_err(&adapter->netdev->dev,
1927 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1928 skb = NULL;
1929 }
1930 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1931 count = slic_rcvqueue_fill(adapter);
1932 if (!count)
1933 break;
1934 }
1935 if (skb)
1936 rcvq->errors = 0;
1937 return skb;
1938}
1939
1940static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1941{
1942 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1943 void *paddr;
1944 u32 paddrl;
1945 u32 paddrh;
1946 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1947 struct device *dev;
1948
1949 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
1950
1951 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
1952 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1953 rcvbuf->status = 0;
1954 skb->next = NULL;
1955
1956 paddrl = SLIC_GET_ADDR_LOW(paddr);
1957 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1958
1959 if (paddrl == 0) {
1960 dev = &adapter->netdev->dev;
1961 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1962 __func__);
1963 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1964 dev_err(dev, " skbdata[%p]\n", skb->data);
1965 dev_err(dev, " skblen[%x]\n", skb->len);
1966 dev_err(dev, " paddr[%p]\n", paddr);
1967 dev_err(dev, " paddrl[%x]\n", paddrl);
1968 dev_err(dev, " paddrh[%x]\n", paddrh);
1969 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1970 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1971 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1972 }
1973 if (paddrh == 0) {
1974 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1975 DONT_FLUSH);
1976 } else {
1977 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1978 paddrl, &adapter->slic_regs->slic_addr_upper,
1979 paddrh, DONT_FLUSH);
1980 }
1981 if (rcvq->head)
1982 rcvq->tail->next = skb;
1983 else
1984 rcvq->head = skb;
1985 rcvq->tail = skb;
1986 rcvq->count++;
1987 return rcvq->count;
1988}
1989
1990static int slic_debug_card_show(struct seq_file *seq, void *v)
1991{
1992#ifdef MOOKTODO
1993 int i;
1994 struct sliccard *card = seq->private;
1995 struct slic_config *config = &card->config;
1996 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
1997 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
1998#endif
1999
2000 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
2001 seq_printf(seq, "Microcode versions: \n");
2002 seq_printf(seq, " Gigabit (gb) : %s %s\n",
2003 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
2004 seq_printf(seq, " Gigabit Receiver : %s %s\n",
2005 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
2006 seq_printf(seq, "Vendor : %s\n", slic_vendor);
2007 seq_printf(seq, "Product Name : %s\n", slic_product_name);
2008#ifdef MOOKTODO
2009 seq_printf(seq, "VendorId : %4.4X\n",
2010 config->VendorId);
2011 seq_printf(seq, "DeviceId : %4.4X\n",
2012 config->DeviceId);
2013 seq_printf(seq, "RevisionId : %2.2x\n",
2014 config->RevisionId);
2015 seq_printf(seq, "Bus # : %d\n", card->busnumber);
2016 seq_printf(seq, "Device # : %d\n", card->slotnumber);
2017 seq_printf(seq, "Interfaces : %d\n", card->card_size);
2018 seq_printf(seq, " Initialized : %d\n",
2019 card->adapters_activated);
2020 seq_printf(seq, " Allocated : %d\n",
2021 card->adapters_allocated);
2022 ASSERT(card->card_size <= SLIC_NBR_MACS);
2023 for (i = 0; i < card->card_size; i++) {
2024 seq_printf(seq,
2025 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
2026 i, config->macinfo[i].macaddrA[0],
2027 config->macinfo[i].macaddrA[1],
2028 config->macinfo[i].macaddrA[2],
2029 config->macinfo[i].macaddrA[3],
2030 config->macinfo[i].macaddrA[4],
2031 config->macinfo[i].macaddrA[5]);
2032 }
2033 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
2034 seq_printf(seq, " -------------------------------\n");
2035 for (i = 0; i < card->adapters_allocated; i++) {
2036 struct adapter *adapter;
2037
2038 adapter = card->adapter[i];
2039 if (adapter) {
2040 seq_printf(seq,
2041 " %d %d %s %s %s 0x%X\n",
2042 adapter->physport, adapter->state,
2043 SLIC_LINKSTATE(adapter->linkstate),
2044 SLIC_DUPLEX(adapter->linkduplex),
2045 SLIC_SPEED(adapter->linkspeed),
2046 (uint) adapter->irq);
2047 }
2048 }
2049 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
2050 seq_printf(seq, "RcvQ max entries : %4.4X\n",
2051 SLIC_RCVQ_ENTRIES);
2052 seq_printf(seq, "Ping Status : %8.8X\n",
2053 card->pingstatus);
2054 seq_printf(seq, "Minimum grant : %2.2x\n",
2055 config->MinGrant);
2056 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
2057 seq_printf(seq, "PciStatus : %4.4x\n",
2058 config->Pcistatus);
2059 seq_printf(seq, "Debug Device Id : %4.4x\n",
2060 config->DbgDevId);
2061 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
2062 config->DramRomFn);
2063 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
2064 config->NetIntPin1);
2065 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
2066 config->NetIntPin1);
2067 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
2068 config->NetIntPin1);
2069 seq_printf(seq, "PM capabilities : %4.4X\n",
2070 config->PMECapab);
2071 seq_printf(seq, "Network Clock Controls : %4.4X\n",
2072 config->NwClkCtrls);
2073
2074 switch (config->FruFormat) {
2075 case ATK_FRU_FORMAT:
2076 {
2077 seq_printf(seq,
2078 "Vendor : Alacritech, Inc.\n");
2079 seq_printf(seq,
2080 "Assembly # : %c%c%c%c%c%c\n",
2081 fru[0], fru[1], fru[2], fru[3], fru[4],
2082 fru[5]);
2083 seq_printf(seq,
2084 "Revision # : %c%c\n",
2085 fru[6], fru[7]);
2086
2087 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
2088 seq_printf(seq,
2089 "Serial # : "
2090 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
2091 fru[8], fru[9], fru[10],
2092 fru[11], fru[12], fru[13],
2093 fru[16], fru[17], fru[18],
2094 fru[19], fru[20], fru[21]);
2095 } else {
2096 seq_printf(seq,
2097 "Serial # : "
2098 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
2099 fru[8], fru[9], fru[10],
2100 fru[11], fru[12], fru[13],
2101 fru[14], fru[15], fru[16],
2102 fru[17], fru[18], fru[19],
2103 fru[20], fru[21]);
2104 }
2105 break;
2106 }
2107
2108 default:
2109 {
2110 seq_printf(seq,
2111 "Vendor : Alacritech, Inc.\n");
2112 seq_printf(seq,
2113 "Serial # : Empty FRU\n");
2114 break;
2115 }
2116 }
2117
2118 switch (config->OEMFruFormat) {
2119 case VENDOR1_FRU_FORMAT:
2120 {
2121 seq_printf(seq, "FRU Information:\n");
2122 seq_printf(seq, " Commodity # : %c\n",
2123 oemfru[0]);
2124 seq_printf(seq,
2125 " Assembly # : %c%c%c%c\n",
2126 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
2127 seq_printf(seq,
2128 " Revision # : %c%c\n",
2129 oemfru[5], oemfru[6]);
2130 seq_printf(seq,
2131 " Supplier # : %c%c\n",
2132 oemfru[7], oemfru[8]);
2133 seq_printf(seq,
2134 " Date : %c%c\n",
2135 oemfru[9], oemfru[10]);
2136 seq_sprintf(seq,
2137 " Sequence # : %c%c%c\n",
2138 oemfru[11], oemfru[12], oemfru[13]);
2139 break;
2140 }
2141
2142 case VENDOR2_FRU_FORMAT:
2143 {
2144 seq_printf(seq, "FRU Information:\n");
2145 seq_printf(seq,
2146 " Part # : "
2147 "%c%c%c%c%c%c%c%c\n",
2148 oemfru[0], oemfru[1], oemfru[2],
2149 oemfru[3], oemfru[4], oemfru[5],
2150 oemfru[6], oemfru[7]);
2151 seq_printf(seq,
2152 " Supplier # : %c%c%c%c%c\n",
2153 oemfru[8], oemfru[9], oemfru[10],
2154 oemfru[11], oemfru[12]);
2155 seq_printf(seq,
2156 " Date : %c%c%c\n",
2157 oemfru[13], oemfru[14], oemfru[15]);
2158 seq_sprintf(seq,
2159 " Sequence # : %c%c%c%c\n",
2160 oemfru[16], oemfru[17], oemfru[18],
2161 oemfru[19]);
2162 break;
2163 }
2164
2165 case VENDOR3_FRU_FORMAT:
2166 {
2167 seq_printf(seq, "FRU Information:\n");
2168 }
2169
2170 case VENDOR4_FRU_FORMAT:
2171 {
2172 seq_printf(seq, "FRU Information:\n");
2173 seq_printf(seq,
2174 " FRU Number : "
2175 "%c%c%c%c%c%c%c%c\n",
2176 oemfru[0], oemfru[1], oemfru[2],
2177 oemfru[3], oemfru[4], oemfru[5],
2178 oemfru[6], oemfru[7]);
2179 seq_sprintf(seq,
2180 " Part Number : "
2181 "%c%c%c%c%c%c%c%c\n",
2182 oemfru[8], oemfru[9], oemfru[10],
2183 oemfru[11], oemfru[12], oemfru[13],
2184 oemfru[14], oemfru[15]);
2185 seq_printf(seq,
2186 " EC Level : "
2187 "%c%c%c%c%c%c%c%c\n",
2188 oemfru[16], oemfru[17], oemfru[18],
2189 oemfru[19], oemfru[20], oemfru[21],
2190 oemfru[22], oemfru[23]);
2191 break;
2192 }
2193
2194 default:
2195 break;
2196 }
2197#endif
2198
2199 return 0;
2200}
2201
2202static int slic_debug_adapter_show(struct seq_file *seq, void *v)
2203{
2204 struct adapter *adapter = seq->private;
2205 struct net_device *netdev = adapter->netdev;
2206
2207 seq_printf(seq, "info: interface : %s\n",
2208 adapter->netdev->name);
2209 seq_printf(seq, "info: status : %s\n",
2210 SLIC_LINKSTATE(adapter->linkstate));
2211 seq_printf(seq, "info: port : %d\n",
2212 adapter->physport);
2213 seq_printf(seq, "info: speed : %s\n",
2214 SLIC_SPEED(adapter->linkspeed));
2215 seq_printf(seq, "info: duplex : %s\n",
2216 SLIC_DUPLEX(adapter->linkduplex));
2217 seq_printf(seq, "info: irq : 0x%X\n",
2218 (uint) adapter->irq);
2219 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
2220 adapter->card->loadlevel_current);
2221 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
2222 SLIC_RCVQ_ENTRIES);
2223 seq_printf(seq, "info: RcvQ current : %4.4X\n",
2224 adapter->rcvqueue.count);
2225 seq_printf(seq, "rx stats: packets : %8.8lX\n",
2226 netdev->stats.rx_packets);
2227 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
2228 netdev->stats.rx_bytes);
2229 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
2230 adapter->rcv_broadcasts);
2231 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
2232 adapter->rcv_multicasts);
2233 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
2234 adapter->rcv_unicasts);
2235 seq_printf(seq, "rx stats: errors : %8.8X\n",
2236 (u32) adapter->slic_stats.iface.rcv_errors);
2237 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
2238 (u32) adapter->slic_stats.iface.rcv_discards);
2239 seq_printf(seq, "rx stats: drops : %8.8X\n",
2240 (u32) adapter->rcv_drops);
2241 seq_printf(seq, "tx stats: packets : %8.8lX\n",
2242 netdev->stats.tx_packets);
2243 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
2244 netdev->stats.tx_bytes);
2245 seq_printf(seq, "tx stats: errors : %8.8X\n",
2246 (u32) adapter->slic_stats.iface.xmt_errors);
2247 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
2248 netdev->stats.multicast);
2249 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
2250 (u32) adapter->slic_stats.iface.xmit_collisions);
2251 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
2252 adapter->max_isr_rcvs);
2253 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
2254 adapter->rcv_interrupt_yields);
2255 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
2256 adapter->max_isr_xmits);
2257 seq_printf(seq, "perf: error interrupts : %8.8X\n",
2258 adapter->error_interrupts);
2259 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
2260 adapter->error_rmiss_interrupts);
2261 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
2262 adapter->rcv_interrupts);
2263 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
2264 adapter->xmit_interrupts);
2265 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
2266 adapter->linkevent_interrupts);
2267 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
2268 adapter->upr_interrupts);
2269 seq_printf(seq, "perf: interrupt count : %8.8X\n",
2270 adapter->num_isrs);
2271 seq_printf(seq, "perf: false interrupts : %8.8X\n",
2272 adapter->false_interrupts);
2273 seq_printf(seq, "perf: All register writes : %8.8X\n",
2274 adapter->all_reg_writes);
2275 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
2276 adapter->icr_reg_writes);
2277 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
2278 adapter->isr_reg_writes);
2279 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
2280 adapter->if_events.oflow802);
2281 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
2282 adapter->if_events.Tprtoflow);
2283 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
2284 adapter->if_events.uflow802);
2285 seq_printf(seq, "ifevents: receive early : %8.8X\n",
2286 adapter->if_events.rcvearly);
2287 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
2288 adapter->if_events.Bufov);
2289 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
2290 adapter->if_events.Carre);
2291 seq_printf(seq, "ifevents: Long : %8.8X\n",
2292 adapter->if_events.Longe);
2293 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
2294 adapter->if_events.Invp);
2295 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
2296 adapter->if_events.Crc);
2297 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
2298 adapter->if_events.Drbl);
2299 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
2300 adapter->if_events.Code);
2301 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
2302 adapter->if_events.TpCsum);
2303 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
2304 adapter->if_events.TpHlen);
2305 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
2306 adapter->if_events.IpCsum);
2307 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
2308 adapter->if_events.IpLen);
2309 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
2310 adapter->if_events.IpHlen);
2311
2312 return 0;
2313}
2314static int slic_debug_adapter_open(struct inode *inode, struct file *file)
2315{
2316 return single_open(file, slic_debug_adapter_show, inode->i_private);
2317}
2318
2319static int slic_debug_card_open(struct inode *inode, struct file *file)
2320{
2321 return single_open(file, slic_debug_card_show, inode->i_private);
2322}
2323
2324static const struct file_operations slic_debug_adapter_fops = {
2325 .owner = THIS_MODULE,
2326 .open = slic_debug_adapter_open,
2327 .read = seq_read,
2328 .llseek = seq_lseek,
2329 .release = single_release,
2330};
2331
2332static const struct file_operations slic_debug_card_fops = {
2333 .owner = THIS_MODULE,
2334 .open = slic_debug_card_open,
2335 .read = seq_read,
2336 .llseek = seq_lseek,
2337 .release = single_release,
2338};
2339
2340static void slic_debug_adapter_create(struct adapter *adapter)
2341{
2342 struct dentry *d;
2343 char name[7];
2344 struct sliccard *card = adapter->card;
2345
2346 if (!card->debugfs_dir)
2347 return;
2348
2349 sprintf(name, "port%d", adapter->port);
2350 d = debugfs_create_file(name, S_IRUGO,
2351 card->debugfs_dir, adapter,
2352 &slic_debug_adapter_fops);
2353 if (!d || IS_ERR(d))
2354 pr_info(PFX "%s: debugfs create failed\n", name);
2355 else
2356 adapter->debugfs_entry = d;
2357}
2358
2359static void slic_debug_adapter_destroy(struct adapter *adapter)
2360{
2361 debugfs_remove(adapter->debugfs_entry);
2362 adapter->debugfs_entry = NULL;
2363}
2364
2365static void slic_debug_card_create(struct sliccard *card)
2366{
2367 struct dentry *d;
2368 char name[IFNAMSIZ];
2369
2370 snprintf(name, sizeof(name), "slic%d", card->cardnum);
2371 d = debugfs_create_dir(name, slic_debugfs);
2372 if (!d || IS_ERR(d))
2373 pr_info(PFX "%s: debugfs create dir failed\n",
2374 name);
2375 else {
2376 card->debugfs_dir = d;
2377 d = debugfs_create_file("cardinfo", S_IRUGO,
2378 slic_debugfs, card,
2379 &slic_debug_card_fops);
2380 if (!d || IS_ERR(d))
2381 pr_info(PFX "%s: debugfs create failed\n",
2382 name);
2383 else
2384 card->debugfs_cardinfo = d;
2385 }
2386}
2387
2388static void slic_debug_card_destroy(struct sliccard *card)
2389{
2390 int i;
2391
2392 for (i = 0; i < card->card_size; i++) {
2393 struct adapter *adapter;
2394
2395 adapter = card->adapter[i];
2396 if (adapter)
2397 slic_debug_adapter_destroy(adapter);
2398 }
2399 if (card->debugfs_cardinfo) {
2400 debugfs_remove(card->debugfs_cardinfo);
2401 card->debugfs_cardinfo = NULL;
2402 }
2403 if (card->debugfs_dir) {
2404 debugfs_remove(card->debugfs_dir);
2405 card->debugfs_dir = NULL;
2406 }
2407}
2408
2409static void slic_debug_init(void)
2410{
2411 struct dentry *ent;
2412
2413 ent = debugfs_create_dir("slic", NULL);
2414 if (!ent || IS_ERR(ent)) {
2415 pr_info(PFX "debugfs create directory failed\n");
2416 return;
2417 }
2418
2419 slic_debugfs = ent;
2420}
2421
2422static void slic_debug_cleanup(void)
2423{
2424 if (slic_debugfs) {
2425 debugfs_remove(slic_debugfs);
2426 slic_debugfs = NULL;
2427 }
2428}
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440static void slic_link_event_handler(struct adapter *adapter)
2441{
2442 int status;
2443 struct slic_shmem *pshmem;
2444
2445 if (adapter->state != ADAPT_UP) {
2446
2447 return;
2448 }
2449
2450 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2451
2452#if BITS_PER_LONG == 64
2453 status = slic_upr_request(adapter,
2454 SLIC_UPR_RLSR,
2455 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2456 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2457 0, 0);
2458#else
2459 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
2460 (u32) &pshmem->linkstatus,
2461 0, 0, 0);
2462#endif
2463 ASSERT(status == 0);
2464}
2465
2466static void slic_init_cleanup(struct adapter *adapter)
2467{
2468 if (adapter->intrregistered) {
2469 adapter->intrregistered = 0;
2470 free_irq(adapter->netdev->irq, adapter->netdev);
2471
2472 }
2473 if (adapter->pshmem) {
2474 pci_free_consistent(adapter->pcidev,
2475 sizeof(struct slic_shmem),
2476 adapter->pshmem, adapter->phys_shmem);
2477 adapter->pshmem = NULL;
2478 adapter->phys_shmem = (dma_addr_t) NULL;
2479 }
2480
2481 if (adapter->pingtimerset) {
2482 adapter->pingtimerset = 0;
2483 del_timer(&adapter->pingtimer);
2484 }
2485
2486 slic_rspqueue_free(adapter);
2487 slic_cmdq_free(adapter);
2488 slic_rcvqueue_free(adapter);
2489}
2490
2491
2492
2493
2494
2495static int slic_mcast_add_list(struct adapter *adapter, char *address)
2496{
2497 struct mcast_address *mcaddr, *mlist;
2498
2499
2500 mlist = adapter->mcastaddrs;
2501 while (mlist) {
2502 if (!compare_ether_addr(mlist->address, address))
2503 return 0;
2504 mlist = mlist->next;
2505 }
2506
2507
2508 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
2509 if (mcaddr == NULL)
2510 return 1;
2511
2512 memcpy(mcaddr->address, address, 6);
2513
2514 mcaddr->next = adapter->mcastaddrs;
2515 adapter->mcastaddrs = mcaddr;
2516
2517 return 0;
2518}
2519
2520static void slic_mcast_set_list(struct net_device *dev)
2521{
2522 struct adapter *adapter = netdev_priv(dev);
2523 int status = 0;
2524 char *addresses;
2525 struct netdev_hw_addr *ha;
2526
2527 ASSERT(adapter);
2528
2529 netdev_for_each_mc_addr(ha, dev) {
2530 addresses = (char *) &ha->addr;
2531 status = slic_mcast_add_list(adapter, addresses);
2532 if (status != 0)
2533 break;
2534 slic_mcast_set_bit(adapter, addresses);
2535 }
2536
2537 if (adapter->devflags_prev != dev->flags) {
2538 adapter->macopts = MAC_DIRECTED;
2539 if (dev->flags) {
2540 if (dev->flags & IFF_BROADCAST)
2541 adapter->macopts |= MAC_BCAST;
2542 if (dev->flags & IFF_PROMISC)
2543 adapter->macopts |= MAC_PROMISC;
2544 if (dev->flags & IFF_ALLMULTI)
2545 adapter->macopts |= MAC_ALLMCAST;
2546 if (dev->flags & IFF_MULTICAST)
2547 adapter->macopts |= MAC_MCAST;
2548 }
2549 adapter->devflags_prev = dev->flags;
2550 slic_config_set(adapter, true);
2551 } else {
2552 if (status == 0)
2553 slic_mcast_set_mask(adapter);
2554 }
2555}
2556
2557#define XMIT_FAIL_LINK_STATE 1
2558#define XMIT_FAIL_ZERO_LENGTH 2
2559#define XMIT_FAIL_HOSTCMD_FAIL 3
2560
2561static void slic_xmit_build_request(struct adapter *adapter,
2562 struct slic_hostcmd *hcmd, struct sk_buff *skb)
2563{
2564 struct slic_host64_cmd *ihcmd;
2565 ulong phys_addr;
2566
2567 ihcmd = &hcmd->cmd64;
2568
2569 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
2570 ihcmd->command = IHCMD_XMT_REQ;
2571 ihcmd->u.slic_buffers.totlen = skb->len;
2572 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
2573 PCI_DMA_TODEVICE);
2574 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
2575 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
2576 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
2577#if BITS_PER_LONG == 64
2578 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
2579 (u64) hcmd) + 31) >> 5);
2580#else
2581 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
2582 (u32) hcmd) + 31) >> 5);
2583#endif
2584}
2585
2586static void slic_xmit_fail(struct adapter *adapter,
2587 struct sk_buff *skb,
2588 void *cmd, u32 skbtype, u32 status)
2589{
2590 if (adapter->xmitq_full)
2591 netif_stop_queue(adapter->netdev);
2592 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
2593 switch (status) {
2594 case XMIT_FAIL_LINK_STATE:
2595 dev_err(&adapter->netdev->dev,
2596 "reject xmit skb[%p: %x] linkstate[%s] "
2597 "adapter[%s:%d] card[%s:%d]\n",
2598 skb, skb->pkt_type,
2599 SLIC_LINKSTATE(adapter->linkstate),
2600 SLIC_ADAPTER_STATE(adapter->state),
2601 adapter->state,
2602 SLIC_CARD_STATE(adapter->card->state),
2603 adapter->card->state);
2604 break;
2605 case XMIT_FAIL_ZERO_LENGTH:
2606 dev_err(&adapter->netdev->dev,
2607 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
2608 skb, skb->pkt_type);
2609 break;
2610 case XMIT_FAIL_HOSTCMD_FAIL:
2611 dev_err(&adapter->netdev->dev,
2612 "xmit_start skb[%p] type[%x] No host commands "
2613 "available\n", skb, skb->pkt_type);
2614 break;
2615 default:
2616 ASSERT(0);
2617 }
2618 }
2619 dev_kfree_skb(skb);
2620 adapter->netdev->stats.tx_dropped++;
2621}
2622
2623static void slic_rcv_handle_error(struct adapter *adapter,
2624 struct slic_rcvbuf *rcvbuf)
2625{
2626 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
2627 struct net_device *netdev = adapter->netdev;
2628
2629 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
2630 if (hdr->frame_status14 & VRHSTAT_802OE)
2631 adapter->if_events.oflow802++;
2632 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
2633 adapter->if_events.Tprtoflow++;
2634 if (hdr->frame_status_b14 & VRHSTATB_802UE)
2635 adapter->if_events.uflow802++;
2636 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
2637 adapter->if_events.rcvearly++;
2638 netdev->stats.rx_fifo_errors++;
2639 }
2640 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
2641 adapter->if_events.Bufov++;
2642 netdev->stats.rx_over_errors++;
2643 }
2644 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
2645 adapter->if_events.Carre++;
2646 netdev->stats.tx_carrier_errors++;
2647 }
2648 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
2649 adapter->if_events.Longe++;
2650 if (hdr->frame_status_b14 & VRHSTATB_PREA)
2651 adapter->if_events.Invp++;
2652 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
2653 adapter->if_events.Crc++;
2654 netdev->stats.rx_crc_errors++;
2655 }
2656 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
2657 adapter->if_events.Drbl++;
2658 if (hdr->frame_status_b14 & VRHSTATB_CODE)
2659 adapter->if_events.Code++;
2660 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
2661 adapter->if_events.TpCsum++;
2662 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
2663 adapter->if_events.TpHlen++;
2664 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
2665 adapter->if_events.IpCsum++;
2666 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
2667 adapter->if_events.IpLen++;
2668 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
2669 adapter->if_events.IpHlen++;
2670 } else {
2671 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
2672 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
2673
2674 if (xerr == VGBSTAT_XCSERR)
2675 adapter->if_events.TpCsum++;
2676 if (xerr == VGBSTAT_XUFLOW)
2677 adapter->if_events.Tprtoflow++;
2678 if (xerr == VGBSTAT_XHLEN)
2679 adapter->if_events.TpHlen++;
2680 }
2681 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
2682 u32 nerr =
2683 (hdr->
2684 frame_statusGB >> VGBSTAT_NERRSHFT) &
2685 VGBSTAT_NERRMSK;
2686 if (nerr == VGBSTAT_NCSERR)
2687 adapter->if_events.IpCsum++;
2688 if (nerr == VGBSTAT_NUFLOW)
2689 adapter->if_events.IpLen++;
2690 if (nerr == VGBSTAT_NHLEN)
2691 adapter->if_events.IpHlen++;
2692 }
2693 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
2694 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
2695
2696 if (lerr == VGBSTAT_LDEARLY)
2697 adapter->if_events.rcvearly++;
2698 if (lerr == VGBSTAT_LBOFLO)
2699 adapter->if_events.Bufov++;
2700 if (lerr == VGBSTAT_LCODERR)
2701 adapter->if_events.Code++;
2702 if (lerr == VGBSTAT_LDBLNBL)
2703 adapter->if_events.Drbl++;
2704 if (lerr == VGBSTAT_LCRCERR)
2705 adapter->if_events.Crc++;
2706 if (lerr == VGBSTAT_LOFLO)
2707 adapter->if_events.oflow802++;
2708 if (lerr == VGBSTAT_LUFLO)
2709 adapter->if_events.uflow802++;
2710 }
2711 }
2712 return;
2713}
2714
2715#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
2716#define M_FAST_PATH 0x0040
2717
2718static void slic_rcv_handler(struct adapter *adapter)
2719{
2720 struct net_device *netdev = adapter->netdev;
2721 struct sk_buff *skb;
2722 struct slic_rcvbuf *rcvbuf;
2723 u32 frames = 0;
2724
2725 while ((skb = slic_rcvqueue_getnext(adapter))) {
2726 u32 rx_bytes;
2727
2728 ASSERT(skb->head);
2729 rcvbuf = (struct slic_rcvbuf *)skb->head;
2730 adapter->card->events++;
2731 if (rcvbuf->status & IRHDDR_ERR) {
2732 adapter->rx_errors++;
2733 slic_rcv_handle_error(adapter, rcvbuf);
2734 slic_rcvqueue_reinsert(adapter, skb);
2735 continue;
2736 }
2737
2738 if (!slic_mac_filter(adapter, (struct ether_header *)
2739 rcvbuf->data)) {
2740 slic_rcvqueue_reinsert(adapter, skb);
2741 continue;
2742 }
2743 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2744 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2745 skb_put(skb, rx_bytes);
2746 netdev->stats.rx_packets++;
2747 netdev->stats.rx_bytes += rx_bytes;
2748#if SLIC_OFFLOAD_IP_CHECKSUM
2749 skb->ip_summed = CHECKSUM_UNNECESSARY;
2750#endif
2751
2752 skb->dev = adapter->netdev;
2753 skb->protocol = eth_type_trans(skb, skb->dev);
2754 netif_rx(skb);
2755
2756 ++frames;
2757#if SLIC_INTERRUPT_PROCESS_LIMIT
2758 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2759 adapter->rcv_interrupt_yields++;
2760 break;
2761 }
2762#endif
2763 }
2764 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2765}
2766
2767static void slic_xmit_complete(struct adapter *adapter)
2768{
2769 struct slic_hostcmd *hcmd;
2770 struct slic_rspbuf *rspbuf;
2771 u32 frames = 0;
2772 struct slic_handle_word slic_handle_word;
2773
2774 do {
2775 rspbuf = slic_rspqueue_getnext(adapter);
2776 if (!rspbuf)
2777 break;
2778 adapter->xmit_completes++;
2779 adapter->card->events++;
2780
2781
2782
2783 slic_handle_word.handle_token = rspbuf->hosthandle;
2784 ASSERT(slic_handle_word.handle_index);
2785 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
2786 hcmd =
2787 (struct slic_hostcmd *)
2788 adapter->slic_handles[slic_handle_word.handle_index].
2789 address;
2790
2791 ASSERT(hcmd);
2792 ASSERT(hcmd->pslic_handle ==
2793 &adapter->slic_handles[slic_handle_word.handle_index]);
2794 if (hcmd->type == SLIC_CMD_DUMB) {
2795 if (hcmd->skb)
2796 dev_kfree_skb_irq(hcmd->skb);
2797 slic_cmdq_putdone_irq(adapter, hcmd);
2798 }
2799 rspbuf->status = 0;
2800 rspbuf->hosthandle = 0;
2801 frames++;
2802 } while (1);
2803 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2804}
2805
2806static irqreturn_t slic_interrupt(int irq, void *dev_id)
2807{
2808 struct net_device *dev = (struct net_device *)dev_id;
2809 struct adapter *adapter = netdev_priv(dev);
2810 u32 isr;
2811
2812 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2813 slic_reg32_write(&adapter->slic_regs->slic_icr,
2814 ICR_INT_MASK, FLUSH);
2815 isr = adapter->isrcopy = adapter->pshmem->isr;
2816 adapter->pshmem->isr = 0;
2817 adapter->num_isrs++;
2818 switch (adapter->card->state) {
2819 case CARD_UP:
2820 if (isr & ~ISR_IO) {
2821 if (isr & ISR_ERR) {
2822 adapter->error_interrupts++;
2823 if (isr & ISR_RMISS) {
2824 int count;
2825 int pre_count;
2826 int errors;
2827
2828 struct slic_rcvqueue *rcvq =
2829 &adapter->rcvqueue;
2830
2831 adapter->
2832 error_rmiss_interrupts++;
2833 if (!rcvq->errors)
2834 rcv_count = rcvq->count;
2835 pre_count = rcvq->count;
2836 errors = rcvq->errors;
2837
2838 while (rcvq->count <
2839 SLIC_RCVQ_FILLTHRESH) {
2840 count =
2841 slic_rcvqueue_fill
2842 (adapter);
2843 if (!count)
2844 break;
2845 }
2846 } else if (isr & ISR_XDROP) {
2847 dev_err(&dev->dev,
2848 "isr & ISR_ERR [%x] "
2849 "ISR_XDROP \n", isr);
2850 } else {
2851 dev_err(&dev->dev,
2852 "isr & ISR_ERR [%x]\n",
2853 isr);
2854 }
2855 }
2856
2857 if (isr & ISR_LEVENT) {
2858 adapter->linkevent_interrupts++;
2859 slic_link_event_handler(adapter);
2860 }
2861
2862 if ((isr & ISR_UPC) ||
2863 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2864 adapter->upr_interrupts++;
2865 slic_upr_request_complete(adapter, isr);
2866 }
2867 }
2868
2869 if (isr & ISR_RCV) {
2870 adapter->rcv_interrupts++;
2871 slic_rcv_handler(adapter);
2872 }
2873
2874 if (isr & ISR_CMD) {
2875 adapter->xmit_interrupts++;
2876 slic_xmit_complete(adapter);
2877 }
2878 break;
2879
2880 case CARD_DOWN:
2881 if ((isr & ISR_UPC) ||
2882 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2883 adapter->upr_interrupts++;
2884 slic_upr_request_complete(adapter, isr);
2885 }
2886 break;
2887
2888 default:
2889 break;
2890 }
2891
2892 adapter->isrcopy = 0;
2893 adapter->all_reg_writes += 2;
2894 adapter->isr_reg_writes++;
2895 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2896 } else {
2897 adapter->false_interrupts++;
2898 }
2899 return IRQ_HANDLED;
2900}
2901
2902#define NORMAL_ETHFRAME 0
2903
2904static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2905{
2906 struct sliccard *card;
2907 struct adapter *adapter = netdev_priv(dev);
2908 struct slic_hostcmd *hcmd = NULL;
2909 u32 status = 0;
2910 u32 skbtype = NORMAL_ETHFRAME;
2911 void *offloadcmd = NULL;
2912
2913 card = adapter->card;
2914 ASSERT(card);
2915 if ((adapter->linkstate != LINK_UP) ||
2916 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2917 status = XMIT_FAIL_LINK_STATE;
2918 goto xmit_fail;
2919
2920 } else if (skb->len == 0) {
2921 status = XMIT_FAIL_ZERO_LENGTH;
2922 goto xmit_fail;
2923 }
2924
2925 if (skbtype == NORMAL_ETHFRAME) {
2926 hcmd = slic_cmdq_getfree(adapter);
2927 if (!hcmd) {
2928 adapter->xmitq_full = 1;
2929 status = XMIT_FAIL_HOSTCMD_FAIL;
2930 goto xmit_fail;
2931 }
2932 ASSERT(hcmd->pslic_handle);
2933 ASSERT(hcmd->cmd64.hosthandle ==
2934 hcmd->pslic_handle->token.handle_token);
2935 hcmd->skb = skb;
2936 hcmd->busy = 1;
2937 hcmd->type = SLIC_CMD_DUMB;
2938 if (skbtype == NORMAL_ETHFRAME)
2939 slic_xmit_build_request(adapter, hcmd, skb);
2940 }
2941 dev->stats.tx_packets++;
2942 dev->stats.tx_bytes += skb->len;
2943
2944#ifdef DEBUG_DUMP
2945 if (adapter->kill_card) {
2946 struct slic_host64_cmd ihcmd;
2947
2948 ihcmd = &hcmd->cmd64;
2949
2950 ihcmd->flags |= 0x40;
2951 adapter->kill_card = 0;
2952 }
2953#endif
2954 if (hcmd->paddrh == 0) {
2955 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2956 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2957 } else {
2958 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2959 (hcmd->paddrl | hcmd->cmdsize),
2960 &adapter->slic_regs->slic_addr_upper,
2961 hcmd->paddrh, DONT_FLUSH);
2962 }
2963xmit_done:
2964 return NETDEV_TX_OK;
2965xmit_fail:
2966 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
2967 goto xmit_done;
2968}
2969
2970
2971static void slic_adapter_freeresources(struct adapter *adapter)
2972{
2973 slic_init_cleanup(adapter);
2974 adapter->error_interrupts = 0;
2975 adapter->rcv_interrupts = 0;
2976 adapter->xmit_interrupts = 0;
2977 adapter->linkevent_interrupts = 0;
2978 adapter->upr_interrupts = 0;
2979 adapter->num_isrs = 0;
2980 adapter->xmit_completes = 0;
2981 adapter->rcv_broadcasts = 0;
2982 adapter->rcv_multicasts = 0;
2983 adapter->rcv_unicasts = 0;
2984}
2985
2986static int slic_adapter_allocresources(struct adapter *adapter)
2987{
2988 if (!adapter->intrregistered) {
2989 int retval;
2990
2991 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2992 slic_global.driver_lock.flags);
2993
2994 retval = request_irq(adapter->netdev->irq,
2995 &slic_interrupt,
2996 IRQF_SHARED,
2997 adapter->netdev->name, adapter->netdev);
2998
2999 spin_lock_irqsave(&slic_global.driver_lock.lock,
3000 slic_global.driver_lock.flags);
3001
3002 if (retval) {
3003 dev_err(&adapter->netdev->dev,
3004 "request_irq (%s) FAILED [%x]\n",
3005 adapter->netdev->name, retval);
3006 return retval;
3007 }
3008 adapter->intrregistered = 1;
3009 }
3010 return 0;
3011}
3012
3013
3014
3015
3016
3017
3018
3019static int slic_if_init(struct adapter *adapter)
3020{
3021 struct sliccard *card = adapter->card;
3022 struct net_device *dev = adapter->netdev;
3023 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3024 struct slic_shmem *pshmem;
3025 int rc;
3026
3027 ASSERT(card);
3028
3029
3030 if (adapter->state != ADAPT_DOWN) {
3031 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
3032 __func__);
3033 rc = -EIO;
3034 goto err;
3035 }
3036 ASSERT(adapter->linkstate == LINK_DOWN);
3037
3038 adapter->devflags_prev = dev->flags;
3039 adapter->macopts = MAC_DIRECTED;
3040 if (dev->flags) {
3041 if (dev->flags & IFF_BROADCAST)
3042 adapter->macopts |= MAC_BCAST;
3043 if (dev->flags & IFF_PROMISC)
3044 adapter->macopts |= MAC_PROMISC;
3045 if (dev->flags & IFF_ALLMULTI)
3046 adapter->macopts |= MAC_ALLMCAST;
3047 if (dev->flags & IFF_MULTICAST)
3048 adapter->macopts |= MAC_MCAST;
3049 }
3050 rc = slic_adapter_allocresources(adapter);
3051 if (rc) {
3052 dev_err(&dev->dev,
3053 "%s: slic_adapter_allocresources FAILED %x\n",
3054 __func__, rc);
3055 slic_adapter_freeresources(adapter);
3056 goto err;
3057 }
3058
3059 if (!adapter->queues_initialized) {
3060 if ((rc = slic_rspqueue_init(adapter)))
3061 goto err;
3062 if ((rc = slic_cmdq_init(adapter)))
3063 goto err;
3064 if ((rc = slic_rcvqueue_init(adapter)))
3065 goto err;
3066 adapter->queues_initialized = 1;
3067 }
3068
3069 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3070 mdelay(1);
3071
3072 if (!adapter->isp_initialized) {
3073 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3074
3075 spin_lock_irqsave(&adapter->bit64reglock.lock,
3076 adapter->bit64reglock.flags);
3077
3078#if BITS_PER_LONG == 64
3079 slic_reg32_write(&slic_regs->slic_addr_upper,
3080 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
3081 slic_reg32_write(&slic_regs->slic_isp,
3082 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
3083#else
3084 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3085 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
3086#endif
3087 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
3088 adapter->bit64reglock.flags);
3089 adapter->isp_initialized = 1;
3090 }
3091
3092 adapter->state = ADAPT_UP;
3093 if (!card->loadtimerset) {
3094 init_timer(&card->loadtimer);
3095 card->loadtimer.expires =
3096 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
3097 card->loadtimer.data = (ulong) card;
3098 card->loadtimer.function = &slic_timer_load_check;
3099 add_timer(&card->loadtimer);
3100
3101 card->loadtimerset = 1;
3102 }
3103
3104 if (!adapter->pingtimerset) {
3105 init_timer(&adapter->pingtimer);
3106 adapter->pingtimer.expires =
3107 jiffies + (PING_TIMER_INTERVAL * HZ);
3108 adapter->pingtimer.data = (ulong) dev;
3109 adapter->pingtimer.function = &slic_timer_ping;
3110 add_timer(&adapter->pingtimer);
3111 adapter->pingtimerset = 1;
3112 adapter->card->pingstatus = ISR_PINGMASK;
3113 }
3114
3115
3116
3117
3118 adapter->isrcopy = 0;
3119 adapter->pshmem->isr = 0;
3120 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
3121 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
3122
3123 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
3124 slic_link_event_handler(adapter);
3125
3126err:
3127 return rc;
3128}
3129
3130static int slic_entry_open(struct net_device *dev)
3131{
3132 struct adapter *adapter = netdev_priv(dev);
3133 struct sliccard *card = adapter->card;
3134 int status;
3135
3136 ASSERT(adapter);
3137 ASSERT(card);
3138
3139 netif_stop_queue(adapter->netdev);
3140
3141 spin_lock_irqsave(&slic_global.driver_lock.lock,
3142 slic_global.driver_lock.flags);
3143 if (!adapter->activated) {
3144 card->adapters_activated++;
3145 slic_global.num_slic_ports_active++;
3146 adapter->activated = 1;
3147 }
3148 status = slic_if_init(adapter);
3149
3150 if (status != 0) {
3151 if (adapter->activated) {
3152 card->adapters_activated--;
3153 slic_global.num_slic_ports_active--;
3154 adapter->activated = 0;
3155 }
3156 goto spin_unlock;
3157 }
3158 if (!card->master)
3159 card->master = adapter;
3160
3161spin_unlock:
3162 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3163 slic_global.driver_lock.flags);
3164 return status;
3165}
3166
3167static void slic_card_cleanup(struct sliccard *card)
3168{
3169 if (card->loadtimerset) {
3170 card->loadtimerset = 0;
3171 del_timer(&card->loadtimer);
3172 }
3173
3174 slic_debug_card_destroy(card);
3175
3176 kfree(card);
3177}
3178
3179static void __devexit slic_entry_remove(struct pci_dev *pcidev)
3180{
3181 struct net_device *dev = pci_get_drvdata(pcidev);
3182 u32 mmio_start = 0;
3183 uint mmio_len = 0;
3184 struct adapter *adapter = netdev_priv(dev);
3185 struct sliccard *card;
3186 struct mcast_address *mcaddr, *mlist;
3187
3188 slic_adapter_freeresources(adapter);
3189 slic_unmap_mmio_space(adapter);
3190 unregister_netdev(dev);
3191
3192 mmio_start = pci_resource_start(pcidev, 0);
3193 mmio_len = pci_resource_len(pcidev, 0);
3194
3195 release_mem_region(mmio_start, mmio_len);
3196
3197 iounmap((void __iomem *)dev->base_addr);
3198
3199 mlist = adapter->mcastaddrs;
3200 while (mlist) {
3201 mcaddr = mlist;
3202 mlist = mlist->next;
3203 kfree(mcaddr);
3204 }
3205 ASSERT(adapter->card);
3206 card = adapter->card;
3207 ASSERT(card->adapters_allocated);
3208 card->adapters_allocated--;
3209 adapter->allocated = 0;
3210 if (!card->adapters_allocated) {
3211 struct sliccard *curr_card = slic_global.slic_card;
3212 if (curr_card == card) {
3213 slic_global.slic_card = card->next;
3214 } else {
3215 while (curr_card->next != card)
3216 curr_card = curr_card->next;
3217 ASSERT(curr_card);
3218 curr_card->next = card->next;
3219 }
3220 ASSERT(slic_global.num_slic_cards);
3221 slic_global.num_slic_cards--;
3222 slic_card_cleanup(card);
3223 }
3224 free_netdev(dev);
3225 pci_release_regions(pcidev);
3226 pci_disable_device(pcidev);
3227}
3228
3229static int slic_entry_halt(struct net_device *dev)
3230{
3231 struct adapter *adapter = netdev_priv(dev);
3232 struct sliccard *card = adapter->card;
3233 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3234
3235 spin_lock_irqsave(&slic_global.driver_lock.lock,
3236 slic_global.driver_lock.flags);
3237 ASSERT(card);
3238 netif_stop_queue(adapter->netdev);
3239 adapter->state = ADAPT_DOWN;
3240 adapter->linkstate = LINK_DOWN;
3241 adapter->upr_list = NULL;
3242 adapter->upr_busy = 0;
3243 adapter->devflags_prev = 0;
3244 ASSERT(card->adapter[adapter->cardindex] == adapter);
3245 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3246 adapter->all_reg_writes++;
3247 adapter->icr_reg_writes++;
3248 slic_config_clear(adapter);
3249 if (adapter->activated) {
3250 card->adapters_activated--;
3251 slic_global.num_slic_ports_active--;
3252 adapter->activated = 0;
3253 }
3254#ifdef AUTOMATIC_RESET
3255 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
3256#endif
3257
3258
3259
3260 slic_cmdq_reset(adapter);
3261
3262#ifdef AUTOMATIC_RESET
3263 if (!card->adapters_activated)
3264 slic_card_init(card, adapter);
3265#endif
3266
3267 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3268 slic_global.driver_lock.flags);
3269 return 0;
3270}
3271
3272static struct net_device_stats *slic_get_stats(struct net_device *dev)
3273{
3274 struct adapter *adapter = netdev_priv(dev);
3275
3276 ASSERT(adapter);
3277 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
3278 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
3279 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
3280 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
3281 dev->stats.tx_heartbeat_errors = 0;
3282 dev->stats.tx_aborted_errors = 0;
3283 dev->stats.tx_window_errors = 0;
3284 dev->stats.tx_fifo_errors = 0;
3285 dev->stats.rx_frame_errors = 0;
3286 dev->stats.rx_length_errors = 0;
3287
3288 return &dev->stats;
3289}
3290
3291static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3292{
3293 struct adapter *adapter = netdev_priv(dev);
3294 struct ethtool_cmd edata;
3295 struct ethtool_cmd ecmd;
3296 u32 data[7];
3297 u32 intagg;
3298
3299 ASSERT(rq);
3300 switch (cmd) {
3301 case SIOCSLICSETINTAGG:
3302 if (copy_from_user(data, rq->ifr_data, 28))
3303 return -EFAULT;
3304 intagg = data[0];
3305 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
3306 __func__, intagg);
3307 slic_intagg_set(adapter, intagg);
3308 return 0;
3309
3310#ifdef SLIC_TRACE_DUMP_ENABLED
3311 case SIOCSLICTRACEDUMP:
3312 {
3313 u32 value;
3314 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
3315
3316 if (copy_from_user(data, rq->ifr_data, 28)) {
3317 PRINT_ERROR
3318 ("slic: copy_from_user FAILED getting initial simba param\n");
3319 return -EFAULT;
3320 }
3321
3322 value = data[0];
3323 if (tracemon_request == SLIC_DUMP_DONE) {
3324 PRINT_ERROR
3325 ("ATK Diagnostic Trace Dump Requested\n");
3326 tracemon_request = SLIC_DUMP_REQUESTED;
3327 tracemon_request_type = value;
3328 tracemon_timestamp = jiffies;
3329 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
3330 (tracemon_request ==
3331 SLIC_DUMP_IN_PROGRESS)) {
3332 PRINT_ERROR
3333 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
3334 } else {
3335 PRINT_ERROR
3336 ("ATK Diagnostic Trace Dump Requested\n");
3337 tracemon_request = SLIC_DUMP_REQUESTED;
3338 tracemon_request_type = value;
3339 tracemon_timestamp = jiffies;
3340 }
3341 return 0;
3342 }
3343#endif
3344 case SIOCETHTOOL:
3345 ASSERT(adapter);
3346 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
3347 return -EFAULT;
3348
3349 if (ecmd.cmd == ETHTOOL_GSET) {
3350 edata.supported = (SUPPORTED_10baseT_Half |
3351 SUPPORTED_10baseT_Full |
3352 SUPPORTED_100baseT_Half |
3353 SUPPORTED_100baseT_Full |
3354 SUPPORTED_Autoneg | SUPPORTED_MII);
3355 edata.port = PORT_MII;
3356 edata.transceiver = XCVR_INTERNAL;
3357 edata.phy_address = 0;
3358 if (adapter->linkspeed == LINK_100MB)
3359 edata.speed = SPEED_100;
3360 else if (adapter->linkspeed == LINK_10MB)
3361 edata.speed = SPEED_10;
3362 else
3363 edata.speed = 0;
3364
3365 if (adapter->linkduplex == LINK_FULLD)
3366 edata.duplex = DUPLEX_FULL;
3367 else
3368 edata.duplex = DUPLEX_HALF;
3369
3370 edata.autoneg = AUTONEG_ENABLE;
3371 edata.maxtxpkt = 1;
3372 edata.maxrxpkt = 1;
3373 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
3374 return -EFAULT;
3375
3376 } else if (ecmd.cmd == ETHTOOL_SSET) {
3377 if (!capable(CAP_NET_ADMIN))
3378 return -EPERM;
3379
3380 if (adapter->linkspeed == LINK_100MB)
3381 edata.speed = SPEED_100;
3382 else if (adapter->linkspeed == LINK_10MB)
3383 edata.speed = SPEED_10;
3384 else
3385 edata.speed = 0;
3386
3387 if (adapter->linkduplex == LINK_FULLD)
3388 edata.duplex = DUPLEX_FULL;
3389 else
3390 edata.duplex = DUPLEX_HALF;
3391
3392 edata.autoneg = AUTONEG_ENABLE;
3393 edata.maxtxpkt = 1;
3394 edata.maxrxpkt = 1;
3395 if ((ecmd.speed != edata.speed) ||
3396 (ecmd.duplex != edata.duplex)) {
3397 u32 speed;
3398 u32 duplex;
3399
3400 if (ecmd.speed == SPEED_10)
3401 speed = 0;
3402 else
3403 speed = PCR_SPEED_100;
3404 if (ecmd.duplex == DUPLEX_FULL)
3405 duplex = PCR_DUPLEX_FULL;
3406 else
3407 duplex = 0;
3408 slic_link_config(adapter, speed, duplex);
3409 slic_link_event_handler(adapter);
3410 }
3411 }
3412 return 0;
3413 default:
3414 return -EOPNOTSUPP;
3415 }
3416}
3417
3418static void slic_config_pci(struct pci_dev *pcidev)
3419{
3420 u16 pci_command;
3421 u16 new_command;
3422
3423 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
3424
3425 new_command = pci_command | PCI_COMMAND_MASTER
3426 | PCI_COMMAND_MEMORY
3427 | PCI_COMMAND_INVALIDATE
3428 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
3429 if (pci_command != new_command)
3430 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
3431}
3432
3433static int slic_card_init(struct sliccard *card, struct adapter *adapter)
3434{
3435 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3436 struct slic_eeprom *peeprom;
3437 struct oslic_eeprom *pOeeprom;
3438 dma_addr_t phys_config;
3439 u32 phys_configh;
3440 u32 phys_configl;
3441 u32 i = 0;
3442 struct slic_shmem *pshmem;
3443 int status;
3444 uint macaddrs = card->card_size;
3445 ushort eecodesize;
3446 ushort dramsize;
3447 ushort ee_chksum;
3448 ushort calc_chksum;
3449 struct slic_config_mac *pmac;
3450 unsigned char fruformat;
3451 unsigned char oemfruformat;
3452 struct atk_fru *patkfru;
3453 union oemfru *poemfru;
3454
3455
3456 slic_soft_reset(adapter);
3457
3458
3459 status = slic_card_download(adapter);
3460
3461 if (status != 0) {
3462 dev_err(&adapter->pcidev->dev,
3463 "download failed bus %d slot %d\n",
3464 adapter->busnumber, adapter->slotnumber);
3465 return status;
3466 }
3467
3468 if (!card->config_set) {
3469 peeprom = pci_alloc_consistent(adapter->pcidev,
3470 sizeof(struct slic_eeprom),
3471 &phys_config);
3472
3473 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
3474 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
3475
3476 if (!peeprom) {
3477 dev_err(&adapter->pcidev->dev,
3478 "eeprom read failed to get memory "
3479 "bus %d slot %d\n", adapter->busnumber,
3480 adapter->slotnumber);
3481 return -ENOMEM;
3482 } else {
3483 memset(peeprom, 0, sizeof(struct slic_eeprom));
3484 }
3485 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3486 mdelay(1);
3487 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3488
3489 spin_lock_irqsave(&adapter->bit64reglock.lock,
3490 adapter->bit64reglock.flags);
3491 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3492 slic_reg32_write(&slic_regs->slic_isp,
3493 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
3494 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
3495 adapter->bit64reglock.flags);
3496
3497 slic_config_get(adapter, phys_configl, phys_configh);
3498
3499 for (;;) {
3500 if (adapter->pshmem->isr) {
3501 if (adapter->pshmem->isr & ISR_UPC) {
3502 adapter->pshmem->isr = 0;
3503 slic_reg64_write(adapter,
3504 &slic_regs->slic_isp, 0,
3505 &slic_regs->slic_addr_upper,
3506 0, FLUSH);
3507 slic_reg32_write(&slic_regs->slic_isr,
3508 0, FLUSH);
3509
3510 slic_upr_request_complete(adapter, 0);
3511 break;
3512 } else {
3513 adapter->pshmem->isr = 0;
3514 slic_reg32_write(&slic_regs->slic_isr,
3515 0, FLUSH);
3516 }
3517 } else {
3518 mdelay(1);
3519 i++;
3520 if (i > 5000) {
3521 dev_err(&adapter->pcidev->dev,
3522 "%d config data fetch timed out!\n",
3523 adapter->port);
3524 slic_reg64_write(adapter,
3525 &slic_regs->slic_isp, 0,
3526 &slic_regs->slic_addr_upper,
3527 0, FLUSH);
3528 return -EINVAL;
3529 }
3530 }
3531 }
3532
3533 switch (adapter->devid) {
3534
3535 case SLIC_2GB_DEVICE_ID:
3536
3537 pOeeprom = (struct oslic_eeprom *) peeprom;
3538 eecodesize = pOeeprom->EecodeSize;
3539 dramsize = pOeeprom->DramSize;
3540 pmac = pOeeprom->MacInfo;
3541 fruformat = pOeeprom->FruFormat;
3542 patkfru = &pOeeprom->AtkFru;
3543 oemfruformat = pOeeprom->OemFruFormat;
3544 poemfru = &pOeeprom->OemFru;
3545 macaddrs = 2;
3546
3547
3548
3549
3550 break;
3551 default:
3552
3553 eecodesize = peeprom->EecodeSize;
3554 dramsize = peeprom->DramSize;
3555 pmac = peeprom->u2.mac.MacInfo;
3556 fruformat = peeprom->FruFormat;
3557 patkfru = &peeprom->AtkFru;
3558 oemfruformat = peeprom->OemFruFormat;
3559 poemfru = &peeprom->OemFru;
3560 break;
3561 }
3562
3563 card->config.EepromValid = false;
3564
3565
3566 if ((eecodesize <= MAX_EECODE_SIZE) &&
3567 (eecodesize >= MIN_EECODE_SIZE)) {
3568
3569 ee_chksum =
3570 *(u16 *) ((char *) peeprom + (eecodesize - 2));
3571
3572
3573
3574 calc_chksum =
3575 ~slic_eeprom_cksum((char *) peeprom,
3576 (eecodesize - 2));
3577
3578
3579
3580
3581 if (ee_chksum == calc_chksum)
3582 card->config.EepromValid = true;
3583 }
3584
3585 card->config.DramSize = dramsize;
3586
3587
3588 for (i = 0; i < macaddrs; i++) {
3589 memcpy(&card->config.MacInfo[i],
3590 &pmac[i], sizeof(struct slic_config_mac));
3591 }
3592
3593
3594 card->config.FruFormat = fruformat;
3595 memcpy(&card->config.AtkFru, patkfru,
3596 sizeof(struct atk_fru));
3597
3598 pci_free_consistent(adapter->pcidev,
3599 sizeof(struct slic_eeprom),
3600 peeprom, phys_config);
3601
3602 if ((!card->config.EepromValid) &&
3603 (adapter->reg_params.fail_on_bad_eeprom)) {
3604 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
3605 &slic_regs->slic_addr_upper,
3606 0, FLUSH);
3607 dev_err(&adapter->pcidev->dev,
3608 "unsupported CONFIGURATION EEPROM invalid\n");
3609 return -EINVAL;
3610 }
3611
3612 card->config_set = 1;
3613 }
3614
3615 if (slic_card_download_gbrcv(adapter)) {
3616 dev_err(&adapter->pcidev->dev,
3617 "unable to download GB receive microcode\n");
3618 return -EINVAL;
3619 }
3620
3621 if (slic_global.dynamic_intagg)
3622 slic_intagg_set(adapter, 0);
3623 else
3624 slic_intagg_set(adapter, intagg_delay);
3625
3626
3627
3628
3629 card->pingstatus = ISR_PINGMASK;
3630
3631
3632
3633
3634 card->state = CARD_UP;
3635 card->reset_in_progress = 0;
3636
3637 return 0;
3638}
3639
3640static void slic_init_driver(void)
3641{
3642 if (slic_first_init) {
3643 slic_first_init = 0;
3644 spin_lock_init(&slic_global.driver_lock.lock);
3645 slic_debug_init();
3646 }
3647}
3648
3649static void slic_init_adapter(struct net_device *netdev,
3650 struct pci_dev *pcidev,
3651 const struct pci_device_id *pci_tbl_entry,
3652 void __iomem *memaddr, int chip_idx)
3653{
3654 ushort index;
3655 struct slic_handle *pslic_handle;
3656 struct adapter *adapter = netdev_priv(netdev);
3657
3658
3659 adapter->vendid = pci_tbl_entry->vendor;
3660 adapter->devid = pci_tbl_entry->device;
3661 adapter->subsysid = pci_tbl_entry->subdevice;
3662 adapter->busnumber = pcidev->bus->number;
3663 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
3664 adapter->functionnumber = (pcidev->devfn & 0x7);
3665 adapter->memorylength = pci_resource_len(pcidev, 0);
3666 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
3667 adapter->irq = pcidev->irq;
3668
3669 adapter->next_netdevice = head_netdevice;
3670 head_netdevice = netdev;
3671 adapter->chipid = chip_idx;
3672 adapter->port = 0;
3673 adapter->cardindex = adapter->port;
3674 adapter->memorybase = memaddr;
3675 spin_lock_init(&adapter->upr_lock.lock);
3676 spin_lock_init(&adapter->bit64reglock.lock);
3677 spin_lock_init(&adapter->adapter_lock.lock);
3678 spin_lock_init(&adapter->reset_lock.lock);
3679 spin_lock_init(&adapter->handle_lock.lock);
3680
3681 adapter->card_size = 1;
3682
3683
3684
3685 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
3686
3687
3688
3689 for (index = 1, pslic_handle = &adapter->slic_handles[1];
3690 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
3691
3692 pslic_handle->token.handle_index = index;
3693 pslic_handle->type = SLIC_HANDLE_FREE;
3694 pslic_handle->next = adapter->pfree_slic_handles;
3695 adapter->pfree_slic_handles = pslic_handle;
3696 }
3697 adapter->pshmem = (struct slic_shmem *)
3698 pci_alloc_consistent(adapter->pcidev,
3699 sizeof(struct slic_shmem),
3700 &adapter->
3701 phys_shmem);
3702 ASSERT(adapter->pshmem);
3703
3704 if (adapter->pshmem)
3705 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
3706}
3707
3708static const struct net_device_ops slic_netdev_ops = {
3709 .ndo_open = slic_entry_open,
3710 .ndo_stop = slic_entry_halt,
3711 .ndo_start_xmit = slic_xmit_start,
3712 .ndo_do_ioctl = slic_ioctl,
3713 .ndo_set_mac_address = slic_mac_set_address,
3714 .ndo_get_stats = slic_get_stats,
3715 .ndo_set_rx_mode = slic_mcast_set_list,
3716 .ndo_validate_addr = eth_validate_addr,
3717 .ndo_change_mtu = eth_change_mtu,
3718};
3719
3720static u32 slic_card_locate(struct adapter *adapter)
3721{
3722 struct sliccard *card = slic_global.slic_card;
3723 struct physcard *physcard = slic_global.phys_card;
3724 ushort card_hostid;
3725 u16 __iomem *hostid_reg;
3726 uint i;
3727 uint rdhostid_offset = 0;
3728
3729 switch (adapter->devid) {
3730 case SLIC_2GB_DEVICE_ID:
3731 rdhostid_offset = SLIC_RDHOSTID_2GB;
3732 break;
3733 case SLIC_1GB_DEVICE_ID:
3734 rdhostid_offset = SLIC_RDHOSTID_1GB;
3735 break;
3736 default:
3737 return -ENODEV;
3738 }
3739
3740 hostid_reg =
3741 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
3742 rdhostid_offset);
3743
3744
3745 card_hostid = (ushort) readw(hostid_reg);
3746
3747
3748 if (card_hostid == SLIC_HOSTID_DEFAULT) {
3749 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
3750 if (card == NULL)
3751 return -ENOMEM;
3752
3753 card->next = slic_global.slic_card;
3754 slic_global.slic_card = card;
3755 card->busnumber = adapter->busnumber;
3756 card->slotnumber = adapter->slotnumber;
3757
3758
3759 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3760 if (slic_global.cardnuminuse[i] == 0) {
3761 slic_global.cardnuminuse[i] = 1;
3762 card->cardnum = i;
3763 break;
3764 }
3765 }
3766 slic_global.num_slic_cards++;
3767
3768 slic_debug_card_create(card);
3769 } else {
3770
3771 while (card) {
3772 if (card->cardnum == card_hostid)
3773 break;
3774 card = card->next;
3775 }
3776 }
3777
3778 ASSERT(card);
3779 if (!card)
3780 return -ENXIO;
3781
3782 ASSERT(card->adapter[adapter->port] == NULL);
3783 if (!card->adapter[adapter->port]) {
3784 card->adapter[adapter->port] = adapter;
3785 adapter->card = card;
3786 }
3787
3788 card->card_size = 1;
3789
3790 while (physcard) {
3791 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3792 if (!physcard->adapter[i])
3793 continue;
3794 else
3795 break;
3796 }
3797 ASSERT(i != SLIC_MAX_PORTS);
3798 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3799 break;
3800 physcard = physcard->next;
3801 }
3802 if (!physcard) {
3803
3804 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3805 ASSERT(physcard);
3806
3807 physcard->next = slic_global.phys_card;
3808 slic_global.phys_card = physcard;
3809 physcard->adapters_allocd = 1;
3810 } else {
3811 physcard->adapters_allocd++;
3812 }
3813
3814 adapter->physport = physcard->adapters_allocd - 1;
3815
3816 ASSERT(physcard->adapter[adapter->physport] == NULL);
3817 physcard->adapter[adapter->physport] = adapter;
3818 adapter->physcard = physcard;
3819
3820 return 0;
3821}
3822
3823static int __devinit slic_entry_probe(struct pci_dev *pcidev,
3824 const struct pci_device_id *pci_tbl_entry)
3825{
3826 static int cards_found;
3827 static int did_version;
3828 int err = -ENODEV;
3829 struct net_device *netdev;
3830 struct adapter *adapter;
3831 void __iomem *memmapped_ioaddr = NULL;
3832 u32 status = 0;
3833 ulong mmio_start = 0;
3834 ulong mmio_len = 0;
3835 struct sliccard *card = NULL;
3836 int pci_using_dac = 0;
3837
3838 slic_global.dynamic_intagg = dynamic_intagg;
3839
3840 err = pci_enable_device(pcidev);
3841
3842 if (err)
3843 return err;
3844
3845 if (slic_debug > 0 && did_version++ == 0) {
3846 printk(KERN_DEBUG "%s\n", slic_banner);
3847 printk(KERN_DEBUG "%s\n", slic_proc_version);
3848 }
3849
3850 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3851 pci_using_dac = 1;
3852 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3853 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for "
3854 "consistent allocations\n");
3855 goto err_out_disable_pci;
3856 }
3857 } else if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) {
3858 pci_using_dac = 0;
3859 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3860 } else {
3861 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3862 goto err_out_disable_pci;
3863 }
3864
3865 err = pci_request_regions(pcidev, DRV_NAME);
3866 if (err) {
3867 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3868 goto err_out_disable_pci;
3869 }
3870
3871 pci_set_master(pcidev);
3872
3873 netdev = alloc_etherdev(sizeof(struct adapter));
3874 if (!netdev) {
3875 err = -ENOMEM;
3876 goto err_out_exit_slic_probe;
3877 }
3878
3879 SET_NETDEV_DEV(netdev, &pcidev->dev);
3880
3881 pci_set_drvdata(pcidev, netdev);
3882 adapter = netdev_priv(netdev);
3883 adapter->netdev = netdev;
3884 adapter->pcidev = pcidev;
3885 if (pci_using_dac)
3886 netdev->features |= NETIF_F_HIGHDMA;
3887
3888 mmio_start = pci_resource_start(pcidev, 0);
3889 mmio_len = pci_resource_len(pcidev, 0);
3890
3891
3892
3893 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3894 if (!memmapped_ioaddr) {
3895 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3896 mmio_len, mmio_start);
3897 goto err_out_free_netdev;
3898 }
3899
3900 slic_config_pci(pcidev);
3901
3902 slic_init_driver();
3903
3904 slic_init_adapter(netdev,
3905 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3906
3907 status = slic_card_locate(adapter);
3908 if (status) {
3909 dev_err(&pcidev->dev, "cannot locate card\n");
3910 goto err_out_free_mmio_region;
3911 }
3912
3913 card = adapter->card;
3914
3915 if (!adapter->allocated) {
3916 card->adapters_allocated++;
3917 adapter->allocated = 1;
3918 }
3919
3920 status = slic_card_init(card, adapter);
3921
3922 if (status != 0) {
3923 card->state = CARD_FAIL;
3924 adapter->state = ADAPT_FAIL;
3925 adapter->linkstate = LINK_DOWN;
3926 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
3927 } else {
3928 slic_adapter_set_hwaddr(adapter);
3929 }
3930
3931 netdev->base_addr = (unsigned long)adapter->memorybase;
3932 netdev->irq = adapter->irq;
3933 netdev->netdev_ops = &slic_netdev_ops;
3934
3935 slic_debug_adapter_create(adapter);
3936
3937 strcpy(netdev->name, "eth%d");
3938 err = register_netdev(netdev);
3939 if (err) {
3940 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3941 goto err_out_unmap;
3942 }
3943
3944 cards_found++;
3945
3946 return status;
3947
3948err_out_unmap:
3949 iounmap(memmapped_ioaddr);
3950err_out_free_mmio_region:
3951 release_mem_region(mmio_start, mmio_len);
3952err_out_free_netdev:
3953 free_netdev(netdev);
3954err_out_exit_slic_probe:
3955 pci_release_regions(pcidev);
3956err_out_disable_pci:
3957 pci_disable_device(pcidev);
3958 return err;
3959}
3960
3961static struct pci_driver slic_driver = {
3962 .name = DRV_NAME,
3963 .id_table = slic_pci_tbl,
3964 .probe = slic_entry_probe,
3965 .remove = __devexit_p(slic_entry_remove),
3966};
3967
3968static int __init slic_module_init(void)
3969{
3970 slic_init_driver();
3971
3972 if (debug >= 0 && slic_debug != debug)
3973 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
3974 debug);
3975 if (debug >= 0)
3976 slic_debug = debug;
3977
3978 return pci_register_driver(&slic_driver);
3979}
3980
3981static void __exit slic_module_cleanup(void)
3982{
3983 pci_unregister_driver(&slic_driver);
3984 slic_debug_cleanup();
3985}
3986
3987module_init(slic_module_init);
3988module_exit(slic_module_cleanup);
3989