1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
29#include <linux/firmware.h>
30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
46#include <linux/slab.h>
47#include <linux/ratelimit.h>
48
49#include <asm/io.h>
50#include <asm/uaccess.h>
51
52#include "moxa.h"
53
54#define MOXA_VERSION "6.0k"
55
56#define MOXA_FW_HDRLEN 32
57
58#define MOXAMAJOR 172
59
60#define MAX_BOARDS 4
61#define MAX_PORTS_PER_BOARD 32
62#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
63
64#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
65 (brd)->boardType == MOXA_BOARD_C320_PCI)
66
67
68
69
70#define MOXA_BUS_TYPE_ISA 0
71#define MOXA_BUS_TYPE_PCI 1
72
73enum {
74 MOXA_BOARD_C218_PCI = 1,
75 MOXA_BOARD_C218_ISA,
76 MOXA_BOARD_C320_PCI,
77 MOXA_BOARD_C320_ISA,
78 MOXA_BOARD_CP204J,
79};
80
81static char *moxa_brdname[] =
82{
83 "C218 Turbo PCI series",
84 "C218 Turbo ISA series",
85 "C320 Turbo PCI series",
86 "C320 Turbo ISA series",
87 "CP-204J series",
88};
89
90#ifdef CONFIG_PCI
91static struct pci_device_id moxa_pcibrds[] = {
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
93 .driver_data = MOXA_BOARD_C218_PCI },
94 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
95 .driver_data = MOXA_BOARD_C320_PCI },
96 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
97 .driver_data = MOXA_BOARD_CP204J },
98 { 0 }
99};
100MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
101#endif
102
103struct moxa_port;
104
105static struct moxa_board_conf {
106 int boardType;
107 int numPorts;
108 int busType;
109
110 unsigned int ready;
111
112 struct moxa_port *ports;
113
114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118} moxa_boards[MAX_BOARDS];
119
120struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
126};
127
128struct moxaq_str {
129 int inq;
130 int outq;
131};
132
133struct moxa_port {
134 struct tty_port port;
135 struct moxa_board_conf *board;
136 void __iomem *tableAddr;
137
138 int type;
139 int cflag;
140 unsigned long statusflags;
141
142 u8 DCDState;
143 u8 lineCtrl;
144 u8 lowChkFlag;
145};
146
147struct mon_str {
148 int tick;
149 int rxcnt[MAX_PORTS];
150 int txcnt[MAX_PORTS];
151};
152
153
154#define TXSTOPPED 1
155#define LOWWAIT 2
156#define EMPTYWAIT 3
157
158#define SERIAL_DO_RESTART
159
160#define WAKEUP_CHARS 256
161
162static int ttymajor = MOXAMAJOR;
163static struct mon_str moxaLog;
164static unsigned int moxaFuncTout = HZ / 2;
165static unsigned int moxaLowWaterChk;
166static DEFINE_MUTEX(moxa_openlock);
167static DEFINE_SPINLOCK(moxa_lock);
168
169static unsigned long baseaddr[MAX_BOARDS];
170static unsigned int type[MAX_BOARDS];
171static unsigned int numports[MAX_BOARDS];
172static struct tty_port moxa_service_port;
173
174MODULE_AUTHOR("William Chen");
175MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
176MODULE_LICENSE("GPL");
177MODULE_FIRMWARE("c218tunx.cod");
178MODULE_FIRMWARE("cp204unx.cod");
179MODULE_FIRMWARE("c320tunx.cod");
180
181module_param_array(type, uint, NULL, 0);
182MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
183module_param_array(baseaddr, ulong, NULL, 0);
184MODULE_PARM_DESC(baseaddr, "base address");
185module_param_array(numports, uint, NULL, 0);
186MODULE_PARM_DESC(numports, "numports (ignored for C218)");
187
188module_param(ttymajor, int, 0);
189
190
191
192
193static int moxa_open(struct tty_struct *, struct file *);
194static void moxa_close(struct tty_struct *, struct file *);
195static int moxa_write(struct tty_struct *, const unsigned char *, int);
196static int moxa_write_room(struct tty_struct *);
197static void moxa_flush_buffer(struct tty_struct *);
198static int moxa_chars_in_buffer(struct tty_struct *);
199static void moxa_set_termios(struct tty_struct *, struct ktermios *);
200static void moxa_stop(struct tty_struct *);
201static void moxa_start(struct tty_struct *);
202static void moxa_hangup(struct tty_struct *);
203static int moxa_tiocmget(struct tty_struct *tty);
204static int moxa_tiocmset(struct tty_struct *tty,
205 unsigned int set, unsigned int clear);
206static void moxa_poll(unsigned long);
207static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
208static void moxa_shutdown(struct tty_port *);
209static int moxa_carrier_raised(struct tty_port *);
210static void moxa_dtr_rts(struct tty_port *, int);
211
212
213
214static void MoxaPortEnable(struct moxa_port *);
215static void MoxaPortDisable(struct moxa_port *);
216static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
217static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
218static void MoxaPortLineCtrl(struct moxa_port *, int, int);
219static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
220static int MoxaPortLineStatus(struct moxa_port *);
221static void MoxaPortFlushData(struct moxa_port *, int);
222static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
223static int MoxaPortReadData(struct moxa_port *);
224static int MoxaPortTxQueue(struct moxa_port *);
225static int MoxaPortRxQueue(struct moxa_port *);
226static int MoxaPortTxFree(struct moxa_port *);
227static void MoxaPortTxDisable(struct moxa_port *);
228static void MoxaPortTxEnable(struct moxa_port *);
229static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
230static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
231static void MoxaSetFifo(struct moxa_port *port, int enable);
232
233
234
235
236
237static DEFINE_SPINLOCK(moxafunc_lock);
238
239static void moxa_wait_finish(void __iomem *ofsAddr)
240{
241 unsigned long end = jiffies + moxaFuncTout;
242
243 while (readw(ofsAddr + FuncCode) != 0)
244 if (time_after(jiffies, end))
245 return;
246 if (readw(ofsAddr + FuncCode) != 0)
247 printk_ratelimited(KERN_WARNING "moxa function expired\n");
248}
249
250static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
251{
252 unsigned long flags;
253 spin_lock_irqsave(&moxafunc_lock, flags);
254 writew(arg, ofsAddr + FuncArg);
255 writew(cmd, ofsAddr + FuncCode);
256 moxa_wait_finish(ofsAddr);
257 spin_unlock_irqrestore(&moxafunc_lock, flags);
258}
259
260static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
261{
262 unsigned long flags;
263 u16 ret;
264 spin_lock_irqsave(&moxafunc_lock, flags);
265 writew(arg, ofsAddr + FuncArg);
266 writew(cmd, ofsAddr + FuncCode);
267 moxa_wait_finish(ofsAddr);
268 ret = readw(ofsAddr + FuncArg);
269 spin_unlock_irqrestore(&moxafunc_lock, flags);
270 return ret;
271}
272
273static void moxa_low_water_check(void __iomem *ofsAddr)
274{
275 u16 rptr, wptr, mask, len;
276
277 if (readb(ofsAddr + FlagStat) & Xoff_state) {
278 rptr = readw(ofsAddr + RXrptr);
279 wptr = readw(ofsAddr + RXwptr);
280 mask = readw(ofsAddr + RX_mask);
281 len = (wptr - rptr) & mask;
282 if (len <= Low_water)
283 moxafunc(ofsAddr, FC_SendXon, 0);
284 }
285}
286
287
288
289
290
291static int moxa_ioctl(struct tty_struct *tty,
292 unsigned int cmd, unsigned long arg)
293{
294 struct moxa_port *ch = tty->driver_data;
295 void __user *argp = (void __user *)arg;
296 int status, ret = 0;
297
298 if (tty->index == MAX_PORTS) {
299 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
300 cmd != MOXA_GETMSTATUS)
301 return -EINVAL;
302 } else if (!ch)
303 return -ENODEV;
304
305 switch (cmd) {
306 case MOXA_GETDATACOUNT:
307 moxaLog.tick = jiffies;
308 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
309 ret = -EFAULT;
310 break;
311 case MOXA_FLUSH_QUEUE:
312 MoxaPortFlushData(ch, arg);
313 break;
314 case MOXA_GET_IOQUEUE: {
315 struct moxaq_str __user *argm = argp;
316 struct moxaq_str tmp;
317 struct moxa_port *p;
318 unsigned int i, j;
319
320 for (i = 0; i < MAX_BOARDS; i++) {
321 p = moxa_boards[i].ports;
322 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
323 memset(&tmp, 0, sizeof(tmp));
324 spin_lock_bh(&moxa_lock);
325 if (moxa_boards[i].ready) {
326 tmp.inq = MoxaPortRxQueue(p);
327 tmp.outq = MoxaPortTxQueue(p);
328 }
329 spin_unlock_bh(&moxa_lock);
330 if (copy_to_user(argm, &tmp, sizeof(tmp)))
331 return -EFAULT;
332 }
333 }
334 break;
335 } case MOXA_GET_OQUEUE:
336 status = MoxaPortTxQueue(ch);
337 ret = put_user(status, (unsigned long __user *)argp);
338 break;
339 case MOXA_GET_IQUEUE:
340 status = MoxaPortRxQueue(ch);
341 ret = put_user(status, (unsigned long __user *)argp);
342 break;
343 case MOXA_GETMSTATUS: {
344 struct mxser_mstatus __user *argm = argp;
345 struct mxser_mstatus tmp;
346 struct moxa_port *p;
347 unsigned int i, j;
348
349 for (i = 0; i < MAX_BOARDS; i++) {
350 p = moxa_boards[i].ports;
351 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
352 struct tty_struct *ttyp;
353 memset(&tmp, 0, sizeof(tmp));
354 spin_lock_bh(&moxa_lock);
355 if (!moxa_boards[i].ready) {
356 spin_unlock_bh(&moxa_lock);
357 goto copy;
358 }
359
360 status = MoxaPortLineStatus(p);
361 spin_unlock_bh(&moxa_lock);
362
363 if (status & 1)
364 tmp.cts = 1;
365 if (status & 2)
366 tmp.dsr = 1;
367 if (status & 4)
368 tmp.dcd = 1;
369
370 ttyp = tty_port_tty_get(&p->port);
371 if (!ttyp)
372 tmp.cflag = p->cflag;
373 else
374 tmp.cflag = ttyp->termios.c_cflag;
375 tty_kref_put(ttyp);
376copy:
377 if (copy_to_user(argm, &tmp, sizeof(tmp)))
378 return -EFAULT;
379 }
380 }
381 break;
382 }
383 case TIOCGSERIAL:
384 mutex_lock(&ch->port.mutex);
385 ret = moxa_get_serial_info(ch, argp);
386 mutex_unlock(&ch->port.mutex);
387 break;
388 case TIOCSSERIAL:
389 mutex_lock(&ch->port.mutex);
390 ret = moxa_set_serial_info(ch, argp);
391 mutex_unlock(&ch->port.mutex);
392 break;
393 default:
394 ret = -ENOIOCTLCMD;
395 }
396 return ret;
397}
398
399static int moxa_break_ctl(struct tty_struct *tty, int state)
400{
401 struct moxa_port *port = tty->driver_data;
402
403 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
404 Magic_code);
405 return 0;
406}
407
408static const struct tty_operations moxa_ops = {
409 .open = moxa_open,
410 .close = moxa_close,
411 .write = moxa_write,
412 .write_room = moxa_write_room,
413 .flush_buffer = moxa_flush_buffer,
414 .chars_in_buffer = moxa_chars_in_buffer,
415 .ioctl = moxa_ioctl,
416 .set_termios = moxa_set_termios,
417 .stop = moxa_stop,
418 .start = moxa_start,
419 .hangup = moxa_hangup,
420 .break_ctl = moxa_break_ctl,
421 .tiocmget = moxa_tiocmget,
422 .tiocmset = moxa_tiocmset,
423};
424
425static const struct tty_port_operations moxa_port_ops = {
426 .carrier_raised = moxa_carrier_raised,
427 .dtr_rts = moxa_dtr_rts,
428 .shutdown = moxa_shutdown,
429};
430
431static struct tty_driver *moxaDriver;
432static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
433
434
435
436
437
438static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
439{
440 switch (brd->boardType) {
441 case MOXA_BOARD_C218_ISA:
442 case MOXA_BOARD_C218_PCI:
443 if (model != 1)
444 goto err;
445 break;
446 case MOXA_BOARD_CP204J:
447 if (model != 3)
448 goto err;
449 break;
450 default:
451 if (model != 2)
452 goto err;
453 break;
454 }
455 return 0;
456err:
457 return -EINVAL;
458}
459
460static int moxa_check_fw(const void *ptr)
461{
462 const __le16 *lptr = ptr;
463
464 if (*lptr != cpu_to_le16(0x7980))
465 return -EINVAL;
466
467 return 0;
468}
469
470static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
471 size_t len)
472{
473 void __iomem *baseAddr = brd->basemem;
474 u16 tmp;
475
476 writeb(HW_reset, baseAddr + Control_reg);
477 msleep(10);
478 memset_io(baseAddr, 0, 4096);
479 memcpy_toio(baseAddr, buf, len);
480 writeb(0, baseAddr + Control_reg);
481
482 msleep(2000);
483
484 switch (brd->boardType) {
485 case MOXA_BOARD_C218_ISA:
486 case MOXA_BOARD_C218_PCI:
487 tmp = readw(baseAddr + C218_key);
488 if (tmp != C218_KeyCode)
489 goto err;
490 break;
491 case MOXA_BOARD_CP204J:
492 tmp = readw(baseAddr + C218_key);
493 if (tmp != CP204J_KeyCode)
494 goto err;
495 break;
496 default:
497 tmp = readw(baseAddr + C320_key);
498 if (tmp != C320_KeyCode)
499 goto err;
500 tmp = readw(baseAddr + C320_status);
501 if (tmp != STS_init) {
502 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
503 "module not found\n");
504 return -EIO;
505 }
506 break;
507 }
508
509 return 0;
510err:
511 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
512 return -EIO;
513}
514
515static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
516 size_t len)
517{
518 void __iomem *baseAddr = brd->basemem;
519
520 if (len < 7168) {
521 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
522 return -EINVAL;
523 }
524
525 writew(len - 7168 - 2, baseAddr + C320bapi_len);
526 writeb(1, baseAddr + Control_reg);
527 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
528 writeb(2, baseAddr + Control_reg);
529 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
530
531 return 0;
532}
533
534static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
535 size_t len)
536{
537 void __iomem *baseAddr = brd->basemem;
538 const __le16 *uptr = ptr;
539 size_t wlen, len2, j;
540 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
541 unsigned int i, retry;
542 u16 usum, keycode;
543
544 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
545 C218_KeyCode;
546
547 switch (brd->boardType) {
548 case MOXA_BOARD_CP204J:
549 case MOXA_BOARD_C218_ISA:
550 case MOXA_BOARD_C218_PCI:
551 key = C218_key;
552 loadbuf = C218_LoadBuf;
553 loadlen = C218DLoad_len;
554 checksum = C218check_sum;
555 checksum_ok = C218chksum_ok;
556 break;
557 default:
558 key = C320_key;
559 keycode = C320_KeyCode;
560 loadbuf = C320_LoadBuf;
561 loadlen = C320DLoad_len;
562 checksum = C320check_sum;
563 checksum_ok = C320chksum_ok;
564 break;
565 }
566
567 usum = 0;
568 wlen = len >> 1;
569 for (i = 0; i < wlen; i++)
570 usum += le16_to_cpu(uptr[i]);
571 retry = 0;
572 do {
573 wlen = len >> 1;
574 j = 0;
575 while (wlen) {
576 len2 = (wlen > 2048) ? 2048 : wlen;
577 wlen -= len2;
578 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
579 j += len2 << 1;
580
581 writew(len2, baseAddr + loadlen);
582 writew(0, baseAddr + key);
583 for (i = 0; i < 100; i++) {
584 if (readw(baseAddr + key) == keycode)
585 break;
586 msleep(10);
587 }
588 if (readw(baseAddr + key) != keycode)
589 return -EIO;
590 }
591 writew(0, baseAddr + loadlen);
592 writew(usum, baseAddr + checksum);
593 writew(0, baseAddr + key);
594 for (i = 0; i < 100; i++) {
595 if (readw(baseAddr + key) == keycode)
596 break;
597 msleep(10);
598 }
599 retry++;
600 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
601 if (readb(baseAddr + checksum_ok) != 1)
602 return -EIO;
603
604 writew(0, baseAddr + key);
605 for (i = 0; i < 600; i++) {
606 if (readw(baseAddr + Magic_no) == Magic_code)
607 break;
608 msleep(10);
609 }
610 if (readw(baseAddr + Magic_no) != Magic_code)
611 return -EIO;
612
613 if (MOXA_IS_320(brd)) {
614 if (brd->busType == MOXA_BUS_TYPE_PCI) {
615 writew(0x3800, baseAddr + TMS320_PORT1);
616 writew(0x3900, baseAddr + TMS320_PORT2);
617 writew(28499, baseAddr + TMS320_CLOCK);
618 } else {
619 writew(0x3200, baseAddr + TMS320_PORT1);
620 writew(0x3400, baseAddr + TMS320_PORT2);
621 writew(19999, baseAddr + TMS320_CLOCK);
622 }
623 }
624 writew(1, baseAddr + Disable_IRQ);
625 writew(0, baseAddr + Magic_no);
626 for (i = 0; i < 500; i++) {
627 if (readw(baseAddr + Magic_no) == Magic_code)
628 break;
629 msleep(10);
630 }
631 if (readw(baseAddr + Magic_no) != Magic_code)
632 return -EIO;
633
634 if (MOXA_IS_320(brd)) {
635 j = readw(baseAddr + Module_cnt);
636 if (j <= 0)
637 return -EIO;
638 brd->numPorts = j * 8;
639 writew(j, baseAddr + Module_no);
640 writew(0, baseAddr + Magic_no);
641 for (i = 0; i < 600; i++) {
642 if (readw(baseAddr + Magic_no) == Magic_code)
643 break;
644 msleep(10);
645 }
646 if (readw(baseAddr + Magic_no) != Magic_code)
647 return -EIO;
648 }
649 brd->intNdx = baseAddr + IRQindex;
650 brd->intPend = baseAddr + IRQpending;
651 brd->intTable = baseAddr + IRQtable;
652
653 return 0;
654}
655
656static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
657 size_t len)
658{
659 void __iomem *ofsAddr, *baseAddr = brd->basemem;
660 struct moxa_port *port;
661 int retval, i;
662
663 if (len % 2) {
664 printk(KERN_ERR "MOXA: bios length is not even\n");
665 return -EINVAL;
666 }
667
668 retval = moxa_real_load_code(brd, ptr, len);
669 if (retval)
670 return retval;
671
672 switch (brd->boardType) {
673 case MOXA_BOARD_C218_ISA:
674 case MOXA_BOARD_C218_PCI:
675 case MOXA_BOARD_CP204J:
676 port = brd->ports;
677 for (i = 0; i < brd->numPorts; i++, port++) {
678 port->board = brd;
679 port->DCDState = 0;
680 port->tableAddr = baseAddr + Extern_table +
681 Extern_size * i;
682 ofsAddr = port->tableAddr;
683 writew(C218rx_mask, ofsAddr + RX_mask);
684 writew(C218tx_mask, ofsAddr + TX_mask);
685 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
686 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
687
688 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
689 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
690
691 }
692 break;
693 default:
694 port = brd->ports;
695 for (i = 0; i < brd->numPorts; i++, port++) {
696 port->board = brd;
697 port->DCDState = 0;
698 port->tableAddr = baseAddr + Extern_table +
699 Extern_size * i;
700 ofsAddr = port->tableAddr;
701 switch (brd->numPorts) {
702 case 8:
703 writew(C320p8rx_mask, ofsAddr + RX_mask);
704 writew(C320p8tx_mask, ofsAddr + TX_mask);
705 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
706 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
707 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
708 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
709
710 break;
711 case 16:
712 writew(C320p16rx_mask, ofsAddr + RX_mask);
713 writew(C320p16tx_mask, ofsAddr + TX_mask);
714 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
715 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
716 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
717 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
718 break;
719
720 case 24:
721 writew(C320p24rx_mask, ofsAddr + RX_mask);
722 writew(C320p24tx_mask, ofsAddr + TX_mask);
723 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
724 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
725 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
726 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
727 break;
728 case 32:
729 writew(C320p32rx_mask, ofsAddr + RX_mask);
730 writew(C320p32tx_mask, ofsAddr + TX_mask);
731 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
732 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
733 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
734 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
735 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
736 break;
737 }
738 }
739 break;
740 }
741 return 0;
742}
743
744static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
745{
746 const void *ptr = fw->data;
747 char rsn[64];
748 u16 lens[5];
749 size_t len;
750 unsigned int a, lenp, lencnt;
751 int ret = -EINVAL;
752 struct {
753 __le32 magic;
754 u8 reserved1[2];
755 u8 type;
756 u8 model;
757 u8 reserved2[8];
758 __le16 len[5];
759 } const *hdr = ptr;
760
761 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
762
763 if (fw->size < MOXA_FW_HDRLEN) {
764 strcpy(rsn, "too short (even header won't fit)");
765 goto err;
766 }
767 if (hdr->magic != cpu_to_le32(0x30343034)) {
768 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
769 goto err;
770 }
771 if (hdr->type != 3) {
772 sprintf(rsn, "not for linux, type is %u", hdr->type);
773 goto err;
774 }
775 if (moxa_check_fw_model(brd, hdr->model)) {
776 sprintf(rsn, "not for this card, model is %u", hdr->model);
777 goto err;
778 }
779
780 len = MOXA_FW_HDRLEN;
781 lencnt = hdr->model == 2 ? 5 : 3;
782 for (a = 0; a < ARRAY_SIZE(lens); a++) {
783 lens[a] = le16_to_cpu(hdr->len[a]);
784 if (lens[a] && len + lens[a] <= fw->size &&
785 moxa_check_fw(&fw->data[len]))
786 printk(KERN_WARNING "MOXA firmware: unexpected input "
787 "at offset %u, but going on\n", (u32)len);
788 if (!lens[a] && a < lencnt) {
789 sprintf(rsn, "too few entries in fw file");
790 goto err;
791 }
792 len += lens[a];
793 }
794
795 if (len != fw->size) {
796 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
797 (u32)len);
798 goto err;
799 }
800
801 ptr += MOXA_FW_HDRLEN;
802 lenp = 0;
803
804 strcpy(rsn, "read above");
805
806 ret = moxa_load_bios(brd, ptr, lens[lenp]);
807 if (ret)
808 goto err;
809
810
811 ptr += lens[lenp] + lens[lenp + 1];
812 lenp += 2;
813
814 if (hdr->model == 2) {
815 ret = moxa_load_320b(brd, ptr, lens[lenp]);
816 if (ret)
817 goto err;
818
819 ptr += lens[lenp] + lens[lenp + 1];
820 lenp += 2;
821 }
822
823 ret = moxa_load_code(brd, ptr, lens[lenp]);
824 if (ret)
825 goto err;
826
827 return 0;
828err:
829 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
830 return ret;
831}
832
833static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
834{
835 const struct firmware *fw;
836 const char *file;
837 struct moxa_port *p;
838 unsigned int i, first_idx;
839 int ret;
840
841 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
842 GFP_KERNEL);
843 if (brd->ports == NULL) {
844 printk(KERN_ERR "cannot allocate memory for ports\n");
845 ret = -ENOMEM;
846 goto err;
847 }
848
849 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
850 tty_port_init(&p->port);
851 p->port.ops = &moxa_port_ops;
852 p->type = PORT_16550A;
853 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
854 }
855
856 switch (brd->boardType) {
857 case MOXA_BOARD_C218_ISA:
858 case MOXA_BOARD_C218_PCI:
859 file = "c218tunx.cod";
860 break;
861 case MOXA_BOARD_CP204J:
862 file = "cp204unx.cod";
863 break;
864 default:
865 file = "c320tunx.cod";
866 break;
867 }
868
869 ret = request_firmware(&fw, file, dev);
870 if (ret) {
871 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
872 "you've placed '%s' file into your firmware "
873 "loader directory (e.g. /lib/firmware)\n",
874 file);
875 goto err_free;
876 }
877
878 ret = moxa_load_fw(brd, fw);
879
880 release_firmware(fw);
881
882 if (ret)
883 goto err_free;
884
885 spin_lock_bh(&moxa_lock);
886 brd->ready = 1;
887 if (!timer_pending(&moxaTimer))
888 mod_timer(&moxaTimer, jiffies + HZ / 50);
889 spin_unlock_bh(&moxa_lock);
890
891 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
892 for (i = 0; i < brd->numPorts; i++)
893 tty_port_register_device(&brd->ports[i].port, moxaDriver,
894 first_idx + i, dev);
895
896 return 0;
897err_free:
898 kfree(brd->ports);
899err:
900 return ret;
901}
902
903static void moxa_board_deinit(struct moxa_board_conf *brd)
904{
905 unsigned int a, opened, first_idx;
906
907 mutex_lock(&moxa_openlock);
908 spin_lock_bh(&moxa_lock);
909 brd->ready = 0;
910 spin_unlock_bh(&moxa_lock);
911
912
913 for (a = 0; a < brd->numPorts; a++)
914 if (brd->ports[a].port.flags & ASYNC_INITIALIZED) {
915 struct tty_struct *tty = tty_port_tty_get(
916 &brd->ports[a].port);
917 if (tty) {
918 tty_hangup(tty);
919 tty_kref_put(tty);
920 }
921 }
922 while (1) {
923 opened = 0;
924 for (a = 0; a < brd->numPorts; a++)
925 if (brd->ports[a].port.flags & ASYNC_INITIALIZED)
926 opened++;
927 mutex_unlock(&moxa_openlock);
928 if (!opened)
929 break;
930 msleep(50);
931 mutex_lock(&moxa_openlock);
932 }
933
934 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
935 for (a = 0; a < brd->numPorts; a++)
936 tty_unregister_device(moxaDriver, first_idx + a);
937
938 iounmap(brd->basemem);
939 brd->basemem = NULL;
940 kfree(brd->ports);
941}
942
943#ifdef CONFIG_PCI
944static int __devinit moxa_pci_probe(struct pci_dev *pdev,
945 const struct pci_device_id *ent)
946{
947 struct moxa_board_conf *board;
948 unsigned int i;
949 int board_type = ent->driver_data;
950 int retval;
951
952 retval = pci_enable_device(pdev);
953 if (retval) {
954 dev_err(&pdev->dev, "can't enable pci device\n");
955 goto err;
956 }
957
958 for (i = 0; i < MAX_BOARDS; i++)
959 if (moxa_boards[i].basemem == NULL)
960 break;
961
962 retval = -ENODEV;
963 if (i >= MAX_BOARDS) {
964 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
965 "found. Board is ignored.\n", MAX_BOARDS);
966 goto err;
967 }
968
969 board = &moxa_boards[i];
970
971 retval = pci_request_region(pdev, 2, "moxa-base");
972 if (retval) {
973 dev_err(&pdev->dev, "can't request pci region 2\n");
974 goto err;
975 }
976
977 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
978 if (board->basemem == NULL) {
979 dev_err(&pdev->dev, "can't remap io space 2\n");
980 retval = -ENOMEM;
981 goto err_reg;
982 }
983
984 board->boardType = board_type;
985 switch (board_type) {
986 case MOXA_BOARD_C218_ISA:
987 case MOXA_BOARD_C218_PCI:
988 board->numPorts = 8;
989 break;
990
991 case MOXA_BOARD_CP204J:
992 board->numPorts = 4;
993 break;
994 default:
995 board->numPorts = 0;
996 break;
997 }
998 board->busType = MOXA_BUS_TYPE_PCI;
999
1000 retval = moxa_init_board(board, &pdev->dev);
1001 if (retval)
1002 goto err_base;
1003
1004 pci_set_drvdata(pdev, board);
1005
1006 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1007 moxa_brdname[board_type - 1], board->numPorts);
1008
1009 return 0;
1010err_base:
1011 iounmap(board->basemem);
1012 board->basemem = NULL;
1013err_reg:
1014 pci_release_region(pdev, 2);
1015err:
1016 return retval;
1017}
1018
1019static void __devexit moxa_pci_remove(struct pci_dev *pdev)
1020{
1021 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1022
1023 moxa_board_deinit(brd);
1024
1025 pci_release_region(pdev, 2);
1026}
1027
1028static struct pci_driver moxa_pci_driver = {
1029 .name = "moxa",
1030 .id_table = moxa_pcibrds,
1031 .probe = moxa_pci_probe,
1032 .remove = __devexit_p(moxa_pci_remove)
1033};
1034#endif
1035
1036static int __init moxa_init(void)
1037{
1038 unsigned int isabrds = 0;
1039 int retval = 0;
1040 struct moxa_board_conf *brd = moxa_boards;
1041 unsigned int i;
1042
1043 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1044 MOXA_VERSION);
1045
1046 tty_port_init(&moxa_service_port);
1047
1048 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1049 TTY_DRIVER_REAL_RAW |
1050 TTY_DRIVER_DYNAMIC_DEV);
1051 if (IS_ERR(moxaDriver))
1052 return PTR_ERR(moxaDriver);
1053
1054 moxaDriver->name = "ttyMX";
1055 moxaDriver->major = ttymajor;
1056 moxaDriver->minor_start = 0;
1057 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1058 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1059 moxaDriver->init_termios = tty_std_termios;
1060 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1061 moxaDriver->init_termios.c_ispeed = 9600;
1062 moxaDriver->init_termios.c_ospeed = 9600;
1063 tty_set_operations(moxaDriver, &moxa_ops);
1064
1065 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1066
1067 if (tty_register_driver(moxaDriver)) {
1068 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1069 put_tty_driver(moxaDriver);
1070 return -1;
1071 }
1072
1073
1074
1075 for (i = 0; i < MAX_BOARDS; i++) {
1076 if (!baseaddr[i])
1077 break;
1078 if (type[i] == MOXA_BOARD_C218_ISA ||
1079 type[i] == MOXA_BOARD_C320_ISA) {
1080 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1081 isabrds + 1, moxa_brdname[type[i] - 1],
1082 baseaddr[i]);
1083 brd->boardType = type[i];
1084 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1085 numports[i];
1086 brd->busType = MOXA_BUS_TYPE_ISA;
1087 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
1088 if (!brd->basemem) {
1089 printk(KERN_ERR "MOXA: can't remap %lx\n",
1090 baseaddr[i]);
1091 continue;
1092 }
1093 if (moxa_init_board(brd, NULL)) {
1094 iounmap(brd->basemem);
1095 brd->basemem = NULL;
1096 continue;
1097 }
1098
1099 printk(KERN_INFO "MOXA isa board found at 0x%.8lu and "
1100 "ready (%u ports, firmware loaded)\n",
1101 baseaddr[i], brd->numPorts);
1102
1103 brd++;
1104 isabrds++;
1105 }
1106 }
1107
1108#ifdef CONFIG_PCI
1109 retval = pci_register_driver(&moxa_pci_driver);
1110 if (retval) {
1111 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1112 if (isabrds)
1113 retval = 0;
1114 }
1115#endif
1116
1117 return retval;
1118}
1119
1120static void __exit moxa_exit(void)
1121{
1122 unsigned int i;
1123
1124#ifdef CONFIG_PCI
1125 pci_unregister_driver(&moxa_pci_driver);
1126#endif
1127
1128 for (i = 0; i < MAX_BOARDS; i++)
1129 if (moxa_boards[i].ready)
1130 moxa_board_deinit(&moxa_boards[i]);
1131
1132 del_timer_sync(&moxaTimer);
1133
1134 if (tty_unregister_driver(moxaDriver))
1135 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1136 "serial driver\n");
1137 put_tty_driver(moxaDriver);
1138}
1139
1140module_init(moxa_init);
1141module_exit(moxa_exit);
1142
1143static void moxa_shutdown(struct tty_port *port)
1144{
1145 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1146 MoxaPortDisable(ch);
1147 MoxaPortFlushData(ch, 2);
1148}
1149
1150static int moxa_carrier_raised(struct tty_port *port)
1151{
1152 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1153 int dcd;
1154
1155 spin_lock_irq(&port->lock);
1156 dcd = ch->DCDState;
1157 spin_unlock_irq(&port->lock);
1158 return dcd;
1159}
1160
1161static void moxa_dtr_rts(struct tty_port *port, int onoff)
1162{
1163 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1164 MoxaPortLineCtrl(ch, onoff, onoff);
1165}
1166
1167
1168static int moxa_open(struct tty_struct *tty, struct file *filp)
1169{
1170 struct moxa_board_conf *brd;
1171 struct moxa_port *ch;
1172 int port;
1173
1174 port = tty->index;
1175 if (port == MAX_PORTS) {
1176 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1177 }
1178 if (mutex_lock_interruptible(&moxa_openlock))
1179 return -ERESTARTSYS;
1180 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1181 if (!brd->ready) {
1182 mutex_unlock(&moxa_openlock);
1183 return -ENODEV;
1184 }
1185
1186 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1187 mutex_unlock(&moxa_openlock);
1188 return -ENODEV;
1189 }
1190
1191 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1192 ch->port.count++;
1193 tty->driver_data = ch;
1194 tty_port_tty_set(&ch->port, tty);
1195 mutex_lock(&ch->port.mutex);
1196 if (!(ch->port.flags & ASYNC_INITIALIZED)) {
1197 ch->statusflags = 0;
1198 moxa_set_tty_param(tty, &tty->termios);
1199 MoxaPortLineCtrl(ch, 1, 1);
1200 MoxaPortEnable(ch);
1201 MoxaSetFifo(ch, ch->type == PORT_16550A);
1202 ch->port.flags |= ASYNC_INITIALIZED;
1203 }
1204 mutex_unlock(&ch->port.mutex);
1205 mutex_unlock(&moxa_openlock);
1206
1207 return tty_port_block_til_ready(&ch->port, tty, filp);
1208}
1209
1210static void moxa_close(struct tty_struct *tty, struct file *filp)
1211{
1212 struct moxa_port *ch = tty->driver_data;
1213 ch->cflag = tty->termios.c_cflag;
1214 tty_port_close(&ch->port, tty, filp);
1215}
1216
1217static int moxa_write(struct tty_struct *tty,
1218 const unsigned char *buf, int count)
1219{
1220 struct moxa_port *ch = tty->driver_data;
1221 unsigned long flags;
1222 int len;
1223
1224 if (ch == NULL)
1225 return 0;
1226
1227 spin_lock_irqsave(&moxa_lock, flags);
1228 len = MoxaPortWriteData(tty, buf, count);
1229 spin_unlock_irqrestore(&moxa_lock, flags);
1230
1231 set_bit(LOWWAIT, &ch->statusflags);
1232 return len;
1233}
1234
1235static int moxa_write_room(struct tty_struct *tty)
1236{
1237 struct moxa_port *ch;
1238
1239 if (tty->stopped)
1240 return 0;
1241 ch = tty->driver_data;
1242 if (ch == NULL)
1243 return 0;
1244 return MoxaPortTxFree(ch);
1245}
1246
1247static void moxa_flush_buffer(struct tty_struct *tty)
1248{
1249 struct moxa_port *ch = tty->driver_data;
1250
1251 if (ch == NULL)
1252 return;
1253 MoxaPortFlushData(ch, 1);
1254 tty_wakeup(tty);
1255}
1256
1257static int moxa_chars_in_buffer(struct tty_struct *tty)
1258{
1259 struct moxa_port *ch = tty->driver_data;
1260 int chars;
1261
1262 chars = MoxaPortTxQueue(ch);
1263 if (chars)
1264
1265
1266
1267
1268 set_bit(EMPTYWAIT, &ch->statusflags);
1269 return chars;
1270}
1271
1272static int moxa_tiocmget(struct tty_struct *tty)
1273{
1274 struct moxa_port *ch = tty->driver_data;
1275 int flag = 0, dtr, rts;
1276
1277 MoxaPortGetLineOut(ch, &dtr, &rts);
1278 if (dtr)
1279 flag |= TIOCM_DTR;
1280 if (rts)
1281 flag |= TIOCM_RTS;
1282 dtr = MoxaPortLineStatus(ch);
1283 if (dtr & 1)
1284 flag |= TIOCM_CTS;
1285 if (dtr & 2)
1286 flag |= TIOCM_DSR;
1287 if (dtr & 4)
1288 flag |= TIOCM_CD;
1289 return flag;
1290}
1291
1292static int moxa_tiocmset(struct tty_struct *tty,
1293 unsigned int set, unsigned int clear)
1294{
1295 struct moxa_port *ch;
1296 int dtr, rts;
1297
1298 mutex_lock(&moxa_openlock);
1299 ch = tty->driver_data;
1300 if (!ch) {
1301 mutex_unlock(&moxa_openlock);
1302 return -EINVAL;
1303 }
1304
1305 MoxaPortGetLineOut(ch, &dtr, &rts);
1306 if (set & TIOCM_RTS)
1307 rts = 1;
1308 if (set & TIOCM_DTR)
1309 dtr = 1;
1310 if (clear & TIOCM_RTS)
1311 rts = 0;
1312 if (clear & TIOCM_DTR)
1313 dtr = 0;
1314 MoxaPortLineCtrl(ch, dtr, rts);
1315 mutex_unlock(&moxa_openlock);
1316 return 0;
1317}
1318
1319static void moxa_set_termios(struct tty_struct *tty,
1320 struct ktermios *old_termios)
1321{
1322 struct moxa_port *ch = tty->driver_data;
1323
1324 if (ch == NULL)
1325 return;
1326 moxa_set_tty_param(tty, old_termios);
1327 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1328 wake_up_interruptible(&ch->port.open_wait);
1329}
1330
1331static void moxa_stop(struct tty_struct *tty)
1332{
1333 struct moxa_port *ch = tty->driver_data;
1334
1335 if (ch == NULL)
1336 return;
1337 MoxaPortTxDisable(ch);
1338 set_bit(TXSTOPPED, &ch->statusflags);
1339}
1340
1341
1342static void moxa_start(struct tty_struct *tty)
1343{
1344 struct moxa_port *ch = tty->driver_data;
1345
1346 if (ch == NULL)
1347 return;
1348
1349 if (!test_bit(TXSTOPPED, &ch->statusflags))
1350 return;
1351
1352 MoxaPortTxEnable(ch);
1353 clear_bit(TXSTOPPED, &ch->statusflags);
1354}
1355
1356static void moxa_hangup(struct tty_struct *tty)
1357{
1358 struct moxa_port *ch = tty->driver_data;
1359 tty_port_hangup(&ch->port);
1360}
1361
1362static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1363{
1364 struct tty_struct *tty;
1365 unsigned long flags;
1366 dcd = !!dcd;
1367
1368 spin_lock_irqsave(&p->port.lock, flags);
1369 if (dcd != p->DCDState) {
1370 p->DCDState = dcd;
1371 spin_unlock_irqrestore(&p->port.lock, flags);
1372 tty = tty_port_tty_get(&p->port);
1373 if (tty && C_CLOCAL(tty) && !dcd)
1374 tty_hangup(tty);
1375 tty_kref_put(tty);
1376 }
1377 else
1378 spin_unlock_irqrestore(&p->port.lock, flags);
1379}
1380
1381static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1382 u16 __iomem *ip)
1383{
1384 struct tty_struct *tty = tty_port_tty_get(&p->port);
1385 void __iomem *ofsAddr;
1386 unsigned int inited = p->port.flags & ASYNC_INITIALIZED;
1387 u16 intr;
1388
1389 if (tty) {
1390 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1391 MoxaPortTxQueue(p) == 0) {
1392 clear_bit(EMPTYWAIT, &p->statusflags);
1393 tty_wakeup(tty);
1394 }
1395 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1396 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1397 clear_bit(LOWWAIT, &p->statusflags);
1398 tty_wakeup(tty);
1399 }
1400
1401 if (inited && !test_bit(TTY_THROTTLED, &tty->flags) &&
1402 MoxaPortRxQueue(p) > 0) {
1403 MoxaPortReadData(p);
1404 tty_schedule_flip(tty);
1405 }
1406 } else {
1407 clear_bit(EMPTYWAIT, &p->statusflags);
1408 MoxaPortFlushData(p, 0);
1409 }
1410
1411 if (!handle)
1412 goto put;
1413
1414 intr = readw(ip);
1415 if (intr == 0)
1416 goto put;
1417
1418 writew(0, ip);
1419 ofsAddr = p->tableAddr;
1420 if (intr & IntrTx)
1421 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1422 ofsAddr + HostStat);
1423
1424 if (!inited)
1425 goto put;
1426
1427 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) {
1428 tty_insert_flip_char(tty, 0, TTY_BREAK);
1429 tty_schedule_flip(tty);
1430 }
1431
1432 if (intr & IntrLine)
1433 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1434put:
1435 tty_kref_put(tty);
1436
1437 return 0;
1438}
1439
1440static void moxa_poll(unsigned long ignored)
1441{
1442 struct moxa_board_conf *brd;
1443 u16 __iomem *ip;
1444 unsigned int card, port, served = 0;
1445
1446 spin_lock(&moxa_lock);
1447 for (card = 0; card < MAX_BOARDS; card++) {
1448 brd = &moxa_boards[card];
1449 if (!brd->ready)
1450 continue;
1451
1452 served++;
1453
1454 ip = NULL;
1455 if (readb(brd->intPend) == 0xff)
1456 ip = brd->intTable + readb(brd->intNdx);
1457
1458 for (port = 0; port < brd->numPorts; port++)
1459 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1460
1461 if (ip)
1462 writeb(0, brd->intPend);
1463
1464 if (moxaLowWaterChk) {
1465 struct moxa_port *p = brd->ports;
1466 for (port = 0; port < brd->numPorts; port++, p++)
1467 if (p->lowChkFlag) {
1468 p->lowChkFlag = 0;
1469 moxa_low_water_check(p->tableAddr);
1470 }
1471 }
1472 }
1473 moxaLowWaterChk = 0;
1474
1475 if (served)
1476 mod_timer(&moxaTimer, jiffies + HZ / 50);
1477 spin_unlock(&moxa_lock);
1478}
1479
1480
1481
1482static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1483{
1484 register struct ktermios *ts = &tty->termios;
1485 struct moxa_port *ch = tty->driver_data;
1486 int rts, cts, txflow, rxflow, xany, baud;
1487
1488 rts = cts = txflow = rxflow = xany = 0;
1489 if (ts->c_cflag & CRTSCTS)
1490 rts = cts = 1;
1491 if (ts->c_iflag & IXON)
1492 txflow = 1;
1493 if (ts->c_iflag & IXOFF)
1494 rxflow = 1;
1495 if (ts->c_iflag & IXANY)
1496 xany = 1;
1497
1498
1499 ts->c_cflag &= ~CMSPAR;
1500 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1501 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1502 if (baud == -1)
1503 baud = tty_termios_baud_rate(old_termios);
1504
1505 tty_encode_baud_rate(tty, baud, baud);
1506}
1507
1508
1509
1510
1511
1512static void MoxaPortFlushData(struct moxa_port *port, int mode)
1513{
1514 void __iomem *ofsAddr;
1515 if (mode < 0 || mode > 2)
1516 return;
1517 ofsAddr = port->tableAddr;
1518 moxafunc(ofsAddr, FC_FlushQueue, mode);
1519 if (mode != 1) {
1520 port->lowChkFlag = 0;
1521 moxa_low_water_check(ofsAddr);
1522 }
1523}
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717static void MoxaPortEnable(struct moxa_port *port)
1718{
1719 void __iomem *ofsAddr;
1720 u16 lowwater = 512;
1721
1722 ofsAddr = port->tableAddr;
1723 writew(lowwater, ofsAddr + Low_water);
1724 if (MOXA_IS_320(port->board))
1725 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1726 else
1727 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1728 ofsAddr + HostStat);
1729
1730 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1731 moxafunc(ofsAddr, FC_FlushQueue, 2);
1732
1733 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1734 MoxaPortLineStatus(port);
1735}
1736
1737static void MoxaPortDisable(struct moxa_port *port)
1738{
1739 void __iomem *ofsAddr = port->tableAddr;
1740
1741 moxafunc(ofsAddr, FC_SetFlowCtl, 0);
1742 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1743 writew(0, ofsAddr + HostStat);
1744 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1745}
1746
1747static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1748{
1749 void __iomem *ofsAddr = port->tableAddr;
1750 unsigned int clock, val;
1751 speed_t max;
1752
1753 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1754 if (baud < 50)
1755 return 0;
1756 if (baud > max)
1757 baud = max;
1758 clock = 921600;
1759 val = clock / baud;
1760 moxafunc(ofsAddr, FC_SetBaud, val);
1761 baud = clock / val;
1762 return baud;
1763}
1764
1765static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1766 speed_t baud)
1767{
1768 void __iomem *ofsAddr;
1769 tcflag_t mode = 0;
1770
1771 ofsAddr = port->tableAddr;
1772
1773 mode = termio->c_cflag & CSIZE;
1774 if (mode == CS5)
1775 mode = MX_CS5;
1776 else if (mode == CS6)
1777 mode = MX_CS6;
1778 else if (mode == CS7)
1779 mode = MX_CS7;
1780 else if (mode == CS8)
1781 mode = MX_CS8;
1782
1783 if (termio->c_cflag & CSTOPB) {
1784 if (mode == MX_CS5)
1785 mode |= MX_STOP15;
1786 else
1787 mode |= MX_STOP2;
1788 } else
1789 mode |= MX_STOP1;
1790
1791 if (termio->c_cflag & PARENB) {
1792 if (termio->c_cflag & PARODD)
1793 mode |= MX_PARODD;
1794 else
1795 mode |= MX_PAREVEN;
1796 } else
1797 mode |= MX_PARNONE;
1798
1799 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1800
1801 if (MOXA_IS_320(port->board) && baud >= 921600)
1802 return -1;
1803
1804 baud = MoxaPortSetBaud(port, baud);
1805
1806 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1807 spin_lock_irq(&moxafunc_lock);
1808 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1809 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1810 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1811 moxa_wait_finish(ofsAddr);
1812 spin_unlock_irq(&moxafunc_lock);
1813
1814 }
1815 return baud;
1816}
1817
1818static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1819 int *rtsState)
1820{
1821 if (dtrState)
1822 *dtrState = !!(port->lineCtrl & DTR_ON);
1823 if (rtsState)
1824 *rtsState = !!(port->lineCtrl & RTS_ON);
1825
1826 return 0;
1827}
1828
1829static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1830{
1831 u8 mode = 0;
1832
1833 if (dtr)
1834 mode |= DTR_ON;
1835 if (rts)
1836 mode |= RTS_ON;
1837 port->lineCtrl = mode;
1838 moxafunc(port->tableAddr, FC_LineControl, mode);
1839}
1840
1841static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1842 int txflow, int rxflow, int txany)
1843{
1844 int mode = 0;
1845
1846 if (rts)
1847 mode |= RTS_FlowCtl;
1848 if (cts)
1849 mode |= CTS_FlowCtl;
1850 if (txflow)
1851 mode |= Tx_FlowCtl;
1852 if (rxflow)
1853 mode |= Rx_FlowCtl;
1854 if (txany)
1855 mode |= IXM_IXANY;
1856 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1857}
1858
1859static int MoxaPortLineStatus(struct moxa_port *port)
1860{
1861 void __iomem *ofsAddr;
1862 int val;
1863
1864 ofsAddr = port->tableAddr;
1865 if (MOXA_IS_320(port->board))
1866 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1867 else
1868 val = readw(ofsAddr + FlagStat) >> 4;
1869 val &= 0x0B;
1870 if (val & 8)
1871 val |= 4;
1872 moxa_new_dcdstate(port, val & 8);
1873 val &= 7;
1874 return val;
1875}
1876
1877static int MoxaPortWriteData(struct tty_struct *tty,
1878 const unsigned char *buffer, int len)
1879{
1880 struct moxa_port *port = tty->driver_data;
1881 void __iomem *baseAddr, *ofsAddr, *ofs;
1882 unsigned int c, total;
1883 u16 head, tail, tx_mask, spage, epage;
1884 u16 pageno, pageofs, bufhead;
1885
1886 ofsAddr = port->tableAddr;
1887 baseAddr = port->board->basemem;
1888 tx_mask = readw(ofsAddr + TX_mask);
1889 spage = readw(ofsAddr + Page_txb);
1890 epage = readw(ofsAddr + EndPage_txb);
1891 tail = readw(ofsAddr + TXwptr);
1892 head = readw(ofsAddr + TXrptr);
1893 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1894 if (c > len)
1895 c = len;
1896 moxaLog.txcnt[port->port.tty->index] += c;
1897 total = c;
1898 if (spage == epage) {
1899 bufhead = readw(ofsAddr + Ofs_txb);
1900 writew(spage, baseAddr + Control_reg);
1901 while (c > 0) {
1902 if (head > tail)
1903 len = head - tail - 1;
1904 else
1905 len = tx_mask + 1 - tail;
1906 len = (c > len) ? len : c;
1907 ofs = baseAddr + DynPage_addr + bufhead + tail;
1908 memcpy_toio(ofs, buffer, len);
1909 buffer += len;
1910 tail = (tail + len) & tx_mask;
1911 c -= len;
1912 }
1913 } else {
1914 pageno = spage + (tail >> 13);
1915 pageofs = tail & Page_mask;
1916 while (c > 0) {
1917 len = Page_size - pageofs;
1918 if (len > c)
1919 len = c;
1920 writeb(pageno, baseAddr + Control_reg);
1921 ofs = baseAddr + DynPage_addr + pageofs;
1922 memcpy_toio(ofs, buffer, len);
1923 buffer += len;
1924 if (++pageno == epage)
1925 pageno = spage;
1926 pageofs = 0;
1927 c -= len;
1928 }
1929 tail = (tail + total) & tx_mask;
1930 }
1931 writew(tail, ofsAddr + TXwptr);
1932 writeb(1, ofsAddr + CD180TXirq);
1933 return total;
1934}
1935
1936static int MoxaPortReadData(struct moxa_port *port)
1937{
1938 struct tty_struct *tty = port->port.tty;
1939 unsigned char *dst;
1940 void __iomem *baseAddr, *ofsAddr, *ofs;
1941 unsigned int count, len, total;
1942 u16 tail, rx_mask, spage, epage;
1943 u16 pageno, pageofs, bufhead, head;
1944
1945 ofsAddr = port->tableAddr;
1946 baseAddr = port->board->basemem;
1947 head = readw(ofsAddr + RXrptr);
1948 tail = readw(ofsAddr + RXwptr);
1949 rx_mask = readw(ofsAddr + RX_mask);
1950 spage = readw(ofsAddr + Page_rxb);
1951 epage = readw(ofsAddr + EndPage_rxb);
1952 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1953 if (count == 0)
1954 return 0;
1955
1956 total = count;
1957 moxaLog.rxcnt[tty->index] += total;
1958 if (spage == epage) {
1959 bufhead = readw(ofsAddr + Ofs_rxb);
1960 writew(spage, baseAddr + Control_reg);
1961 while (count > 0) {
1962 ofs = baseAddr + DynPage_addr + bufhead + head;
1963 len = (tail >= head) ? (tail - head) :
1964 (rx_mask + 1 - head);
1965 len = tty_prepare_flip_string(tty, &dst,
1966 min(len, count));
1967 memcpy_fromio(dst, ofs, len);
1968 head = (head + len) & rx_mask;
1969 count -= len;
1970 }
1971 } else {
1972 pageno = spage + (head >> 13);
1973 pageofs = head & Page_mask;
1974 while (count > 0) {
1975 writew(pageno, baseAddr + Control_reg);
1976 ofs = baseAddr + DynPage_addr + pageofs;
1977 len = tty_prepare_flip_string(tty, &dst,
1978 min(Page_size - pageofs, count));
1979 memcpy_fromio(dst, ofs, len);
1980
1981 count -= len;
1982 pageofs = (pageofs + len) & Page_mask;
1983 if (pageofs == 0 && ++pageno == epage)
1984 pageno = spage;
1985 }
1986 head = (head + total) & rx_mask;
1987 }
1988 writew(head, ofsAddr + RXrptr);
1989 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1990 moxaLowWaterChk = 1;
1991 port->lowChkFlag = 1;
1992 }
1993 return total;
1994}
1995
1996
1997static int MoxaPortTxQueue(struct moxa_port *port)
1998{
1999 void __iomem *ofsAddr = port->tableAddr;
2000 u16 rptr, wptr, mask;
2001
2002 rptr = readw(ofsAddr + TXrptr);
2003 wptr = readw(ofsAddr + TXwptr);
2004 mask = readw(ofsAddr + TX_mask);
2005 return (wptr - rptr) & mask;
2006}
2007
2008static int MoxaPortTxFree(struct moxa_port *port)
2009{
2010 void __iomem *ofsAddr = port->tableAddr;
2011 u16 rptr, wptr, mask;
2012
2013 rptr = readw(ofsAddr + TXrptr);
2014 wptr = readw(ofsAddr + TXwptr);
2015 mask = readw(ofsAddr + TX_mask);
2016 return mask - ((wptr - rptr) & mask);
2017}
2018
2019static int MoxaPortRxQueue(struct moxa_port *port)
2020{
2021 void __iomem *ofsAddr = port->tableAddr;
2022 u16 rptr, wptr, mask;
2023
2024 rptr = readw(ofsAddr + RXrptr);
2025 wptr = readw(ofsAddr + RXwptr);
2026 mask = readw(ofsAddr + RX_mask);
2027 return (wptr - rptr) & mask;
2028}
2029
2030static void MoxaPortTxDisable(struct moxa_port *port)
2031{
2032 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2033}
2034
2035static void MoxaPortTxEnable(struct moxa_port *port)
2036{
2037 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2038}
2039
2040static int moxa_get_serial_info(struct moxa_port *info,
2041 struct serial_struct __user *retinfo)
2042{
2043 struct serial_struct tmp = {
2044 .type = info->type,
2045 .line = info->port.tty->index,
2046 .flags = info->port.flags,
2047 .baud_base = 921600,
2048 .close_delay = info->port.close_delay
2049 };
2050 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
2051}
2052
2053
2054static int moxa_set_serial_info(struct moxa_port *info,
2055 struct serial_struct __user *new_info)
2056{
2057 struct serial_struct new_serial;
2058
2059 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2060 return -EFAULT;
2061
2062 if (new_serial.irq != 0 || new_serial.port != 0 ||
2063 new_serial.custom_divisor != 0 ||
2064 new_serial.baud_base != 921600)
2065 return -EPERM;
2066
2067 if (!capable(CAP_SYS_ADMIN)) {
2068 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2069 (info->port.flags & ~ASYNC_USR_MASK)))
2070 return -EPERM;
2071 } else
2072 info->port.close_delay = new_serial.close_delay * HZ / 100;
2073
2074 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2075 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
2076
2077 MoxaSetFifo(info, new_serial.type == PORT_16550A);
2078
2079 info->type = new_serial.type;
2080 return 0;
2081}
2082
2083
2084
2085
2086
2087
2088
2089static void MoxaSetFifo(struct moxa_port *port, int enable)
2090{
2091 void __iomem *ofsAddr = port->tableAddr;
2092
2093 if (!enable) {
2094 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2095 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2096 } else {
2097 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2098 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2099 }
2100}
2101