linux/drivers/tty/serial/sunsu.c
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   1/*
   2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   3 *
   4 * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   5 * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
   6 *
   7 * This is mainly a variation of 8250.c, credits go to authors mentioned
   8 * therein.  In fact this driver should be merged into the generic 8250.c
   9 * infrastructure perhaps using a 8250_sparc.c module.
  10 *
  11 * Fixed to use tty_get_baud_rate().
  12 *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13 *
  14 * Converted to new 2.5.x UART layer.
  15 *   David S. Miller (davem@davemloft.net), 2002-Jul-29
  16 */
  17
  18#include <linux/module.h>
  19#include <linux/kernel.h>
  20#include <linux/spinlock.h>
  21#include <linux/errno.h>
  22#include <linux/tty.h>
  23#include <linux/tty_flip.h>
  24#include <linux/major.h>
  25#include <linux/string.h>
  26#include <linux/ptrace.h>
  27#include <linux/ioport.h>
  28#include <linux/circ_buf.h>
  29#include <linux/serial.h>
  30#include <linux/sysrq.h>
  31#include <linux/console.h>
  32#include <linux/slab.h>
  33#ifdef CONFIG_SERIO
  34#include <linux/serio.h>
  35#endif
  36#include <linux/serial_reg.h>
  37#include <linux/init.h>
  38#include <linux/delay.h>
  39#include <linux/of_device.h>
  40
  41#include <asm/io.h>
  42#include <asm/irq.h>
  43#include <asm/prom.h>
  44#include <asm/setup.h>
  45
  46#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  47#define SUPPORT_SYSRQ
  48#endif
  49
  50#include <linux/serial_core.h>
  51#include <linux/sunserialcore.h>
  52
  53/* We are on a NS PC87303 clocked with 24.0 MHz, which results
  54 * in a UART clock of 1.8462 MHz.
  55 */
  56#define SU_BASE_BAUD    (1846200 / 16)
  57
  58enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  59static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  60
  61struct serial_uart_config {
  62        char    *name;
  63        int     dfl_xmit_fifo_size;
  64        int     flags;
  65};
  66
  67/*
  68 * Here we define the default xmit fifo size used for each type of UART.
  69 */
  70static const struct serial_uart_config uart_config[] = {
  71        { "unknown",    1,      0 },
  72        { "8250",       1,      0 },
  73        { "16450",      1,      0 },
  74        { "16550",      1,      0 },
  75        { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  76        { "Cirrus",     1,      0 },
  77        { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  78        { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  79        { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  80        { "Startech",   1,      0 },
  81        { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  82        { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  83        { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  84        { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  85};
  86
  87struct uart_sunsu_port {
  88        struct uart_port        port;
  89        unsigned char           acr;
  90        unsigned char           ier;
  91        unsigned short          rev;
  92        unsigned char           lcr;
  93        unsigned int            lsr_break_flag;
  94        unsigned int            cflag;
  95
  96        /* Probing information.  */
  97        enum su_type            su_type;
  98        unsigned int            type_probed;    /* XXX Stupid */
  99        unsigned long           reg_size;
 100
 101#ifdef CONFIG_SERIO
 102        struct serio            serio;
 103        int                     serio_open;
 104#endif
 105};
 106
 107static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 108{
 109        offset <<= up->port.regshift;
 110
 111        switch (up->port.iotype) {
 112        case UPIO_HUB6:
 113                outb(up->port.hub6 - 1 + offset, up->port.iobase);
 114                return inb(up->port.iobase + 1);
 115
 116        case UPIO_MEM:
 117                return readb(up->port.membase + offset);
 118
 119        default:
 120                return inb(up->port.iobase + offset);
 121        }
 122}
 123
 124static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 125{
 126#ifndef CONFIG_SPARC64
 127        /*
 128         * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 129         * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 130         * gate outputs a logical one. Since we use level triggered interrupts
 131         * we have lockup and watchdog reset. We cannot mask IRQ because
 132         * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 133         * This problem is similar to what Alpha people suffer, see serial.c.
 134         */
 135        if (offset == UART_MCR)
 136                value |= UART_MCR_OUT2;
 137#endif
 138        offset <<= up->port.regshift;
 139
 140        switch (up->port.iotype) {
 141        case UPIO_HUB6:
 142                outb(up->port.hub6 - 1 + offset, up->port.iobase);
 143                outb(value, up->port.iobase + 1);
 144                break;
 145
 146        case UPIO_MEM:
 147                writeb(value, up->port.membase + offset);
 148                break;
 149
 150        default:
 151                outb(value, up->port.iobase + offset);
 152        }
 153}
 154
 155/*
 156 * We used to support using pause I/O for certain machines.  We
 157 * haven't supported this for a while, but just in case it's badly
 158 * needed for certain old 386 machines, I've left these #define's
 159 * in....
 160 */
 161#define serial_inp(up, offset)          serial_in(up, offset)
 162#define serial_outp(up, offset, value)  serial_out(up, offset, value)
 163
 164
 165/*
 166 * For the 16C950
 167 */
 168static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 169{
 170        serial_out(up, UART_SCR, offset);
 171        serial_out(up, UART_ICR, value);
 172}
 173
 174#if 0 /* Unused currently */
 175static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 176{
 177        unsigned int value;
 178
 179        serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 180        serial_out(up, UART_SCR, offset);
 181        value = serial_in(up, UART_ICR);
 182        serial_icr_write(up, UART_ACR, up->acr);
 183
 184        return value;
 185}
 186#endif
 187
 188#ifdef CONFIG_SERIAL_8250_RSA
 189/*
 190 * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 191 * We set the port uart clock rate if we succeed.
 192 */
 193static int __enable_rsa(struct uart_sunsu_port *up)
 194{
 195        unsigned char mode;
 196        int result;
 197
 198        mode = serial_inp(up, UART_RSA_MSR);
 199        result = mode & UART_RSA_MSR_FIFO;
 200
 201        if (!result) {
 202                serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 203                mode = serial_inp(up, UART_RSA_MSR);
 204                result = mode & UART_RSA_MSR_FIFO;
 205        }
 206
 207        if (result)
 208                up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 209
 210        return result;
 211}
 212
 213static void enable_rsa(struct uart_sunsu_port *up)
 214{
 215        if (up->port.type == PORT_RSA) {
 216                if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 217                        spin_lock_irq(&up->port.lock);
 218                        __enable_rsa(up);
 219                        spin_unlock_irq(&up->port.lock);
 220                }
 221                if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 222                        serial_outp(up, UART_RSA_FRR, 0);
 223        }
 224}
 225
 226/*
 227 * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 228 * It is unknown why interrupts were disabled in here.  However,
 229 * the caller is expected to preserve this behaviour by grabbing
 230 * the spinlock before calling this function.
 231 */
 232static void disable_rsa(struct uart_sunsu_port *up)
 233{
 234        unsigned char mode;
 235        int result;
 236
 237        if (up->port.type == PORT_RSA &&
 238            up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 239                spin_lock_irq(&up->port.lock);
 240
 241                mode = serial_inp(up, UART_RSA_MSR);
 242                result = !(mode & UART_RSA_MSR_FIFO);
 243
 244                if (!result) {
 245                        serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 246                        mode = serial_inp(up, UART_RSA_MSR);
 247                        result = !(mode & UART_RSA_MSR_FIFO);
 248                }
 249
 250                if (result)
 251                        up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 252                spin_unlock_irq(&up->port.lock);
 253        }
 254}
 255#endif /* CONFIG_SERIAL_8250_RSA */
 256
 257static inline void __stop_tx(struct uart_sunsu_port *p)
 258{
 259        if (p->ier & UART_IER_THRI) {
 260                p->ier &= ~UART_IER_THRI;
 261                serial_out(p, UART_IER, p->ier);
 262        }
 263}
 264
 265static void sunsu_stop_tx(struct uart_port *port)
 266{
 267        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 268
 269        __stop_tx(up);
 270
 271        /*
 272         * We really want to stop the transmitter from sending.
 273         */
 274        if (up->port.type == PORT_16C950) {
 275                up->acr |= UART_ACR_TXDIS;
 276                serial_icr_write(up, UART_ACR, up->acr);
 277        }
 278}
 279
 280static void sunsu_start_tx(struct uart_port *port)
 281{
 282        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 283
 284        if (!(up->ier & UART_IER_THRI)) {
 285                up->ier |= UART_IER_THRI;
 286                serial_out(up, UART_IER, up->ier);
 287        }
 288
 289        /*
 290         * Re-enable the transmitter if we disabled it.
 291         */
 292        if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 293                up->acr &= ~UART_ACR_TXDIS;
 294                serial_icr_write(up, UART_ACR, up->acr);
 295        }
 296}
 297
 298static void sunsu_stop_rx(struct uart_port *port)
 299{
 300        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 301
 302        up->ier &= ~UART_IER_RLSI;
 303        up->port.read_status_mask &= ~UART_LSR_DR;
 304        serial_out(up, UART_IER, up->ier);
 305}
 306
 307static void sunsu_enable_ms(struct uart_port *port)
 308{
 309        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 310        unsigned long flags;
 311
 312        spin_lock_irqsave(&up->port.lock, flags);
 313        up->ier |= UART_IER_MSI;
 314        serial_out(up, UART_IER, up->ier);
 315        spin_unlock_irqrestore(&up->port.lock, flags);
 316}
 317
 318static struct tty_struct *
 319receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 320{
 321        struct tty_struct *tty = up->port.state->port.tty;
 322        unsigned char ch, flag;
 323        int max_count = 256;
 324        int saw_console_brk = 0;
 325
 326        do {
 327                ch = serial_inp(up, UART_RX);
 328                flag = TTY_NORMAL;
 329                up->port.icount.rx++;
 330
 331                if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 332                                       UART_LSR_FE | UART_LSR_OE))) {
 333                        /*
 334                         * For statistics only
 335                         */
 336                        if (*status & UART_LSR_BI) {
 337                                *status &= ~(UART_LSR_FE | UART_LSR_PE);
 338                                up->port.icount.brk++;
 339                                if (up->port.cons != NULL &&
 340                                    up->port.line == up->port.cons->index)
 341                                        saw_console_brk = 1;
 342                                /*
 343                                 * We do the SysRQ and SAK checking
 344                                 * here because otherwise the break
 345                                 * may get masked by ignore_status_mask
 346                                 * or read_status_mask.
 347                                 */
 348                                if (uart_handle_break(&up->port))
 349                                        goto ignore_char;
 350                        } else if (*status & UART_LSR_PE)
 351                                up->port.icount.parity++;
 352                        else if (*status & UART_LSR_FE)
 353                                up->port.icount.frame++;
 354                        if (*status & UART_LSR_OE)
 355                                up->port.icount.overrun++;
 356
 357                        /*
 358                         * Mask off conditions which should be ingored.
 359                         */
 360                        *status &= up->port.read_status_mask;
 361
 362                        if (up->port.cons != NULL &&
 363                            up->port.line == up->port.cons->index) {
 364                                /* Recover the break flag from console xmit */
 365                                *status |= up->lsr_break_flag;
 366                                up->lsr_break_flag = 0;
 367                        }
 368
 369                        if (*status & UART_LSR_BI) {
 370                                flag = TTY_BREAK;
 371                        } else if (*status & UART_LSR_PE)
 372                                flag = TTY_PARITY;
 373                        else if (*status & UART_LSR_FE)
 374                                flag = TTY_FRAME;
 375                }
 376                if (uart_handle_sysrq_char(&up->port, ch))
 377                        goto ignore_char;
 378                if ((*status & up->port.ignore_status_mask) == 0)
 379                        tty_insert_flip_char(tty, ch, flag);
 380                if (*status & UART_LSR_OE)
 381                        /*
 382                         * Overrun is special, since it's reported
 383                         * immediately, and doesn't affect the current
 384                         * character.
 385                         */
 386                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 387        ignore_char:
 388                *status = serial_inp(up, UART_LSR);
 389        } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 390
 391        if (saw_console_brk)
 392                sun_do_break();
 393
 394        return tty;
 395}
 396
 397static void transmit_chars(struct uart_sunsu_port *up)
 398{
 399        struct circ_buf *xmit = &up->port.state->xmit;
 400        int count;
 401
 402        if (up->port.x_char) {
 403                serial_outp(up, UART_TX, up->port.x_char);
 404                up->port.icount.tx++;
 405                up->port.x_char = 0;
 406                return;
 407        }
 408        if (uart_tx_stopped(&up->port)) {
 409                sunsu_stop_tx(&up->port);
 410                return;
 411        }
 412        if (uart_circ_empty(xmit)) {
 413                __stop_tx(up);
 414                return;
 415        }
 416
 417        count = up->port.fifosize;
 418        do {
 419                serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 420                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 421                up->port.icount.tx++;
 422                if (uart_circ_empty(xmit))
 423                        break;
 424        } while (--count > 0);
 425
 426        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 427                uart_write_wakeup(&up->port);
 428
 429        if (uart_circ_empty(xmit))
 430                __stop_tx(up);
 431}
 432
 433static void check_modem_status(struct uart_sunsu_port *up)
 434{
 435        int status;
 436
 437        status = serial_in(up, UART_MSR);
 438
 439        if ((status & UART_MSR_ANY_DELTA) == 0)
 440                return;
 441
 442        if (status & UART_MSR_TERI)
 443                up->port.icount.rng++;
 444        if (status & UART_MSR_DDSR)
 445                up->port.icount.dsr++;
 446        if (status & UART_MSR_DDCD)
 447                uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 448        if (status & UART_MSR_DCTS)
 449                uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 450
 451        wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 452}
 453
 454static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 455{
 456        struct uart_sunsu_port *up = dev_id;
 457        unsigned long flags;
 458        unsigned char status;
 459
 460        spin_lock_irqsave(&up->port.lock, flags);
 461
 462        do {
 463                struct tty_struct *tty;
 464
 465                status = serial_inp(up, UART_LSR);
 466                tty = NULL;
 467                if (status & UART_LSR_DR)
 468                        tty = receive_chars(up, &status);
 469                check_modem_status(up);
 470                if (status & UART_LSR_THRE)
 471                        transmit_chars(up);
 472
 473                spin_unlock_irqrestore(&up->port.lock, flags);
 474
 475                if (tty)
 476                        tty_flip_buffer_push(tty);
 477
 478                spin_lock_irqsave(&up->port.lock, flags);
 479
 480        } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 481
 482        spin_unlock_irqrestore(&up->port.lock, flags);
 483
 484        return IRQ_HANDLED;
 485}
 486
 487/* Separate interrupt handling path for keyboard/mouse ports.  */
 488
 489static void
 490sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 491                   unsigned int iflag, unsigned int quot);
 492
 493static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 494{
 495        unsigned int cur_cflag = up->cflag;
 496        int quot, new_baud;
 497
 498        up->cflag &= ~CBAUD;
 499        up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 500
 501        quot = up->port.uartclk / (16 * new_baud);
 502
 503        sunsu_change_speed(&up->port, up->cflag, 0, quot);
 504}
 505
 506static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 507{
 508        do {
 509                unsigned char ch = serial_inp(up, UART_RX);
 510
 511                /* Stop-A is handled by drivers/char/keyboard.c now. */
 512                if (up->su_type == SU_PORT_KBD) {
 513#ifdef CONFIG_SERIO
 514                        serio_interrupt(&up->serio, ch, 0);
 515#endif
 516                } else if (up->su_type == SU_PORT_MS) {
 517                        int ret = suncore_mouse_baud_detection(ch, is_break);
 518
 519                        switch (ret) {
 520                        case 2:
 521                                sunsu_change_mouse_baud(up);
 522                                /* fallthru */
 523                        case 1:
 524                                break;
 525
 526                        case 0:
 527#ifdef CONFIG_SERIO
 528                                serio_interrupt(&up->serio, ch, 0);
 529#endif
 530                                break;
 531                        };
 532                }
 533        } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 534}
 535
 536static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 537{
 538        struct uart_sunsu_port *up = dev_id;
 539
 540        if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 541                unsigned char status = serial_inp(up, UART_LSR);
 542
 543                if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 544                        receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 545        }
 546
 547        return IRQ_HANDLED;
 548}
 549
 550static unsigned int sunsu_tx_empty(struct uart_port *port)
 551{
 552        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 553        unsigned long flags;
 554        unsigned int ret;
 555
 556        spin_lock_irqsave(&up->port.lock, flags);
 557        ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 558        spin_unlock_irqrestore(&up->port.lock, flags);
 559
 560        return ret;
 561}
 562
 563static unsigned int sunsu_get_mctrl(struct uart_port *port)
 564{
 565        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 566        unsigned char status;
 567        unsigned int ret;
 568
 569        status = serial_in(up, UART_MSR);
 570
 571        ret = 0;
 572        if (status & UART_MSR_DCD)
 573                ret |= TIOCM_CAR;
 574        if (status & UART_MSR_RI)
 575                ret |= TIOCM_RNG;
 576        if (status & UART_MSR_DSR)
 577                ret |= TIOCM_DSR;
 578        if (status & UART_MSR_CTS)
 579                ret |= TIOCM_CTS;
 580        return ret;
 581}
 582
 583static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 584{
 585        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 586        unsigned char mcr = 0;
 587
 588        if (mctrl & TIOCM_RTS)
 589                mcr |= UART_MCR_RTS;
 590        if (mctrl & TIOCM_DTR)
 591                mcr |= UART_MCR_DTR;
 592        if (mctrl & TIOCM_OUT1)
 593                mcr |= UART_MCR_OUT1;
 594        if (mctrl & TIOCM_OUT2)
 595                mcr |= UART_MCR_OUT2;
 596        if (mctrl & TIOCM_LOOP)
 597                mcr |= UART_MCR_LOOP;
 598
 599        serial_out(up, UART_MCR, mcr);
 600}
 601
 602static void sunsu_break_ctl(struct uart_port *port, int break_state)
 603{
 604        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 605        unsigned long flags;
 606
 607        spin_lock_irqsave(&up->port.lock, flags);
 608        if (break_state == -1)
 609                up->lcr |= UART_LCR_SBC;
 610        else
 611                up->lcr &= ~UART_LCR_SBC;
 612        serial_out(up, UART_LCR, up->lcr);
 613        spin_unlock_irqrestore(&up->port.lock, flags);
 614}
 615
 616static int sunsu_startup(struct uart_port *port)
 617{
 618        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 619        unsigned long flags;
 620        int retval;
 621
 622        if (up->port.type == PORT_16C950) {
 623                /* Wake up and initialize UART */
 624                up->acr = 0;
 625                serial_outp(up, UART_LCR, 0xBF);
 626                serial_outp(up, UART_EFR, UART_EFR_ECB);
 627                serial_outp(up, UART_IER, 0);
 628                serial_outp(up, UART_LCR, 0);
 629                serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 630                serial_outp(up, UART_LCR, 0xBF);
 631                serial_outp(up, UART_EFR, UART_EFR_ECB);
 632                serial_outp(up, UART_LCR, 0);
 633        }
 634
 635#ifdef CONFIG_SERIAL_8250_RSA
 636        /*
 637         * If this is an RSA port, see if we can kick it up to the
 638         * higher speed clock.
 639         */
 640        enable_rsa(up);
 641#endif
 642
 643        /*
 644         * Clear the FIFO buffers and disable them.
 645         * (they will be reenabled in set_termios())
 646         */
 647        if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 648                serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 649                serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 650                                UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 651                serial_outp(up, UART_FCR, 0);
 652        }
 653
 654        /*
 655         * Clear the interrupt registers.
 656         */
 657        (void) serial_inp(up, UART_LSR);
 658        (void) serial_inp(up, UART_RX);
 659        (void) serial_inp(up, UART_IIR);
 660        (void) serial_inp(up, UART_MSR);
 661
 662        /*
 663         * At this point, there's no way the LSR could still be 0xff;
 664         * if it is, then bail out, because there's likely no UART
 665         * here.
 666         */
 667        if (!(up->port.flags & UPF_BUGGY_UART) &&
 668            (serial_inp(up, UART_LSR) == 0xff)) {
 669                printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 670                return -ENODEV;
 671        }
 672
 673        if (up->su_type != SU_PORT_PORT) {
 674                retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 675                                     IRQF_SHARED, su_typev[up->su_type], up);
 676        } else {
 677                retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 678                                     IRQF_SHARED, su_typev[up->su_type], up);
 679        }
 680        if (retval) {
 681                printk("su: Cannot register IRQ %d\n", up->port.irq);
 682                return retval;
 683        }
 684
 685        /*
 686         * Now, initialize the UART
 687         */
 688        serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 689
 690        spin_lock_irqsave(&up->port.lock, flags);
 691
 692        up->port.mctrl |= TIOCM_OUT2;
 693
 694        sunsu_set_mctrl(&up->port, up->port.mctrl);
 695        spin_unlock_irqrestore(&up->port.lock, flags);
 696
 697        /*
 698         * Finally, enable interrupts.  Note: Modem status interrupts
 699         * are set via set_termios(), which will be occurring imminently
 700         * anyway, so we don't enable them here.
 701         */
 702        up->ier = UART_IER_RLSI | UART_IER_RDI;
 703        serial_outp(up, UART_IER, up->ier);
 704
 705        if (up->port.flags & UPF_FOURPORT) {
 706                unsigned int icp;
 707                /*
 708                 * Enable interrupts on the AST Fourport board
 709                 */
 710                icp = (up->port.iobase & 0xfe0) | 0x01f;
 711                outb_p(0x80, icp);
 712                (void) inb_p(icp);
 713        }
 714
 715        /*
 716         * And clear the interrupt registers again for luck.
 717         */
 718        (void) serial_inp(up, UART_LSR);
 719        (void) serial_inp(up, UART_RX);
 720        (void) serial_inp(up, UART_IIR);
 721        (void) serial_inp(up, UART_MSR);
 722
 723        return 0;
 724}
 725
 726static void sunsu_shutdown(struct uart_port *port)
 727{
 728        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 729        unsigned long flags;
 730
 731        /*
 732         * Disable interrupts from this port
 733         */
 734        up->ier = 0;
 735        serial_outp(up, UART_IER, 0);
 736
 737        spin_lock_irqsave(&up->port.lock, flags);
 738        if (up->port.flags & UPF_FOURPORT) {
 739                /* reset interrupts on the AST Fourport board */
 740                inb((up->port.iobase & 0xfe0) | 0x1f);
 741                up->port.mctrl |= TIOCM_OUT1;
 742        } else
 743                up->port.mctrl &= ~TIOCM_OUT2;
 744
 745        sunsu_set_mctrl(&up->port, up->port.mctrl);
 746        spin_unlock_irqrestore(&up->port.lock, flags);
 747
 748        /*
 749         * Disable break condition and FIFOs
 750         */
 751        serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 752        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 753                                  UART_FCR_CLEAR_RCVR |
 754                                  UART_FCR_CLEAR_XMIT);
 755        serial_outp(up, UART_FCR, 0);
 756
 757#ifdef CONFIG_SERIAL_8250_RSA
 758        /*
 759         * Reset the RSA board back to 115kbps compat mode.
 760         */
 761        disable_rsa(up);
 762#endif
 763
 764        /*
 765         * Read data port to reset things.
 766         */
 767        (void) serial_in(up, UART_RX);
 768
 769        free_irq(up->port.irq, up);
 770}
 771
 772static void
 773sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 774                   unsigned int iflag, unsigned int quot)
 775{
 776        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 777        unsigned char cval, fcr = 0;
 778        unsigned long flags;
 779
 780        switch (cflag & CSIZE) {
 781        case CS5:
 782                cval = 0x00;
 783                break;
 784        case CS6:
 785                cval = 0x01;
 786                break;
 787        case CS7:
 788                cval = 0x02;
 789                break;
 790        default:
 791        case CS8:
 792                cval = 0x03;
 793                break;
 794        }
 795
 796        if (cflag & CSTOPB)
 797                cval |= 0x04;
 798        if (cflag & PARENB)
 799                cval |= UART_LCR_PARITY;
 800        if (!(cflag & PARODD))
 801                cval |= UART_LCR_EPAR;
 802#ifdef CMSPAR
 803        if (cflag & CMSPAR)
 804                cval |= UART_LCR_SPAR;
 805#endif
 806
 807        /*
 808         * Work around a bug in the Oxford Semiconductor 952 rev B
 809         * chip which causes it to seriously miscalculate baud rates
 810         * when DLL is 0.
 811         */
 812        if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 813            up->rev == 0x5201)
 814                quot ++;
 815
 816        if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 817                if ((up->port.uartclk / quot) < (2400 * 16))
 818                        fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 819#ifdef CONFIG_SERIAL_8250_RSA
 820                else if (up->port.type == PORT_RSA)
 821                        fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 822#endif
 823                else
 824                        fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 825        }
 826        if (up->port.type == PORT_16750)
 827                fcr |= UART_FCR7_64BYTE;
 828
 829        /*
 830         * Ok, we're now changing the port state.  Do it with
 831         * interrupts disabled.
 832         */
 833        spin_lock_irqsave(&up->port.lock, flags);
 834
 835        /*
 836         * Update the per-port timeout.
 837         */
 838        uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 839
 840        up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 841        if (iflag & INPCK)
 842                up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 843        if (iflag & (BRKINT | PARMRK))
 844                up->port.read_status_mask |= UART_LSR_BI;
 845
 846        /*
 847         * Characteres to ignore
 848         */
 849        up->port.ignore_status_mask = 0;
 850        if (iflag & IGNPAR)
 851                up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 852        if (iflag & IGNBRK) {
 853                up->port.ignore_status_mask |= UART_LSR_BI;
 854                /*
 855                 * If we're ignoring parity and break indicators,
 856                 * ignore overruns too (for real raw support).
 857                 */
 858                if (iflag & IGNPAR)
 859                        up->port.ignore_status_mask |= UART_LSR_OE;
 860        }
 861
 862        /*
 863         * ignore all characters if CREAD is not set
 864         */
 865        if ((cflag & CREAD) == 0)
 866                up->port.ignore_status_mask |= UART_LSR_DR;
 867
 868        /*
 869         * CTS flow control flag and modem status interrupts
 870         */
 871        up->ier &= ~UART_IER_MSI;
 872        if (UART_ENABLE_MS(&up->port, cflag))
 873                up->ier |= UART_IER_MSI;
 874
 875        serial_out(up, UART_IER, up->ier);
 876
 877        if (uart_config[up->port.type].flags & UART_STARTECH) {
 878                serial_outp(up, UART_LCR, 0xBF);
 879                serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 880        }
 881        serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 882        serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 883        serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 884        if (up->port.type == PORT_16750)
 885                serial_outp(up, UART_FCR, fcr);         /* set fcr */
 886        serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 887        up->lcr = cval;                                 /* Save LCR */
 888        if (up->port.type != PORT_16750) {
 889                if (fcr & UART_FCR_ENABLE_FIFO) {
 890                        /* emulated UARTs (Lucent Venus 167x) need two steps */
 891                        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 892                }
 893                serial_outp(up, UART_FCR, fcr);         /* set fcr */
 894        }
 895
 896        up->cflag = cflag;
 897
 898        spin_unlock_irqrestore(&up->port.lock, flags);
 899}
 900
 901static void
 902sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 903                  struct ktermios *old)
 904{
 905        unsigned int baud, quot;
 906
 907        /*
 908         * Ask the core to calculate the divisor for us.
 909         */
 910        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
 911        quot = uart_get_divisor(port, baud);
 912
 913        sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 914}
 915
 916static void sunsu_release_port(struct uart_port *port)
 917{
 918}
 919
 920static int sunsu_request_port(struct uart_port *port)
 921{
 922        return 0;
 923}
 924
 925static void sunsu_config_port(struct uart_port *port, int flags)
 926{
 927        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 928
 929        if (flags & UART_CONFIG_TYPE) {
 930                /*
 931                 * We are supposed to call autoconfig here, but this requires
 932                 * splitting all the OBP probing crap from the UART probing.
 933                 * We'll do it when we kill sunsu.c altogether.
 934                 */
 935                port->type = up->type_probed;   /* XXX */
 936        }
 937}
 938
 939static int
 940sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 941{
 942        return -EINVAL;
 943}
 944
 945static const char *
 946sunsu_type(struct uart_port *port)
 947{
 948        int type = port->type;
 949
 950        if (type >= ARRAY_SIZE(uart_config))
 951                type = 0;
 952        return uart_config[type].name;
 953}
 954
 955static struct uart_ops sunsu_pops = {
 956        .tx_empty       = sunsu_tx_empty,
 957        .set_mctrl      = sunsu_set_mctrl,
 958        .get_mctrl      = sunsu_get_mctrl,
 959        .stop_tx        = sunsu_stop_tx,
 960        .start_tx       = sunsu_start_tx,
 961        .stop_rx        = sunsu_stop_rx,
 962        .enable_ms      = sunsu_enable_ms,
 963        .break_ctl      = sunsu_break_ctl,
 964        .startup        = sunsu_startup,
 965        .shutdown       = sunsu_shutdown,
 966        .set_termios    = sunsu_set_termios,
 967        .type           = sunsu_type,
 968        .release_port   = sunsu_release_port,
 969        .request_port   = sunsu_request_port,
 970        .config_port    = sunsu_config_port,
 971        .verify_port    = sunsu_verify_port,
 972};
 973
 974#define UART_NR 4
 975
 976static struct uart_sunsu_port sunsu_ports[UART_NR];
 977
 978#ifdef CONFIG_SERIO
 979
 980static DEFINE_SPINLOCK(sunsu_serio_lock);
 981
 982static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 983{
 984        struct uart_sunsu_port *up = serio->port_data;
 985        unsigned long flags;
 986        int lsr;
 987
 988        spin_lock_irqsave(&sunsu_serio_lock, flags);
 989
 990        do {
 991                lsr = serial_in(up, UART_LSR);
 992        } while (!(lsr & UART_LSR_THRE));
 993
 994        /* Send the character out. */
 995        serial_out(up, UART_TX, ch);
 996
 997        spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 998
 999        return 0;
1000}
1001
1002static int sunsu_serio_open(struct serio *serio)
1003{
1004        struct uart_sunsu_port *up = serio->port_data;
1005        unsigned long flags;
1006        int ret;
1007
1008        spin_lock_irqsave(&sunsu_serio_lock, flags);
1009        if (!up->serio_open) {
1010                up->serio_open = 1;
1011                ret = 0;
1012        } else
1013                ret = -EBUSY;
1014        spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1015
1016        return ret;
1017}
1018
1019static void sunsu_serio_close(struct serio *serio)
1020{
1021        struct uart_sunsu_port *up = serio->port_data;
1022        unsigned long flags;
1023
1024        spin_lock_irqsave(&sunsu_serio_lock, flags);
1025        up->serio_open = 0;
1026        spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1027}
1028
1029#endif /* CONFIG_SERIO */
1030
1031static void sunsu_autoconfig(struct uart_sunsu_port *up)
1032{
1033        unsigned char status1, status2, scratch, scratch2, scratch3;
1034        unsigned char save_lcr, save_mcr;
1035        unsigned long flags;
1036
1037        if (up->su_type == SU_PORT_NONE)
1038                return;
1039
1040        up->type_probed = PORT_UNKNOWN;
1041        up->port.iotype = UPIO_MEM;
1042
1043        spin_lock_irqsave(&up->port.lock, flags);
1044
1045        if (!(up->port.flags & UPF_BUGGY_UART)) {
1046                /*
1047                 * Do a simple existence test first; if we fail this, there's
1048                 * no point trying anything else.
1049                 *
1050                 * 0x80 is used as a nonsense port to prevent against false
1051                 * positives due to ISA bus float.  The assumption is that
1052                 * 0x80 is a non-existent port; which should be safe since
1053                 * include/asm/io.h also makes this assumption.
1054                 */
1055                scratch = serial_inp(up, UART_IER);
1056                serial_outp(up, UART_IER, 0);
1057#ifdef __i386__
1058                outb(0xff, 0x080);
1059#endif
1060                scratch2 = serial_inp(up, UART_IER);
1061                serial_outp(up, UART_IER, 0x0f);
1062#ifdef __i386__
1063                outb(0, 0x080);
1064#endif
1065                scratch3 = serial_inp(up, UART_IER);
1066                serial_outp(up, UART_IER, scratch);
1067                if (scratch2 != 0 || scratch3 != 0x0F)
1068                        goto out;       /* We failed; there's nothing here */
1069        }
1070
1071        save_mcr = serial_in(up, UART_MCR);
1072        save_lcr = serial_in(up, UART_LCR);
1073
1074        /* 
1075         * Check to see if a UART is really there.  Certain broken
1076         * internal modems based on the Rockwell chipset fail this
1077         * test, because they apparently don't implement the loopback
1078         * test mode.  So this test is skipped on the COM 1 through
1079         * COM 4 ports.  This *should* be safe, since no board
1080         * manufacturer would be stupid enough to design a board
1081         * that conflicts with COM 1-4 --- we hope!
1082         */
1083        if (!(up->port.flags & UPF_SKIP_TEST)) {
1084                serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1085                status1 = serial_inp(up, UART_MSR) & 0xF0;
1086                serial_outp(up, UART_MCR, save_mcr);
1087                if (status1 != 0x90)
1088                        goto out;       /* We failed loopback test */
1089        }
1090        serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1091        serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1092        serial_outp(up, UART_LCR, 0);
1093        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1094        scratch = serial_in(up, UART_IIR) >> 6;
1095        switch (scratch) {
1096                case 0:
1097                        up->port.type = PORT_16450;
1098                        break;
1099                case 1:
1100                        up->port.type = PORT_UNKNOWN;
1101                        break;
1102                case 2:
1103                        up->port.type = PORT_16550;
1104                        break;
1105                case 3:
1106                        up->port.type = PORT_16550A;
1107                        break;
1108        }
1109        if (up->port.type == PORT_16550A) {
1110                /* Check for Startech UART's */
1111                serial_outp(up, UART_LCR, UART_LCR_DLAB);
1112                if (serial_in(up, UART_EFR) == 0) {
1113                        up->port.type = PORT_16650;
1114                } else {
1115                        serial_outp(up, UART_LCR, 0xBF);
1116                        if (serial_in(up, UART_EFR) == 0)
1117                                up->port.type = PORT_16650V2;
1118                }
1119        }
1120        if (up->port.type == PORT_16550A) {
1121                /* Check for TI 16750 */
1122                serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1123                serial_outp(up, UART_FCR,
1124                            UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1125                scratch = serial_in(up, UART_IIR) >> 5;
1126                if (scratch == 7) {
1127                        /*
1128                         * If this is a 16750, and not a cheap UART
1129                         * clone, then it should only go into 64 byte
1130                         * mode if the UART_FCR7_64BYTE bit was set
1131                         * while UART_LCR_DLAB was latched.
1132                         */
1133                        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1134                        serial_outp(up, UART_LCR, 0);
1135                        serial_outp(up, UART_FCR,
1136                                    UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1137                        scratch = serial_in(up, UART_IIR) >> 5;
1138                        if (scratch == 6)
1139                                up->port.type = PORT_16750;
1140                }
1141                serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1142        }
1143        serial_outp(up, UART_LCR, save_lcr);
1144        if (up->port.type == PORT_16450) {
1145                scratch = serial_in(up, UART_SCR);
1146                serial_outp(up, UART_SCR, 0xa5);
1147                status1 = serial_in(up, UART_SCR);
1148                serial_outp(up, UART_SCR, 0x5a);
1149                status2 = serial_in(up, UART_SCR);
1150                serial_outp(up, UART_SCR, scratch);
1151
1152                if ((status1 != 0xa5) || (status2 != 0x5a))
1153                        up->port.type = PORT_8250;
1154        }
1155
1156        up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1157
1158        if (up->port.type == PORT_UNKNOWN)
1159                goto out;
1160        up->type_probed = up->port.type;        /* XXX */
1161
1162        /*
1163         * Reset the UART.
1164         */
1165#ifdef CONFIG_SERIAL_8250_RSA
1166        if (up->port.type == PORT_RSA)
1167                serial_outp(up, UART_RSA_FRR, 0);
1168#endif
1169        serial_outp(up, UART_MCR, save_mcr);
1170        serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1171                                     UART_FCR_CLEAR_RCVR |
1172                                     UART_FCR_CLEAR_XMIT));
1173        serial_outp(up, UART_FCR, 0);
1174        (void)serial_in(up, UART_RX);
1175        serial_outp(up, UART_IER, 0);
1176
1177out:
1178        spin_unlock_irqrestore(&up->port.lock, flags);
1179}
1180
1181static struct uart_driver sunsu_reg = {
1182        .owner                  = THIS_MODULE,
1183        .driver_name            = "sunsu",
1184        .dev_name               = "ttyS",
1185        .major                  = TTY_MAJOR,
1186};
1187
1188static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1189{
1190        int quot, baud;
1191#ifdef CONFIG_SERIO
1192        struct serio *serio;
1193#endif
1194
1195        if (up->su_type == SU_PORT_KBD) {
1196                up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1197                baud = 1200;
1198        } else {
1199                up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1200                baud = 4800;
1201        }
1202        quot = up->port.uartclk / (16 * baud);
1203
1204        sunsu_autoconfig(up);
1205        if (up->port.type == PORT_UNKNOWN)
1206                return -ENODEV;
1207
1208        printk("%s: %s port at %llx, irq %u\n",
1209               up->port.dev->of_node->full_name,
1210               (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1211               (unsigned long long) up->port.mapbase,
1212               up->port.irq);
1213
1214#ifdef CONFIG_SERIO
1215        serio = &up->serio;
1216        serio->port_data = up;
1217
1218        serio->id.type = SERIO_RS232;
1219        if (up->su_type == SU_PORT_KBD) {
1220                serio->id.proto = SERIO_SUNKBD;
1221                strlcpy(serio->name, "sukbd", sizeof(serio->name));
1222        } else {
1223                serio->id.proto = SERIO_SUN;
1224                serio->id.extra = 1;
1225                strlcpy(serio->name, "sums", sizeof(serio->name));
1226        }
1227        strlcpy(serio->phys,
1228                (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1229                sizeof(serio->phys));
1230
1231        serio->write = sunsu_serio_write;
1232        serio->open = sunsu_serio_open;
1233        serio->close = sunsu_serio_close;
1234        serio->dev.parent = up->port.dev;
1235
1236        serio_register_port(serio);
1237#endif
1238
1239        sunsu_change_speed(&up->port, up->cflag, 0, quot);
1240
1241        sunsu_startup(&up->port);
1242        return 0;
1243}
1244
1245/*
1246 * ------------------------------------------------------------
1247 * Serial console driver
1248 * ------------------------------------------------------------
1249 */
1250
1251#ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1252
1253#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1254
1255/*
1256 *      Wait for transmitter & holding register to empty
1257 */
1258static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1259{
1260        unsigned int status, tmout = 10000;
1261
1262        /* Wait up to 10ms for the character(s) to be sent. */
1263        do {
1264                status = serial_in(up, UART_LSR);
1265
1266                if (status & UART_LSR_BI)
1267                        up->lsr_break_flag = UART_LSR_BI;
1268
1269                if (--tmout == 0)
1270                        break;
1271                udelay(1);
1272        } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1273
1274        /* Wait up to 1s for flow control if necessary */
1275        if (up->port.flags & UPF_CONS_FLOW) {
1276                tmout = 1000000;
1277                while (--tmout &&
1278                       ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1279                        udelay(1);
1280        }
1281}
1282
1283static void sunsu_console_putchar(struct uart_port *port, int ch)
1284{
1285        struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1286
1287        wait_for_xmitr(up);
1288        serial_out(up, UART_TX, ch);
1289}
1290
1291/*
1292 *      Print a string to the serial port trying not to disturb
1293 *      any possible real use of the port...
1294 */
1295static void sunsu_console_write(struct console *co, const char *s,
1296                                unsigned int count)
1297{
1298        struct uart_sunsu_port *up = &sunsu_ports[co->index];
1299        unsigned long flags;
1300        unsigned int ier;
1301        int locked = 1;
1302
1303        local_irq_save(flags);
1304        if (up->port.sysrq) {
1305                locked = 0;
1306        } else if (oops_in_progress) {
1307                locked = spin_trylock(&up->port.lock);
1308        } else
1309                spin_lock(&up->port.lock);
1310
1311        /*
1312         *      First save the UER then disable the interrupts
1313         */
1314        ier = serial_in(up, UART_IER);
1315        serial_out(up, UART_IER, 0);
1316
1317        uart_console_write(&up->port, s, count, sunsu_console_putchar);
1318
1319        /*
1320         *      Finally, wait for transmitter to become empty
1321         *      and restore the IER
1322         */
1323        wait_for_xmitr(up);
1324        serial_out(up, UART_IER, ier);
1325
1326        if (locked)
1327                spin_unlock(&up->port.lock);
1328        local_irq_restore(flags);
1329}
1330
1331/*
1332 *      Setup initial baud/bits/parity. We do two things here:
1333 *      - construct a cflag setting for the first su_open()
1334 *      - initialize the serial port
1335 *      Return non-zero if we didn't find a serial port.
1336 */
1337static int __init sunsu_console_setup(struct console *co, char *options)
1338{
1339        static struct ktermios dummy;
1340        struct ktermios termios;
1341        struct uart_port *port;
1342
1343        printk("Console: ttyS%d (SU)\n",
1344               (sunsu_reg.minor - 64) + co->index);
1345
1346        /*
1347         * Check whether an invalid uart number has been specified, and
1348         * if so, search for the first available port that does have
1349         * console support.
1350         */
1351        if (co->index >= UART_NR)
1352                co->index = 0;
1353        port = &sunsu_ports[co->index].port;
1354
1355        /*
1356         * Temporary fix.
1357         */
1358        spin_lock_init(&port->lock);
1359
1360        /* Get firmware console settings.  */
1361        sunserial_console_termios(co, port->dev->of_node);
1362
1363        memset(&termios, 0, sizeof(struct ktermios));
1364        termios.c_cflag = co->cflag;
1365        port->mctrl |= TIOCM_DTR;
1366        port->ops->set_termios(port, &termios, &dummy);
1367
1368        return 0;
1369}
1370
1371static struct console sunsu_console = {
1372        .name   =       "ttyS",
1373        .write  =       sunsu_console_write,
1374        .device =       uart_console_device,
1375        .setup  =       sunsu_console_setup,
1376        .flags  =       CON_PRINTBUFFER,
1377        .index  =       -1,
1378        .data   =       &sunsu_reg,
1379};
1380
1381/*
1382 *      Register console.
1383 */
1384
1385static inline struct console *SUNSU_CONSOLE(void)
1386{
1387        return &sunsu_console;
1388}
1389#else
1390#define SUNSU_CONSOLE()                 (NULL)
1391#define sunsu_serial_console_init()     do { } while (0)
1392#endif
1393
1394static enum su_type __devinit su_get_type(struct device_node *dp)
1395{
1396        struct device_node *ap = of_find_node_by_path("/aliases");
1397
1398        if (ap) {
1399                const char *keyb = of_get_property(ap, "keyboard", NULL);
1400                const char *ms = of_get_property(ap, "mouse", NULL);
1401
1402                if (keyb) {
1403                        if (dp == of_find_node_by_path(keyb))
1404                                return SU_PORT_KBD;
1405                }
1406                if (ms) {
1407                        if (dp == of_find_node_by_path(ms))
1408                                return SU_PORT_MS;
1409                }
1410        }
1411
1412        return SU_PORT_PORT;
1413}
1414
1415static int __devinit su_probe(struct platform_device *op)
1416{
1417        static int inst;
1418        struct device_node *dp = op->dev.of_node;
1419        struct uart_sunsu_port *up;
1420        struct resource *rp;
1421        enum su_type type;
1422        bool ignore_line;
1423        int err;
1424
1425        type = su_get_type(dp);
1426        if (type == SU_PORT_PORT) {
1427                if (inst >= UART_NR)
1428                        return -EINVAL;
1429                up = &sunsu_ports[inst];
1430        } else {
1431                up = kzalloc(sizeof(*up), GFP_KERNEL);
1432                if (!up)
1433                        return -ENOMEM;
1434        }
1435
1436        up->port.line = inst;
1437
1438        spin_lock_init(&up->port.lock);
1439
1440        up->su_type = type;
1441
1442        rp = &op->resource[0];
1443        up->port.mapbase = rp->start;
1444        up->reg_size = resource_size(rp);
1445        up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1446        if (!up->port.membase) {
1447                if (type != SU_PORT_PORT)
1448                        kfree(up);
1449                return -ENOMEM;
1450        }
1451
1452        up->port.irq = op->archdata.irqs[0];
1453
1454        up->port.dev = &op->dev;
1455
1456        up->port.type = PORT_UNKNOWN;
1457        up->port.uartclk = (SU_BASE_BAUD * 16);
1458
1459        err = 0;
1460        if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1461                err = sunsu_kbd_ms_init(up);
1462                if (err) {
1463                        of_iounmap(&op->resource[0],
1464                                   up->port.membase, up->reg_size);
1465                        kfree(up);
1466                        return err;
1467                }
1468                dev_set_drvdata(&op->dev, up);
1469
1470                return 0;
1471        }
1472
1473        up->port.flags |= UPF_BOOT_AUTOCONF;
1474
1475        sunsu_autoconfig(up);
1476
1477        err = -ENODEV;
1478        if (up->port.type == PORT_UNKNOWN)
1479                goto out_unmap;
1480
1481        up->port.ops = &sunsu_pops;
1482
1483        ignore_line = false;
1484        if (!strcmp(dp->name, "rsc-console") ||
1485            !strcmp(dp->name, "lom-console"))
1486                ignore_line = true;
1487
1488        sunserial_console_match(SUNSU_CONSOLE(), dp,
1489                                &sunsu_reg, up->port.line,
1490                                ignore_line);
1491        err = uart_add_one_port(&sunsu_reg, &up->port);
1492        if (err)
1493                goto out_unmap;
1494
1495        dev_set_drvdata(&op->dev, up);
1496
1497        inst++;
1498
1499        return 0;
1500
1501out_unmap:
1502        of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1503        return err;
1504}
1505
1506static int __devexit su_remove(struct platform_device *op)
1507{
1508        struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
1509        bool kbdms = false;
1510
1511        if (up->su_type == SU_PORT_MS ||
1512            up->su_type == SU_PORT_KBD)
1513                kbdms = true;
1514
1515        if (kbdms) {
1516#ifdef CONFIG_SERIO
1517                serio_unregister_port(&up->serio);
1518#endif
1519        } else if (up->port.type != PORT_UNKNOWN)
1520                uart_remove_one_port(&sunsu_reg, &up->port);
1521
1522        if (up->port.membase)
1523                of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1524
1525        if (kbdms)
1526                kfree(up);
1527
1528        dev_set_drvdata(&op->dev, NULL);
1529
1530        return 0;
1531}
1532
1533static const struct of_device_id su_match[] = {
1534        {
1535                .name = "su",
1536        },
1537        {
1538                .name = "su_pnp",
1539        },
1540        {
1541                .name = "serial",
1542                .compatible = "su",
1543        },
1544        {
1545                .type = "serial",
1546                .compatible = "su",
1547        },
1548        {},
1549};
1550MODULE_DEVICE_TABLE(of, su_match);
1551
1552static struct platform_driver su_driver = {
1553        .driver = {
1554                .name = "su",
1555                .owner = THIS_MODULE,
1556                .of_match_table = su_match,
1557        },
1558        .probe          = su_probe,
1559        .remove         = __devexit_p(su_remove),
1560};
1561
1562static int __init sunsu_init(void)
1563{
1564        struct device_node *dp;
1565        int err;
1566        int num_uart = 0;
1567
1568        for_each_node_by_name(dp, "su") {
1569                if (su_get_type(dp) == SU_PORT_PORT)
1570                        num_uart++;
1571        }
1572        for_each_node_by_name(dp, "su_pnp") {
1573                if (su_get_type(dp) == SU_PORT_PORT)
1574                        num_uart++;
1575        }
1576        for_each_node_by_name(dp, "serial") {
1577                if (of_device_is_compatible(dp, "su")) {
1578                        if (su_get_type(dp) == SU_PORT_PORT)
1579                                num_uart++;
1580                }
1581        }
1582        for_each_node_by_type(dp, "serial") {
1583                if (of_device_is_compatible(dp, "su")) {
1584                        if (su_get_type(dp) == SU_PORT_PORT)
1585                                num_uart++;
1586                }
1587        }
1588
1589        if (num_uart) {
1590                err = sunserial_register_minors(&sunsu_reg, num_uart);
1591                if (err)
1592                        return err;
1593        }
1594
1595        err = platform_driver_register(&su_driver);
1596        if (err && num_uart)
1597                sunserial_unregister_minors(&sunsu_reg, num_uart);
1598
1599        return err;
1600}
1601
1602static void __exit sunsu_exit(void)
1603{
1604        if (sunsu_reg.nr)
1605                sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1606}
1607
1608module_init(sunsu_init);
1609module_exit(sunsu_exit);
1610
1611MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1612MODULE_DESCRIPTION("Sun SU serial port driver");
1613MODULE_VERSION("2.0");
1614MODULE_LICENSE("GPL");
1615