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15#include <linux/delay.h>
16#include <linux/dma-mapping.h>
17#include <linux/pm_runtime.h>
18#include <linux/io.h>
19#include <linux/scatterlist.h>
20#include <linux/sh_dma.h>
21#include <linux/slab.h>
22#include <linux/module.h>
23#include <linux/workqueue.h>
24#include <sound/soc.h>
25#include <sound/sh_fsi.h>
26
27
28#define REG_DO_FMT 0x0000
29#define REG_DOFF_CTL 0x0004
30#define REG_DOFF_ST 0x0008
31#define REG_DI_FMT 0x000C
32#define REG_DIFF_CTL 0x0010
33#define REG_DIFF_ST 0x0014
34#define REG_CKG1 0x0018
35#define REG_CKG2 0x001C
36#define REG_DIDT 0x0020
37#define REG_DODT 0x0024
38#define REG_MUTE_ST 0x0028
39#define REG_OUT_DMAC 0x002C
40#define REG_OUT_SEL 0x0030
41#define REG_IN_DMAC 0x0038
42
43
44#define MST_CLK_RST 0x0210
45#define MST_SOFT_RST 0x0214
46#define MST_FIFO_SZ 0x0218
47
48
49#define A_MST_CTLR 0x0180
50#define B_MST_CTLR 0x01A0
51#define CPU_INT_ST 0x01F4
52#define CPU_IEMSK 0x01F8
53#define CPU_IMSK 0x01FC
54#define INT_ST 0x0200
55#define IEMSK 0x0204
56#define IMSK 0x0208
57
58
59
60#define CR_BWS_MASK (0x3 << 20)
61#define CR_BWS_24 (0x0 << 20)
62#define CR_BWS_16 (0x1 << 20)
63#define CR_BWS_20 (0x2 << 20)
64
65#define CR_DTMD_PCM (0x0 << 8)
66#define CR_DTMD_SPDIF_PCM (0x1 << 8)
67#define CR_DTMD_SPDIF_STREAM (0x2 << 8)
68
69#define CR_MONO (0x0 << 4)
70#define CR_MONO_D (0x1 << 4)
71#define CR_PCM (0x2 << 4)
72#define CR_I2S (0x3 << 4)
73#define CR_TDM (0x4 << 4)
74#define CR_TDM_D (0x5 << 4)
75
76
77
78#define VDMD_MASK (0x3 << 4)
79#define VDMD_FRONT (0x0 << 4)
80#define VDMD_BACK (0x1 << 4)
81#define VDMD_STREAM (0x2 << 4)
82
83#define DMA_ON (0x1 << 0)
84
85
86
87#define IRQ_HALF 0x00100000
88#define FIFO_CLR 0x00000001
89
90
91#define ERR_OVER 0x00000010
92#define ERR_UNDER 0x00000001
93#define ST_ERR (ERR_OVER | ERR_UNDER)
94
95
96#define ACKMD_MASK 0x00007000
97#define BPFMD_MASK 0x00000700
98#define DIMD (1 << 4)
99#define DOMD (1 << 0)
100
101
102#define BP (1 << 4)
103#define SE (1 << 0)
104
105
106#define CRB (1 << 4)
107#define CRA (1 << 0)
108
109
110#define BI_SHIFT 12
111#define BO_SHIFT 8
112#define AI_SHIFT 4
113#define AO_SHIFT 0
114#define AB_IO(param, shift) (param << shift)
115
116
117#define PBSR (1 << 12)
118#define PASR (1 << 8)
119#define IR (1 << 4)
120#define FSISR (1 << 0)
121
122
123#define DMMD (1 << 4)
124
125
126
127#define FIFO_SZ_MASK 0x7
128
129#define FSI_RATES SNDRV_PCM_RATE_8000_96000
130
131#define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
132
133typedef int (*set_rate_func)(struct device *dev, int rate, int enable);
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143
144#define SHIFT_16DATA 0
145#define SHIFT_24DATA 4
146
147#define PACKAGE_24BITBUS_BACK 0
148#define PACKAGE_24BITBUS_FRONT 1
149#define PACKAGE_16BITBUS_STREAM 2
150
151#define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
152#define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
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194
195struct fsi_stream_handler;
196struct fsi_stream {
197
198
199
200
201 struct snd_pcm_substream *substream;
202 int fifo_sample_capa;
203 int buff_sample_capa;
204 int buff_sample_pos;
205 int period_samples;
206 int period_pos;
207 int sample_width;
208 int uerr_num;
209 int oerr_num;
210
211
212
213
214 u32 bus_option;
215
216
217
218
219 struct fsi_stream_handler *handler;
220 struct fsi_priv *priv;
221
222
223
224
225 struct dma_chan *chan;
226 struct sh_dmae_slave slave;
227 struct work_struct work;
228 dma_addr_t dma;
229};
230
231struct fsi_priv {
232 void __iomem *base;
233 struct fsi_master *master;
234 struct sh_fsi_port_info *info;
235
236 struct fsi_stream playback;
237 struct fsi_stream capture;
238
239 u32 fmt;
240
241 int chan_num:16;
242 int clk_master:1;
243 int spdif:1;
244
245 long rate;
246};
247
248struct fsi_stream_handler {
249 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
250 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
251 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
252 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
253 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
254 void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
255 int enable);
256};
257#define fsi_stream_handler_call(io, func, args...) \
258 (!(io) ? -ENODEV : \
259 !((io)->handler->func) ? 0 : \
260 (io)->handler->func(args))
261
262struct fsi_core {
263 int ver;
264
265 u32 int_st;
266 u32 iemsk;
267 u32 imsk;
268 u32 a_mclk;
269 u32 b_mclk;
270};
271
272struct fsi_master {
273 void __iomem *base;
274 int irq;
275 struct fsi_priv fsia;
276 struct fsi_priv fsib;
277 struct fsi_core *core;
278 spinlock_t lock;
279};
280
281static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
282
283
284
285
286
287static void __fsi_reg_write(u32 __iomem *reg, u32 data)
288{
289
290 data &= 0x00ffffff;
291
292 __raw_writel(data, reg);
293}
294
295static u32 __fsi_reg_read(u32 __iomem *reg)
296{
297 return __raw_readl(reg);
298}
299
300static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
301{
302 u32 val = __fsi_reg_read(reg);
303
304 val &= ~mask;
305 val |= data & mask;
306
307 __fsi_reg_write(reg, val);
308}
309
310#define fsi_reg_write(p, r, d)\
311 __fsi_reg_write((p->base + REG_##r), d)
312
313#define fsi_reg_read(p, r)\
314 __fsi_reg_read((p->base + REG_##r))
315
316#define fsi_reg_mask_set(p, r, m, d)\
317 __fsi_reg_mask_set((p->base + REG_##r), m, d)
318
319#define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
320#define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
321static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
322{
323 u32 ret;
324 unsigned long flags;
325
326 spin_lock_irqsave(&master->lock, flags);
327 ret = __fsi_reg_read(master->base + reg);
328 spin_unlock_irqrestore(&master->lock, flags);
329
330 return ret;
331}
332
333#define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
334#define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
335static void _fsi_master_mask_set(struct fsi_master *master,
336 u32 reg, u32 mask, u32 data)
337{
338 unsigned long flags;
339
340 spin_lock_irqsave(&master->lock, flags);
341 __fsi_reg_mask_set(master->base + reg, mask, data);
342 spin_unlock_irqrestore(&master->lock, flags);
343}
344
345
346
347
348static int fsi_version(struct fsi_master *master)
349{
350 return master->core->ver;
351}
352
353static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
354{
355 return fsi->master;
356}
357
358static int fsi_is_clk_master(struct fsi_priv *fsi)
359{
360 return fsi->clk_master;
361}
362
363static int fsi_is_port_a(struct fsi_priv *fsi)
364{
365 return fsi->master->base == fsi->base;
366}
367
368static int fsi_is_spdif(struct fsi_priv *fsi)
369{
370 return fsi->spdif;
371}
372
373static int fsi_is_play(struct snd_pcm_substream *substream)
374{
375 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
376}
377
378static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
379{
380 struct snd_soc_pcm_runtime *rtd = substream->private_data;
381
382 return rtd->cpu_dai;
383}
384
385static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
386{
387 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
388
389 if (dai->id == 0)
390 return &master->fsia;
391 else
392 return &master->fsib;
393}
394
395static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
396{
397 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
398}
399
400static set_rate_func fsi_get_info_set_rate(struct fsi_priv *fsi)
401{
402 if (!fsi->info)
403 return NULL;
404
405 return fsi->info->set_rate;
406}
407
408static u32 fsi_get_info_flags(struct fsi_priv *fsi)
409{
410 if (!fsi->info)
411 return 0;
412
413 return fsi->info->flags;
414}
415
416static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
417{
418 int is_play = fsi_stream_is_play(fsi, io);
419 int is_porta = fsi_is_port_a(fsi);
420 u32 shift;
421
422 if (is_porta)
423 shift = is_play ? AO_SHIFT : AI_SHIFT;
424 else
425 shift = is_play ? BO_SHIFT : BI_SHIFT;
426
427 return shift;
428}
429
430static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
431{
432 return frames * fsi->chan_num;
433}
434
435static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
436{
437 return samples / fsi->chan_num;
438}
439
440static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
441 struct fsi_stream *io)
442{
443 int is_play = fsi_stream_is_play(fsi, io);
444 u32 status;
445 int frames;
446
447 status = is_play ?
448 fsi_reg_read(fsi, DOFF_ST) :
449 fsi_reg_read(fsi, DIFF_ST);
450
451 frames = 0x1ff & (status >> 8);
452
453 return fsi_frame2sample(fsi, frames);
454}
455
456static void fsi_count_fifo_err(struct fsi_priv *fsi)
457{
458 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
459 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
460
461 if (ostatus & ERR_OVER)
462 fsi->playback.oerr_num++;
463
464 if (ostatus & ERR_UNDER)
465 fsi->playback.uerr_num++;
466
467 if (istatus & ERR_OVER)
468 fsi->capture.oerr_num++;
469
470 if (istatus & ERR_UNDER)
471 fsi->capture.uerr_num++;
472
473 fsi_reg_write(fsi, DOFF_ST, 0);
474 fsi_reg_write(fsi, DIFF_ST, 0);
475}
476
477
478
479
480static inline int fsi_stream_is_play(struct fsi_priv *fsi,
481 struct fsi_stream *io)
482{
483 return &fsi->playback == io;
484}
485
486static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
487 struct snd_pcm_substream *substream)
488{
489 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
490}
491
492static int fsi_stream_is_working(struct fsi_priv *fsi,
493 struct fsi_stream *io)
494{
495 struct fsi_master *master = fsi_get_master(fsi);
496 unsigned long flags;
497 int ret;
498
499 spin_lock_irqsave(&master->lock, flags);
500 ret = !!(io->substream && io->substream->runtime);
501 spin_unlock_irqrestore(&master->lock, flags);
502
503 return ret;
504}
505
506static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
507{
508 return io->priv;
509}
510
511static void fsi_stream_init(struct fsi_priv *fsi,
512 struct fsi_stream *io,
513 struct snd_pcm_substream *substream)
514{
515 struct snd_pcm_runtime *runtime = substream->runtime;
516 struct fsi_master *master = fsi_get_master(fsi);
517 unsigned long flags;
518
519 spin_lock_irqsave(&master->lock, flags);
520 io->substream = substream;
521 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
522 io->buff_sample_pos = 0;
523 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
524 io->period_pos = 0;
525 io->sample_width = samples_to_bytes(runtime, 1);
526 io->bus_option = 0;
527 io->oerr_num = -1;
528 io->uerr_num = -1;
529 fsi_stream_handler_call(io, init, fsi, io);
530 spin_unlock_irqrestore(&master->lock, flags);
531}
532
533static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
534{
535 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
536 struct fsi_master *master = fsi_get_master(fsi);
537 unsigned long flags;
538
539 spin_lock_irqsave(&master->lock, flags);
540
541 if (io->oerr_num > 0)
542 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
543
544 if (io->uerr_num > 0)
545 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
546
547 fsi_stream_handler_call(io, quit, fsi, io);
548 io->substream = NULL;
549 io->buff_sample_capa = 0;
550 io->buff_sample_pos = 0;
551 io->period_samples = 0;
552 io->period_pos = 0;
553 io->sample_width = 0;
554 io->bus_option = 0;
555 io->oerr_num = 0;
556 io->uerr_num = 0;
557 spin_unlock_irqrestore(&master->lock, flags);
558}
559
560static int fsi_stream_transfer(struct fsi_stream *io)
561{
562 struct fsi_priv *fsi = fsi_stream_to_priv(io);
563 if (!fsi)
564 return -EIO;
565
566 return fsi_stream_handler_call(io, transfer, fsi, io);
567}
568
569#define fsi_stream_start(fsi, io)\
570 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
571
572#define fsi_stream_stop(fsi, io)\
573 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
574
575static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
576{
577 struct fsi_stream *io;
578 int ret1, ret2;
579
580 io = &fsi->playback;
581 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
582
583 io = &fsi->capture;
584 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
585
586 if (ret1 < 0)
587 return ret1;
588 if (ret2 < 0)
589 return ret2;
590
591 return 0;
592}
593
594static int fsi_stream_remove(struct fsi_priv *fsi)
595{
596 struct fsi_stream *io;
597 int ret1, ret2;
598
599 io = &fsi->playback;
600 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
601
602 io = &fsi->capture;
603 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
604
605 if (ret1 < 0)
606 return ret1;
607 if (ret2 < 0)
608 return ret2;
609
610 return 0;
611}
612
613
614
615
616static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
617 u32 bus, struct device *dev)
618{
619 struct fsi_master *master = fsi_get_master(fsi);
620 int is_play = fsi_stream_is_play(fsi, io);
621 u32 fmt = fsi->fmt;
622
623 if (fsi_version(master) >= 2) {
624 u32 dma = 0;
625
626
627
628
629 switch (bus) {
630 case PACKAGE_24BITBUS_FRONT:
631 fmt |= CR_BWS_24;
632 dma |= VDMD_FRONT;
633 dev_dbg(dev, "24bit bus / package in front\n");
634 break;
635 case PACKAGE_16BITBUS_STREAM:
636 fmt |= CR_BWS_16;
637 dma |= VDMD_STREAM;
638 dev_dbg(dev, "16bit bus / stream mode\n");
639 break;
640 case PACKAGE_24BITBUS_BACK:
641 default:
642 fmt |= CR_BWS_24;
643 dma |= VDMD_BACK;
644 dev_dbg(dev, "24bit bus / package in back\n");
645 break;
646 }
647
648 if (is_play)
649 fsi_reg_write(fsi, OUT_DMAC, dma);
650 else
651 fsi_reg_write(fsi, IN_DMAC, dma);
652 }
653
654 if (is_play)
655 fsi_reg_write(fsi, DO_FMT, fmt);
656 else
657 fsi_reg_write(fsi, DI_FMT, fmt);
658}
659
660
661
662
663
664static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
665{
666 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
667 struct fsi_master *master = fsi_get_master(fsi);
668
669 fsi_core_mask_set(master, imsk, data, data);
670 fsi_core_mask_set(master, iemsk, data, data);
671}
672
673static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
674{
675 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
676 struct fsi_master *master = fsi_get_master(fsi);
677
678 fsi_core_mask_set(master, imsk, data, 0);
679 fsi_core_mask_set(master, iemsk, data, 0);
680}
681
682static u32 fsi_irq_get_status(struct fsi_master *master)
683{
684 return fsi_core_read(master, int_st);
685}
686
687static void fsi_irq_clear_status(struct fsi_priv *fsi)
688{
689 u32 data = 0;
690 struct fsi_master *master = fsi_get_master(fsi);
691
692 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
693 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
694
695
696 fsi_core_mask_set(master, int_st, data, 0);
697}
698
699
700
701
702
703
704static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
705{
706 struct fsi_master *master = fsi_get_master(fsi);
707 u32 mask, val;
708
709 mask = BP | SE;
710 val = enable ? mask : 0;
711
712 fsi_is_port_a(fsi) ?
713 fsi_core_mask_set(master, a_mclk, mask, val) :
714 fsi_core_mask_set(master, b_mclk, mask, val);
715}
716
717
718
719
720static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
721 long rate, int enable)
722{
723 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
724 int ret;
725
726 if (!set_rate)
727 return 0;
728
729 ret = set_rate(dev, rate, enable);
730 if (ret < 0)
731 return ret;
732
733 if (!enable)
734 return 0;
735
736 if (ret > 0) {
737 u32 data = 0;
738
739 switch (ret & SH_FSI_ACKMD_MASK) {
740 default:
741
742 case SH_FSI_ACKMD_512:
743 data |= (0x0 << 12);
744 break;
745 case SH_FSI_ACKMD_256:
746 data |= (0x1 << 12);
747 break;
748 case SH_FSI_ACKMD_128:
749 data |= (0x2 << 12);
750 break;
751 case SH_FSI_ACKMD_64:
752 data |= (0x3 << 12);
753 break;
754 case SH_FSI_ACKMD_32:
755 data |= (0x4 << 12);
756 break;
757 }
758
759 switch (ret & SH_FSI_BPFMD_MASK) {
760 default:
761
762 case SH_FSI_BPFMD_32:
763 data |= (0x0 << 8);
764 break;
765 case SH_FSI_BPFMD_64:
766 data |= (0x1 << 8);
767 break;
768 case SH_FSI_BPFMD_128:
769 data |= (0x2 << 8);
770 break;
771 case SH_FSI_BPFMD_256:
772 data |= (0x3 << 8);
773 break;
774 case SH_FSI_BPFMD_512:
775 data |= (0x4 << 8);
776 break;
777 case SH_FSI_BPFMD_16:
778 data |= (0x7 << 8);
779 break;
780 }
781
782 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
783 udelay(10);
784 ret = 0;
785 }
786
787 return ret;
788}
789
790
791
792
793static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
794{
795 u32 enable_stream = fsi_get_info_flags(fsi) & SH_FSI_ENABLE_STREAM_MODE;
796 int i;
797
798 if (enable_stream) {
799
800
801
802
803
804 u32 *buf = (u32 *)_buf;
805
806 for (i = 0; i < samples / 2; i++)
807 fsi_reg_write(fsi, DODT, buf[i]);
808 } else {
809
810 u16 *buf = (u16 *)_buf;
811
812 for (i = 0; i < samples; i++)
813 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
814 }
815}
816
817static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
818{
819 u16 *buf = (u16 *)_buf;
820 int i;
821
822 for (i = 0; i < samples; i++)
823 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
824}
825
826static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
827{
828 u32 *buf = (u32 *)_buf;
829 int i;
830
831 for (i = 0; i < samples; i++)
832 fsi_reg_write(fsi, DODT, *(buf + i));
833}
834
835static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
836{
837 u32 *buf = (u32 *)_buf;
838 int i;
839
840 for (i = 0; i < samples; i++)
841 *(buf + i) = fsi_reg_read(fsi, DIDT);
842}
843
844static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
845{
846 struct snd_pcm_runtime *runtime = io->substream->runtime;
847
848 return runtime->dma_area +
849 samples_to_bytes(runtime, io->buff_sample_pos);
850}
851
852static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
853 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
854 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
855 int samples)
856{
857 struct snd_pcm_runtime *runtime;
858 struct snd_pcm_substream *substream;
859 u8 *buf;
860 int over_period;
861
862 if (!fsi_stream_is_working(fsi, io))
863 return -EINVAL;
864
865 over_period = 0;
866 substream = io->substream;
867 runtime = substream->runtime;
868
869
870
871
872 if (io->buff_sample_pos >=
873 io->period_samples * (io->period_pos + 1)) {
874
875 over_period = 1;
876 io->period_pos = (io->period_pos + 1) % runtime->periods;
877
878 if (0 == io->period_pos)
879 io->buff_sample_pos = 0;
880 }
881
882 buf = fsi_pio_get_area(fsi, io);
883
884 switch (io->sample_width) {
885 case 2:
886 run16(fsi, buf, samples);
887 break;
888 case 4:
889 run32(fsi, buf, samples);
890 break;
891 default:
892 return -EINVAL;
893 }
894
895
896 io->buff_sample_pos += samples;
897
898 if (over_period)
899 snd_pcm_period_elapsed(substream);
900
901 return 0;
902}
903
904static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
905{
906 int sample_residues;
907 int sample_space;
908 int samples;
909
910 sample_residues = fsi_get_current_fifo_samples(fsi, io);
911 sample_space = io->buff_sample_capa - io->buff_sample_pos;
912
913 samples = min(sample_residues, sample_space);
914
915 return fsi_pio_transfer(fsi, io,
916 fsi_pio_pop16,
917 fsi_pio_pop32,
918 samples);
919}
920
921static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
922{
923 int sample_residues;
924 int sample_space;
925 int samples;
926
927 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
928 sample_space = io->fifo_sample_capa -
929 fsi_get_current_fifo_samples(fsi, io);
930
931 samples = min(sample_residues, sample_space);
932
933 return fsi_pio_transfer(fsi, io,
934 fsi_pio_push16,
935 fsi_pio_push32,
936 samples);
937}
938
939static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
940 int enable)
941{
942 struct fsi_master *master = fsi_get_master(fsi);
943 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
944
945 if (enable)
946 fsi_irq_enable(fsi, io);
947 else
948 fsi_irq_disable(fsi, io);
949
950 if (fsi_is_clk_master(fsi))
951 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
952}
953
954static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
955{
956 u32 enable_stream = fsi_get_info_flags(fsi) & SH_FSI_ENABLE_STREAM_MODE;
957
958
959
960
961
962
963
964
965 if (enable_stream)
966 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
967 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
968 else
969 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
970 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
971 return 0;
972}
973
974static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
975{
976
977
978
979 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
980 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
981 return 0;
982}
983
984static struct fsi_stream_handler fsi_pio_push_handler = {
985 .init = fsi_pio_push_init,
986 .transfer = fsi_pio_push,
987 .start_stop = fsi_pio_start_stop,
988};
989
990static struct fsi_stream_handler fsi_pio_pop_handler = {
991 .init = fsi_pio_pop_init,
992 .transfer = fsi_pio_pop,
993 .start_stop = fsi_pio_start_stop,
994};
995
996static irqreturn_t fsi_interrupt(int irq, void *data)
997{
998 struct fsi_master *master = data;
999 u32 int_st = fsi_irq_get_status(master);
1000
1001
1002 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1003 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1004
1005 if (int_st & AB_IO(1, AO_SHIFT))
1006 fsi_stream_transfer(&master->fsia.playback);
1007 if (int_st & AB_IO(1, BO_SHIFT))
1008 fsi_stream_transfer(&master->fsib.playback);
1009 if (int_st & AB_IO(1, AI_SHIFT))
1010 fsi_stream_transfer(&master->fsia.capture);
1011 if (int_st & AB_IO(1, BI_SHIFT))
1012 fsi_stream_transfer(&master->fsib.capture);
1013
1014 fsi_count_fifo_err(&master->fsia);
1015 fsi_count_fifo_err(&master->fsib);
1016
1017 fsi_irq_clear_status(&master->fsia);
1018 fsi_irq_clear_status(&master->fsib);
1019
1020 return IRQ_HANDLED;
1021}
1022
1023
1024
1025
1026static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1027{
1028 struct snd_pcm_runtime *runtime = io->substream->runtime;
1029 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1030 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1031 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1032
1033
1034
1035
1036
1037 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1038 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1039
1040 io->dma = dma_map_single(dai->dev, runtime->dma_area,
1041 snd_pcm_lib_buffer_bytes(io->substream), dir);
1042 return 0;
1043}
1044
1045static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1046{
1047 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1048 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1049 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1050
1051 dma_unmap_single(dai->dev, io->dma,
1052 snd_pcm_lib_buffer_bytes(io->substream), dir);
1053 return 0;
1054}
1055
1056static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
1057{
1058 struct snd_pcm_runtime *runtime = io->substream->runtime;
1059
1060 return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
1061}
1062
1063static void fsi_dma_complete(void *data)
1064{
1065 struct fsi_stream *io = (struct fsi_stream *)data;
1066 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1067 struct snd_pcm_runtime *runtime = io->substream->runtime;
1068 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1069 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1070 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1071
1072 dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
1073 samples_to_bytes(runtime, io->period_samples), dir);
1074
1075 io->buff_sample_pos += io->period_samples;
1076 io->period_pos++;
1077
1078 if (io->period_pos >= runtime->periods) {
1079 io->period_pos = 0;
1080 io->buff_sample_pos = 0;
1081 }
1082
1083 fsi_count_fifo_err(fsi);
1084 fsi_stream_transfer(io);
1085
1086 snd_pcm_period_elapsed(io->substream);
1087}
1088
1089static void fsi_dma_do_work(struct work_struct *work)
1090{
1091 struct fsi_stream *io = container_of(work, struct fsi_stream, work);
1092 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1093 struct snd_soc_dai *dai;
1094 struct dma_async_tx_descriptor *desc;
1095 struct snd_pcm_runtime *runtime;
1096 enum dma_data_direction dir;
1097 int is_play = fsi_stream_is_play(fsi, io);
1098 int len;
1099 dma_addr_t buf;
1100
1101 if (!fsi_stream_is_working(fsi, io))
1102 return;
1103
1104 dai = fsi_get_dai(io->substream);
1105 runtime = io->substream->runtime;
1106 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1107 len = samples_to_bytes(runtime, io->period_samples);
1108 buf = fsi_dma_get_area(io);
1109
1110 dma_sync_single_for_device(dai->dev, buf, len, dir);
1111
1112 desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1113 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1114 if (!desc) {
1115 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1116 return;
1117 }
1118
1119 desc->callback = fsi_dma_complete;
1120 desc->callback_param = io;
1121
1122 if (dmaengine_submit(desc) < 0) {
1123 dev_err(dai->dev, "tx_submit() fail\n");
1124 return;
1125 }
1126
1127 dma_async_issue_pending(io->chan);
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138 if (!is_play) {
1139 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1140 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1141 fsi_reg_write(fsi, DIFF_ST, 0);
1142 }
1143 }
1144}
1145
1146static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1147{
1148 struct sh_dmae_slave *slave = param;
1149
1150 chan->private = slave;
1151
1152 return true;
1153}
1154
1155static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1156{
1157 schedule_work(&io->work);
1158
1159 return 0;
1160}
1161
1162static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1163 int start)
1164{
1165 struct fsi_master *master = fsi_get_master(fsi);
1166 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1167 u32 enable = start ? DMA_ON : 0;
1168
1169 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1170
1171 dmaengine_terminate_all(io->chan);
1172
1173 if (fsi_is_clk_master(fsi))
1174 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1175}
1176
1177static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1178{
1179 dma_cap_mask_t mask;
1180
1181 dma_cap_zero(mask);
1182 dma_cap_set(DMA_SLAVE, mask);
1183
1184 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1185 if (!io->chan) {
1186
1187
1188 if (fsi_stream_is_play(fsi, io))
1189 fsi->playback.handler = &fsi_pio_push_handler;
1190 else
1191 fsi->capture.handler = &fsi_pio_pop_handler;
1192
1193 dev_info(dev, "switch handler (dma => pio)\n");
1194
1195
1196 return fsi_stream_probe(fsi, dev);
1197 }
1198
1199 INIT_WORK(&io->work, fsi_dma_do_work);
1200
1201 return 0;
1202}
1203
1204static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1205{
1206 cancel_work_sync(&io->work);
1207
1208 fsi_stream_stop(fsi, io);
1209
1210 if (io->chan)
1211 dma_release_channel(io->chan);
1212
1213 io->chan = NULL;
1214 return 0;
1215}
1216
1217static struct fsi_stream_handler fsi_dma_push_handler = {
1218 .init = fsi_dma_init,
1219 .quit = fsi_dma_quit,
1220 .probe = fsi_dma_probe,
1221 .transfer = fsi_dma_transfer,
1222 .remove = fsi_dma_remove,
1223 .start_stop = fsi_dma_push_start_stop,
1224};
1225
1226
1227
1228
1229static void fsi_fifo_init(struct fsi_priv *fsi,
1230 struct fsi_stream *io,
1231 struct device *dev)
1232{
1233 struct fsi_master *master = fsi_get_master(fsi);
1234 int is_play = fsi_stream_is_play(fsi, io);
1235 u32 shift, i;
1236 int frame_capa;
1237
1238
1239 shift = fsi_master_read(master, FIFO_SZ);
1240 shift >>= fsi_get_port_shift(fsi, io);
1241 shift &= FIFO_SZ_MASK;
1242 frame_capa = 256 << shift;
1243 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264 for (i = 1; i < fsi->chan_num; i <<= 1)
1265 frame_capa >>= 1;
1266 dev_dbg(dev, "%d channel %d store\n",
1267 fsi->chan_num, frame_capa);
1268
1269 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1270
1271
1272
1273
1274
1275 if (is_play) {
1276 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1277 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1278 } else {
1279 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1280 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1281 }
1282}
1283
1284static int fsi_hw_startup(struct fsi_priv *fsi,
1285 struct fsi_stream *io,
1286 struct device *dev)
1287{
1288 u32 flags = fsi_get_info_flags(fsi);
1289 u32 data = 0;
1290
1291
1292 if (fsi_is_clk_master(fsi))
1293 data = DIMD | DOMD;
1294
1295 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1296
1297
1298 data = 0;
1299 if (SH_FSI_LRM_INV & flags)
1300 data |= 1 << 12;
1301 if (SH_FSI_BRM_INV & flags)
1302 data |= 1 << 8;
1303 if (SH_FSI_LRS_INV & flags)
1304 data |= 1 << 4;
1305 if (SH_FSI_BRS_INV & flags)
1306 data |= 1 << 0;
1307
1308 fsi_reg_write(fsi, CKG2, data);
1309
1310
1311 if (fsi_is_spdif(fsi)) {
1312 fsi_spdif_clk_ctrl(fsi, 1);
1313 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1314 }
1315
1316
1317
1318
1319 data = 0;
1320 switch (io->sample_width) {
1321 case 2:
1322 data = BUSOP_GET(16, io->bus_option);
1323 break;
1324 case 4:
1325 data = BUSOP_GET(24, io->bus_option);
1326 break;
1327 }
1328 fsi_format_bus_setup(fsi, io, data, dev);
1329
1330
1331 fsi_irq_disable(fsi, io);
1332 fsi_irq_clear_status(fsi);
1333
1334
1335 fsi_fifo_init(fsi, io, dev);
1336
1337 return 0;
1338}
1339
1340static void fsi_hw_shutdown(struct fsi_priv *fsi,
1341 struct device *dev)
1342{
1343 if (fsi_is_clk_master(fsi))
1344 fsi_set_master_clk(dev, fsi, fsi->rate, 0);
1345}
1346
1347static int fsi_dai_startup(struct snd_pcm_substream *substream,
1348 struct snd_soc_dai *dai)
1349{
1350 struct fsi_priv *fsi = fsi_get_priv(substream);
1351
1352 fsi->rate = 0;
1353
1354 return 0;
1355}
1356
1357static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1358 struct snd_soc_dai *dai)
1359{
1360 struct fsi_priv *fsi = fsi_get_priv(substream);
1361
1362 fsi->rate = 0;
1363}
1364
1365static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1366 struct snd_soc_dai *dai)
1367{
1368 struct fsi_priv *fsi = fsi_get_priv(substream);
1369 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1370 int ret = 0;
1371
1372 switch (cmd) {
1373 case SNDRV_PCM_TRIGGER_START:
1374 fsi_stream_init(fsi, io, substream);
1375 fsi_hw_startup(fsi, io, dai->dev);
1376 ret = fsi_stream_transfer(io);
1377 if (0 == ret)
1378 fsi_stream_start(fsi, io);
1379 break;
1380 case SNDRV_PCM_TRIGGER_STOP:
1381 fsi_hw_shutdown(fsi, dai->dev);
1382 fsi_stream_stop(fsi, io);
1383 fsi_stream_quit(fsi, io);
1384 break;
1385 }
1386
1387 return ret;
1388}
1389
1390static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1391{
1392 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1393 case SND_SOC_DAIFMT_I2S:
1394 fsi->fmt = CR_I2S;
1395 fsi->chan_num = 2;
1396 break;
1397 case SND_SOC_DAIFMT_LEFT_J:
1398 fsi->fmt = CR_PCM;
1399 fsi->chan_num = 2;
1400 break;
1401 default:
1402 return -EINVAL;
1403 }
1404
1405 return 0;
1406}
1407
1408static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1409{
1410 struct fsi_master *master = fsi_get_master(fsi);
1411
1412 if (fsi_version(master) < 2)
1413 return -EINVAL;
1414
1415 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1416 fsi->chan_num = 2;
1417 fsi->spdif = 1;
1418
1419 return 0;
1420}
1421
1422static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1423{
1424 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1425 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1426 u32 flags = fsi_get_info_flags(fsi);
1427 int ret;
1428
1429
1430 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1431 case SND_SOC_DAIFMT_CBM_CFM:
1432 fsi->clk_master = 1;
1433 break;
1434 case SND_SOC_DAIFMT_CBS_CFS:
1435 break;
1436 default:
1437 return -EINVAL;
1438 }
1439
1440 if (fsi_is_clk_master(fsi) && !set_rate) {
1441 dev_err(dai->dev, "platform doesn't have set_rate\n");
1442 return -EINVAL;
1443 }
1444
1445
1446 switch (flags & SH_FSI_FMT_MASK) {
1447 case SH_FSI_FMT_DAI:
1448 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1449 break;
1450 case SH_FSI_FMT_SPDIF:
1451 ret = fsi_set_fmt_spdif(fsi);
1452 break;
1453 default:
1454 ret = -EINVAL;
1455 }
1456
1457 return ret;
1458}
1459
1460static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1461 struct snd_pcm_hw_params *params,
1462 struct snd_soc_dai *dai)
1463{
1464 struct fsi_priv *fsi = fsi_get_priv(substream);
1465 long rate = params_rate(params);
1466 int ret;
1467
1468 if (!fsi_is_clk_master(fsi))
1469 return 0;
1470
1471 ret = fsi_set_master_clk(dai->dev, fsi, rate, 1);
1472 if (ret < 0)
1473 return ret;
1474
1475 fsi->rate = rate;
1476
1477 return ret;
1478}
1479
1480static const struct snd_soc_dai_ops fsi_dai_ops = {
1481 .startup = fsi_dai_startup,
1482 .shutdown = fsi_dai_shutdown,
1483 .trigger = fsi_dai_trigger,
1484 .set_fmt = fsi_dai_set_fmt,
1485 .hw_params = fsi_dai_hw_params,
1486};
1487
1488
1489
1490
1491
1492static struct snd_pcm_hardware fsi_pcm_hardware = {
1493 .info = SNDRV_PCM_INFO_INTERLEAVED |
1494 SNDRV_PCM_INFO_MMAP |
1495 SNDRV_PCM_INFO_MMAP_VALID |
1496 SNDRV_PCM_INFO_PAUSE,
1497 .formats = FSI_FMTS,
1498 .rates = FSI_RATES,
1499 .rate_min = 8000,
1500 .rate_max = 192000,
1501 .channels_min = 1,
1502 .channels_max = 2,
1503 .buffer_bytes_max = 64 * 1024,
1504 .period_bytes_min = 32,
1505 .period_bytes_max = 8192,
1506 .periods_min = 1,
1507 .periods_max = 32,
1508 .fifo_size = 256,
1509};
1510
1511static int fsi_pcm_open(struct snd_pcm_substream *substream)
1512{
1513 struct snd_pcm_runtime *runtime = substream->runtime;
1514 int ret = 0;
1515
1516 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1517
1518 ret = snd_pcm_hw_constraint_integer(runtime,
1519 SNDRV_PCM_HW_PARAM_PERIODS);
1520
1521 return ret;
1522}
1523
1524static int fsi_hw_params(struct snd_pcm_substream *substream,
1525 struct snd_pcm_hw_params *hw_params)
1526{
1527 return snd_pcm_lib_malloc_pages(substream,
1528 params_buffer_bytes(hw_params));
1529}
1530
1531static int fsi_hw_free(struct snd_pcm_substream *substream)
1532{
1533 return snd_pcm_lib_free_pages(substream);
1534}
1535
1536static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1537{
1538 struct fsi_priv *fsi = fsi_get_priv(substream);
1539 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1540
1541 return fsi_sample2frame(fsi, io->buff_sample_pos);
1542}
1543
1544static struct snd_pcm_ops fsi_pcm_ops = {
1545 .open = fsi_pcm_open,
1546 .ioctl = snd_pcm_lib_ioctl,
1547 .hw_params = fsi_hw_params,
1548 .hw_free = fsi_hw_free,
1549 .pointer = fsi_pointer,
1550};
1551
1552
1553
1554
1555
1556#define PREALLOC_BUFFER (32 * 1024)
1557#define PREALLOC_BUFFER_MAX (32 * 1024)
1558
1559static void fsi_pcm_free(struct snd_pcm *pcm)
1560{
1561 snd_pcm_lib_preallocate_free_for_all(pcm);
1562}
1563
1564static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1565{
1566 struct snd_pcm *pcm = rtd->pcm;
1567
1568
1569
1570
1571
1572 return snd_pcm_lib_preallocate_pages_for_all(
1573 pcm,
1574 SNDRV_DMA_TYPE_CONTINUOUS,
1575 snd_dma_continuous_data(GFP_KERNEL),
1576 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1577}
1578
1579
1580
1581
1582
1583static struct snd_soc_dai_driver fsi_soc_dai[] = {
1584 {
1585 .name = "fsia-dai",
1586 .playback = {
1587 .rates = FSI_RATES,
1588 .formats = FSI_FMTS,
1589 .channels_min = 1,
1590 .channels_max = 8,
1591 },
1592 .capture = {
1593 .rates = FSI_RATES,
1594 .formats = FSI_FMTS,
1595 .channels_min = 1,
1596 .channels_max = 8,
1597 },
1598 .ops = &fsi_dai_ops,
1599 },
1600 {
1601 .name = "fsib-dai",
1602 .playback = {
1603 .rates = FSI_RATES,
1604 .formats = FSI_FMTS,
1605 .channels_min = 1,
1606 .channels_max = 8,
1607 },
1608 .capture = {
1609 .rates = FSI_RATES,
1610 .formats = FSI_FMTS,
1611 .channels_min = 1,
1612 .channels_max = 8,
1613 },
1614 .ops = &fsi_dai_ops,
1615 },
1616};
1617
1618static struct snd_soc_platform_driver fsi_soc_platform = {
1619 .ops = &fsi_pcm_ops,
1620 .pcm_new = fsi_pcm_new,
1621 .pcm_free = fsi_pcm_free,
1622};
1623
1624
1625
1626
1627static void fsi_handler_init(struct fsi_priv *fsi)
1628{
1629 fsi->playback.handler = &fsi_pio_push_handler;
1630 fsi->playback.priv = fsi;
1631 fsi->capture.handler = &fsi_pio_pop_handler;
1632 fsi->capture.priv = fsi;
1633
1634 if (fsi->info->tx_id) {
1635 fsi->playback.slave.shdma_slave.slave_id = fsi->info->tx_id;
1636 fsi->playback.handler = &fsi_dma_push_handler;
1637 }
1638}
1639
1640static int fsi_probe(struct platform_device *pdev)
1641{
1642 struct fsi_master *master;
1643 const struct platform_device_id *id_entry;
1644 struct sh_fsi_platform_info *info = pdev->dev.platform_data;
1645 struct resource *res;
1646 unsigned int irq;
1647 int ret;
1648
1649 id_entry = pdev->id_entry;
1650 if (!id_entry) {
1651 dev_err(&pdev->dev, "unknown fsi device\n");
1652 return -ENODEV;
1653 }
1654
1655 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1656 irq = platform_get_irq(pdev, 0);
1657 if (!res || (int)irq <= 0) {
1658 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1659 return -ENODEV;
1660 }
1661
1662 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
1663 if (!master) {
1664 dev_err(&pdev->dev, "Could not allocate master\n");
1665 return -ENOMEM;
1666 }
1667
1668 master->base = devm_ioremap_nocache(&pdev->dev,
1669 res->start, resource_size(res));
1670 if (!master->base) {
1671 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1672 return -ENXIO;
1673 }
1674
1675
1676 master->irq = irq;
1677 master->core = (struct fsi_core *)id_entry->driver_data;
1678 spin_lock_init(&master->lock);
1679
1680
1681 master->fsia.base = master->base;
1682 master->fsia.master = master;
1683 master->fsia.info = &info->port_a;
1684 fsi_handler_init(&master->fsia);
1685 ret = fsi_stream_probe(&master->fsia, &pdev->dev);
1686 if (ret < 0) {
1687 dev_err(&pdev->dev, "FSIA stream probe failed\n");
1688 return ret;
1689 }
1690
1691
1692 master->fsib.base = master->base + 0x40;
1693 master->fsib.master = master;
1694 master->fsib.info = &info->port_b;
1695 fsi_handler_init(&master->fsib);
1696 ret = fsi_stream_probe(&master->fsib, &pdev->dev);
1697 if (ret < 0) {
1698 dev_err(&pdev->dev, "FSIB stream probe failed\n");
1699 goto exit_fsia;
1700 }
1701
1702 pm_runtime_enable(&pdev->dev);
1703 dev_set_drvdata(&pdev->dev, master);
1704
1705 ret = request_irq(irq, &fsi_interrupt, 0,
1706 id_entry->name, master);
1707 if (ret) {
1708 dev_err(&pdev->dev, "irq request err\n");
1709 goto exit_fsib;
1710 }
1711
1712 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1713 if (ret < 0) {
1714 dev_err(&pdev->dev, "cannot snd soc register\n");
1715 goto exit_free_irq;
1716 }
1717
1718 ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
1719 ARRAY_SIZE(fsi_soc_dai));
1720 if (ret < 0) {
1721 dev_err(&pdev->dev, "cannot snd dai register\n");
1722 goto exit_snd_soc;
1723 }
1724
1725 return ret;
1726
1727exit_snd_soc:
1728 snd_soc_unregister_platform(&pdev->dev);
1729exit_free_irq:
1730 free_irq(irq, master);
1731exit_fsib:
1732 pm_runtime_disable(&pdev->dev);
1733 fsi_stream_remove(&master->fsib);
1734exit_fsia:
1735 fsi_stream_remove(&master->fsia);
1736
1737 return ret;
1738}
1739
1740static int fsi_remove(struct platform_device *pdev)
1741{
1742 struct fsi_master *master;
1743
1744 master = dev_get_drvdata(&pdev->dev);
1745
1746 free_irq(master->irq, master);
1747 pm_runtime_disable(&pdev->dev);
1748
1749 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
1750 snd_soc_unregister_platform(&pdev->dev);
1751
1752 fsi_stream_remove(&master->fsia);
1753 fsi_stream_remove(&master->fsib);
1754
1755 return 0;
1756}
1757
1758static void __fsi_suspend(struct fsi_priv *fsi,
1759 struct fsi_stream *io,
1760 struct device *dev)
1761{
1762 if (!fsi_stream_is_working(fsi, io))
1763 return;
1764
1765 fsi_stream_stop(fsi, io);
1766 fsi_hw_shutdown(fsi, dev);
1767}
1768
1769static void __fsi_resume(struct fsi_priv *fsi,
1770 struct fsi_stream *io,
1771 struct device *dev)
1772{
1773 if (!fsi_stream_is_working(fsi, io))
1774 return;
1775
1776 fsi_hw_startup(fsi, io, dev);
1777
1778 if (fsi_is_clk_master(fsi) && fsi->rate)
1779 fsi_set_master_clk(dev, fsi, fsi->rate, 1);
1780
1781 fsi_stream_start(fsi, io);
1782}
1783
1784static int fsi_suspend(struct device *dev)
1785{
1786 struct fsi_master *master = dev_get_drvdata(dev);
1787 struct fsi_priv *fsia = &master->fsia;
1788 struct fsi_priv *fsib = &master->fsib;
1789
1790 __fsi_suspend(fsia, &fsia->playback, dev);
1791 __fsi_suspend(fsia, &fsia->capture, dev);
1792
1793 __fsi_suspend(fsib, &fsib->playback, dev);
1794 __fsi_suspend(fsib, &fsib->capture, dev);
1795
1796 return 0;
1797}
1798
1799static int fsi_resume(struct device *dev)
1800{
1801 struct fsi_master *master = dev_get_drvdata(dev);
1802 struct fsi_priv *fsia = &master->fsia;
1803 struct fsi_priv *fsib = &master->fsib;
1804
1805 __fsi_resume(fsia, &fsia->playback, dev);
1806 __fsi_resume(fsia, &fsia->capture, dev);
1807
1808 __fsi_resume(fsib, &fsib->playback, dev);
1809 __fsi_resume(fsib, &fsib->capture, dev);
1810
1811 return 0;
1812}
1813
1814static struct dev_pm_ops fsi_pm_ops = {
1815 .suspend = fsi_suspend,
1816 .resume = fsi_resume,
1817};
1818
1819static struct fsi_core fsi1_core = {
1820 .ver = 1,
1821
1822
1823 .int_st = INT_ST,
1824 .iemsk = IEMSK,
1825 .imsk = IMSK,
1826};
1827
1828static struct fsi_core fsi2_core = {
1829 .ver = 2,
1830
1831
1832 .int_st = CPU_INT_ST,
1833 .iemsk = CPU_IEMSK,
1834 .imsk = CPU_IMSK,
1835 .a_mclk = A_MST_CTLR,
1836 .b_mclk = B_MST_CTLR,
1837};
1838
1839static struct platform_device_id fsi_id_table[] = {
1840 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1841 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1842 {},
1843};
1844MODULE_DEVICE_TABLE(platform, fsi_id_table);
1845
1846static struct platform_driver fsi_driver = {
1847 .driver = {
1848 .name = "fsi-pcm-audio",
1849 .pm = &fsi_pm_ops,
1850 },
1851 .probe = fsi_probe,
1852 .remove = fsi_remove,
1853 .id_table = fsi_id_table,
1854};
1855
1856module_platform_driver(fsi_driver);
1857
1858MODULE_LICENSE("GPL");
1859MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1860MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
1861MODULE_ALIAS("platform:fsi-pcm-audio");
1862
