LXR linux/arch/arm/mach-imx/common.h

   1/*
   2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   3 */
   4
   5/*
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 */
  10
  11#ifndef __ASM_ARCH_MXC_COMMON_H__
  12#define __ASM_ARCH_MXC_COMMON_H__
  13
  14struct platform_device;
  15struct clk;
  16enum mxc_cpu_pwr_mode;
  17
  18extern void mx1_map_io(void);
  19extern void mx21_map_io(void);
  20extern void mx25_map_io(void);
  21extern void mx27_map_io(void);
  22extern void mx31_map_io(void);
  23extern void mx35_map_io(void);
  24extern void mx50_map_io(void);
  25extern void mx51_map_io(void);
  26extern void mx53_map_io(void);
  27extern void imx1_init_early(void);
  28extern void imx21_init_early(void);
  29extern void imx25_init_early(void);
  30extern void imx27_init_early(void);
  31extern void imx31_init_early(void);
  32extern void imx35_init_early(void);
  33extern void imx50_init_early(void);
  34extern void imx51_init_early(void);
  35extern void imx53_init_early(void);
  36extern void mxc_init_irq(void __iomem *);
  37extern void tzic_init_irq(void __iomem *);
  38extern void mx1_init_irq(void);
  39extern void mx21_init_irq(void);
  40extern void mx25_init_irq(void);
  41extern void mx27_init_irq(void);
  42extern void mx31_init_irq(void);
  43extern void mx35_init_irq(void);
  44extern void mx50_init_irq(void);
  45extern void mx51_init_irq(void);
  46extern void mx53_init_irq(void);
  47extern void imx1_soc_init(void);
  48extern void imx21_soc_init(void);
  49extern void imx25_soc_init(void);
  50extern void imx27_soc_init(void);
  51extern void imx31_soc_init(void);
  52extern void imx35_soc_init(void);
  53extern void imx50_soc_init(void);
  54extern void imx51_soc_init(void);
  55extern void imx51_init_late(void);
  56extern void imx53_init_late(void);
  57extern void epit_timer_init(void __iomem *base, int irq);
  58extern void mxc_timer_init(void __iomem *, int);
  59extern int mx1_clocks_init(unsigned long fref);
  60extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
  61extern int mx25_clocks_init(void);
  62extern int mx27_clocks_init(unsigned long fref);
  63extern int mx31_clocks_init(unsigned long fref);
  64extern int mx35_clocks_init(void);
  65extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
  66                        unsigned long ckih1, unsigned long ckih2);
  67extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
  68                        unsigned long ckih1, unsigned long ckih2);
  69extern int mx25_clocks_init_dt(void);
  70extern int mx27_clocks_init_dt(void);
  71extern int mx31_clocks_init_dt(void);
  72extern int mx51_clocks_init_dt(void);
  73extern int mx53_clocks_init_dt(void);
  74extern int mx6q_clocks_init(void);
  75extern struct platform_device *mxc_register_gpio(char *name, int id,
  76        resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
  77extern void mxc_set_cpu_type(unsigned int type);
  78extern void mxc_restart(char, const char *);
  79extern void mxc_arch_reset_init(void __iomem *);
  80extern int mx53_revision(void);
  81extern int mx53_display_revision(void);
  82extern void imx_set_aips(void __iomem *);
  83extern int mxc_device_init(void);
  84
  85enum mxc_cpu_pwr_mode {
  86        WAIT_CLOCKED,           /* wfi only */
  87        WAIT_UNCLOCKED,         /* WAIT */
  88        WAIT_UNCLOCKED_POWER_OFF,       /* WAIT + SRPG */
  89        STOP_POWER_ON,          /* just STOP */
  90        STOP_POWER_OFF,         /* STOP + SRPG */
  91};
  92
  93enum mx3_cpu_pwr_mode {
  94        MX3_RUN,
  95        MX3_WAIT,
  96        MX3_DOZE,
  97        MX3_SLEEP,
  98};
  99
 100extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
 101extern void imx_print_silicon_rev(const char *cpu, int srev);
 102
 103void avic_handle_irq(struct pt_regs *);
 104void tzic_handle_irq(struct pt_regs *);
 105
 106#define imx1_handle_irq avic_handle_irq
 107#define imx21_handle_irq avic_handle_irq
 108#define imx25_handle_irq avic_handle_irq
 109#define imx27_handle_irq avic_handle_irq
 110#define imx31_handle_irq avic_handle_irq
 111#define imx35_handle_irq avic_handle_irq
 112#define imx50_handle_irq tzic_handle_irq
 113#define imx51_handle_irq tzic_handle_irq
 114#define imx53_handle_irq tzic_handle_irq
 115#define imx6q_handle_irq gic_handle_irq
 116
 117extern void imx_enable_cpu(int cpu, bool enable);
 118extern void imx_set_cpu_jump(int cpu, void *jump_addr);
 119#ifdef CONFIG_DEBUG_LL
 120extern void imx_lluart_map_io(void);
 121#else
 122static inline void imx_lluart_map_io(void) {}
 123#endif
 124extern void v7_cpu_resume(void);
 125extern u32 *pl310_get_save_ptr(void);
 126#ifdef CONFIG_SMP
 127extern void v7_secondary_startup(void);
 128extern void imx_scu_map_io(void);
 129extern void imx_smp_prepare(void);
 130#else
 131static inline void imx_scu_map_io(void) {}
 132static inline void imx_smp_prepare(void) {}
 133#endif
 134extern void imx_enable_cpu(int cpu, bool enable);
 135extern void imx_set_cpu_jump(int cpu, void *jump_addr);
 136extern void imx_src_init(void);
 137extern void imx_src_prepare_restart(void);
 138extern void imx_gpc_init(void);
 139extern void imx_gpc_pre_suspend(void);
 140extern void imx_gpc_post_resume(void);
 141extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
 142extern void imx6q_clock_map_io(void);
 143
 144extern void imx_cpu_die(unsigned int cpu);
 145extern int imx_cpu_kill(unsigned int cpu);
 146
 147#ifdef CONFIG_PM
 148extern void imx6q_pm_init(void);
 149extern void imx51_pm_init(void);
 150extern void imx53_pm_init(void);
 151#else
 152static inline void imx6q_pm_init(void) {}
 153static inline void imx51_pm_init(void) {}
 154static inline void imx53_pm_init(void) {}
 155#endif
 156
 157#ifdef CONFIG_NEON
 158extern int mx51_neon_fixup(void);
 159#else
 160static inline int mx51_neon_fixup(void) { return 0; }
 161#endif
 162
 163extern struct smp_operations imx_smp_ops;
 164
 165#endif
 166