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13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/ioport.h>
18#include <linux/errno.h>
19
20#include "pci-frv.h"
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35resource_size_t
36pcibios_align_resource(void *data, const struct resource *res,
37 resource_size_t size, resource_size_t align)
38{
39 resource_size_t start = res->start;
40
41 if ((res->flags & IORESOURCE_IO) && (start & 0x300))
42 start = (start + 0x3ff) & ~0x3ff;
43
44 return start;
45}
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81static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
82{
83 struct list_head *ln;
84 struct pci_bus *bus;
85 struct pci_dev *dev;
86 int idx;
87 struct resource *r;
88
89
90 for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
91 bus = pci_bus_b(ln);
92 if ((dev = bus->self)) {
93 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
94 r = &dev->resource[idx];
95 if (!r->start)
96 continue;
97 pci_claim_resource(dev, idx);
98 }
99 }
100 pcibios_allocate_bus_resources(&bus->children);
101 }
102}
103
104static void __init pcibios_allocate_resources(int pass)
105{
106 struct pci_dev *dev = NULL;
107 int idx, disabled;
108 u16 command;
109 struct resource *r;
110
111 for_each_pci_dev(dev) {
112 pci_read_config_word(dev, PCI_COMMAND, &command);
113 for(idx = 0; idx < 6; idx++) {
114 r = &dev->resource[idx];
115 if (r->parent)
116 continue;
117 if (!r->start)
118 continue;
119 if (r->flags & IORESOURCE_IO)
120 disabled = !(command & PCI_COMMAND_IO);
121 else
122 disabled = !(command & PCI_COMMAND_MEMORY);
123 if (pass == disabled) {
124 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
125 r->start, r->end, r->flags, disabled, pass);
126 if (pci_claim_resource(dev, idx) < 0) {
127
128 r->end -= r->start;
129 r->start = 0;
130 }
131 }
132 }
133 if (!pass) {
134 r = &dev->resource[PCI_ROM_RESOURCE];
135 if (r->flags & IORESOURCE_ROM_ENABLE) {
136
137 u32 reg;
138 DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
139 r->flags &= ~IORESOURCE_ROM_ENABLE;
140 pci_read_config_dword(dev, dev->rom_base_reg, ®);
141 pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
142 }
143 }
144 }
145}
146
147static void __init pcibios_assign_resources(void)
148{
149 struct pci_dev *dev = NULL;
150 int idx;
151 struct resource *r;
152
153 for_each_pci_dev(dev) {
154 int class = dev->class >> 8;
155
156
157 if (!class || class == PCI_CLASS_BRIDGE_HOST)
158 continue;
159
160 for(idx=0; idx<6; idx++) {
161 r = &dev->resource[idx];
162
163
164
165
166 if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
167 (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
168 continue;
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174
175 if (!r->start && r->end)
176 pci_assign_resource(dev, idx);
177 }
178
179 if (pci_probe & PCI_ASSIGN_ROMS) {
180 r = &dev->resource[PCI_ROM_RESOURCE];
181 r->end -= r->start;
182 r->start = 0;
183 if (r->end)
184 pci_assign_resource(dev, PCI_ROM_RESOURCE);
185 }
186 }
187}
188
189void __init pcibios_resource_survey(void)
190{
191 DBG("PCI: Allocating resources\n");
192 pcibios_allocate_bus_resources(&pci_root_buses);
193 pcibios_allocate_resources(0);
194 pcibios_allocate_resources(1);
195 pcibios_assign_resources();
196}
197