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36#ifndef _ASM_POWERPC_BITOPS_H
37#define _ASM_POWERPC_BITOPS_H
38
39#ifdef __KERNEL__
40
41#ifndef _LINUX_BITOPS_H
42#error only <linux/bitops.h> can be included directly
43#endif
44
45#include <linux/compiler.h>
46#include <asm/asm-compat.h>
47#include <asm/synch.h>
48
49
50
51
52#define smp_mb__before_clear_bit() smp_mb()
53#define smp_mb__after_clear_bit() smp_mb()
54
55#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
56
57
58#define DEFINE_BITOP(fn, op, prefix, postfix) \
59static __inline__ void fn(unsigned long mask, \
60 volatile unsigned long *_p) \
61{ \
62 unsigned long old; \
63 unsigned long *p = (unsigned long *)_p; \
64 __asm__ __volatile__ ( \
65 prefix \
66"1:" PPC_LLARX(%0,0,%3,0) "\n" \
67 stringify_in_c(op) "%0,%0,%2\n" \
68 PPC405_ERR77(0,%3) \
69 PPC_STLCX "%0,0,%3\n" \
70 "bne- 1b\n" \
71 postfix \
72 : "=&r" (old), "+m" (*p) \
73 : "r" (mask), "r" (p) \
74 : "cc", "memory"); \
75}
76
77DEFINE_BITOP(set_bits, or, "", "")
78DEFINE_BITOP(clear_bits, andc, "", "")
79DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER, "")
80DEFINE_BITOP(change_bits, xor, "", "")
81
82static __inline__ void set_bit(int nr, volatile unsigned long *addr)
83{
84 set_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
85}
86
87static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
88{
89 clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
90}
91
92static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
93{
94 clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr));
95}
96
97static __inline__ void change_bit(int nr, volatile unsigned long *addr)
98{
99 change_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
100}
101
102
103
104#define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \
105static __inline__ unsigned long fn( \
106 unsigned long mask, \
107 volatile unsigned long *_p) \
108{ \
109 unsigned long old, t; \
110 unsigned long *p = (unsigned long *)_p; \
111 __asm__ __volatile__ ( \
112 prefix \
113"1:" PPC_LLARX(%0,0,%3,eh) "\n" \
114 stringify_in_c(op) "%1,%0,%2\n" \
115 PPC405_ERR77(0,%3) \
116 PPC_STLCX "%1,0,%3\n" \
117 "bne- 1b\n" \
118 postfix \
119 : "=&r" (old), "=&r" (t) \
120 : "r" (mask), "r" (p) \
121 : "cc", "memory"); \
122 return (old & mask); \
123}
124
125DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
126 PPC_ATOMIC_EXIT_BARRIER, 0)
127DEFINE_TESTOP(test_and_set_bits_lock, or, "",
128 PPC_ACQUIRE_BARRIER, 1)
129DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
130 PPC_ATOMIC_EXIT_BARRIER, 0)
131DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
132 PPC_ATOMIC_EXIT_BARRIER, 0)
133
134static __inline__ int test_and_set_bit(unsigned long nr,
135 volatile unsigned long *addr)
136{
137 return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
138}
139
140static __inline__ int test_and_set_bit_lock(unsigned long nr,
141 volatile unsigned long *addr)
142{
143 return test_and_set_bits_lock(BIT_MASK(nr),
144 addr + BIT_WORD(nr)) != 0;
145}
146
147static __inline__ int test_and_clear_bit(unsigned long nr,
148 volatile unsigned long *addr)
149{
150 return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
151}
152
153static __inline__ int test_and_change_bit(unsigned long nr,
154 volatile unsigned long *addr)
155{
156 return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
157}
158
159#include <asm-generic/bitops/non-atomic.h>
160
161static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
162{
163 __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
164 __clear_bit(nr, addr);
165}
166
167
168
169
170
171static __inline__ __attribute__((const))
172int __ilog2(unsigned long x)
173{
174 int lz;
175
176 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
177 return BITS_PER_LONG - 1 - lz;
178}
179
180static inline __attribute__((const))
181int __ilog2_u32(u32 n)
182{
183 int bit;
184 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
185 return 31 - bit;
186}
187
188#ifdef __powerpc64__
189static inline __attribute__((const))
190int __ilog2_u64(u64 n)
191{
192 int bit;
193 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n));
194 return 63 - bit;
195}
196#endif
197
198
199
200
201
202
203static __inline__ unsigned long ffz(unsigned long x)
204{
205
206 if ((x = ~x) == 0)
207 return BITS_PER_LONG;
208
209
210
211
212
213
214
215 return __ilog2(x & -x);
216}
217
218static __inline__ int __ffs(unsigned long x)
219{
220 return __ilog2(x & -x);
221}
222
223
224
225
226
227
228static __inline__ int ffs(int x)
229{
230 unsigned long i = (unsigned long)x;
231 return __ilog2(i & -i) + 1;
232}
233
234
235
236
237
238static __inline__ int fls(unsigned int x)
239{
240 int lz;
241
242 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
243 return 32 - lz;
244}
245
246static __inline__ unsigned long __fls(unsigned long x)
247{
248 return __ilog2(x);
249}
250
251
252
253
254
255
256#ifdef __powerpc64__
257static __inline__ int fls64(__u64 x)
258{
259 int lz;
260
261 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
262 return 64 - lz;
263}
264#else
265#include <asm-generic/bitops/fls64.h>
266#endif
267
268#ifdef CONFIG_PPC64
269unsigned int __arch_hweight8(unsigned int w);
270unsigned int __arch_hweight16(unsigned int w);
271unsigned int __arch_hweight32(unsigned int w);
272unsigned long __arch_hweight64(__u64 w);
273#include <asm-generic/bitops/const_hweight.h>
274#else
275#include <asm-generic/bitops/hweight.h>
276#endif
277
278#include <asm-generic/bitops/find.h>
279
280
281#include <asm-generic/bitops/le.h>
282
283
284
285#include <asm-generic/bitops/ext2-atomic-setbit.h>
286
287#include <asm-generic/bitops/sched.h>
288
289#endif
290
291#endif
292