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27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/gfp.h>
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/blkdev.h>
33#include <linux/delay.h>
34#include <linux/interrupt.h>
35#include <linux/device.h>
36#include <scsi/scsi_host.h>
37#include <linux/libata.h>
38
39#define DRV_NAME "sata_uli"
40#define DRV_VERSION "1.3"
41
42enum {
43 uli_5289 = 0,
44 uli_5287 = 1,
45 uli_5281 = 2,
46
47 uli_max_ports = 4,
48
49
50 ULI5287_BASE = 0x90,
51 ULI5287_OFFS = 0x10,
52 ULI5281_BASE = 0x60,
53 ULI5281_OFFS = 0x60,
54};
55
56struct uli_priv {
57 unsigned int scr_cfg_addr[uli_max_ports];
58};
59
60static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
61static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
62static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
63
64static const struct pci_device_id uli_pci_tbl[] = {
65 { PCI_VDEVICE(AL, 0x5289), uli_5289 },
66 { PCI_VDEVICE(AL, 0x5287), uli_5287 },
67 { PCI_VDEVICE(AL, 0x5281), uli_5281 },
68
69 { }
70};
71
72static struct pci_driver uli_pci_driver = {
73 .name = DRV_NAME,
74 .id_table = uli_pci_tbl,
75 .probe = uli_init_one,
76 .remove = ata_pci_remove_one,
77};
78
79static struct scsi_host_template uli_sht = {
80 ATA_BMDMA_SHT(DRV_NAME),
81};
82
83static struct ata_port_operations uli_ops = {
84 .inherits = &ata_bmdma_port_ops,
85 .scr_read = uli_scr_read,
86 .scr_write = uli_scr_write,
87 .hardreset = ATA_OP_NULL,
88};
89
90static const struct ata_port_info uli_port_info = {
91 .flags = ATA_FLAG_SATA | ATA_FLAG_IGN_SIMPLEX,
92 .pio_mask = ATA_PIO4,
93 .udma_mask = ATA_UDMA6,
94 .port_ops = &uli_ops,
95};
96
97
98MODULE_AUTHOR("Peer Chen");
99MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
100MODULE_LICENSE("GPL");
101MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
102MODULE_VERSION(DRV_VERSION);
103
104static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
105{
106 struct uli_priv *hpriv = ap->host->private_data;
107 return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
108}
109
110static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
111{
112 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
113 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
114 u32 val;
115
116 pci_read_config_dword(pdev, cfg_addr, &val);
117 return val;
118}
119
120static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
121{
122 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
123 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
124
125 pci_write_config_dword(pdev, cfg_addr, val);
126}
127
128static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
129{
130 if (sc_reg > SCR_CONTROL)
131 return -EINVAL;
132
133 *val = uli_scr_cfg_read(link, sc_reg);
134 return 0;
135}
136
137static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
138{
139 if (sc_reg > SCR_CONTROL)
140 return -EINVAL;
141
142 uli_scr_cfg_write(link, sc_reg, val);
143 return 0;
144}
145
146static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
147{
148 const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
149 unsigned int board_idx = (unsigned int) ent->driver_data;
150 struct ata_host *host;
151 struct uli_priv *hpriv;
152 void __iomem * const *iomap;
153 struct ata_ioports *ioaddr;
154 int n_ports, rc;
155
156 ata_print_version_once(&pdev->dev, DRV_VERSION);
157
158 rc = pcim_enable_device(pdev);
159 if (rc)
160 return rc;
161
162 n_ports = 2;
163 if (board_idx == uli_5287)
164 n_ports = 4;
165
166
167 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
168 if (!host)
169 return -ENOMEM;
170
171 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
172 if (!hpriv)
173 return -ENOMEM;
174 host->private_data = hpriv;
175
176
177 rc = ata_pci_sff_init_host(host);
178 if (rc)
179 return rc;
180
181 ata_pci_bmdma_init(host);
182
183 iomap = host->iomap;
184
185 switch (board_idx) {
186 case uli_5287:
187
188
189
190 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
191 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
192
193 ioaddr = &host->ports[2]->ioaddr;
194 ioaddr->cmd_addr = iomap[0] + 8;
195 ioaddr->altstatus_addr =
196 ioaddr->ctl_addr = (void __iomem *)
197 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
198 ioaddr->bmdma_addr = iomap[4] + 16;
199 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
200 ata_sff_std_ports(ioaddr);
201
202 ata_port_desc(host->ports[2],
203 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
204 (unsigned long long)pci_resource_start(pdev, 0) + 8,
205 ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
206 (unsigned long long)pci_resource_start(pdev, 4) + 16);
207
208 ioaddr = &host->ports[3]->ioaddr;
209 ioaddr->cmd_addr = iomap[2] + 8;
210 ioaddr->altstatus_addr =
211 ioaddr->ctl_addr = (void __iomem *)
212 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
213 ioaddr->bmdma_addr = iomap[4] + 24;
214 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
215 ata_sff_std_ports(ioaddr);
216
217 ata_port_desc(host->ports[2],
218 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
219 (unsigned long long)pci_resource_start(pdev, 2) + 9,
220 ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
221 (unsigned long long)pci_resource_start(pdev, 4) + 24);
222
223 break;
224
225 case uli_5289:
226 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
227 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
228 break;
229
230 case uli_5281:
231 hpriv->scr_cfg_addr[0] = ULI5281_BASE;
232 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
233 break;
234
235 default:
236 BUG();
237 break;
238 }
239
240 pci_set_master(pdev);
241 pci_intx(pdev, 1);
242 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
243 IRQF_SHARED, &uli_sht);
244}
245
246module_pci_driver(uli_pci_driver);
247