1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25#include <subdev/bios.h>
26
27#include <drm/drmP.h>
28
29#include "nouveau_drm.h"
30#include "nouveau_reg.h"
31#include "nouveau_hw.h"
32#include "nouveau_encoder.h"
33
34#include <linux/io-mapping.h>
35#include <linux/firmware.h>
36
37
38#define NV_CIO_CRE_44_HEADA 0x0
39#define NV_CIO_CRE_44_HEADB 0x3
40#define FEATURE_MOBILE 0x10
41
42#define EDID1_LEN 128
43
44#define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
45#define LOG_OLD_VALUE(x)
46
47struct init_exec {
48 bool execute;
49 bool repeat;
50};
51
52static bool nv_cksum(const uint8_t *data, unsigned int length)
53{
54
55
56
57
58 int i;
59 uint8_t sum = 0;
60
61 for (i = 0; i < length; i++)
62 sum += data[i];
63
64 if (sum)
65 return true;
66
67 return false;
68}
69
70static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
71{
72 int compare_record_len, i = 0;
73 uint16_t compareclk, scriptptr = 0;
74
75 if (bios->major_version < 5)
76 compare_record_len = 3;
77 else
78 compare_record_len = 4;
79
80 do {
81 compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
82 if (pxclk >= compareclk * 10) {
83 if (bios->major_version < 5) {
84 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
85 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
86 } else
87 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
88 break;
89 }
90 i++;
91 } while (compareclk);
92
93 return scriptptr;
94}
95
96static void
97run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
98 struct dcb_output *dcbent, int head, bool dl)
99{
100 struct nouveau_drm *drm = nouveau_drm(dev);
101
102 NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
103 scriptptr);
104 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :
105 NV_CIO_CRE_44_HEADA);
106 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);
107
108 nv04_dfp_bind_head(dev, dcbent, head, dl);
109}
110
111static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
112{
113 struct nouveau_drm *drm = nouveau_drm(dev);
114 struct nvbios *bios = &drm->vbios;
115 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
116 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
117
118 if (!bios->fp.xlated_entry || !sub || !scriptofs)
119 return -EINVAL;
120
121 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
122
123 if (script == LVDS_PANEL_OFF) {
124
125 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
126 }
127#ifdef __powerpc__
128
129 if (script == LVDS_RESET &&
130 (dev->pci_device == 0x0179 || dev->pci_device == 0x0189 ||
131 dev->pci_device == 0x0329))
132 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
133#endif
134
135 return 0;
136}
137
138static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
139{
140
141
142
143
144
145
146
147
148
149
150 struct nouveau_drm *drm = nouveau_drm(dev);
151 struct nvbios *bios = &drm->vbios;
152 unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
153 uint16_t scriptptr = 0, clktable;
154
155
156
157
158
159
160 switch (script) {
161 case LVDS_INIT:
162 return -ENOSYS;
163 case LVDS_BACKLIGHT_ON:
164 case LVDS_PANEL_ON:
165 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
166 break;
167 case LVDS_BACKLIGHT_OFF:
168 case LVDS_PANEL_OFF:
169 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
170 break;
171 case LVDS_RESET:
172 clktable = bios->fp.lvdsmanufacturerpointer + 15;
173 if (dcbent->or == 4)
174 clktable += 8;
175
176 if (dcbent->lvdsconf.use_straps_for_mode) {
177 if (bios->fp.dual_link)
178 clktable += 4;
179 if (bios->fp.if_is_24bit)
180 clktable += 2;
181 } else {
182
183 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
184
185 if (bios->fp.dual_link) {
186 clktable += 4;
187 cmpval_24bit <<= 1;
188 }
189
190 if (bios->fp.strapless_is_24bit & cmpval_24bit)
191 clktable += 2;
192 }
193
194 clktable = ROM16(bios->data[clktable]);
195 if (!clktable) {
196 NV_ERROR(drm, "Pixel clock comparison table not found\n");
197 return -ENOENT;
198 }
199 scriptptr = clkcmptable(bios, clktable, pxclk);
200 }
201
202 if (!scriptptr) {
203 NV_ERROR(drm, "LVDS output init script not found\n");
204 return -ENOENT;
205 }
206 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
207
208 return 0;
209}
210
211int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
212{
213
214
215
216
217
218
219 struct nouveau_drm *drm = nouveau_drm(dev);
220 struct nouveau_device *device = nv_device(drm->device);
221 struct nvbios *bios = &drm->vbios;
222 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
223 uint32_t sel_clk_binding, sel_clk;
224 int ret;
225
226 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
227 (lvds_ver >= 0x30 && script == LVDS_INIT))
228 return 0;
229
230 if (!bios->fp.lvds_init_run) {
231 bios->fp.lvds_init_run = true;
232 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
233 }
234
235 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
236 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
237 if (script == LVDS_RESET && bios->fp.power_off_for_reset)
238 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
239
240 NV_INFO(drm, "Calling LVDS script %d:\n", script);
241
242
243 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
244
245 if (lvds_ver < 0x30)
246 ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
247 else
248 ret = run_lvds_table(dev, dcbent, head, script, pxclk);
249
250 bios->fp.last_script_invoc = (script << 1 | head);
251
252 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
253 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
254
255 nv_wr32(device, NV_PBUS_POWERCTRL_2, 0);
256
257 return ret;
258}
259
260struct lvdstableheader {
261 uint8_t lvds_ver, headerlen, recordlen;
262};
263
264static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
265{
266
267
268
269
270
271
272
273 struct nouveau_drm *drm = nouveau_drm(dev);
274 uint8_t lvds_ver, headerlen, recordlen;
275
276 memset(lth, 0, sizeof(struct lvdstableheader));
277
278 if (bios->fp.lvdsmanufacturerpointer == 0x0) {
279 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
280 return -EINVAL;
281 }
282
283 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
284
285 switch (lvds_ver) {
286 case 0x0a:
287 headerlen = 2;
288 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
289 break;
290 case 0x30:
291 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
292 if (headerlen < 0x1f) {
293 NV_ERROR(drm, "LVDS table header not understood\n");
294 return -EINVAL;
295 }
296 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
297 break;
298 case 0x40:
299 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
300 if (headerlen < 0x7) {
301 NV_ERROR(drm, "LVDS table header not understood\n");
302 return -EINVAL;
303 }
304 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
305 break;
306 default:
307 NV_ERROR(drm,
308 "LVDS table revision %d.%d not currently supported\n",
309 lvds_ver >> 4, lvds_ver & 0xf);
310 return -ENOSYS;
311 }
312
313 lth->lvds_ver = lvds_ver;
314 lth->headerlen = headerlen;
315 lth->recordlen = recordlen;
316
317 return 0;
318}
319
320static int
321get_fp_strap(struct drm_device *dev, struct nvbios *bios)
322{
323 struct nouveau_device *device = nouveau_dev(dev);
324
325
326
327
328
329
330
331
332
333
334 if (bios->major_version < 5 && bios->data[0x48] & 0x4)
335 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
336
337 if (device->card_type >= NV_50)
338 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
339 else
340 return (nv_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
341}
342
343static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
344{
345 struct nouveau_drm *drm = nouveau_drm(dev);
346 uint8_t *fptable;
347 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
348 int ret, ofs, fpstrapping;
349 struct lvdstableheader lth;
350
351 if (bios->fp.fptablepointer == 0x0) {
352
353
354#ifndef __powerpc__
355 NV_ERROR(drm, "Pointer to flat panel table invalid\n");
356#endif
357 bios->digital_min_front_porch = 0x4b;
358 return 0;
359 }
360
361 fptable = &bios->data[bios->fp.fptablepointer];
362 fptable_ver = fptable[0];
363
364 switch (fptable_ver) {
365
366
367
368
369
370
371
372
373
374 case 0x05:
375 recordlen = 42;
376 ofs = -1;
377 break;
378 case 0x10:
379 recordlen = 44;
380 ofs = 0;
381 break;
382 case 0x20:
383 headerlen = fptable[1];
384 recordlen = fptable[2];
385 fpentries = fptable[3];
386
387
388
389
390 bios->digital_min_front_porch = fptable[4];
391 ofs = -7;
392 break;
393 default:
394 NV_ERROR(drm,
395 "FP table revision %d.%d not currently supported\n",
396 fptable_ver >> 4, fptable_ver & 0xf);
397 return -ENOSYS;
398 }
399
400 if (!bios->is_mobile)
401 return 0;
402
403 ret = parse_lvds_manufacturer_table_header(dev, bios, <h);
404 if (ret)
405 return ret;
406
407 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
408 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
409 lth.headerlen + 1;
410 bios->fp.xlatwidth = lth.recordlen;
411 }
412 if (bios->fp.fpxlatetableptr == 0x0) {
413 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
414 return -EINVAL;
415 }
416
417 fpstrapping = get_fp_strap(dev, bios);
418
419 fpindex = bios->data[bios->fp.fpxlatetableptr +
420 fpstrapping * bios->fp.xlatwidth];
421
422 if (fpindex > fpentries) {
423 NV_ERROR(drm, "Bad flat panel table index\n");
424 return -ENOENT;
425 }
426
427
428 if (lth.lvds_ver > 0x10)
429 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
430
431
432
433
434
435
436 if (fpstrapping == 0xf || fpindex == 0xf)
437 return 0;
438
439 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
440 recordlen * fpindex + ofs;
441
442 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
443 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
444 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
445 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
446
447 return 0;
448}
449
450bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
451{
452 struct nouveau_drm *drm = nouveau_drm(dev);
453 struct nvbios *bios = &drm->vbios;
454 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
455
456 if (!mode)
457 return bios->fp.mode_ptr;
458
459 memset(mode, 0, sizeof(struct drm_display_mode));
460
461
462
463
464
465
466 mode->clock = ROM16(mode_entry[7]) * 10;
467
468 mode->hdisplay = ROM16(mode_entry[11]) + 1;
469
470
471
472
473 mode->hsync_start = ROM16(mode_entry[17]) + 1;
474 mode->hsync_end = ROM16(mode_entry[19]) + 1;
475 mode->htotal = ROM16(mode_entry[21]) + 1;
476
477 mode->vdisplay = ROM16(mode_entry[25]) + 1;
478 mode->vsync_start = ROM16(mode_entry[31]) + 1;
479 mode->vsync_end = ROM16(mode_entry[33]) + 1;
480 mode->vtotal = ROM16(mode_entry[35]) + 1;
481 mode->flags |= (mode_entry[37] & 0x10) ?
482 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
483 mode->flags |= (mode_entry[37] & 0x1) ?
484 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
485
486
487
488
489
490 mode->status = MODE_OK;
491 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
492 drm_mode_set_name(mode);
493 return bios->fp.mode_ptr;
494}
495
496int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
497{
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523 struct nouveau_drm *drm = nouveau_drm(dev);
524 struct nvbios *bios = &drm->vbios;
525 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
526 struct lvdstableheader lth;
527 uint16_t lvdsofs;
528 int ret, chip_version = bios->chip_version;
529
530 ret = parse_lvds_manufacturer_table_header(dev, bios, <h);
531 if (ret)
532 return ret;
533
534 switch (lth.lvds_ver) {
535 case 0x0a:
536 lvdsmanufacturerindex = bios->data[
537 bios->fp.fpxlatemanufacturertableptr +
538 fpstrapping];
539
540
541 if (!pxclk)
542 break;
543
544 if (chip_version < 0x25) {
545
546
547
548
549
550 lvdsmanufacturerindex =
551 (bios->legacy.lvds_single_a_script_ptr & 1) ?
552 2 : 0;
553 if (pxclk >= bios->fp.duallink_transition_clk)
554 lvdsmanufacturerindex++;
555 } else if (chip_version < 0x30) {
556
557
558
559
560
561
562
563
564
565 lvdsmanufacturerindex = 0;
566 } else {
567
568 lvdsmanufacturerindex = 0;
569 if (pxclk >= bios->fp.duallink_transition_clk)
570 lvdsmanufacturerindex = 2;
571 if (pxclk >= 140000)
572 lvdsmanufacturerindex = 3;
573 }
574
575
576
577
578
579 break;
580 case 0x30:
581 case 0x40:
582 lvdsmanufacturerindex = fpstrapping;
583 break;
584 default:
585 NV_ERROR(drm, "LVDS table revision not currently supported\n");
586 return -ENOSYS;
587 }
588
589 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
590 switch (lth.lvds_ver) {
591 case 0x0a:
592 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
593 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
594 bios->fp.dual_link = bios->data[lvdsofs] & 4;
595 bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
596 *if_is_24bit = bios->data[lvdsofs] & 16;
597 break;
598 case 0x30:
599 case 0x40:
600
601
602
603
604 bios->fp.power_off_for_reset = true;
605 bios->fp.reset_after_pclk_change = true;
606
607
608
609
610
611 bios->fp.dual_link = bios->data[lvdsofs] & 1;
612 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
613 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
614 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
615 break;
616 }
617
618
619 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
620 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
621
622 *dl = bios->fp.dual_link;
623
624 return 0;
625}
626
627int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
628{
629
630
631
632
633
634
635
636
637
638 struct nouveau_drm *drm = nouveau_drm(dev);
639 struct nouveau_device *device = nv_device(drm->device);
640 struct nvbios *bios = &drm->vbios;
641 int cv = bios->chip_version;
642 uint16_t clktable = 0, scriptptr;
643 uint32_t sel_clk_binding, sel_clk;
644
645
646 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
647 dcbent->location != DCB_LOC_ON_CHIP)
648 return 0;
649
650 switch (ffs(dcbent->or)) {
651 case 1:
652 clktable = bios->tmds.output0_script_ptr;
653 break;
654 case 2:
655 case 3:
656 clktable = bios->tmds.output1_script_ptr;
657 break;
658 }
659
660 if (!clktable) {
661 NV_ERROR(drm, "Pixel clock comparison table not found\n");
662 return -EINVAL;
663 }
664
665 scriptptr = clkcmptable(bios, clktable, pxclk);
666
667 if (!scriptptr) {
668 NV_ERROR(drm, "TMDS output init script not found\n");
669 return -ENOENT;
670 }
671
672
673 sel_clk_binding = nv_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
674 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
675 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
676 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
677
678 return 0;
679}
680
681static void parse_bios_version(struct drm_device *dev, struct nvbios *bios, uint16_t offset)
682{
683
684
685
686
687
688
689 struct nouveau_drm *drm = nouveau_drm(dev);
690
691 bios->major_version = bios->data[offset + 3];
692 bios->chip_version = bios->data[offset + 2];
693 NV_INFO(drm, "Bios version %02x.%02x.%02x.%02x\n",
694 bios->data[offset + 3], bios->data[offset + 2],
695 bios->data[offset + 1], bios->data[offset]);
696}
697
698static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
699{
700
701
702
703
704
705
706
707
708
709
710
711
712 bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
713 bios->macro_index_tbl_ptr = ROM16(bios->data[offset + 2]);
714 bios->macro_tbl_ptr = ROM16(bios->data[offset + 4]);
715 bios->condition_tbl_ptr = ROM16(bios->data[offset + 6]);
716 bios->io_condition_tbl_ptr = ROM16(bios->data[offset + 8]);
717 bios->io_flag_condition_tbl_ptr = ROM16(bios->data[offset + 10]);
718 bios->init_function_tbl_ptr = ROM16(bios->data[offset + 12]);
719}
720
721static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
722{
723
724
725
726
727
728
729 struct nouveau_drm *drm = nouveau_drm(dev);
730 uint16_t load_table_ptr;
731 uint8_t version, headerlen, entrylen, num_entries;
732
733 if (bitentry->length != 3) {
734 NV_ERROR(drm, "Do not understand BIT A table\n");
735 return -EINVAL;
736 }
737
738 load_table_ptr = ROM16(bios->data[bitentry->offset]);
739
740 if (load_table_ptr == 0x0) {
741 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
742 return -EINVAL;
743 }
744
745 version = bios->data[load_table_ptr];
746
747 if (version != 0x10) {
748 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
749 version >> 4, version & 0xF);
750 return -ENOSYS;
751 }
752
753 headerlen = bios->data[load_table_ptr + 1];
754 entrylen = bios->data[load_table_ptr + 2];
755 num_entries = bios->data[load_table_ptr + 3];
756
757 if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
758 NV_ERROR(drm, "Do not understand BIT loadval table\n");
759 return -EINVAL;
760 }
761
762
763 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
764
765 return 0;
766}
767
768static int parse_bit_C_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
769{
770
771
772
773
774
775 struct nouveau_drm *drm = nouveau_drm(dev);
776
777 if (bitentry->length < 10) {
778 NV_ERROR(drm, "Do not understand BIT C table\n");
779 return -EINVAL;
780 }
781
782 bios->pll_limit_tbl_ptr = ROM16(bios->data[bitentry->offset + 8]);
783
784 return 0;
785}
786
787static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
788{
789
790
791
792
793
794
795
796
797 struct nouveau_drm *drm = nouveau_drm(dev);
798
799 if (bitentry->length != 4) {
800 NV_ERROR(drm, "Do not understand BIT display table\n");
801 return -EINVAL;
802 }
803
804 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
805
806 return 0;
807}
808
809static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
810{
811
812
813
814
815
816 struct nouveau_drm *drm = nouveau_drm(dev);
817
818 if (bitentry->length < 14) {
819 NV_ERROR(drm, "Do not understand init table\n");
820 return -EINVAL;
821 }
822
823 parse_script_table_pointers(bios, bitentry->offset);
824
825 if (bitentry->length >= 16)
826 bios->some_script_ptr = ROM16(bios->data[bitentry->offset + 14]);
827 if (bitentry->length >= 18)
828 bios->init96_tbl_ptr = ROM16(bios->data[bitentry->offset + 16]);
829
830 return 0;
831}
832
833static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
834{
835
836
837
838
839
840
841
842
843
844
845
846 struct nouveau_drm *drm = nouveau_drm(dev);
847 uint16_t daccmpoffset;
848 uint8_t dacver, dacheaderlen;
849
850 if (bitentry->length < 6) {
851 NV_ERROR(drm, "BIT i table too short for needed information\n");
852 return -EINVAL;
853 }
854
855 parse_bios_version(dev, bios, bitentry->offset);
856
857
858
859
860
861 bios->feature_byte = bios->data[bitentry->offset + 5];
862 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
863
864 if (bitentry->length < 15) {
865 NV_WARN(drm, "BIT i table not long enough for DAC load "
866 "detection comparison table\n");
867 return -EINVAL;
868 }
869
870 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
871
872
873 if (!daccmpoffset)
874 return 0;
875
876
877
878
879
880
881
882 dacver = bios->data[daccmpoffset];
883 dacheaderlen = bios->data[daccmpoffset + 1];
884
885 if (dacver != 0x00 && dacver != 0x10) {
886 NV_WARN(drm, "DAC load detection comparison table version "
887 "%d.%d not known\n", dacver >> 4, dacver & 0xf);
888 return -ENOSYS;
889 }
890
891 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
892 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
893
894 return 0;
895}
896
897static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
898{
899
900
901
902
903
904
905
906 struct nouveau_drm *drm = nouveau_drm(dev);
907
908 if (bitentry->length != 2) {
909 NV_ERROR(drm, "Do not understand BIT LVDS table\n");
910 return -EINVAL;
911 }
912
913
914
915
916
917 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
918
919 return 0;
920}
921
922static int
923parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
924 struct bit_entry *bitentry)
925{
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940 if (bitentry->length < 0x5)
941 return 0;
942
943 if (bitentry->version < 2) {
944 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
945 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
946 } else {
947 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
948 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
949 }
950
951 return 0;
952}
953
954static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
955{
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979 struct nouveau_drm *drm = nouveau_drm(dev);
980 uint16_t tmdstableptr, script1, script2;
981
982 if (bitentry->length != 2) {
983 NV_ERROR(drm, "Do not understand BIT TMDS table\n");
984 return -EINVAL;
985 }
986
987 tmdstableptr = ROM16(bios->data[bitentry->offset]);
988 if (!tmdstableptr) {
989 NV_ERROR(drm, "Pointer to TMDS table invalid\n");
990 return -EINVAL;
991 }
992
993 NV_INFO(drm, "TMDS table version %d.%d\n",
994 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
995
996
997 if (bios->data[tmdstableptr] != 0x11)
998 return -ENOSYS;
999
1000
1001
1002
1003
1004 script1 = ROM16(bios->data[tmdstableptr + 7]);
1005 script2 = ROM16(bios->data[tmdstableptr + 9]);
1006 if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
1007 NV_WARN(drm, "TMDS table script pointers not stubbed\n");
1008
1009 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
1010 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
1011
1012 return 0;
1013}
1014
1015struct bit_table {
1016 const char id;
1017 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
1018};
1019
1020#define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
1021
1022int
1023bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
1024{
1025 struct nouveau_drm *drm = nouveau_drm(dev);
1026 struct nvbios *bios = &drm->vbios;
1027 u8 entries, *entry;
1028
1029 if (bios->type != NVBIOS_BIT)
1030 return -ENODEV;
1031
1032 entries = bios->data[bios->offset + 10];
1033 entry = &bios->data[bios->offset + 12];
1034 while (entries--) {
1035 if (entry[0] == id) {
1036 bit->id = entry[0];
1037 bit->version = entry[1];
1038 bit->length = ROM16(entry[2]);
1039 bit->offset = ROM16(entry[4]);
1040 bit->data = ROMPTR(dev, entry[4]);
1041 return 0;
1042 }
1043
1044 entry += bios->data[bios->offset + 9];
1045 }
1046
1047 return -ENOENT;
1048}
1049
1050static int
1051parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
1052 struct bit_table *table)
1053{
1054 struct drm_device *dev = bios->dev;
1055 struct nouveau_drm *drm = nouveau_drm(dev);
1056 struct bit_entry bitentry;
1057
1058 if (bit_table(dev, table->id, &bitentry) == 0)
1059 return table->parse_fn(dev, bios, &bitentry);
1060
1061 NV_INFO(drm, "BIT table '%c' not found\n", table->id);
1062 return -ENOSYS;
1063}
1064
1065static int
1066parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
1067{
1068 int ret;
1069
1070
1071
1072
1073
1074
1075
1076 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
1077 if (ret)
1078 return ret;
1079 if (bios->major_version >= 0x60)
1080 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
1081 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('C', C));
1082 if (ret)
1083 return ret;
1084 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
1085 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
1086 if (ret)
1087 return ret;
1088 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M));
1089 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
1090 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
1091
1092 return 0;
1093}
1094
1095static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
1096{
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140 struct nouveau_drm *drm = nouveau_drm(dev);
1141 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
1142 uint16_t bmplength;
1143 uint16_t legacy_scripts_offset, legacy_i2c_offset;
1144
1145
1146 bios->digital_min_front_porch = 0x4b;
1147 bios->fmaxvco = 256000;
1148 bios->fminvco = 128000;
1149 bios->fp.duallink_transition_clk = 90000;
1150
1151 bmp_version_major = bmp[5];
1152 bmp_version_minor = bmp[6];
1153
1154 NV_INFO(drm, "BMP version %d.%d\n",
1155 bmp_version_major, bmp_version_minor);
1156
1157
1158
1159
1160
1161 if (bmp_version_major < 5)
1162 *(uint16_t *)&bios->data[0x36] = 0;
1163
1164
1165
1166
1167
1168
1169 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
1170 NV_ERROR(drm, "You have an unsupported BMP version. "
1171 "Please send in your bios\n");
1172 return -ENOSYS;
1173 }
1174
1175 if (bmp_version_major == 0)
1176
1177 return 0;
1178 else if (bmp_version_major == 1)
1179 bmplength = 44;
1180 else if (bmp_version_major == 2)
1181 bmplength = 48;
1182 else if (bmp_version_major == 3)
1183 bmplength = 54;
1184
1185 else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
1186
1187 bmplength = 62;
1188
1189 else if (bmp_version_minor < 0x6)
1190 bmplength = 67;
1191 else if (bmp_version_minor < 0x10)
1192 bmplength = 75;
1193 else if (bmp_version_minor == 0x10)
1194 bmplength = 89;
1195 else if (bmp_version_minor < 0x14)
1196 bmplength = 118;
1197 else if (bmp_version_minor < 0x24)
1198
1199
1200
1201
1202
1203 bmplength = 123;
1204 else if (bmp_version_minor < 0x27)
1205
1206
1207
1208
1209 bmplength = 144;
1210 else
1211
1212
1213
1214
1215 bmplength = 158;
1216
1217
1218 if (nv_cksum(bmp, 8)) {
1219 NV_ERROR(drm, "Bad BMP checksum\n");
1220 return -EINVAL;
1221 }
1222
1223
1224
1225
1226
1227
1228
1229 bios->feature_byte = bmp[9];
1230
1231 parse_bios_version(dev, bios, offset + 10);
1232
1233 if (bmp_version_major < 5 || bmp_version_minor < 0x10)
1234 bios->old_style_init = true;
1235 legacy_scripts_offset = 18;
1236 if (bmp_version_major < 2)
1237 legacy_scripts_offset -= 4;
1238 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
1239 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
1240
1241 if (bmp_version_major > 2) {
1242 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
1243 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
1244 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
1245 }
1246
1247 legacy_i2c_offset = 0x48;
1248 if (bmplength > 61)
1249 legacy_i2c_offset = offset + 54;
1250 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
1251 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
1252 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
1253
1254 if (bmplength > 74) {
1255 bios->fmaxvco = ROM32(bmp[67]);
1256 bios->fminvco = ROM32(bmp[71]);
1257 }
1258 if (bmplength > 88)
1259 parse_script_table_pointers(bios, offset + 75);
1260 if (bmplength > 94) {
1261 bios->tmds.output0_script_ptr = ROM16(bmp[89]);
1262 bios->tmds.output1_script_ptr = ROM16(bmp[91]);
1263
1264
1265
1266
1267
1268 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
1269 }
1270 if (bmplength > 108) {
1271 bios->fp.fptablepointer = ROM16(bmp[105]);
1272 bios->fp.fpxlatetableptr = ROM16(bmp[107]);
1273 bios->fp.xlatwidth = 1;
1274 }
1275 if (bmplength > 120) {
1276 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
1277 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
1278 }
1279 if (bmplength > 143)
1280 bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
1281
1282 if (bmplength > 157)
1283 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
1284
1285 return 0;
1286}
1287
1288static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
1289{
1290 int i, j;
1291
1292 for (i = 0; i <= (n - len); i++) {
1293 for (j = 0; j < len; j++)
1294 if (data[i + j] != str[j])
1295 break;
1296 if (j == len)
1297 return i;
1298 }
1299
1300 return 0;
1301}
1302
1303void *
1304olddcb_table(struct drm_device *dev)
1305{
1306 struct nouveau_drm *drm = nouveau_drm(dev);
1307 u8 *dcb = NULL;
1308
1309 if (nv_device(drm->device)->card_type > NV_04)
1310 dcb = ROMPTR(dev, drm->vbios.data[0x36]);
1311 if (!dcb) {
1312 NV_WARN(drm, "No DCB data found in VBIOS\n");
1313 return NULL;
1314 }
1315
1316 if (dcb[0] >= 0x41) {
1317 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
1318 return NULL;
1319 } else
1320 if (dcb[0] >= 0x30) {
1321 if (ROM32(dcb[6]) == 0x4edcbdcb)
1322 return dcb;
1323 } else
1324 if (dcb[0] >= 0x20) {
1325 if (ROM32(dcb[4]) == 0x4edcbdcb)
1326 return dcb;
1327 } else
1328 if (dcb[0] >= 0x15) {
1329 if (!memcmp(&dcb[-7], "DEV_REC", 7))
1330 return dcb;
1331 } else {
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349 NV_WARN(drm, "No useful DCB data in VBIOS\n");
1350 return NULL;
1351 }
1352
1353 NV_WARN(drm, "DCB header validation failed\n");
1354 return NULL;
1355}
1356
1357void *
1358olddcb_outp(struct drm_device *dev, u8 idx)
1359{
1360 u8 *dcb = olddcb_table(dev);
1361 if (dcb && dcb[0] >= 0x30) {
1362 if (idx < dcb[2])
1363 return dcb + dcb[1] + (idx * dcb[3]);
1364 } else
1365 if (dcb && dcb[0] >= 0x20) {
1366 u8 *i2c = ROMPTR(dev, dcb[2]);
1367 u8 *ent = dcb + 8 + (idx * 8);
1368 if (i2c && ent < i2c)
1369 return ent;
1370 } else
1371 if (dcb && dcb[0] >= 0x15) {
1372 u8 *i2c = ROMPTR(dev, dcb[2]);
1373 u8 *ent = dcb + 4 + (idx * 10);
1374 if (i2c && ent < i2c)
1375 return ent;
1376 }
1377
1378 return NULL;
1379}
1380
1381int
1382olddcb_outp_foreach(struct drm_device *dev, void *data,
1383 int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
1384{
1385 int ret, idx = -1;
1386 u8 *outp = NULL;
1387 while ((outp = olddcb_outp(dev, ++idx))) {
1388 if (ROM32(outp[0]) == 0x00000000)
1389 break;
1390 if (ROM32(outp[0]) == 0xffffffff)
1391 break;
1392
1393 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
1394 continue;
1395 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
1396 break;
1397
1398 ret = exec(dev, data, idx, outp);
1399 if (ret)
1400 return ret;
1401 }
1402
1403 return 0;
1404}
1405
1406u8 *
1407olddcb_conntab(struct drm_device *dev)
1408{
1409 u8 *dcb = olddcb_table(dev);
1410 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
1411 u8 *conntab = ROMPTR(dev, dcb[0x14]);
1412 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
1413 return conntab;
1414 }
1415 return NULL;
1416}
1417
1418u8 *
1419olddcb_conn(struct drm_device *dev, u8 idx)
1420{
1421 u8 *conntab = olddcb_conntab(dev);
1422 if (conntab && idx < conntab[2])
1423 return conntab + conntab[1] + (idx * conntab[3]);
1424 return NULL;
1425}
1426
1427static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
1428{
1429 struct dcb_output *entry = &dcb->entry[dcb->entries];
1430
1431 memset(entry, 0, sizeof(struct dcb_output));
1432 entry->index = dcb->entries++;
1433
1434 return entry;
1435}
1436
1437static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
1438 int heads, int or)
1439{
1440 struct dcb_output *entry = new_dcb_entry(dcb);
1441
1442 entry->type = type;
1443 entry->i2c_index = i2c;
1444 entry->heads = heads;
1445 if (type != DCB_OUTPUT_ANALOG)
1446 entry->location = !DCB_LOC_ON_CHIP;
1447 entry->or = or;
1448}
1449
1450static bool
1451parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
1452 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1453{
1454 struct nouveau_drm *drm = nouveau_drm(dev);
1455
1456 entry->type = conn & 0xf;
1457 entry->i2c_index = (conn >> 4) & 0xf;
1458 entry->heads = (conn >> 8) & 0xf;
1459 entry->connector = (conn >> 12) & 0xf;
1460 entry->bus = (conn >> 16) & 0xf;
1461 entry->location = (conn >> 20) & 0x3;
1462 entry->or = (conn >> 24) & 0xf;
1463
1464 switch (entry->type) {
1465 case DCB_OUTPUT_ANALOG:
1466
1467
1468
1469
1470 entry->crtconf.maxfreq = (dcb->version < 0x30) ?
1471 (conf & 0xffff) * 10 :
1472 (conf & 0xff) * 10000;
1473 break;
1474 case DCB_OUTPUT_LVDS:
1475 {
1476 uint32_t mask;
1477 if (conf & 0x1)
1478 entry->lvdsconf.use_straps_for_mode = true;
1479 if (dcb->version < 0x22) {
1480 mask = ~0xd;
1481
1482
1483
1484
1485
1486 entry->lvdsconf.use_straps_for_mode = true;
1487
1488
1489
1490
1491 if (conf & 0x4 || conf & 0x8)
1492 entry->lvdsconf.use_power_scripts = true;
1493 } else {
1494 mask = ~0x7;
1495 if (conf & 0x2)
1496 entry->lvdsconf.use_acpi_for_edid = true;
1497 if (conf & 0x4)
1498 entry->lvdsconf.use_power_scripts = true;
1499 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
1500 }
1501 if (conf & mask) {
1502
1503
1504
1505
1506 if (dcb->version >= 0x40)
1507 break;
1508
1509 NV_ERROR(drm, "Unknown LVDS configuration bits, "
1510 "please report\n");
1511 }
1512 break;
1513 }
1514 case DCB_OUTPUT_TV:
1515 {
1516 if (dcb->version >= 0x30)
1517 entry->tvconf.has_component_output = conf & (0x8 << 4);
1518 else
1519 entry->tvconf.has_component_output = false;
1520
1521 break;
1522 }
1523 case DCB_OUTPUT_DP:
1524 entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
1525 switch ((conf & 0x00e00000) >> 21) {
1526 case 0:
1527 entry->dpconf.link_bw = 162000;
1528 break;
1529 default:
1530 entry->dpconf.link_bw = 270000;
1531 break;
1532 }
1533 switch ((conf & 0x0f000000) >> 24) {
1534 case 0xf:
1535 entry->dpconf.link_nr = 4;
1536 break;
1537 case 0x3:
1538 entry->dpconf.link_nr = 2;
1539 break;
1540 default:
1541 entry->dpconf.link_nr = 1;
1542 break;
1543 }
1544 break;
1545 case DCB_OUTPUT_TMDS:
1546 if (dcb->version >= 0x40)
1547 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
1548 else if (dcb->version >= 0x30)
1549 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
1550 else if (dcb->version >= 0x22)
1551 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
1552
1553 break;
1554 case DCB_OUTPUT_EOL:
1555
1556 dcb->entries--;
1557 return false;
1558 default:
1559 break;
1560 }
1561
1562 if (dcb->version < 0x40) {
1563
1564
1565
1566 entry->duallink_possible =
1567 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
1568 } else {
1569 entry->duallink_possible = (entry->sorconf.link == 3);
1570 }
1571
1572
1573 if (conf & 0x100000)
1574 entry->i2c_upper_default = true;
1575
1576 return true;
1577}
1578
1579static bool
1580parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
1581 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1582{
1583 struct nouveau_drm *drm = nouveau_drm(dev);
1584
1585 switch (conn & 0x0000000f) {
1586 case 0:
1587 entry->type = DCB_OUTPUT_ANALOG;
1588 break;
1589 case 1:
1590 entry->type = DCB_OUTPUT_TV;
1591 break;
1592 case 2:
1593 case 4:
1594 if (conn & 0x10)
1595 entry->type = DCB_OUTPUT_LVDS;
1596 else
1597 entry->type = DCB_OUTPUT_TMDS;
1598 break;
1599 case 3:
1600 entry->type = DCB_OUTPUT_LVDS;
1601 break;
1602 default:
1603 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
1604 return false;
1605 }
1606
1607 entry->i2c_index = (conn & 0x0003c000) >> 14;
1608 entry->heads = ((conn & 0x001c0000) >> 18) + 1;
1609 entry->or = entry->heads;
1610 entry->location = (conn & 0x01e00000) >> 21;
1611 entry->bus = (conn & 0x0e000000) >> 25;
1612 entry->duallink_possible = false;
1613
1614 switch (entry->type) {
1615 case DCB_OUTPUT_ANALOG:
1616 entry->crtconf.maxfreq = (conf & 0xffff) * 10;
1617 break;
1618 case DCB_OUTPUT_TV:
1619 entry->tvconf.has_component_output = false;
1620 break;
1621 case DCB_OUTPUT_LVDS:
1622 if ((conn & 0x00003f00) >> 8 != 0x10)
1623 entry->lvdsconf.use_straps_for_mode = true;
1624 entry->lvdsconf.use_power_scripts = true;
1625 break;
1626 default:
1627 break;
1628 }
1629
1630 return true;
1631}
1632
1633static
1634void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
1635{
1636
1637
1638
1639
1640
1641
1642 struct nouveau_drm *drm = nouveau_drm(dev);
1643 int i, newentries = 0;
1644
1645 for (i = 0; i < dcb->entries; i++) {
1646 struct dcb_output *ient = &dcb->entry[i];
1647 int j;
1648
1649 for (j = i + 1; j < dcb->entries; j++) {
1650 struct dcb_output *jent = &dcb->entry[j];
1651
1652 if (jent->type == 100)
1653 continue;
1654
1655
1656 if (jent->i2c_index == ient->i2c_index &&
1657 jent->type == ient->type &&
1658 jent->location == ient->location &&
1659 jent->or == ient->or) {
1660 NV_INFO(drm, "Merging DCB entries %d and %d\n",
1661 i, j);
1662 ient->heads |= jent->heads;
1663 jent->type = 100;
1664 }
1665 }
1666 }
1667
1668
1669 for (i = 0; i < dcb->entries; i++) {
1670 if (dcb->entry[i].type == 100)
1671 continue;
1672
1673 if (newentries != i) {
1674 dcb->entry[newentries] = dcb->entry[i];
1675 dcb->entry[newentries].index = newentries;
1676 }
1677 newentries++;
1678 }
1679
1680 dcb->entries = newentries;
1681}
1682
1683static bool
1684apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
1685{
1686 struct nouveau_drm *drm = nouveau_drm(dev);
1687 struct dcb_table *dcb = &drm->vbios.dcb;
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {
1702 if (*conn == 0x02026312 && *conf == 0x00000020)
1703 return false;
1704 }
1705
1706
1707
1708
1709
1710
1711 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
1712 if (*conn == 0xf2005014 && *conf == 0xffffffff) {
1713 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1);
1714 return false;
1715 }
1716 }
1717
1718
1719
1720
1721
1722 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {
1723 if (idx == 0) {
1724 *conn = 0x02001300;
1725 *conf = 0x00000028;
1726 } else
1727 if (idx == 1) {
1728 *conn = 0x01010312;
1729 *conf = 0x00020030;
1730 } else
1731 if (idx == 2) {
1732 *conn = 0x01010310;
1733 *conf = 0x00000028;
1734 } else
1735 if (idx == 3) {
1736 *conn = 0x02022362;
1737 *conf = 0x00020010;
1738 } else {
1739 *conn = 0x0000000e;
1740 *conf = 0x00000000;
1741 }
1742 }
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
1754 if (idx == 0) {
1755 *conn = 0x02002300;
1756 *conf = 0x00000028;
1757 } else
1758 if (idx == 1) {
1759 *conn = 0x01010312;
1760 *conf = 0x00020030;
1761 } else
1762 if (idx == 2) {
1763 *conn = 0x04020310;
1764 *conf = 0x00000028;
1765 } else
1766 if (idx == 3) {
1767 *conn = 0x02021322;
1768 *conf = 0x00020010;
1769 } else {
1770 *conn = 0x0000000e;
1771 *conf = 0x00000000;
1772 }
1773 }
1774
1775
1776 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {
1777 if (idx == 0 && *conn == 0x02000300)
1778 *conn = 0x02011300;
1779 else
1780 if (idx == 1 && *conn == 0x04011310)
1781 *conn = 0x04000310;
1782 else
1783 if (idx == 2 && *conn == 0x02011312)
1784 *conn = 0x02000312;
1785 }
1786
1787 return true;
1788}
1789
1790static void
1791fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
1792{
1793 struct dcb_table *dcb = &bios->dcb;
1794 int all_heads = (nv_two_heads(dev) ? 3 : 1);
1795
1796#ifdef __powerpc__
1797
1798 if (of_machine_is_compatible("PowerMac4,5")) {
1799 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
1800 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
1801 return;
1802 }
1803#endif
1804
1805
1806 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,
1807 bios->legacy.i2c_indices.crt, 1, 1);
1808
1809 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
1810 fabricate_dcb_output(dcb, DCB_OUTPUT_TV,
1811 bios->legacy.i2c_indices.tv,
1812 all_heads, 0);
1813
1814 else if (bios->tmds.output0_script_ptr ||
1815 bios->tmds.output1_script_ptr)
1816 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,
1817 bios->legacy.i2c_indices.panel,
1818 all_heads, 1);
1819}
1820
1821static int
1822parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
1823{
1824 struct nouveau_drm *drm = nouveau_drm(dev);
1825 struct dcb_table *dcb = &drm->vbios.dcb;
1826 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
1827 u32 conn = ROM32(outp[0]);
1828 bool ret;
1829
1830 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {
1831 struct dcb_output *entry = new_dcb_entry(dcb);
1832
1833 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
1834
1835 if (dcb->version >= 0x20)
1836 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
1837 else
1838 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
1839 if (!ret)
1840 return 1;
1841
1842
1843
1844
1845
1846 if (entry->type == DCB_OUTPUT_TV &&
1847 entry->location == DCB_LOC_ON_CHIP)
1848 entry->i2c_index = 0x0f;
1849 }
1850
1851 return 0;
1852}
1853
1854static void
1855dcb_fake_connectors(struct nvbios *bios)
1856{
1857 struct dcb_table *dcbt = &bios->dcb;
1858 u8 map[16] = { };
1859 int i, idx = 0;
1860
1861
1862
1863
1864
1865
1866 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {
1867 for (i = 0; i < dcbt->entries; i++) {
1868 if (dcbt->entry[i].connector)
1869 return;
1870 }
1871 }
1872
1873
1874
1875
1876
1877
1878
1879 for (i = 0; i < dcbt->entries; i++) {
1880 u8 i2c = dcbt->entry[i].i2c_index;
1881 if (i2c == 0x0f) {
1882 dcbt->entry[i].connector = idx++;
1883 } else {
1884 if (!map[i2c])
1885 map[i2c] = ++idx;
1886 dcbt->entry[i].connector = map[i2c] - 1;
1887 }
1888 }
1889
1890
1891
1892
1893 if (i > 1) {
1894 u8 *conntab = olddcb_conntab(bios->dev);
1895 if (conntab)
1896 conntab[0] = 0x00;
1897 }
1898}
1899
1900static int
1901parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
1902{
1903 struct nouveau_drm *drm = nouveau_drm(dev);
1904 struct dcb_table *dcb = &bios->dcb;
1905 u8 *dcbt, *conn;
1906 int idx;
1907
1908 dcbt = olddcb_table(dev);
1909 if (!dcbt) {
1910
1911 if (bios->type == NVBIOS_BMP) {
1912 fabricate_dcb_encoder_table(dev, bios);
1913 return 0;
1914 }
1915
1916 return -EINVAL;
1917 }
1918
1919 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
1920
1921 dcb->version = dcbt[0];
1922 olddcb_outp_foreach(dev, NULL, parse_dcb_entry);
1923
1924
1925
1926
1927
1928 if (dcb->version < 0x21)
1929 merge_like_dcb_entries(dev, dcb);
1930
1931 if (!dcb->entries)
1932 return -ENXIO;
1933
1934
1935 idx = -1;
1936 while ((conn = olddcb_conn(dev, ++idx))) {
1937 if (conn[0] != 0xff) {
1938 NV_INFO(drm, "DCB conn %02d: ", idx);
1939 if (olddcb_conntab(dev)[3] < 4)
1940 printk("%04x\n", ROM16(conn[0]));
1941 else
1942 printk("%08x\n", ROM32(conn[0]));
1943 }
1944 }
1945 dcb_fake_connectors(bios);
1946 return 0;
1947}
1948
1949static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
1950{
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960 struct nouveau_drm *drm = nouveau_drm(dev);
1961 struct nouveau_device *device = nv_device(drm->device);
1962 uint8_t bytes_to_write;
1963 uint16_t hwsq_entry_offset;
1964 int i;
1965
1966 if (bios->data[hwsq_offset] <= entry) {
1967 NV_ERROR(drm, "Too few entries in HW sequencer table for "
1968 "requested entry\n");
1969 return -ENOENT;
1970 }
1971
1972 bytes_to_write = bios->data[hwsq_offset + 1];
1973
1974 if (bytes_to_write != 36) {
1975 NV_ERROR(drm, "Unknown HW sequencer entry size\n");
1976 return -EINVAL;
1977 }
1978
1979 NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
1980
1981 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
1982
1983
1984 nv_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1985 bytes_to_write -= 4;
1986
1987
1988 for (i = 0; i < bytes_to_write; i += 4)
1989 nv_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1990
1991
1992 nv_wr32(device, NV_PBUS_DEBUG_4, nv_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
1993
1994 return 0;
1995}
1996
1997static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
1998 struct nvbios *bios)
1999{
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009 const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
2010 const int sz = sizeof(hwsq_signature);
2011 int hwsq_offset;
2012
2013 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
2014 if (!hwsq_offset)
2015 return 0;
2016
2017
2018 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
2019}
2020
2021uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
2022{
2023 struct nouveau_drm *drm = nouveau_drm(dev);
2024 struct nvbios *bios = &drm->vbios;
2025 const uint8_t edid_sig[] = {
2026 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
2027 uint16_t offset = 0;
2028 uint16_t newoffset;
2029 int searchlen = NV_PROM_SIZE;
2030
2031 if (bios->fp.edid)
2032 return bios->fp.edid;
2033
2034 while (searchlen) {
2035 newoffset = findstr(&bios->data[offset], searchlen,
2036 edid_sig, 8);
2037 if (!newoffset)
2038 return NULL;
2039 offset += newoffset;
2040 if (!nv_cksum(&bios->data[offset], EDID1_LEN))
2041 break;
2042
2043 searchlen -= offset;
2044 offset++;
2045 }
2046
2047 NV_INFO(drm, "Found EDID in BIOS\n");
2048
2049 return bios->fp.edid = &bios->data[offset];
2050}
2051
2052static bool NVInitVBIOS(struct drm_device *dev)
2053{
2054 struct nouveau_drm *drm = nouveau_drm(dev);
2055 struct nvbios *bios = &drm->vbios;
2056
2057 memset(bios, 0, sizeof(struct nvbios));
2058 spin_lock_init(&bios->lock);
2059 bios->dev = dev;
2060
2061 bios->data = nouveau_bios(drm->device)->data;
2062 bios->length = nouveau_bios(drm->device)->size;
2063 return true;
2064}
2065
2066static int nouveau_parse_vbios_struct(struct drm_device *dev)
2067{
2068 struct nouveau_drm *drm = nouveau_drm(dev);
2069 struct nvbios *bios = &drm->vbios;
2070 const uint8_t bit_signature[] = { 0xff, 0xb8, 'B', 'I', 'T' };
2071 const uint8_t bmp_signature[] = { 0xff, 0x7f, 'N', 'V', 0x0 };
2072 int offset;
2073
2074 offset = findstr(bios->data, bios->length,
2075 bit_signature, sizeof(bit_signature));
2076 if (offset) {
2077 NV_INFO(drm, "BIT BIOS found\n");
2078 bios->type = NVBIOS_BIT;
2079 bios->offset = offset;
2080 return parse_bit_structure(bios, offset + 6);
2081 }
2082
2083 offset = findstr(bios->data, bios->length,
2084 bmp_signature, sizeof(bmp_signature));
2085 if (offset) {
2086 NV_INFO(drm, "BMP BIOS found\n");
2087 bios->type = NVBIOS_BMP;
2088 bios->offset = offset;
2089 return parse_bmp_structure(dev, bios, offset);
2090 }
2091
2092 NV_ERROR(drm, "No known BIOS signature found\n");
2093 return -ENODEV;
2094}
2095
2096int
2097nouveau_run_vbios_init(struct drm_device *dev)
2098{
2099 struct nouveau_drm *drm = nouveau_drm(dev);
2100 struct nvbios *bios = &drm->vbios;
2101 int ret = 0;
2102
2103
2104 bios->state.crtchead = 0;
2105
2106 if (bios->major_version < 5)
2107 load_nv17_hw_sequencer_ucode(dev, bios);
2108
2109 if (bios->execute) {
2110 bios->fp.last_script_invoc = 0;
2111 bios->fp.lvds_init_run = false;
2112 }
2113
2114 return ret;
2115}
2116
2117static bool
2118nouveau_bios_posted(struct drm_device *dev)
2119{
2120 struct nouveau_drm *drm = nouveau_drm(dev);
2121 unsigned htotal;
2122
2123 if (nv_device(drm->device)->card_type >= NV_50) {
2124 if (NVReadVgaCrtc(dev, 0, 0x00) == 0 &&
2125 NVReadVgaCrtc(dev, 0, 0x1a) == 0)
2126 return false;
2127 return true;
2128 }
2129
2130 htotal = NVReadVgaCrtc(dev, 0, 0x06);
2131 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
2132 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
2133 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
2134 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
2135
2136 return (htotal != 0);
2137}
2138
2139int
2140nouveau_bios_init(struct drm_device *dev)
2141{
2142 struct nouveau_drm *drm = nouveau_drm(dev);
2143 struct nvbios *bios = &drm->vbios;
2144 int ret;
2145
2146 if (!NVInitVBIOS(dev))
2147 return -ENODEV;
2148
2149 ret = nouveau_parse_vbios_struct(dev);
2150 if (ret)
2151 return ret;
2152
2153 ret = parse_dcb_table(dev, bios);
2154 if (ret)
2155 return ret;
2156
2157 if (!bios->major_version)
2158 return 0;
2159
2160
2161 bios->execute = false;
2162
2163
2164 if (!nouveau_bios_posted(dev)) {
2165 NV_INFO(drm, "Adaptor not initialised, "
2166 "running VBIOS init tables.\n");
2167 bios->execute = true;
2168 }
2169
2170 ret = nouveau_run_vbios_init(dev);
2171 if (ret)
2172 return ret;
2173
2174
2175 if (bios->major_version < 5)
2176 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
2177
2178
2179 if (bios->is_mobile || bios->major_version >= 5)
2180 ret = parse_fp_mode_table(dev, bios);
2181
2182
2183 bios->execute = true;
2184
2185 return 0;
2186}
2187
2188void
2189nouveau_bios_takedown(struct drm_device *dev)
2190{
2191}
2192