1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/pci.h>
35#include <linux/kernel.h>
36#include <linux/delay.h>
37#include <linux/stddef.h>
38#include <linux/ioport.h>
39#include <linux/i2c.h>
40#include <linux/slab.h>
41#include <linux/init.h>
42#include <linux/dmi.h>
43#include <linux/acpi.h>
44#include <linux/io.h>
45
46
47
48#define SMBHSTSTS (0 + piix4_smba)
49#define SMBHSLVSTS (1 + piix4_smba)
50#define SMBHSTCNT (2 + piix4_smba)
51#define SMBHSTCMD (3 + piix4_smba)
52#define SMBHSTADD (4 + piix4_smba)
53#define SMBHSTDAT0 (5 + piix4_smba)
54#define SMBHSTDAT1 (6 + piix4_smba)
55#define SMBBLKDAT (7 + piix4_smba)
56#define SMBSLVCNT (8 + piix4_smba)
57#define SMBSHDWCMD (9 + piix4_smba)
58#define SMBSLVEVT (0xA + piix4_smba)
59#define SMBSLVDAT (0xC + piix4_smba)
60
61
62#define SMBIOSIZE 8
63
64
65#define SMBBA 0x090
66#define SMBHSTCFG 0x0D2
67#define SMBSLVC 0x0D3
68#define SMBSHDW1 0x0D4
69#define SMBSHDW2 0x0D5
70#define SMBREV 0x0D6
71
72
73#define MAX_TIMEOUT 500
74#define ENABLE_INT9 0
75
76
77#define PIIX4_QUICK 0x00
78#define PIIX4_BYTE 0x04
79#define PIIX4_BYTE_DATA 0x08
80#define PIIX4_WORD_DATA 0x0C
81#define PIIX4_BLOCK_DATA 0x14
82
83
84
85
86
87static int force;
88module_param (force, int, 0);
89MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
90
91
92
93static int force_addr;
94module_param (force_addr, int, 0);
95MODULE_PARM_DESC(force_addr,
96 "Forcibly enable the PIIX4 at the given address. "
97 "EXTREMELY DANGEROUS!");
98
99static int srvrworks_csb5_delay;
100static struct pci_driver piix4_driver;
101
102static const struct dmi_system_id piix4_dmi_blacklist[] = {
103 {
104 .ident = "Sapphire AM2RD790",
105 .matches = {
106 DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
107 DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
108 },
109 },
110 {
111 .ident = "DFI Lanparty UT 790FX",
112 .matches = {
113 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
114 DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
115 },
116 },
117 { }
118};
119
120
121
122static const struct dmi_system_id piix4_dmi_ibm[] = {
123 {
124 .ident = "IBM",
125 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
126 },
127 { },
128};
129
130struct i2c_piix4_adapdata {
131 unsigned short smba;
132};
133
134static int piix4_setup(struct pci_dev *PIIX4_dev,
135 const struct pci_device_id *id)
136{
137 unsigned char temp;
138 unsigned short piix4_smba;
139
140 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
141 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
142 srvrworks_csb5_delay = 1;
143
144
145
146 if (dmi_check_system(piix4_dmi_blacklist)) {
147 dev_err(&PIIX4_dev->dev,
148 "Accessing the SMBus on this system is unsafe!\n");
149 return -EPERM;
150 }
151
152
153 if (dmi_check_system(piix4_dmi_ibm) &&
154 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
155 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
156 "may corrupt your serial eeprom! Refusing to load "
157 "module!\n");
158 return -EPERM;
159 }
160
161
162 if (force_addr) {
163 piix4_smba = force_addr & 0xfff0;
164 force = 0;
165 } else {
166 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
167 piix4_smba &= 0xfff0;
168 if(piix4_smba == 0) {
169 dev_err(&PIIX4_dev->dev, "SMBus base address "
170 "uninitialized - upgrade BIOS or use "
171 "force_addr=0xaddr\n");
172 return -ENODEV;
173 }
174 }
175
176 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
177 return -ENODEV;
178
179 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
180 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
181 piix4_smba);
182 return -EBUSY;
183 }
184
185 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
186
187
188
189 if (force_addr) {
190 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
191 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
192 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
193 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
194 "new address %04x!\n", piix4_smba);
195 } else if ((temp & 1) == 0) {
196 if (force) {
197
198
199
200
201
202
203
204
205 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
206 temp | 1);
207 dev_notice(&PIIX4_dev->dev,
208 "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
209 } else {
210 dev_err(&PIIX4_dev->dev,
211 "Host SMBus controller not enabled!\n");
212 release_region(piix4_smba, SMBIOSIZE);
213 return -ENODEV;
214 }
215 }
216
217 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
218 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
219 else if ((temp & 0x0E) == 0)
220 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
221 else
222 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
223 "(or code out of date)!\n");
224
225 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
226 dev_info(&PIIX4_dev->dev,
227 "SMBus Host Controller at 0x%x, revision %d\n",
228 piix4_smba, temp);
229
230 return piix4_smba;
231}
232
233static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
234 const struct pci_device_id *id)
235{
236 unsigned short piix4_smba;
237 unsigned short smba_idx = 0xcd6;
238 u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
239
240
241 if (force || force_addr) {
242 dev_err(&PIIX4_dev->dev, "SMBus does not support "
243 "forcing address!\n");
244 return -EINVAL;
245 }
246
247
248 if (!request_region(smba_idx, 2, "smba_idx")) {
249 dev_err(&PIIX4_dev->dev, "SMBus base address index region "
250 "0x%x already in use!\n", smba_idx);
251 return -EBUSY;
252 }
253 outb_p(smb_en, smba_idx);
254 smba_en_lo = inb_p(smba_idx + 1);
255 outb_p(smb_en + 1, smba_idx);
256 smba_en_hi = inb_p(smba_idx + 1);
257 release_region(smba_idx, 2);
258
259 if ((smba_en_lo & 1) == 0) {
260 dev_err(&PIIX4_dev->dev,
261 "Host SMBus controller not enabled!\n");
262 return -ENODEV;
263 }
264
265 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
266 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
267 return -ENODEV;
268
269 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
270 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
271 piix4_smba);
272 return -EBUSY;
273 }
274
275
276 if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
277 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
278 "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
279 release_region(piix4_smba, SMBIOSIZE);
280 return -EBUSY;
281 }
282 i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
283 release_region(piix4_smba + i2ccfg_offset, 1);
284
285 if (i2ccfg & 1)
286 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus.\n");
287 else
288 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus.\n");
289
290 dev_info(&PIIX4_dev->dev,
291 "SMBus Host Controller at 0x%x, revision %d\n",
292 piix4_smba, i2ccfg >> 4);
293
294 return piix4_smba;
295}
296
297static int piix4_setup_aux(struct pci_dev *PIIX4_dev,
298 const struct pci_device_id *id,
299 unsigned short base_reg_addr)
300{
301
302
303
304 unsigned short piix4_smba;
305
306
307 pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba);
308 if ((piix4_smba & 1) == 0) {
309 dev_dbg(&PIIX4_dev->dev,
310 "Auxiliary SMBus controller not enabled\n");
311 return -ENODEV;
312 }
313
314 piix4_smba &= 0xfff0;
315 if (piix4_smba == 0) {
316 dev_dbg(&PIIX4_dev->dev,
317 "Auxiliary SMBus base address uninitialized\n");
318 return -ENODEV;
319 }
320
321 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
322 return -ENODEV;
323
324 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
325 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x "
326 "already in use!\n", piix4_smba);
327 return -EBUSY;
328 }
329
330 dev_info(&PIIX4_dev->dev,
331 "Auxiliary SMBus Host Controller at 0x%x\n",
332 piix4_smba);
333
334 return piix4_smba;
335}
336
337static int piix4_transaction(struct i2c_adapter *piix4_adapter)
338{
339 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
340 unsigned short piix4_smba = adapdata->smba;
341 int temp;
342 int result = 0;
343 int timeout = 0;
344
345 dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
346 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
347 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
348 inb_p(SMBHSTDAT1));
349
350
351 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
352 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
353 "Resetting...\n", temp);
354 outb_p(temp, SMBHSTSTS);
355 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
356 dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
357 return -EBUSY;
358 } else {
359 dev_dbg(&piix4_adapter->dev, "Successful!\n");
360 }
361 }
362
363
364 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
365
366
367 if (srvrworks_csb5_delay)
368 msleep(2);
369 else
370 msleep(1);
371
372 while ((++timeout < MAX_TIMEOUT) &&
373 ((temp = inb_p(SMBHSTSTS)) & 0x01))
374 msleep(1);
375
376
377 if (timeout == MAX_TIMEOUT) {
378 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
379 result = -ETIMEDOUT;
380 }
381
382 if (temp & 0x10) {
383 result = -EIO;
384 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
385 }
386
387 if (temp & 0x08) {
388 result = -EIO;
389 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
390 "locked until next hard reset. (sorry!)\n");
391
392 }
393
394 if (temp & 0x04) {
395 result = -ENXIO;
396 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
397 }
398
399 if (inb_p(SMBHSTSTS) != 0x00)
400 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
401
402 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
403 dev_err(&piix4_adapter->dev, "Failed reset at end of "
404 "transaction (%02x)\n", temp);
405 }
406 dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
407 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
408 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
409 inb_p(SMBHSTDAT1));
410 return result;
411}
412
413
414static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
415 unsigned short flags, char read_write,
416 u8 command, int size, union i2c_smbus_data * data)
417{
418 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
419 unsigned short piix4_smba = adapdata->smba;
420 int i, len;
421 int status;
422
423 switch (size) {
424 case I2C_SMBUS_QUICK:
425 outb_p((addr << 1) | read_write,
426 SMBHSTADD);
427 size = PIIX4_QUICK;
428 break;
429 case I2C_SMBUS_BYTE:
430 outb_p((addr << 1) | read_write,
431 SMBHSTADD);
432 if (read_write == I2C_SMBUS_WRITE)
433 outb_p(command, SMBHSTCMD);
434 size = PIIX4_BYTE;
435 break;
436 case I2C_SMBUS_BYTE_DATA:
437 outb_p((addr << 1) | read_write,
438 SMBHSTADD);
439 outb_p(command, SMBHSTCMD);
440 if (read_write == I2C_SMBUS_WRITE)
441 outb_p(data->byte, SMBHSTDAT0);
442 size = PIIX4_BYTE_DATA;
443 break;
444 case I2C_SMBUS_WORD_DATA:
445 outb_p((addr << 1) | read_write,
446 SMBHSTADD);
447 outb_p(command, SMBHSTCMD);
448 if (read_write == I2C_SMBUS_WRITE) {
449 outb_p(data->word & 0xff, SMBHSTDAT0);
450 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
451 }
452 size = PIIX4_WORD_DATA;
453 break;
454 case I2C_SMBUS_BLOCK_DATA:
455 outb_p((addr << 1) | read_write,
456 SMBHSTADD);
457 outb_p(command, SMBHSTCMD);
458 if (read_write == I2C_SMBUS_WRITE) {
459 len = data->block[0];
460 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
461 return -EINVAL;
462 outb_p(len, SMBHSTDAT0);
463 i = inb_p(SMBHSTCNT);
464 for (i = 1; i <= len; i++)
465 outb_p(data->block[i], SMBBLKDAT);
466 }
467 size = PIIX4_BLOCK_DATA;
468 break;
469 default:
470 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
471 return -EOPNOTSUPP;
472 }
473
474 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
475
476 status = piix4_transaction(adap);
477 if (status)
478 return status;
479
480 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
481 return 0;
482
483
484 switch (size) {
485 case PIIX4_BYTE:
486 case PIIX4_BYTE_DATA:
487 data->byte = inb_p(SMBHSTDAT0);
488 break;
489 case PIIX4_WORD_DATA:
490 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
491 break;
492 case PIIX4_BLOCK_DATA:
493 data->block[0] = inb_p(SMBHSTDAT0);
494 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
495 return -EPROTO;
496 i = inb_p(SMBHSTCNT);
497 for (i = 1; i <= data->block[0]; i++)
498 data->block[i] = inb_p(SMBBLKDAT);
499 break;
500 }
501 return 0;
502}
503
504static u32 piix4_func(struct i2c_adapter *adapter)
505{
506 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
507 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
508 I2C_FUNC_SMBUS_BLOCK_DATA;
509}
510
511static const struct i2c_algorithm smbus_algorithm = {
512 .smbus_xfer = piix4_access,
513 .functionality = piix4_func,
514};
515
516static DEFINE_PCI_DEVICE_TABLE(piix4_ids) = {
517 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
518 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
519 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
520 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
521 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
522 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
523 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
524 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
525 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
526 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
527 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
528 PCI_DEVICE_ID_SERVERWORKS_CSB5) },
529 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
530 PCI_DEVICE_ID_SERVERWORKS_CSB6) },
531 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
532 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
533 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
534 PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
535 { 0, }
536};
537
538MODULE_DEVICE_TABLE (pci, piix4_ids);
539
540static struct i2c_adapter *piix4_main_adapter;
541static struct i2c_adapter *piix4_aux_adapter;
542
543static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
544 struct i2c_adapter **padap)
545{
546 struct i2c_adapter *adap;
547 struct i2c_piix4_adapdata *adapdata;
548 int retval;
549
550 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
551 if (adap == NULL) {
552 release_region(smba, SMBIOSIZE);
553 return -ENOMEM;
554 }
555
556 adap->owner = THIS_MODULE;
557 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
558 adap->algo = &smbus_algorithm;
559
560 adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
561 if (adapdata == NULL) {
562 kfree(adap);
563 release_region(smba, SMBIOSIZE);
564 return -ENOMEM;
565 }
566
567 adapdata->smba = smba;
568
569
570 adap->dev.parent = &dev->dev;
571
572 snprintf(adap->name, sizeof(adap->name),
573 "SMBus PIIX4 adapter at %04x", smba);
574
575 i2c_set_adapdata(adap, adapdata);
576
577 retval = i2c_add_adapter(adap);
578 if (retval) {
579 dev_err(&dev->dev, "Couldn't register adapter!\n");
580 kfree(adapdata);
581 kfree(adap);
582 release_region(smba, SMBIOSIZE);
583 return retval;
584 }
585
586 *padap = adap;
587 return 0;
588}
589
590static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
591{
592 int retval;
593
594 if ((dev->vendor == PCI_VENDOR_ID_ATI &&
595 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
596 dev->revision >= 0x40) ||
597 dev->vendor == PCI_VENDOR_ID_AMD)
598
599 retval = piix4_setup_sb800(dev, id);
600 else
601 retval = piix4_setup(dev, id);
602
603
604 if (retval < 0)
605 return retval;
606
607
608 retval = piix4_add_adapter(dev, retval, &piix4_main_adapter);
609 if (retval < 0)
610 return retval;
611
612
613 if (dev->vendor == PCI_VENDOR_ID_ATI &&
614 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
615 dev->revision < 0x40) {
616 retval = piix4_setup_aux(dev, id, 0x58);
617 if (retval > 0) {
618
619
620 piix4_add_adapter(dev, retval, &piix4_aux_adapter);
621 }
622 }
623
624 return 0;
625}
626
627static void piix4_adap_remove(struct i2c_adapter *adap)
628{
629 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
630
631 if (adapdata->smba) {
632 i2c_del_adapter(adap);
633 release_region(adapdata->smba, SMBIOSIZE);
634 kfree(adapdata);
635 kfree(adap);
636 }
637}
638
639static void piix4_remove(struct pci_dev *dev)
640{
641 if (piix4_main_adapter) {
642 piix4_adap_remove(piix4_main_adapter);
643 piix4_main_adapter = NULL;
644 }
645
646 if (piix4_aux_adapter) {
647 piix4_adap_remove(piix4_aux_adapter);
648 piix4_aux_adapter = NULL;
649 }
650}
651
652static struct pci_driver piix4_driver = {
653 .name = "piix4_smbus",
654 .id_table = piix4_ids,
655 .probe = piix4_probe,
656 .remove = piix4_remove,
657};
658
659module_pci_driver(piix4_driver);
660
661MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
662 "Philip Edelbrock <phil@netroedge.com>");
663MODULE_DESCRIPTION("PIIX4 SMBus driver");
664MODULE_LICENSE("GPL");
665
