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9#include <linux/device.h>
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/spi/spi.h>
13#include <linux/regulator/consumer.h>
14#include <linux/err.h>
15#include <linux/gpio.h>
16#include <linux/module.h>
17
18#include <linux/interrupt.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/buffer.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24
25#include <linux/platform_data/ad7266.h>
26
27struct ad7266_state {
28 struct spi_device *spi;
29 struct regulator *reg;
30 unsigned long vref_uv;
31
32 struct spi_transfer single_xfer[3];
33 struct spi_message single_msg;
34
35 enum ad7266_range range;
36 enum ad7266_mode mode;
37 bool fixed_addr;
38 struct gpio gpios[3];
39
40
41
42
43
44
45
46 uint8_t data[ALIGN(4, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
47};
48
49static int ad7266_wakeup(struct ad7266_state *st)
50{
51
52 return spi_read(st->spi, st->data, 2);
53}
54
55static int ad7266_powerdown(struct ad7266_state *st)
56{
57
58 return spi_read(st->spi, st->data, 1);
59}
60
61static int ad7266_preenable(struct iio_dev *indio_dev)
62{
63 struct ad7266_state *st = iio_priv(indio_dev);
64 int ret;
65
66 ret = ad7266_wakeup(st);
67 if (ret)
68 return ret;
69
70 ret = iio_sw_buffer_preenable(indio_dev);
71 if (ret)
72 ad7266_powerdown(st);
73
74 return ret;
75}
76
77static int ad7266_postdisable(struct iio_dev *indio_dev)
78{
79 struct ad7266_state *st = iio_priv(indio_dev);
80 return ad7266_powerdown(st);
81}
82
83static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
84 .preenable = &ad7266_preenable,
85 .postenable = &iio_triggered_buffer_postenable,
86 .predisable = &iio_triggered_buffer_predisable,
87 .postdisable = &ad7266_postdisable,
88};
89
90static irqreturn_t ad7266_trigger_handler(int irq, void *p)
91{
92 struct iio_poll_func *pf = p;
93 struct iio_dev *indio_dev = pf->indio_dev;
94 struct ad7266_state *st = iio_priv(indio_dev);
95 int ret;
96
97 ret = spi_read(st->spi, st->data, 4);
98 if (ret == 0) {
99 if (indio_dev->scan_timestamp)
100 ((s64 *)st->data)[1] = pf->timestamp;
101 iio_push_to_buffers(indio_dev, (u8 *)st->data);
102 }
103
104 iio_trigger_notify_done(indio_dev->trig);
105
106 return IRQ_HANDLED;
107}
108
109static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
110{
111 unsigned int i;
112
113 if (st->fixed_addr)
114 return;
115
116 switch (st->mode) {
117 case AD7266_MODE_SINGLE_ENDED:
118 nr >>= 1;
119 break;
120 case AD7266_MODE_PSEUDO_DIFF:
121 nr |= 1;
122 break;
123 case AD7266_MODE_DIFF:
124 nr &= ~1;
125 break;
126 }
127
128 for (i = 0; i < 3; ++i)
129 gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
130}
131
132static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
133 const unsigned long *scan_mask)
134{
135 struct ad7266_state *st = iio_priv(indio_dev);
136 unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
137
138 ad7266_select_input(st, nr);
139
140 return 0;
141}
142
143static int ad7266_read_single(struct ad7266_state *st, int *val,
144 unsigned int address)
145{
146 int ret;
147
148 ad7266_select_input(st, address);
149
150 ret = spi_sync(st->spi, &st->single_msg);
151 *val = be16_to_cpu(st->data[address % 2]);
152
153 return ret;
154}
155
156static int ad7266_read_raw(struct iio_dev *indio_dev,
157 struct iio_chan_spec const *chan, int *val, int *val2, long m)
158{
159 struct ad7266_state *st = iio_priv(indio_dev);
160 unsigned long scale_uv;
161 int ret;
162
163 switch (m) {
164 case IIO_CHAN_INFO_RAW:
165 if (iio_buffer_enabled(indio_dev))
166 return -EBUSY;
167
168 ret = ad7266_read_single(st, val, chan->address);
169 if (ret)
170 return ret;
171
172 *val = (*val >> 2) & 0xfff;
173 if (chan->scan_type.sign == 's')
174 *val = sign_extend32(*val, 11);
175
176 return IIO_VAL_INT;
177 case IIO_CHAN_INFO_SCALE:
178 scale_uv = (st->vref_uv * 100);
179 if (st->mode == AD7266_MODE_DIFF)
180 scale_uv *= 2;
181 if (st->range == AD7266_RANGE_2VREF)
182 scale_uv *= 2;
183
184 scale_uv >>= chan->scan_type.realbits;
185 *val = scale_uv / 100000;
186 *val2 = (scale_uv % 100000) * 10;
187 return IIO_VAL_INT_PLUS_MICRO;
188 case IIO_CHAN_INFO_OFFSET:
189 if (st->range == AD7266_RANGE_2VREF &&
190 st->mode != AD7266_MODE_DIFF)
191 *val = 2048;
192 else
193 *val = 0;
194 return IIO_VAL_INT;
195 }
196 return -EINVAL;
197}
198
199#define AD7266_CHAN(_chan, _sign) { \
200 .type = IIO_VOLTAGE, \
201 .indexed = 1, \
202 .channel = (_chan), \
203 .address = (_chan), \
204 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \
205 | IIO_CHAN_INFO_SCALE_SHARED_BIT \
206 | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
207 .scan_index = (_chan), \
208 .scan_type = { \
209 .sign = (_sign), \
210 .realbits = 12, \
211 .storagebits = 16, \
212 .shift = 2, \
213 .endianness = IIO_BE, \
214 }, \
215}
216
217#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
218const struct iio_chan_spec ad7266_channels_##_name[] = { \
219 AD7266_CHAN(0, (_sign)), \
220 AD7266_CHAN(1, (_sign)), \
221 AD7266_CHAN(2, (_sign)), \
222 AD7266_CHAN(3, (_sign)), \
223 AD7266_CHAN(4, (_sign)), \
224 AD7266_CHAN(5, (_sign)), \
225 AD7266_CHAN(6, (_sign)), \
226 AD7266_CHAN(7, (_sign)), \
227 AD7266_CHAN(8, (_sign)), \
228 AD7266_CHAN(9, (_sign)), \
229 AD7266_CHAN(10, (_sign)), \
230 AD7266_CHAN(11, (_sign)), \
231 IIO_CHAN_SOFT_TIMESTAMP(13), \
232}
233
234#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
235const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
236 AD7266_CHAN(0, (_sign)), \
237 AD7266_CHAN(1, (_sign)), \
238 IIO_CHAN_SOFT_TIMESTAMP(2), \
239}
240
241static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
242static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
243static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
244static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
245
246#define AD7266_CHAN_DIFF(_chan, _sign) { \
247 .type = IIO_VOLTAGE, \
248 .indexed = 1, \
249 .channel = (_chan) * 2, \
250 .channel2 = (_chan) * 2 + 1, \
251 .address = (_chan), \
252 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \
253 | IIO_CHAN_INFO_SCALE_SHARED_BIT \
254 | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
255 .scan_index = (_chan), \
256 .scan_type = { \
257 .sign = _sign, \
258 .realbits = 12, \
259 .storagebits = 16, \
260 .shift = 2, \
261 .endianness = IIO_BE, \
262 }, \
263 .differential = 1, \
264}
265
266#define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
267const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
268 AD7266_CHAN_DIFF(0, (_sign)), \
269 AD7266_CHAN_DIFF(1, (_sign)), \
270 AD7266_CHAN_DIFF(2, (_sign)), \
271 AD7266_CHAN_DIFF(3, (_sign)), \
272 AD7266_CHAN_DIFF(4, (_sign)), \
273 AD7266_CHAN_DIFF(5, (_sign)), \
274 IIO_CHAN_SOFT_TIMESTAMP(6), \
275}
276
277static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
278static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
279
280#define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
281const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
282 AD7266_CHAN_DIFF(0, (_sign)), \
283 AD7266_CHAN_DIFF(1, (_sign)), \
284 IIO_CHAN_SOFT_TIMESTAMP(2), \
285}
286
287static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
288static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
289
290static const struct iio_info ad7266_info = {
291 .read_raw = &ad7266_read_raw,
292 .update_scan_mode = &ad7266_update_scan_mode,
293 .driver_module = THIS_MODULE,
294};
295
296static unsigned long ad7266_available_scan_masks[] = {
297 0x003,
298 0x00c,
299 0x030,
300 0x0c0,
301 0x300,
302 0xc00,
303 0x000,
304};
305
306static unsigned long ad7266_available_scan_masks_diff[] = {
307 0x003,
308 0x00c,
309 0x030,
310 0x000,
311};
312
313static unsigned long ad7266_available_scan_masks_fixed[] = {
314 0x003,
315 0x000,
316};
317
318struct ad7266_chan_info {
319 const struct iio_chan_spec *channels;
320 unsigned int num_channels;
321 unsigned long *scan_masks;
322};
323
324#define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
325 (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
326
327static const struct ad7266_chan_info ad7266_chan_infos[] = {
328 [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
329 .channels = ad7266_channels_u,
330 .num_channels = ARRAY_SIZE(ad7266_channels_u),
331 .scan_masks = ad7266_available_scan_masks,
332 },
333 [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
334 .channels = ad7266_channels_u_fixed,
335 .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
336 .scan_masks = ad7266_available_scan_masks_fixed,
337 },
338 [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
339 .channels = ad7266_channels_s,
340 .num_channels = ARRAY_SIZE(ad7266_channels_s),
341 .scan_masks = ad7266_available_scan_masks,
342 },
343 [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
344 .channels = ad7266_channels_s_fixed,
345 .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
346 .scan_masks = ad7266_available_scan_masks_fixed,
347 },
348 [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
349 .channels = ad7266_channels_diff_u,
350 .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
351 .scan_masks = ad7266_available_scan_masks_diff,
352 },
353 [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
354 .channels = ad7266_channels_diff_fixed_u,
355 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
356 .scan_masks = ad7266_available_scan_masks_fixed,
357 },
358 [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
359 .channels = ad7266_channels_diff_s,
360 .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
361 .scan_masks = ad7266_available_scan_masks_diff,
362 },
363 [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
364 .channels = ad7266_channels_diff_fixed_s,
365 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
366 .scan_masks = ad7266_available_scan_masks_fixed,
367 },
368};
369
370static void ad7266_init_channels(struct iio_dev *indio_dev)
371{
372 struct ad7266_state *st = iio_priv(indio_dev);
373 bool is_differential, is_signed;
374 const struct ad7266_chan_info *chan_info;
375 int i;
376
377 is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
378 is_signed = (st->range == AD7266_RANGE_2VREF) |
379 (st->mode == AD7266_MODE_DIFF);
380
381 i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
382 chan_info = &ad7266_chan_infos[i];
383
384 indio_dev->channels = chan_info->channels;
385 indio_dev->num_channels = chan_info->num_channels;
386 indio_dev->available_scan_masks = chan_info->scan_masks;
387 indio_dev->masklength = chan_info->num_channels - 1;
388}
389
390static const char * const ad7266_gpio_labels[] = {
391 "AD0", "AD1", "AD2",
392};
393
394static int ad7266_probe(struct spi_device *spi)
395{
396 struct ad7266_platform_data *pdata = spi->dev.platform_data;
397 struct iio_dev *indio_dev;
398 struct ad7266_state *st;
399 unsigned int i;
400 int ret;
401
402 indio_dev = iio_device_alloc(sizeof(*st));
403 if (indio_dev == NULL)
404 return -ENOMEM;
405
406 st = iio_priv(indio_dev);
407
408 st->reg = regulator_get(&spi->dev, "vref");
409 if (!IS_ERR_OR_NULL(st->reg)) {
410 ret = regulator_enable(st->reg);
411 if (ret)
412 goto error_put_reg;
413
414 ret = regulator_get_voltage(st->reg);
415 if (ret < 0)
416 goto error_disable_reg;
417
418 st->vref_uv = ret;
419 } else {
420
421 st->vref_uv = 2500000;
422 }
423
424 if (pdata) {
425 st->fixed_addr = pdata->fixed_addr;
426 st->mode = pdata->mode;
427 st->range = pdata->range;
428
429 if (!st->fixed_addr) {
430 for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
431 st->gpios[i].gpio = pdata->addr_gpios[i];
432 st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
433 st->gpios[i].label = ad7266_gpio_labels[i];
434 }
435 ret = gpio_request_array(st->gpios,
436 ARRAY_SIZE(st->gpios));
437 if (ret)
438 goto error_disable_reg;
439 }
440 } else {
441 st->fixed_addr = true;
442 st->range = AD7266_RANGE_VREF;
443 st->mode = AD7266_MODE_DIFF;
444 }
445
446 spi_set_drvdata(spi, indio_dev);
447 st->spi = spi;
448
449 indio_dev->dev.parent = &spi->dev;
450 indio_dev->name = spi_get_device_id(spi)->name;
451 indio_dev->modes = INDIO_DIRECT_MODE;
452 indio_dev->info = &ad7266_info;
453
454 ad7266_init_channels(indio_dev);
455
456
457 st->single_xfer[0].rx_buf = &st->data;
458 st->single_xfer[0].len = 2;
459 st->single_xfer[0].cs_change = 1;
460
461 st->single_xfer[1].rx_buf = &st->data;
462 st->single_xfer[1].len = 4;
463 st->single_xfer[1].cs_change = 1;
464
465 st->single_xfer[2].tx_buf = &st->data;
466 st->single_xfer[2].len = 1;
467
468 spi_message_init(&st->single_msg);
469 spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
470 spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
471 spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
472
473 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
474 &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
475 if (ret)
476 goto error_free_gpios;
477
478 ret = iio_device_register(indio_dev);
479 if (ret)
480 goto error_buffer_cleanup;
481
482 return 0;
483
484error_buffer_cleanup:
485 iio_triggered_buffer_cleanup(indio_dev);
486error_free_gpios:
487 if (!st->fixed_addr)
488 gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
489error_disable_reg:
490 if (!IS_ERR_OR_NULL(st->reg))
491 regulator_disable(st->reg);
492error_put_reg:
493 if (!IS_ERR_OR_NULL(st->reg))
494 regulator_put(st->reg);
495
496 iio_device_free(indio_dev);
497
498 return ret;
499}
500
501static int ad7266_remove(struct spi_device *spi)
502{
503 struct iio_dev *indio_dev = spi_get_drvdata(spi);
504 struct ad7266_state *st = iio_priv(indio_dev);
505
506 iio_device_unregister(indio_dev);
507 iio_triggered_buffer_cleanup(indio_dev);
508 if (!st->fixed_addr)
509 gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
510 if (!IS_ERR_OR_NULL(st->reg)) {
511 regulator_disable(st->reg);
512 regulator_put(st->reg);
513 }
514 iio_device_free(indio_dev);
515
516 return 0;
517}
518
519static const struct spi_device_id ad7266_id[] = {
520 {"ad7265", 0},
521 {"ad7266", 0},
522 { }
523};
524MODULE_DEVICE_TABLE(spi, ad7266_id);
525
526static struct spi_driver ad7266_driver = {
527 .driver = {
528 .name = "ad7266",
529 .owner = THIS_MODULE,
530 },
531 .probe = ad7266_probe,
532 .remove = ad7266_remove,
533 .id_table = ad7266_id,
534};
535module_spi_driver(ad7266_driver);
536
537MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
538MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
539MODULE_LICENSE("GPL v2");
540
