LXR linux/drivers/pci/hotplug/cpqphp.h

   1/*
   2 * Compaq Hot Plug Controller Driver
   3 *
   4 * Copyright (C) 1995,2001 Compaq Computer Corporation
   5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6 * Copyright (C) 2001 IBM
   7 *
   8 * All rights reserved.
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation; either version 2 of the License, or (at
  13 * your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful, but
  16 * WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18 * NON INFRINGEMENT.  See the GNU General Public License for more
  19 * details.
  20 *
  21 * You should have received a copy of the GNU General Public License
  22 * along with this program; if not, write to the Free Software
  23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24 *
  25 * Send feedback to <greg@kroah.com>
  26 *
  27 */
  28#ifndef _CPQPHP_H
  29#define _CPQPHP_H
  30
  31#include <linux/interrupt.h>
  32#include <asm/io.h>             /* for read? and write? functions */
  33#include <linux/delay.h>        /* for delays */
  34#include <linux/mutex.h>
  35#include <linux/sched.h>        /* for signal_pending() */
  36
  37#define MY_NAME "cpqphp"
  38
  39#define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt , MY_NAME , ## arg); } while (0)
  40#define err(format, arg...) printk(KERN_ERR "%s: " format , MY_NAME , ## arg)
  41#define info(format, arg...) printk(KERN_INFO "%s: " format , MY_NAME , ## arg)
  42#define warn(format, arg...) printk(KERN_WARNING "%s: " format , MY_NAME , ## arg)
  43
  44
  45
  46struct smbios_system_slot {
  47        u8 type;
  48        u8 length;
  49        u16 handle;
  50        u8 name_string_num;
  51        u8 slot_type;
  52        u8 slot_width;
  53        u8 slot_current_usage;
  54        u8 slot_length;
  55        u16 slot_number;
  56        u8 properties1;
  57        u8 properties2;
  58} __attribute__ ((packed));
  59
  60/* offsets to the smbios generic type based on the above structure layout */
  61enum smbios_system_slot_offsets {
  62        SMBIOS_SLOT_GENERIC_TYPE =      offsetof(struct smbios_system_slot, type),
  63        SMBIOS_SLOT_GENERIC_LENGTH =    offsetof(struct smbios_system_slot, length),
  64        SMBIOS_SLOT_GENERIC_HANDLE =    offsetof(struct smbios_system_slot, handle),
  65        SMBIOS_SLOT_NAME_STRING_NUM =   offsetof(struct smbios_system_slot, name_string_num),
  66        SMBIOS_SLOT_TYPE =              offsetof(struct smbios_system_slot, slot_type),
  67        SMBIOS_SLOT_WIDTH =             offsetof(struct smbios_system_slot, slot_width),
  68        SMBIOS_SLOT_CURRENT_USAGE =     offsetof(struct smbios_system_slot, slot_current_usage),
  69        SMBIOS_SLOT_LENGTH =            offsetof(struct smbios_system_slot, slot_length),
  70        SMBIOS_SLOT_NUMBER =            offsetof(struct smbios_system_slot, slot_number),
  71        SMBIOS_SLOT_PROPERTIES1 =       offsetof(struct smbios_system_slot, properties1),
  72        SMBIOS_SLOT_PROPERTIES2 =       offsetof(struct smbios_system_slot, properties2),
  73};
  74
  75struct smbios_generic {
  76        u8 type;
  77        u8 length;
  78        u16 handle;
  79} __attribute__ ((packed));
  80
  81/* offsets to the smbios generic type based on the above structure layout */
  82enum smbios_generic_offsets {
  83        SMBIOS_GENERIC_TYPE =   offsetof(struct smbios_generic, type),
  84        SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
  85        SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
  86};
  87
  88struct smbios_entry_point {
  89        char anchor[4];
  90        u8 ep_checksum;
  91        u8 ep_length;
  92        u8 major_version;
  93        u8 minor_version;
  94        u16 max_size_entry;
  95        u8 ep_rev;
  96        u8 reserved[5];
  97        char int_anchor[5];
  98        u8 int_checksum;
  99        u16 st_length;
 100        u32 st_address;
 101        u16 number_of_entrys;
 102        u8 bcd_rev;
 103} __attribute__ ((packed));
 104
 105/* offsets to the smbios entry point based on the above structure layout */
 106enum smbios_entry_point_offsets {
 107        ANCHOR =                offsetof(struct smbios_entry_point, anchor[0]),
 108        EP_CHECKSUM =           offsetof(struct smbios_entry_point, ep_checksum),
 109        EP_LENGTH =             offsetof(struct smbios_entry_point, ep_length),
 110        MAJOR_VERSION =         offsetof(struct smbios_entry_point, major_version),
 111        MINOR_VERSION =         offsetof(struct smbios_entry_point, minor_version),
 112        MAX_SIZE_ENTRY =        offsetof(struct smbios_entry_point, max_size_entry),
 113        EP_REV =                offsetof(struct smbios_entry_point, ep_rev),
 114        INT_ANCHOR =            offsetof(struct smbios_entry_point, int_anchor[0]),
 115        INT_CHECKSUM =          offsetof(struct smbios_entry_point, int_checksum),
 116        ST_LENGTH =             offsetof(struct smbios_entry_point, st_length),
 117        ST_ADDRESS =            offsetof(struct smbios_entry_point, st_address),
 118        NUMBER_OF_ENTRYS =      offsetof(struct smbios_entry_point, number_of_entrys),
 119        BCD_REV =               offsetof(struct smbios_entry_point, bcd_rev),
 120};
 121
 122struct ctrl_reg {                       /* offset */
 123        u8      slot_RST;               /* 0x00 */
 124        u8      slot_enable;            /* 0x01 */
 125        u16     misc;                   /* 0x02 */
 126        u32     led_control;            /* 0x04 */
 127        u32     int_input_clear;        /* 0x08 */
 128        u32     int_mask;               /* 0x0a */
 129        u8      reserved0;              /* 0x10 */
 130        u8      reserved1;              /* 0x11 */
 131        u8      reserved2;              /* 0x12 */
 132        u8      gen_output_AB;          /* 0x13 */
 133        u32     non_int_input;          /* 0x14 */
 134        u32     reserved3;              /* 0x18 */
 135        u32     reserved4;              /* 0x1a */
 136        u32     reserved5;              /* 0x20 */
 137        u8      reserved6;              /* 0x24 */
 138        u8      reserved7;              /* 0x25 */
 139        u16     reserved8;              /* 0x26 */
 140        u8      slot_mask;              /* 0x28 */
 141        u8      reserved9;              /* 0x29 */
 142        u8      reserved10;             /* 0x2a */
 143        u8      reserved11;             /* 0x2b */
 144        u8      slot_SERR;              /* 0x2c */
 145        u8      slot_power;             /* 0x2d */
 146        u8      reserved12;             /* 0x2e */
 147        u8      reserved13;             /* 0x2f */
 148        u8      next_curr_freq;         /* 0x30 */
 149        u8      reset_freq_mode;        /* 0x31 */
 150} __attribute__ ((packed));
 151
 152/* offsets to the controller registers based on the above structure layout */
 153enum ctrl_offsets {
 154        SLOT_RST =              offsetof(struct ctrl_reg, slot_RST),
 155        SLOT_ENABLE =           offsetof(struct ctrl_reg, slot_enable),
 156        MISC =                  offsetof(struct ctrl_reg, misc),
 157        LED_CONTROL =           offsetof(struct ctrl_reg, led_control),
 158        INT_INPUT_CLEAR =       offsetof(struct ctrl_reg, int_input_clear),
 159        INT_MASK =              offsetof(struct ctrl_reg, int_mask),
 160        CTRL_RESERVED0 =        offsetof(struct ctrl_reg, reserved0),
 161        CTRL_RESERVED1 =        offsetof(struct ctrl_reg, reserved1),
 162        CTRL_RESERVED2 =        offsetof(struct ctrl_reg, reserved1),
 163        GEN_OUTPUT_AB =         offsetof(struct ctrl_reg, gen_output_AB),
 164        NON_INT_INPUT =         offsetof(struct ctrl_reg, non_int_input),
 165        CTRL_RESERVED3 =        offsetof(struct ctrl_reg, reserved3),
 166        CTRL_RESERVED4 =        offsetof(struct ctrl_reg, reserved4),
 167        CTRL_RESERVED5 =        offsetof(struct ctrl_reg, reserved5),
 168        CTRL_RESERVED6 =        offsetof(struct ctrl_reg, reserved6),
 169        CTRL_RESERVED7 =        offsetof(struct ctrl_reg, reserved7),
 170        CTRL_RESERVED8 =        offsetof(struct ctrl_reg, reserved8),
 171        SLOT_MASK =             offsetof(struct ctrl_reg, slot_mask),
 172        CTRL_RESERVED9 =        offsetof(struct ctrl_reg, reserved9),
 173        CTRL_RESERVED10 =       offsetof(struct ctrl_reg, reserved10),
 174        CTRL_RESERVED11 =       offsetof(struct ctrl_reg, reserved11),
 175        SLOT_SERR =             offsetof(struct ctrl_reg, slot_SERR),
 176        SLOT_POWER =            offsetof(struct ctrl_reg, slot_power),
 177        NEXT_CURR_FREQ =        offsetof(struct ctrl_reg, next_curr_freq),
 178        RESET_FREQ_MODE =       offsetof(struct ctrl_reg, reset_freq_mode),
 179};
 180
 181struct hrt {
 182        char sig0;
 183        char sig1;
 184        char sig2;
 185        char sig3;
 186        u16 unused_IRQ;
 187        u16 PCIIRQ;
 188        u8 number_of_entries;
 189        u8 revision;
 190        u16 reserved1;
 191        u32 reserved2;
 192} __attribute__ ((packed));
 193
 194/* offsets to the hotplug resource table registers based on the above
 195 * structure layout
 196 */
 197enum hrt_offsets {
 198        SIG0 =                  offsetof(struct hrt, sig0),
 199        SIG1 =                  offsetof(struct hrt, sig1),
 200        SIG2 =                  offsetof(struct hrt, sig2),
 201        SIG3 =                  offsetof(struct hrt, sig3),
 202        UNUSED_IRQ =            offsetof(struct hrt, unused_IRQ),
 203        PCIIRQ =                offsetof(struct hrt, PCIIRQ),
 204        NUMBER_OF_ENTRIES =     offsetof(struct hrt, number_of_entries),
 205        REVISION =              offsetof(struct hrt, revision),
 206        HRT_RESERVED1 =         offsetof(struct hrt, reserved1),
 207        HRT_RESERVED2 =         offsetof(struct hrt, reserved2),
 208};
 209
 210struct slot_rt {
 211        u8 dev_func;
 212        u8 primary_bus;
 213        u8 secondary_bus;
 214        u8 max_bus;
 215        u16 io_base;
 216        u16 io_length;
 217        u16 mem_base;
 218        u16 mem_length;
 219        u16 pre_mem_base;
 220        u16 pre_mem_length;
 221} __attribute__ ((packed));
 222
 223/* offsets to the hotplug slot resource table registers based on the above
 224 * structure layout
 225 */
 226enum slot_rt_offsets {
 227        DEV_FUNC =              offsetof(struct slot_rt, dev_func),
 228        PRIMARY_BUS =           offsetof(struct slot_rt, primary_bus),
 229        SECONDARY_BUS =         offsetof(struct slot_rt, secondary_bus),
 230        MAX_BUS =               offsetof(struct slot_rt, max_bus),
 231        IO_BASE =               offsetof(struct slot_rt, io_base),
 232        IO_LENGTH =             offsetof(struct slot_rt, io_length),
 233        MEM_BASE =              offsetof(struct slot_rt, mem_base),
 234        MEM_LENGTH =            offsetof(struct slot_rt, mem_length),
 235        PRE_MEM_BASE =          offsetof(struct slot_rt, pre_mem_base),
 236        PRE_MEM_LENGTH =        offsetof(struct slot_rt, pre_mem_length),
 237};
 238
 239struct pci_func {
 240        struct pci_func *next;
 241        u8 bus;
 242        u8 device;
 243        u8 function;
 244        u8 is_a_board;
 245        u16 status;
 246        u8 configured;
 247        u8 switch_save;
 248        u8 presence_save;
 249        u32 base_length[0x06];
 250        u8 base_type[0x06];
 251        u16 reserved2;
 252        u32 config_space[0x20];
 253        struct pci_resource *mem_head;
 254        struct pci_resource *p_mem_head;
 255        struct pci_resource *io_head;
 256        struct pci_resource *bus_head;
 257        struct timer_list *p_task_event;
 258        struct pci_dev* pci_dev;
 259};
 260
 261struct slot {
 262        struct slot *next;
 263        u8 bus;
 264        u8 device;
 265        u8 number;
 266        u8 is_a_board;
 267        u8 configured;
 268        u8 state;
 269        u8 switch_save;
 270        u8 presence_save;
 271        u32 capabilities;
 272        u16 reserved2;
 273        struct timer_list task_event;
 274        u8 hp_slot;
 275        struct controller *ctrl;
 276        void __iomem *p_sm_slot;
 277        struct hotplug_slot *hotplug_slot;
 278};
 279
 280struct pci_resource {
 281        struct pci_resource * next;
 282        u32 base;
 283        u32 length;
 284};
 285
 286struct event_info {
 287        u32 event_type;
 288        u8 hp_slot;
 289};
 290
 291struct controller {
 292        struct controller *next;
 293        u32 ctrl_int_comp;
 294        struct mutex crit_sect; /* critical section mutex */
 295        void __iomem *hpc_reg;  /* cookie for our pci controller location */
 296        struct pci_resource *mem_head;
 297        struct pci_resource *p_mem_head;
 298        struct pci_resource *io_head;
 299        struct pci_resource *bus_head;
 300        struct pci_dev *pci_dev;
 301        struct pci_bus *pci_bus;
 302        struct event_info event_queue[10];
 303        struct slot *slot;
 304        u8 next_event;
 305        u8 interrupt;
 306        u8 cfgspc_irq;
 307        u8 bus;                 /* bus number for the pci hotplug controller */
 308        u8 rev;
 309        u8 slot_device_offset;
 310        u8 first_slot;
 311        u8 add_support;
 312        u8 push_flag;
 313        u8 push_button;                 /* 0 = no pushbutton, 1 = pushbutton present */
 314        u8 slot_switch_type;            /* 0 = no switch, 1 = switch present */
 315        u8 defeature_PHP;               /* 0 = PHP not supported, 1 = PHP supported */
 316        u8 alternate_base_address;      /* 0 = not supported, 1 = supported */
 317        u8 pci_config_space;            /* Index/data access to working registers 0 = not supported, 1 = supported */
 318        u8 pcix_speed_capability;       /* PCI-X */
 319        u8 pcix_support;                /* PCI-X */
 320        u16 vendor_id;
 321        struct work_struct int_task_event;
 322        wait_queue_head_t queue;        /* sleep & wake process */
 323        struct dentry *dentry;          /* debugfs dentry */
 324};
 325
 326struct irq_mapping {
 327        u8 barber_pole;
 328        u8 valid_INT;
 329        u8 interrupt[4];
 330};
 331
 332struct resource_lists {
 333        struct pci_resource *mem_head;
 334        struct pci_resource *p_mem_head;
 335        struct pci_resource *io_head;
 336        struct pci_resource *bus_head;
 337        struct irq_mapping *irqs;
 338};
 339
 340#define ROM_PHY_ADDR                    0x0F0000
 341#define ROM_PHY_LEN                     0x00ffff
 342
 343#define PCI_HPC_ID                      0xA0F7
 344#define PCI_SUB_HPC_ID                  0xA2F7
 345#define PCI_SUB_HPC_ID2                 0xA2F8
 346#define PCI_SUB_HPC_ID3                 0xA2F9
 347#define PCI_SUB_HPC_ID_INTC             0xA2FA
 348#define PCI_SUB_HPC_ID4                 0xA2FD
 349
 350#define INT_BUTTON_IGNORE               0
 351#define INT_PRESENCE_ON                 1
 352#define INT_PRESENCE_OFF                2
 353#define INT_SWITCH_CLOSE                3
 354#define INT_SWITCH_OPEN                 4
 355#define INT_POWER_FAULT                 5
 356#define INT_POWER_FAULT_CLEAR           6
 357#define INT_BUTTON_PRESS                7
 358#define INT_BUTTON_RELEASE              8
 359#define INT_BUTTON_CANCEL               9
 360
 361#define STATIC_STATE                    0
 362#define BLINKINGON_STATE                1
 363#define BLINKINGOFF_STATE               2
 364#define POWERON_STATE                   3
 365#define POWEROFF_STATE                  4
 366
 367#define PCISLOT_INTERLOCK_CLOSED        0x00000001
 368#define PCISLOT_ADAPTER_PRESENT         0x00000002
 369#define PCISLOT_POWERED                 0x00000004
 370#define PCISLOT_66_MHZ_OPERATION        0x00000008
 371#define PCISLOT_64_BIT_OPERATION        0x00000010
 372#define PCISLOT_REPLACE_SUPPORTED       0x00000020
 373#define PCISLOT_ADD_SUPPORTED           0x00000040
 374#define PCISLOT_INTERLOCK_SUPPORTED     0x00000080
 375#define PCISLOT_66_MHZ_SUPPORTED        0x00000100
 376#define PCISLOT_64_BIT_SUPPORTED        0x00000200
 377
 378#define PCI_TO_PCI_BRIDGE_CLASS         0x00060400
 379
 380#define INTERLOCK_OPEN                  0x00000002
 381#define ADD_NOT_SUPPORTED               0x00000003
 382#define CARD_FUNCTIONING                0x00000005
 383#define ADAPTER_NOT_SAME                0x00000006
 384#define NO_ADAPTER_PRESENT              0x00000009
 385#define NOT_ENOUGH_RESOURCES            0x0000000B
 386#define DEVICE_TYPE_NOT_SUPPORTED       0x0000000C
 387#define POWER_FAILURE                   0x0000000E
 388
 389#define REMOVE_NOT_SUPPORTED            0x00000003
 390
 391
 392/*
 393 * error Messages
 394 */
 395#define msg_initialization_err  "Initialization failure, error=%d\n"
 396#define msg_HPC_rev_error       "Unsupported revision of the PCI hot plug controller found.\n"
 397#define msg_HPC_non_compaq_or_intel     "The PCI hot plug controller is not supported by this driver.\n"
 398#define msg_HPC_not_supported   "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
 399#define msg_unable_to_save      "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
 400#define msg_button_on           "PCI slot #%d - powering on due to button press.\n"
 401#define msg_button_off          "PCI slot #%d - powering off due to button press.\n"
 402#define msg_button_cancel       "PCI slot #%d - action canceled due to button press.\n"
 403#define msg_button_ignore       "PCI slot #%d - button press ignored.  (action in progress...)\n"
 404
 405
 406/* debugfs functions for the hotplug controller info */
 407extern void cpqhp_initialize_debugfs(void);
 408extern void cpqhp_shutdown_debugfs(void);
 409extern void cpqhp_create_debugfs_files(struct controller *ctrl);
 410extern void cpqhp_remove_debugfs_files(struct controller *ctrl);
 411
 412/* controller functions */
 413extern void cpqhp_pushbutton_thread(unsigned long event_pointer);
 414extern irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data);
 415extern int cpqhp_find_available_resources(struct controller *ctrl,
 416                                          void __iomem *rom_start);
 417extern int cpqhp_event_start_thread(void);
 418extern void cpqhp_event_stop_thread(void);
 419extern struct pci_func *cpqhp_slot_create(unsigned char busnumber);
 420extern struct pci_func *cpqhp_slot_find(unsigned char bus, unsigned char device,
 421                                        unsigned char index);
 422extern int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func);
 423extern int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func);
 424extern int cpqhp_hardware_test(struct controller *ctrl, int test_num);
 425
 426/* resource functions */
 427extern int      cpqhp_resource_sort_and_combine (struct pci_resource **head);
 428
 429/* pci functions */
 430extern int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
 431extern int cpqhp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num,
 432                             u8 slot);
 433extern int cpqhp_save_config(struct controller *ctrl, int busnumber,
 434                             int is_hot_plug);
 435extern int cpqhp_save_base_addr_length(struct controller *ctrl,
 436                                       struct pci_func *func);
 437extern int cpqhp_save_used_resources(struct controller *ctrl,
 438                                     struct pci_func *func);
 439extern int cpqhp_configure_board(struct controller *ctrl,
 440                                 struct pci_func *func);
 441extern int cpqhp_save_slot_config(struct controller *ctrl,
 442                                  struct pci_func *new_slot);
 443extern int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func);
 444extern void cpqhp_destroy_board_resources(struct pci_func *func);
 445extern int cpqhp_return_board_resources (struct pci_func *func,
 446                                         struct resource_lists *resources);
 447extern void cpqhp_destroy_resource_list(struct resource_lists *resources);
 448extern int cpqhp_configure_device(struct controller *ctrl,
 449                                  struct pci_func *func);
 450extern int cpqhp_unconfigure_device(struct pci_func *func);
 451
 452/* Global variables */
 453extern int cpqhp_debug;
 454extern int cpqhp_legacy_mode;
 455extern struct controller *cpqhp_ctrl_list;
 456extern struct pci_func *cpqhp_slot_list[256];
 457extern struct irq_routing_table *cpqhp_routing_table;
 458
 459/* these can be gotten rid of, but for debugging they are purty */
 460extern u8 cpqhp_nic_irq;
 461extern u8 cpqhp_disk_irq;
 462
 463
 464/* inline functions */
 465
 466static inline const char *slot_name(struct slot *slot)
 467{
 468        return hotplug_slot_name(slot->hotplug_slot);
 469}
 470
 471/*
 472 * return_resource
 473 *
 474 * Puts node back in the resource list pointed to by head
 475 */
 476static inline void return_resource(struct pci_resource **head,
 477                                   struct pci_resource *node)
 478{
 479        if (!node || !head)
 480                return;
 481        node->next = *head;
 482        *head = node;
 483}
 484
 485static inline void set_SOGO(struct controller *ctrl)
 486{
 487        u16 misc;
 488
 489        misc = readw(ctrl->hpc_reg + MISC);
 490        misc = (misc | 0x0001) & 0xFFFB;
 491        writew(misc, ctrl->hpc_reg + MISC);
 492}
 493
 494
 495static inline void amber_LED_on(struct controller *ctrl, u8 slot)
 496{
 497        u32 led_control;
 498
 499        led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 500        led_control |= (0x01010000L << slot);
 501        writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 502}
 503
 504
 505static inline void amber_LED_off(struct controller *ctrl, u8 slot)
 506{
 507        u32 led_control;
 508
 509        led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 510        led_control &= ~(0x01010000L << slot);
 511        writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 512}
 513
 514
 515static inline int read_amber_LED(struct controller *ctrl, u8 slot)
 516{
 517        u32 led_control;
 518
 519        led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 520        led_control &= (0x01010000L << slot);
 521
 522        return led_control ? 1 : 0;
 523}
 524
 525
 526static inline void green_LED_on(struct controller *ctrl, u8 slot)
 527{
 528        u32 led_control;
 529
 530        led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 531        led_control |= 0x0101L << slot;
 532        writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 533}
 534
 535static inline void green_LED_off(struct controller *ctrl, u8 slot)
 536{
 537        u32 led_control;
 538
 539        led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 540        led_control &= ~(0x0101L << slot);
 541        writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 542}
 543
 544
 545static inline void green_LED_blink(struct controller *ctrl, u8 slot)
 546{
 547        u32 led_control;
 548
 549        led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 550        led_control &= ~(0x0101L << slot);
 551        led_control |= (0x0001L << slot);
 552        writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 553}
 554
 555
 556static inline void slot_disable(struct controller *ctrl, u8 slot)
 557{
 558        u8 slot_enable;
 559
 560        slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
 561        slot_enable &= ~(0x01 << slot);
 562        writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
 563}
 564
 565
 566static inline void slot_enable(struct controller *ctrl, u8 slot)
 567{
 568        u8 slot_enable;
 569
 570        slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
 571        slot_enable |= (0x01 << slot);
 572        writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
 573}
 574
 575
 576static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
 577{
 578        u8 slot_enable;
 579
 580        slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
 581        slot_enable &= (0x01 << slot);
 582        return slot_enable ? 1 : 0;
 583}
 584
 585
 586static inline u8 read_slot_enable(struct controller *ctrl)
 587{
 588        return readb(ctrl->hpc_reg + SLOT_ENABLE);
 589}
 590
 591
 592/**
 593 * get_controller_speed - find the current frequency/mode of controller.
 594 *
 595 * @ctrl: controller to get frequency/mode for.
 596 *
 597 * Returns controller speed.
 598 */
 599static inline u8 get_controller_speed(struct controller *ctrl)
 600{
 601        u8 curr_freq;
 602        u16 misc;
 603
 604        if (ctrl->pcix_support) {
 605                curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
 606                if ((curr_freq & 0xB0) == 0xB0)
 607                        return PCI_SPEED_133MHz_PCIX;
 608                if ((curr_freq & 0xA0) == 0xA0)
 609                        return PCI_SPEED_100MHz_PCIX;
 610                if ((curr_freq & 0x90) == 0x90)
 611                        return PCI_SPEED_66MHz_PCIX;
 612                if (curr_freq & 0x10)
 613                        return PCI_SPEED_66MHz;
 614
 615                return PCI_SPEED_33MHz;
 616        }
 617
 618        misc = readw(ctrl->hpc_reg + MISC);
 619        return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
 620}
 621
 622
 623/**
 624 * get_adapter_speed - find the max supported frequency/mode of adapter.
 625 *
 626 * @ctrl: hotplug controller.
 627 * @hp_slot: hotplug slot where adapter is installed.
 628 *
 629 * Returns adapter speed.
 630 */
 631static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
 632{
 633        u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
 634        dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
 635        if (ctrl->pcix_support) {
 636                if (temp_dword & (0x10000 << hp_slot))
 637                        return PCI_SPEED_133MHz_PCIX;
 638                if (temp_dword & (0x100 << hp_slot))
 639                        return PCI_SPEED_66MHz_PCIX;
 640        }
 641
 642        if (temp_dword & (0x01 << hp_slot))
 643                return PCI_SPEED_66MHz;
 644
 645        return PCI_SPEED_33MHz;
 646}
 647
 648static inline void enable_slot_power(struct controller *ctrl, u8 slot)
 649{
 650        u8 slot_power;
 651
 652        slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
 653        slot_power |= (0x01 << slot);
 654        writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
 655}
 656
 657static inline void disable_slot_power(struct controller *ctrl, u8 slot)
 658{
 659        u8 slot_power;
 660
 661        slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
 662        slot_power &= ~(0x01 << slot);
 663        writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
 664}
 665
 666
 667static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
 668{
 669        u8 hp_slot;
 670
 671        hp_slot = slot->device - ctrl->slot_device_offset;
 672
 673        return read_amber_LED(ctrl, hp_slot);
 674}
 675
 676
 677static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
 678{
 679        u8 hp_slot;
 680
 681        hp_slot = slot->device - ctrl->slot_device_offset;
 682
 683        return is_slot_enabled(ctrl, hp_slot);
 684}
 685
 686
 687static inline int cpq_get_latch_status(struct controller *ctrl,
 688                                       struct slot *slot)
 689{
 690        u32 status;
 691        u8 hp_slot;
 692
 693        hp_slot = slot->device - ctrl->slot_device_offset;
 694        dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d \n",
 695            __func__, slot->device, ctrl->slot_device_offset);
 696
 697        status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
 698
 699        return(status == 0) ? 1 : 0;
 700}
 701
 702
 703static inline int get_presence_status(struct controller *ctrl,
 704                                      struct slot *slot)
 705{
 706        int presence_save = 0;
 707        u8 hp_slot;
 708        u32 tempdword;
 709
 710        hp_slot = slot->device - ctrl->slot_device_offset;
 711
 712        tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
 713        presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15))
 714                                >> hp_slot) & 0x02;
 715
 716        return presence_save;
 717}
 718
 719static inline int wait_for_ctrl_irq(struct controller *ctrl)
 720{
 721        DECLARE_WAITQUEUE(wait, current);
 722        int retval = 0;
 723
 724        dbg("%s - start\n", __func__);
 725        add_wait_queue(&ctrl->queue, &wait);
 726        /* Sleep for up to 1 second to wait for the LED to change. */
 727        msleep_interruptible(1000);
 728        remove_wait_queue(&ctrl->queue, &wait);
 729        if (signal_pending(current))
 730                retval =  -EINTR;
 731
 732        dbg("%s - end\n", __func__);
 733        return retval;
 734}
 735
 736#include <asm/pci_x86.h>
 737static inline int cpqhp_routing_table_length(void)
 738{
 739        BUG_ON(cpqhp_routing_table == NULL);
 740        return ((cpqhp_routing_table->size - sizeof(struct irq_routing_table)) /
 741                sizeof(struct irq_info));
 742}
 743
 744#endif
 745