1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/kernel.h>
33#include <linux/string.h>
34#include <linux/types.h>
35#include <asm/byteorder.h>
36
37
38#define ATA_DMA_BOUNDARY 0xffffUL
39#define ATA_DMA_MASK 0xffffffffULL
40
41enum {
42
43 ATA_MAX_DEVICES = 2,
44 ATA_MAX_PRD = 256,
45 ATA_SECT_SIZE = 512,
46 ATA_MAX_SECTORS_128 = 128,
47 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_LBA48 = 65535,
49 ATA_MAX_SECTORS_TAPE = 65535,
50
51 ATA_ID_WORDS = 256,
52 ATA_ID_CONFIG = 0,
53 ATA_ID_CYLS = 1,
54 ATA_ID_HEADS = 3,
55 ATA_ID_SECTORS = 6,
56 ATA_ID_SERNO = 10,
57 ATA_ID_BUF_SIZE = 21,
58 ATA_ID_FW_REV = 23,
59 ATA_ID_PROD = 27,
60 ATA_ID_MAX_MULTSECT = 47,
61 ATA_ID_DWORD_IO = 48,
62 ATA_ID_CAPABILITY = 49,
63 ATA_ID_OLD_PIO_MODES = 51,
64 ATA_ID_OLD_DMA_MODES = 52,
65 ATA_ID_FIELD_VALID = 53,
66 ATA_ID_CUR_CYLS = 54,
67 ATA_ID_CUR_HEADS = 55,
68 ATA_ID_CUR_SECTORS = 56,
69 ATA_ID_MULTSECT = 59,
70 ATA_ID_LBA_CAPACITY = 60,
71 ATA_ID_SWDMA_MODES = 62,
72 ATA_ID_MWDMA_MODES = 63,
73 ATA_ID_PIO_MODES = 64,
74 ATA_ID_EIDE_DMA_MIN = 65,
75 ATA_ID_EIDE_DMA_TIME = 66,
76 ATA_ID_EIDE_PIO = 67,
77 ATA_ID_EIDE_PIO_IORDY = 68,
78 ATA_ID_ADDITIONAL_SUPP = 69,
79 ATA_ID_QUEUE_DEPTH = 75,
80 ATA_ID_SATA_CAPABILITY = 76,
81 ATA_ID_SATA_CAPABILITY_2 = 77,
82 ATA_ID_FEATURE_SUPP = 78,
83 ATA_ID_MAJOR_VER = 80,
84 ATA_ID_COMMAND_SET_1 = 82,
85 ATA_ID_COMMAND_SET_2 = 83,
86 ATA_ID_CFSSE = 84,
87 ATA_ID_CFS_ENABLE_1 = 85,
88 ATA_ID_CFS_ENABLE_2 = 86,
89 ATA_ID_CSF_DEFAULT = 87,
90 ATA_ID_UDMA_MODES = 88,
91 ATA_ID_HW_CONFIG = 93,
92 ATA_ID_SPG = 98,
93 ATA_ID_LBA_CAPACITY_2 = 100,
94 ATA_ID_SECTOR_SIZE = 106,
95 ATA_ID_WWN = 108,
96 ATA_ID_LOGICAL_SECTOR_SIZE = 117,
97 ATA_ID_LAST_LUN = 126,
98 ATA_ID_DLF = 128,
99 ATA_ID_CSFO = 129,
100 ATA_ID_CFA_POWER = 160,
101 ATA_ID_CFA_KEY_MGMT = 162,
102 ATA_ID_CFA_MODES = 163,
103 ATA_ID_DATA_SET_MGMT = 169,
104 ATA_ID_ROT_SPEED = 217,
105 ATA_ID_PIO4 = (1 << 1),
106
107 ATA_ID_SERNO_LEN = 20,
108 ATA_ID_FW_REV_LEN = 8,
109 ATA_ID_PROD_LEN = 40,
110 ATA_ID_WWN_LEN = 8,
111
112 ATA_PCI_CTL_OFS = 2,
113
114 ATA_PIO0 = (1 << 0),
115 ATA_PIO1 = ATA_PIO0 | (1 << 1),
116 ATA_PIO2 = ATA_PIO1 | (1 << 2),
117 ATA_PIO3 = ATA_PIO2 | (1 << 3),
118 ATA_PIO4 = ATA_PIO3 | (1 << 4),
119 ATA_PIO5 = ATA_PIO4 | (1 << 5),
120 ATA_PIO6 = ATA_PIO5 | (1 << 6),
121
122 ATA_PIO4_ONLY = (1 << 4),
123
124 ATA_SWDMA0 = (1 << 0),
125 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
126 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
127
128 ATA_SWDMA2_ONLY = (1 << 2),
129
130 ATA_MWDMA0 = (1 << 0),
131 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
132 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
133 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
134 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
135
136 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
137 ATA_MWDMA2_ONLY = (1 << 2),
138
139 ATA_UDMA0 = (1 << 0),
140 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
141 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
142 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
143 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
144 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
145 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
146 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
147
148
149 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
150
151 ATA_UDMA_MASK_40C = ATA_UDMA2,
152
153
154 ATA_PRD_SZ = 8,
155 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
156 ATA_PRD_EOT = (1 << 31),
157
158 ATA_DMA_TABLE_OFS = 4,
159 ATA_DMA_STATUS = 2,
160 ATA_DMA_CMD = 0,
161 ATA_DMA_WR = (1 << 3),
162 ATA_DMA_START = (1 << 0),
163 ATA_DMA_INTR = (1 << 2),
164 ATA_DMA_ERR = (1 << 1),
165 ATA_DMA_ACTIVE = (1 << 0),
166
167
168 ATA_HOB = (1 << 7),
169 ATA_NIEN = (1 << 1),
170 ATA_LBA = (1 << 6),
171 ATA_DEV1 = (1 << 4),
172 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
173 ATA_DEVCTL_OBS = (1 << 3),
174 ATA_BUSY = (1 << 7),
175 ATA_DRDY = (1 << 6),
176 ATA_DF = (1 << 5),
177 ATA_DSC = (1 << 4),
178 ATA_DRQ = (1 << 3),
179 ATA_CORR = (1 << 2),
180 ATA_IDX = (1 << 1),
181 ATA_ERR = (1 << 0),
182 ATA_SRST = (1 << 2),
183 ATA_ICRC = (1 << 7),
184 ATA_BBK = ATA_ICRC,
185 ATA_UNC = (1 << 6),
186 ATA_MC = (1 << 5),
187 ATA_IDNF = (1 << 4),
188 ATA_MCR = (1 << 3),
189 ATA_ABORTED = (1 << 2),
190 ATA_TRK0NF = (1 << 1),
191 ATA_AMNF = (1 << 0),
192 ATAPI_LFS = 0xF0,
193 ATAPI_EOM = ATA_TRK0NF,
194 ATAPI_ILI = ATA_AMNF,
195 ATAPI_IO = (1 << 1),
196 ATAPI_COD = (1 << 0),
197
198
199 ATA_REG_DATA = 0x00,
200 ATA_REG_ERR = 0x01,
201 ATA_REG_NSECT = 0x02,
202 ATA_REG_LBAL = 0x03,
203 ATA_REG_LBAM = 0x04,
204 ATA_REG_LBAH = 0x05,
205 ATA_REG_DEVICE = 0x06,
206 ATA_REG_STATUS = 0x07,
207
208 ATA_REG_FEATURE = ATA_REG_ERR,
209 ATA_REG_CMD = ATA_REG_STATUS,
210 ATA_REG_BYTEL = ATA_REG_LBAM,
211 ATA_REG_BYTEH = ATA_REG_LBAH,
212 ATA_REG_DEVSEL = ATA_REG_DEVICE,
213 ATA_REG_IRQ = ATA_REG_NSECT,
214
215
216 ATA_CMD_DEV_RESET = 0x08,
217 ATA_CMD_CHK_POWER = 0xE5,
218 ATA_CMD_STANDBY = 0xE2,
219 ATA_CMD_IDLE = 0xE3,
220 ATA_CMD_EDD = 0x90,
221 ATA_CMD_DOWNLOAD_MICRO = 0x92,
222 ATA_CMD_NOP = 0x00,
223 ATA_CMD_FLUSH = 0xE7,
224 ATA_CMD_FLUSH_EXT = 0xEA,
225 ATA_CMD_ID_ATA = 0xEC,
226 ATA_CMD_ID_ATAPI = 0xA1,
227 ATA_CMD_SERVICE = 0xA2,
228 ATA_CMD_READ = 0xC8,
229 ATA_CMD_READ_EXT = 0x25,
230 ATA_CMD_READ_QUEUED = 0x26,
231 ATA_CMD_READ_STREAM_EXT = 0x2B,
232 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
233 ATA_CMD_WRITE = 0xCA,
234 ATA_CMD_WRITE_EXT = 0x35,
235 ATA_CMD_WRITE_QUEUED = 0x36,
236 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
237 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
238 ATA_CMD_WRITE_FUA_EXT = 0x3D,
239 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
240 ATA_CMD_FPDMA_READ = 0x60,
241 ATA_CMD_FPDMA_WRITE = 0x61,
242 ATA_CMD_PIO_READ = 0x20,
243 ATA_CMD_PIO_READ_EXT = 0x24,
244 ATA_CMD_PIO_WRITE = 0x30,
245 ATA_CMD_PIO_WRITE_EXT = 0x34,
246 ATA_CMD_READ_MULTI = 0xC4,
247 ATA_CMD_READ_MULTI_EXT = 0x29,
248 ATA_CMD_WRITE_MULTI = 0xC5,
249 ATA_CMD_WRITE_MULTI_EXT = 0x39,
250 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
251 ATA_CMD_SET_FEATURES = 0xEF,
252 ATA_CMD_SET_MULTI = 0xC6,
253 ATA_CMD_PACKET = 0xA0,
254 ATA_CMD_VERIFY = 0x40,
255 ATA_CMD_VERIFY_EXT = 0x42,
256 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
257 ATA_CMD_STANDBYNOW1 = 0xE0,
258 ATA_CMD_IDLEIMMEDIATE = 0xE1,
259 ATA_CMD_SLEEP = 0xE6,
260 ATA_CMD_INIT_DEV_PARAMS = 0x91,
261 ATA_CMD_READ_NATIVE_MAX = 0xF8,
262 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
263 ATA_CMD_SET_MAX = 0xF9,
264 ATA_CMD_SET_MAX_EXT = 0x37,
265 ATA_CMD_READ_LOG_EXT = 0x2F,
266 ATA_CMD_WRITE_LOG_EXT = 0x3F,
267 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
268 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
269 ATA_CMD_TRUSTED_RCV = 0x5C,
270 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
271 ATA_CMD_TRUSTED_SND = 0x5E,
272 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
273 ATA_CMD_PMP_READ = 0xE4,
274 ATA_CMD_PMP_WRITE = 0xE8,
275 ATA_CMD_CONF_OVERLAY = 0xB1,
276 ATA_CMD_SEC_SET_PASS = 0xF1,
277 ATA_CMD_SEC_UNLOCK = 0xF2,
278 ATA_CMD_SEC_ERASE_PREP = 0xF3,
279 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
280 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
281 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
282 ATA_CMD_CONFIG_STREAM = 0x51,
283 ATA_CMD_SMART = 0xB0,
284 ATA_CMD_MEDIA_LOCK = 0xDE,
285 ATA_CMD_MEDIA_UNLOCK = 0xDF,
286 ATA_CMD_DSM = 0x06,
287 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
288 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
289 ATA_CMD_CFA_WRITE_NE = 0x38,
290 ATA_CMD_CFA_TRANS_SECT = 0x87,
291 ATA_CMD_CFA_ERASE = 0xC0,
292 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
293
294 ATA_CMD_RESTORE = 0x10,
295
296
297 ATA_LOG_SATA_NCQ = 0x10,
298 ATA_LOG_SATA_ID_DEV_DATA = 0x30,
299 ATA_LOG_SATA_SETTINGS = 0x08,
300 ATA_LOG_DEVSLP_OFFSET = 0x30,
301 ATA_LOG_DEVSLP_SIZE = 0x08,
302 ATA_LOG_DEVSLP_MDAT = 0x00,
303 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
304 ATA_LOG_DEVSLP_DETO = 0x01,
305 ATA_LOG_DEVSLP_VALID = 0x07,
306 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
307
308
309 ATA_CMD_READ_LONG = 0x22,
310 ATA_CMD_READ_LONG_ONCE = 0x23,
311 ATA_CMD_WRITE_LONG = 0x32,
312 ATA_CMD_WRITE_LONG_ONCE = 0x33,
313
314
315 SETFEATURES_XFER = 0x03,
316 XFER_UDMA_7 = 0x47,
317 XFER_UDMA_6 = 0x46,
318 XFER_UDMA_5 = 0x45,
319 XFER_UDMA_4 = 0x44,
320 XFER_UDMA_3 = 0x43,
321 XFER_UDMA_2 = 0x42,
322 XFER_UDMA_1 = 0x41,
323 XFER_UDMA_0 = 0x40,
324 XFER_MW_DMA_4 = 0x24,
325 XFER_MW_DMA_3 = 0x23,
326 XFER_MW_DMA_2 = 0x22,
327 XFER_MW_DMA_1 = 0x21,
328 XFER_MW_DMA_0 = 0x20,
329 XFER_SW_DMA_2 = 0x12,
330 XFER_SW_DMA_1 = 0x11,
331 XFER_SW_DMA_0 = 0x10,
332 XFER_PIO_6 = 0x0E,
333 XFER_PIO_5 = 0x0D,
334 XFER_PIO_4 = 0x0C,
335 XFER_PIO_3 = 0x0B,
336 XFER_PIO_2 = 0x0A,
337 XFER_PIO_1 = 0x09,
338 XFER_PIO_0 = 0x08,
339 XFER_PIO_SLOW = 0x00,
340
341 SETFEATURES_WC_ON = 0x02,
342 SETFEATURES_WC_OFF = 0x82,
343
344
345 SETFEATURES_AAM_ON = 0x42,
346 SETFEATURES_AAM_OFF = 0xC2,
347
348 SETFEATURES_SPINUP = 0x07,
349
350 SETFEATURES_SATA_ENABLE = 0x10,
351 SETFEATURES_SATA_DISABLE = 0x90,
352
353
354 SATA_FPDMA_OFFSET = 0x01,
355 SATA_FPDMA_AA = 0x02,
356 SATA_DIPM = 0x03,
357 SATA_FPDMA_IN_ORDER = 0x04,
358 SATA_AN = 0x05,
359 SATA_SSP = 0x06,
360 SATA_DEVSLP = 0x09,
361
362
363 ATA_SET_MAX_ADDR = 0x00,
364 ATA_SET_MAX_PASSWD = 0x01,
365 ATA_SET_MAX_LOCK = 0x02,
366 ATA_SET_MAX_UNLOCK = 0x03,
367 ATA_SET_MAX_FREEZE_LOCK = 0x04,
368
369
370 ATA_DCO_RESTORE = 0xC0,
371 ATA_DCO_FREEZE_LOCK = 0xC1,
372 ATA_DCO_IDENTIFY = 0xC2,
373 ATA_DCO_SET = 0xC3,
374
375
376 ATA_SMART_ENABLE = 0xD8,
377 ATA_SMART_READ_VALUES = 0xD0,
378 ATA_SMART_READ_THRESHOLDS = 0xD1,
379
380
381 ATA_DSM_TRIM = 0x01,
382
383
384 ATA_SMART_LBAM_PASS = 0x4F,
385 ATA_SMART_LBAH_PASS = 0xC2,
386
387
388 ATAPI_PKT_DMA = (1 << 0),
389 ATAPI_DMADIR = (1 << 2),
390
391 ATAPI_CDB_LEN = 16,
392
393
394 SATA_PMP_MAX_PORTS = 15,
395 SATA_PMP_CTRL_PORT = 15,
396
397 SATA_PMP_GSCR_DWORDS = 128,
398 SATA_PMP_GSCR_PROD_ID = 0,
399 SATA_PMP_GSCR_REV = 1,
400 SATA_PMP_GSCR_PORT_INFO = 2,
401 SATA_PMP_GSCR_ERROR = 32,
402 SATA_PMP_GSCR_ERROR_EN = 33,
403 SATA_PMP_GSCR_FEAT = 64,
404 SATA_PMP_GSCR_FEAT_EN = 96,
405
406 SATA_PMP_PSCR_STATUS = 0,
407 SATA_PMP_PSCR_ERROR = 1,
408 SATA_PMP_PSCR_CONTROL = 2,
409
410 SATA_PMP_FEAT_BIST = (1 << 0),
411 SATA_PMP_FEAT_PMREQ = (1 << 1),
412 SATA_PMP_FEAT_DYNSSC = (1 << 2),
413 SATA_PMP_FEAT_NOTIFY = (1 << 3),
414
415
416 ATA_CBL_NONE = 0,
417 ATA_CBL_PATA40 = 1,
418 ATA_CBL_PATA80 = 2,
419 ATA_CBL_PATA40_SHORT = 3,
420 ATA_CBL_PATA_UNK = 4,
421 ATA_CBL_PATA_IGN = 5,
422 ATA_CBL_SATA = 6,
423
424
425 SCR_STATUS = 0,
426 SCR_ERROR = 1,
427 SCR_CONTROL = 2,
428 SCR_ACTIVE = 3,
429 SCR_NOTIFICATION = 4,
430
431
432 SERR_DATA_RECOVERED = (1 << 0),
433 SERR_COMM_RECOVERED = (1 << 1),
434 SERR_DATA = (1 << 8),
435 SERR_PERSISTENT = (1 << 9),
436 SERR_PROTOCOL = (1 << 10),
437 SERR_INTERNAL = (1 << 11),
438 SERR_PHYRDY_CHG = (1 << 16),
439 SERR_PHY_INT_ERR = (1 << 17),
440 SERR_COMM_WAKE = (1 << 18),
441 SERR_10B_8B_ERR = (1 << 19),
442 SERR_DISPARITY = (1 << 20),
443 SERR_CRC = (1 << 21),
444 SERR_HANDSHAKE = (1 << 22),
445 SERR_LINK_SEQ_ERR = (1 << 23),
446 SERR_TRANS_ST_ERROR = (1 << 24),
447 SERR_UNRECOG_FIS = (1 << 25),
448 SERR_DEV_XCHG = (1 << 26),
449
450
451 ATA_TFLAG_LBA48 = (1 << 0),
452 ATA_TFLAG_ISADDR = (1 << 1),
453 ATA_TFLAG_DEVICE = (1 << 2),
454 ATA_TFLAG_WRITE = (1 << 3),
455 ATA_TFLAG_LBA = (1 << 4),
456 ATA_TFLAG_FUA = (1 << 5),
457 ATA_TFLAG_POLLING = (1 << 6),
458
459
460 ATA_PROT_FLAG_PIO = (1 << 0),
461 ATA_PROT_FLAG_DMA = (1 << 1),
462 ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
463 ATA_PROT_FLAG_NCQ = (1 << 2),
464 ATA_PROT_FLAG_ATAPI = (1 << 3),
465};
466
467enum ata_tf_protocols {
468
469 ATA_PROT_UNKNOWN,
470 ATA_PROT_NODATA,
471 ATA_PROT_PIO,
472 ATA_PROT_DMA,
473 ATA_PROT_NCQ,
474 ATAPI_PROT_NODATA,
475 ATAPI_PROT_PIO,
476 ATAPI_PROT_DMA,
477};
478
479enum ata_ioctls {
480 ATA_IOC_GET_IO32 = 0x309,
481 ATA_IOC_SET_IO32 = 0x324,
482};
483
484
485
486struct ata_bmdma_prd {
487 __le32 addr;
488 __le32 flags_len;
489};
490
491struct ata_taskfile {
492 unsigned long flags;
493 u8 protocol;
494
495 u8 ctl;
496
497 u8 hob_feature;
498 u8 hob_nsect;
499 u8 hob_lbal;
500 u8 hob_lbam;
501 u8 hob_lbah;
502
503 u8 feature;
504 u8 nsect;
505 u8 lbal;
506 u8 lbam;
507 u8 lbah;
508
509 u8 device;
510
511 u8 command;
512};
513
514
515
516
517static inline unsigned int ata_prot_flags(u8 prot)
518{
519 switch (prot) {
520 case ATA_PROT_NODATA:
521 return 0;
522 case ATA_PROT_PIO:
523 return ATA_PROT_FLAG_PIO;
524 case ATA_PROT_DMA:
525 return ATA_PROT_FLAG_DMA;
526 case ATA_PROT_NCQ:
527 return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
528 case ATAPI_PROT_NODATA:
529 return ATA_PROT_FLAG_ATAPI;
530 case ATAPI_PROT_PIO:
531 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
532 case ATAPI_PROT_DMA:
533 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
534 }
535 return 0;
536}
537
538static inline int ata_is_atapi(u8 prot)
539{
540 return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
541}
542
543static inline int ata_is_nodata(u8 prot)
544{
545 return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
546}
547
548static inline int ata_is_pio(u8 prot)
549{
550 return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
551}
552
553static inline int ata_is_dma(u8 prot)
554{
555 return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
556}
557
558static inline int ata_is_ncq(u8 prot)
559{
560 return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
561}
562
563static inline int ata_is_data(u8 prot)
564{
565 return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
566}
567
568
569
570
571#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
572#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
573#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
574#define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
575#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
576#define ata_id_removeable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
577#define ata_id_has_atapi_AN(id) \
578 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
579 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
580 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
581#define ata_id_has_fpdma_aa(id) \
582 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
583 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
584 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
585#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
586#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
587#define ata_id_u32(id,n) \
588 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
589#define ata_id_u64(id,n) \
590 ( ((u64) (id)[(n) + 3] << 48) | \
591 ((u64) (id)[(n) + 2] << 32) | \
592 ((u64) (id)[(n) + 1] << 16) | \
593 ((u64) (id)[(n) + 0]) )
594
595#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
596#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
597#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
598
599static inline bool ata_id_has_hipm(const u16 *id)
600{
601 u16 val = id[ATA_ID_SATA_CAPABILITY];
602
603 if (val == 0 || val == 0xffff)
604 return false;
605
606 return val & (1 << 9);
607}
608
609static inline bool ata_id_has_dipm(const u16 *id)
610{
611 u16 val = id[ATA_ID_FEATURE_SUPP];
612
613 if (val == 0 || val == 0xffff)
614 return false;
615
616 return val & (1 << 3);
617}
618
619
620static inline bool ata_id_has_fua(const u16 *id)
621{
622 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
623 return false;
624 return id[ATA_ID_CFSSE] & (1 << 6);
625}
626
627static inline bool ata_id_has_flush(const u16 *id)
628{
629 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
630 return false;
631 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
632}
633
634static inline bool ata_id_flush_enabled(const u16 *id)
635{
636 if (ata_id_has_flush(id) == 0)
637 return false;
638 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
639 return false;
640 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
641}
642
643static inline bool ata_id_has_flush_ext(const u16 *id)
644{
645 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
646 return false;
647 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
648}
649
650static inline bool ata_id_flush_ext_enabled(const u16 *id)
651{
652 if (ata_id_has_flush_ext(id) == 0)
653 return false;
654 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
655 return false;
656
657
658
659
660 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
661}
662
663static inline u32 ata_id_logical_sector_size(const u16 *id)
664{
665
666
667
668
669 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
670 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
671 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
672 return ATA_SECT_SIZE;
673}
674
675static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
676{
677
678
679
680
681 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
682 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
683 return 0;
684}
685
686
687
688
689
690
691
692
693
694
695static inline u16 ata_id_logical_sector_offset(const u16 *id,
696 u8 log2_per_phys)
697{
698 u16 word_209 = id[209];
699
700 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
701 u16 first = word_209 & 0x3fff;
702 if (first > 0)
703 return (1 << log2_per_phys) - first;
704 }
705 return 0;
706}
707
708static inline bool ata_id_has_lba48(const u16 *id)
709{
710 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
711 return false;
712 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
713 return false;
714 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
715}
716
717static inline bool ata_id_lba48_enabled(const u16 *id)
718{
719 if (ata_id_has_lba48(id) == 0)
720 return false;
721 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
722 return false;
723 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
724}
725
726static inline bool ata_id_hpa_enabled(const u16 *id)
727{
728
729 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
730 return false;
731
732 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
733 return false;
734
735 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
736 return false;
737 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
738}
739
740static inline bool ata_id_has_wcache(const u16 *id)
741{
742
743 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
744 return false;
745 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
746}
747
748static inline bool ata_id_has_pm(const u16 *id)
749{
750 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
751 return false;
752 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
753}
754
755static inline bool ata_id_rahead_enabled(const u16 *id)
756{
757 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
758 return false;
759 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
760}
761
762static inline bool ata_id_wcache_enabled(const u16 *id)
763{
764 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
765 return false;
766 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
767}
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782static inline unsigned int ata_id_major_version(const u16 *id)
783{
784 unsigned int mver;
785
786 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
787 return 0;
788
789 for (mver = 14; mver >= 1; mver--)
790 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
791 break;
792 return mver;
793}
794
795static inline bool ata_id_is_sata(const u16 *id)
796{
797
798
799
800
801
802
803 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
804 return true;
805 return false;
806}
807
808static inline bool ata_id_has_tpm(const u16 *id)
809{
810
811 if (ata_id_major_version(id) < 8)
812 return false;
813 if ((id[48] & 0xC000) != 0x4000)
814 return false;
815 return id[48] & (1 << 0);
816}
817
818static inline bool ata_id_has_dword_io(const u16 *id)
819{
820
821 if (ata_id_major_version(id) > 7)
822 return false;
823 return id[ATA_ID_DWORD_IO] & (1 << 0);
824}
825
826static inline bool ata_id_has_unload(const u16 *id)
827{
828 if (ata_id_major_version(id) >= 7 &&
829 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
830 id[ATA_ID_CFSSE] & (1 << 13))
831 return true;
832 return false;
833}
834
835static inline bool ata_id_has_wwn(const u16 *id)
836{
837 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
838}
839
840static inline int ata_id_form_factor(const u16 *id)
841{
842 u16 val = id[168];
843
844 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
845 return 0;
846
847 val &= 0xf;
848
849 if (val > 5)
850 return 0;
851
852 return val;
853}
854
855static inline int ata_id_rotation_rate(const u16 *id)
856{
857 u16 val = id[217];
858
859 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
860 return 0;
861
862 if (val > 1 && val < 0x401)
863 return 0;
864
865 return val;
866}
867
868static inline bool ata_id_has_trim(const u16 *id)
869{
870 if (ata_id_major_version(id) >= 7 &&
871 (id[ATA_ID_DATA_SET_MGMT] & 1))
872 return true;
873 return false;
874}
875
876static inline bool ata_id_has_zero_after_trim(const u16 *id)
877{
878
879 if (ata_id_has_trim(id) &&
880 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
881 return true;
882
883 return false;
884}
885
886static inline bool ata_id_current_chs_valid(const u16 *id)
887{
888
889
890
891 return (id[ATA_ID_FIELD_VALID] & 1) &&
892 id[ATA_ID_CUR_CYLS] &&
893 id[ATA_ID_CUR_HEADS] &&
894 id[ATA_ID_CUR_HEADS] <= 16 &&
895 id[ATA_ID_CUR_SECTORS];
896}
897
898static inline bool ata_id_is_cfa(const u16 *id)
899{
900 if ((id[ATA_ID_CONFIG] == 0x848A) ||
901 (id[ATA_ID_CONFIG] == 0x844A))
902 return true;
903
904
905
906
907
908
909
910
911 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
912}
913
914static inline bool ata_id_is_ssd(const u16 *id)
915{
916 return id[ATA_ID_ROT_SPEED] == 0x01;
917}
918
919static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
920{
921
922 if (pio > 4 && ata_id_is_cfa(id))
923 return false;
924
925 if (pio > 2)
926 return true;
927
928 return ata_id_has_iordy(id);
929}
930
931static inline bool ata_drive_40wire(const u16 *dev_id)
932{
933 if (ata_id_is_sata(dev_id))
934 return false;
935 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
936 return false;
937 return true;
938}
939
940static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
941{
942 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
943 return false;
944 return true;
945}
946
947static inline int atapi_cdb_len(const u16 *dev_id)
948{
949 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
950 switch (tmp) {
951 case 0: return 12;
952 case 1: return 16;
953 default: return -1;
954 }
955}
956
957static inline bool atapi_command_packet_set(const u16 *dev_id)
958{
959 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
960}
961
962static inline bool atapi_id_dmadir(const u16 *dev_id)
963{
964 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
965}
966
967
968
969
970
971
972
973
974
975static inline bool ata_id_is_lba_capacity_ok(u16 *id)
976{
977 unsigned long lba_sects, chs_sects, head, tail;
978
979
980 if (id[ATA_ID_CYLS] == 0)
981 return true;
982
983 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
984
985
986
987
988
989
990
991 if ((id[ATA_ID_CYLS] == 16383 ||
992 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
993 id[ATA_ID_SECTORS] == 63 &&
994 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
995 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
996 return true;
997
998 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
999
1000
1001 if (lba_sects - chs_sects < chs_sects/10)
1002 return true;
1003
1004
1005 head = (lba_sects >> 16) & 0xffff;
1006 tail = lba_sects & 0xffff;
1007 lba_sects = head | (tail << 16);
1008
1009 if (lba_sects - chs_sects < chs_sects/10) {
1010 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
1011 return true;
1012 }
1013
1014 return false;
1015}
1016
1017static inline void ata_id_to_hd_driveid(u16 *id)
1018{
1019#ifdef __BIG_ENDIAN
1020
1021 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1022 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1023 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1024 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1025 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1026
1027
1028 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1029 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
1030
1031
1032 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1033 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1034#endif
1035}
1036
1037
1038
1039
1040
1041
1042static inline unsigned ata_set_lba_range_entries(void *_buffer,
1043 unsigned buf_size, u64 sector, unsigned long count)
1044{
1045 __le64 *buffer = _buffer;
1046 unsigned i = 0, used_bytes;
1047
1048 while (i < buf_size / 8 ) {
1049 u64 entry = sector |
1050 ((u64)(count > 0xffff ? 0xffff : count) << 48);
1051 buffer[i++] = __cpu_to_le64(entry);
1052 if (count <= 0xffff)
1053 break;
1054 count -= 0xffff;
1055 sector += 0xffff;
1056 }
1057
1058 used_bytes = ALIGN(i * 8, 512);
1059 memset(buffer + i, 0, used_bytes - i * 8);
1060 return used_bytes;
1061}
1062
1063static inline int is_multi_taskfile(struct ata_taskfile *tf)
1064{
1065 return (tf->command == ATA_CMD_READ_MULTI) ||
1066 (tf->command == ATA_CMD_WRITE_MULTI) ||
1067 (tf->command == ATA_CMD_READ_MULTI_EXT) ||
1068 (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
1069 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
1070}
1071
1072static inline bool ata_ok(u8 status)
1073{
1074 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1075 == ATA_DRDY);
1076}
1077
1078static inline bool lba_28_ok(u64 block, u32 n_block)
1079{
1080
1081 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
1082}
1083
1084static inline bool lba_48_ok(u64 block, u32 n_block)
1085{
1086
1087 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1088}
1089
1090#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1091#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1092#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1093#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1094
1095#endif
1096